drivers/bcma/driver_mips.c

   1 /*
   2  * Broadcom specific AMBA
   3  * Broadcom MIPS32 74K core driver
   4  *
   5  * Copyright 2009, Broadcom Corporation
   6  * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
   7  * Copyright 2010, Bernhard Loos <bernhardloos@googlemail.com>
   8  * Copyright 2011, Hauke Mehrtens <hauke@hauke-m.de>
   9  *
  10  * Licensed under the GNU/GPL. See COPYING for details.
  11  */
  12
  13 #include "bcma_private.h"
  14
  15 #include <linux/bcma/bcma.h>
  16
  17 #include <linux/serial.h>
  18 #include <linux/serial_core.h>
  19 #include <linux/serial_reg.h>
  20 #include <linux/time.h>
  21
  22 /* The 47162a0 hangs when reading MIPS DMP registers registers */
  23 static inline bool bcma_core_mips_bcm47162a0_quirk(struct bcma_device *dev)
  24 {
  25         return dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM47162 &&
  26                dev->bus->chipinfo.rev == 0 && dev->id.id == BCMA_CORE_MIPS_74K;
  27 }
  28
  29 /* The 5357b0 hangs when reading USB20H DMP registers */
  30 static inline bool bcma_core_mips_bcm5357b0_quirk(struct bcma_device *dev)
  31 {
  32         return (dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM5357 ||
  33                 dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM4749) &&
  34                dev->bus->chipinfo.pkg == 11 &&
  35                dev->id.id == BCMA_CORE_USB20_HOST;
  36 }
  37
  38 static inline u32 mips_read32(struct bcma_drv_mips *mcore,
  39                               u16 offset)
  40 {
  41         return bcma_read32(mcore->core, offset);
  42 }
  43
  44 static inline void mips_write32(struct bcma_drv_mips *mcore,
  45                                 u16 offset,
  46                                 u32 value)
  47 {
  48         bcma_write32(mcore->core, offset, value);
  49 }
  50
  51 static const u32 ipsflag_irq_mask[] = {
  52         0,
  53         BCMA_MIPS_IPSFLAG_IRQ1,
  54         BCMA_MIPS_IPSFLAG_IRQ2,
  55         BCMA_MIPS_IPSFLAG_IRQ3,
  56         BCMA_MIPS_IPSFLAG_IRQ4,
  57 };
  58
  59 static const u32 ipsflag_irq_shift[] = {
  60         0,
  61         BCMA_MIPS_IPSFLAG_IRQ1_SHIFT,
  62         BCMA_MIPS_IPSFLAG_IRQ2_SHIFT,
  63         BCMA_MIPS_IPSFLAG_IRQ3_SHIFT,
  64         BCMA_MIPS_IPSFLAG_IRQ4_SHIFT,
  65 };
  66
  67 static u32 bcma_core_mips_irqflag(struct bcma_device *dev)
  68 {
  69         u32 flag;
  70
  71         if (bcma_core_mips_bcm47162a0_quirk(dev))
  72                 return dev->core_index;
  73         if (bcma_core_mips_bcm5357b0_quirk(dev))
  74                 return dev->core_index;
  75         flag = bcma_aread32(dev, BCMA_MIPS_OOBSELOUTA30);
  76
  77         if (flag)
  78                 return flag & 0x1F;
  79         else
  80                 return 0x3f;
  81 }
  82
  83 /* Get the MIPS IRQ assignment for a specified device.
  84  * If unassigned, 0 is returned.
  85  * If disabled, 5 is returned.
  86  * If not supported, 6 is returned.
  87  */
  88 unsigned int bcma_core_mips_irq(struct bcma_device *dev)
  89 {
  90         struct bcma_device *mdev = dev->bus->drv_mips.core;
  91         u32 irqflag;
  92         unsigned int irq;
  93
  94         irqflag = bcma_core_mips_irqflag(dev);
  95         if (irqflag == 0x3f)
  96                 return 6;
  97
  98         for (irq = 0; irq <= 4; irq++)
  99                 if (bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq)) &
 100                     (1 << irqflag))
 101                         return irq;
 102
 103         return 5;
 104 }
 105 EXPORT_SYMBOL(bcma_core_mips_irq);
 106
 107 static void bcma_core_mips_set_irq(struct bcma_device *dev, unsigned int irq)
 108 {
 109         unsigned int oldirq = bcma_core_mips_irq(dev);
 110         struct bcma_bus *bus = dev->bus;
 111         struct bcma_device *mdev = bus->drv_mips.core;
 112         u32 irqflag;
 113
 114         irqflag = bcma_core_mips_irqflag(dev);
 115         BUG_ON(oldirq == 6);
 116
 117         dev->irq = irq + 2;
 118
 119         /* clear the old irq */
 120         if (oldirq == 0)
 121                 bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0),
 122                             bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0)) &
 123                             ~(1 << irqflag));
 124         else if (oldirq != 5)
 125                 bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(oldirq), 0);
 126
 127         /* assign the new one */
 128         if (irq == 0) {
 129                 bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0),
 130                             bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0)) |
 131                             (1 << irqflag));
 132         } else {
 133                 u32 irqinitmask = bcma_read32(mdev,
 134                                               BCMA_MIPS_MIPS74K_INTMASK(irq));
 135                 if (irqinitmask) {
 136                         struct bcma_device *core;
 137
 138                         /* backplane irq line is in use, find out who uses
 139                          * it and set user to irq 0
 140                          */
 141                         list_for_each_entry(core, &bus->cores, list) {
 142                                 if ((1 << bcma_core_mips_irqflag(core)) ==
 143                                     irqinitmask) {
 144                                         bcma_core_mips_set_irq(core, 0);
 145                                         break;
 146                                 }
 147                         }
 148                 }
 149                 bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq),
 150                              1 << irqflag);
 151         }
 152
 153         bcma_debug(bus, "set_irq: core 0x%04x, irq %d => %d\n",
 154                    dev->id.id, oldirq <= 4 ? oldirq + 2 : 0, irq + 2);
 155 }
 156
 157 static void bcma_core_mips_set_irq_name(struct bcma_bus *bus, unsigned int irq,
 158                                         u16 coreid, u8 unit)
 159 {
 160         struct bcma_device *core;
 161
 162         core = bcma_find_core_unit(bus, coreid, unit);
 163         if (!core) {
 164                 bcma_warn(bus,
 165                           "Can not find core (id: 0x%x, unit %i) for IRQ configuration.\n",
 166                           coreid, unit);
 167                 return;
 168         }
 169
 170         bcma_core_mips_set_irq(core, irq);
 171 }
 172
 173 static void bcma_core_mips_print_irq(struct bcma_device *dev, unsigned int irq)
 174 {
 175         int i;
 176         static const char *irq_name[] = {"2(S)", "3", "4", "5", "6", "D", "I"};
 177         printk(KERN_DEBUG KBUILD_MODNAME ": core 0x%04x, irq :", dev->id.id);
 178         for (i = 0; i <= 6; i++)
 179                 printk(" %s%s", irq_name[i], i == irq ? "*" : " ");
 180         printk("\n");
 181 }
 182
 183 static void bcma_core_mips_dump_irq(struct bcma_bus *bus)
 184 {
 185         struct bcma_device *core;
 186
 187         list_for_each_entry(core, &bus->cores, list) {
 188                 bcma_core_mips_print_irq(core, bcma_core_mips_irq(core));
 189         }
 190 }
 191
 192 u32 bcma_cpu_clock(struct bcma_drv_mips *mcore)
 193 {
 194         struct bcma_bus *bus = mcore->core->bus;
 195
 196         if (bus->drv_cc.capabilities & BCMA_CC_CAP_PMU)
 197                 return bcma_pmu_get_cpu_clock(&bus->drv_cc);
 198
 199         bcma_err(bus, "No PMU available, need this to get the cpu clock\n");
 200         return 0;
 201 }
 202 EXPORT_SYMBOL(bcma_cpu_clock);
 203
 204 static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore)
 205 {
 206         struct bcma_bus *bus = mcore->core->bus;
 207         struct bcma_drv_cc *cc = &bus->drv_cc;
 208
 209         switch (cc->capabilities & BCMA_CC_CAP_FLASHT) {
 210         case BCMA_CC_FLASHT_STSER:
 211         case BCMA_CC_FLASHT_ATSER:
 212                 bcma_debug(bus, "Found serial flash\n");
 213                 bcma_sflash_init(cc);
 214                 break;
 215         case BCMA_CC_FLASHT_PARA:
 216                 bcma_debug(bus, "Found parallel flash\n");
 217                 cc->pflash.present = true;
 218                 cc->pflash.window = BCMA_SOC_FLASH2;
 219                 cc->pflash.window_size = BCMA_SOC_FLASH2_SZ;
 220
 221                 if ((bcma_read32(cc->core, BCMA_CC_FLASH_CFG) &
 222                      BCMA_CC_FLASH_CFG_DS) == 0)
 223                         cc->pflash.buswidth = 1;
 224                 else
 225                         cc->pflash.buswidth = 2;
 226                 break;
 227         default:
 228                 bcma_err(bus, "Flash type not supported\n");
 229         }
 230
 231         if (cc->core->id.rev == 38 ||
 232             bus->chipinfo.id == BCMA_CHIP_ID_BCM4706) {
 233                 if (cc->capabilities & BCMA_CC_CAP_NFLASH) {
 234                         bcma_debug(bus, "Found NAND flash\n");
 235                         bcma_nflash_init(cc);
 236                 }
 237         }
 238 }
 239
 240 void bcma_core_mips_early_init(struct bcma_drv_mips *mcore)
 241 {
 242         struct bcma_bus *bus = mcore->core->bus;
 243
 244         if (mcore->early_setup_done)
 245                 return;
 246
 247         bcma_chipco_serial_init(&bus->drv_cc);
 248         bcma_core_mips_flash_detect(mcore);
 249
 250         mcore->early_setup_done = true;
 251 }
 252
 253 void bcma_core_mips_init(struct bcma_drv_mips *mcore)
 254 {
 255         struct bcma_bus *bus;
 256         struct bcma_device *core;
 257         bus = mcore->core->bus;
 258
 259         if (mcore->setup_done)
 260                 return;
 261
 262         bcma_debug(bus, "Initializing MIPS core...\n");
 263
 264         bcma_core_mips_early_init(mcore);
 265
 266         switch (bus->chipinfo.id) {
 267         case BCMA_CHIP_ID_BCM4716:
 268         case BCMA_CHIP_ID_BCM4748:
 269                 bcma_core_mips_set_irq_name(bus, 1, BCMA_CORE_80211, 0);
 270                 bcma_core_mips_set_irq_name(bus, 2, BCMA_CORE_MAC_GBIT, 0);
 271                 bcma_core_mips_set_irq_name(bus, 3, BCMA_CORE_USB20_HOST, 0);
 272                 bcma_core_mips_set_irq_name(bus, 4, BCMA_CORE_PCIE, 0);
 273                 bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_CHIPCOMMON, 0);
 274                 bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_I2S, 0);
 275                 break;
 276         case BCMA_CHIP_ID_BCM5356:
 277         case BCMA_CHIP_ID_BCM47162:
 278         case BCMA_CHIP_ID_BCM53572:
 279                 bcma_core_mips_set_irq_name(bus, 1, BCMA_CORE_80211, 0);
 280                 bcma_core_mips_set_irq_name(bus, 2, BCMA_CORE_MAC_GBIT, 0);
 281                 bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_CHIPCOMMON, 0);
 282                 break;
 283         case BCMA_CHIP_ID_BCM5357:
 284         case BCMA_CHIP_ID_BCM4749:
 285                 bcma_core_mips_set_irq_name(bus, 1, BCMA_CORE_80211, 0);
 286                 bcma_core_mips_set_irq_name(bus, 2, BCMA_CORE_MAC_GBIT, 0);
 287                 bcma_core_mips_set_irq_name(bus, 3, BCMA_CORE_USB20_HOST, 0);
 288                 bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_CHIPCOMMON, 0);
 289                 bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_I2S, 0);
 290                 break;
 291         case BCMA_CHIP_ID_BCM4706:
 292                 bcma_core_mips_set_irq_name(bus, 1, BCMA_CORE_PCIE, 0);
 293                 bcma_core_mips_set_irq_name(bus, 2, BCMA_CORE_4706_MAC_GBIT,
 294                                             0);
 295                 bcma_core_mips_set_irq_name(bus, 3, BCMA_CORE_PCIE, 1);
 296                 bcma_core_mips_set_irq_name(bus, 4, BCMA_CORE_USB20_HOST, 0);
 297                 bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_4706_CHIPCOMMON,
 298                                             0);
 299                 break;
 300         default:
 301                 list_for_each_entry(core, &bus->cores, list) {
 302                         core->irq = bcma_core_mips_irq(core) + 2;
 303                 }
 304                 bcma_err(bus,
 305                          "Unknown device (0x%x) found, can not configure IRQs\n",
 306                          bus->chipinfo.id);
 307         }
 308         bcma_debug(bus, "IRQ reconfiguration done\n");
 309         bcma_core_mips_dump_irq(bus);
 310
 311         mcore->setup_done = true;
 312 }