drivers/block/nvme-core.c

   1 /*
   2  * NVM Express device driver
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include <linux/nvme.h>
  16 #include <linux/bitops.h>
  17 #include <linux/blkdev.h>
  18 #include <linux/blk-mq.h>
  19 #include <linux/cpu.h>
  20 #include <linux/delay.h>
  21 #include <linux/errno.h>
  22 #include <linux/fs.h>
  23 #include <linux/genhd.h>
  24 #include <linux/hdreg.h>
  25 #include <linux/idr.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/io.h>
  29 #include <linux/kdev_t.h>
  30 #include <linux/kthread.h>
  31 #include <linux/kernel.h>
  32 #include <linux/list_sort.h>
  33 #include <linux/mm.h>
  34 #include <linux/module.h>
  35 #include <linux/moduleparam.h>
  36 #include <linux/pci.h>
  37 #include <linux/poison.h>
  38 #include <linux/ptrace.h>
  39 #include <linux/sched.h>
  40 #include <linux/slab.h>
  41 #include <linux/t10-pi.h>
  42 #include <linux/types.h>
  43 #include <scsi/sg.h>
  44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
  45
  46 #define NVME_MINORS             (1U << MINORBITS)
  47 #define NVME_Q_DEPTH            1024
  48 #define NVME_AQ_DEPTH           256
  49 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
  50 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
  51 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
  52 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
  53
  54 static unsigned char admin_timeout = 60;
  55 module_param(admin_timeout, byte, 0644);
  56 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  57
  58 unsigned char nvme_io_timeout = 30;
  59 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  60 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  61
  62 static unsigned char shutdown_timeout = 5;
  63 module_param(shutdown_timeout, byte, 0644);
  64 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  65
  66 static int nvme_major;
  67 module_param(nvme_major, int, 0);
  68
  69 static int nvme_char_major;
  70 module_param(nvme_char_major, int, 0);
  71
  72 static int use_threaded_interrupts;
  73 module_param(use_threaded_interrupts, int, 0);
  74
  75 static bool use_cmb_sqes = true;
  76 module_param(use_cmb_sqes, bool, 0644);
  77 MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");
  78
  79 static DEFINE_SPINLOCK(dev_list_lock);
  80 static LIST_HEAD(dev_list);
  81 static struct task_struct *nvme_thread;
  82 static struct workqueue_struct *nvme_workq;
  83 static wait_queue_head_t nvme_kthread_wait;
  84
  85 static struct class *nvme_class;
  86
  87 static int __nvme_reset(struct nvme_dev *dev);
  88 static int nvme_reset(struct nvme_dev *dev);
  89 static int nvme_process_cq(struct nvme_queue *nvmeq);
  90
  91 struct async_cmd_info {
  92         struct kthread_work work;
  93         struct kthread_worker *worker;
  94         struct request *req;
  95         u32 result;
  96         int status;
  97         void *ctx;
  98 };
  99
 100 /*
 101  * An NVM Express queue.  Each device has at least two (one for admin
 102  * commands and one for I/O commands).
 103  */
 104 struct nvme_queue {
 105         struct device *q_dmadev;
 106         struct nvme_dev *dev;
 107         char irqname[24];       /* nvme4294967295-65535\0 */
 108         spinlock_t q_lock;
 109         struct nvme_command *sq_cmds;
 110         struct nvme_command __iomem *sq_cmds_io;
 111         volatile struct nvme_completion *cqes;
 112         struct blk_mq_tags **tags;
 113         dma_addr_t sq_dma_addr;
 114         dma_addr_t cq_dma_addr;
 115         u32 __iomem *q_db;
 116         u16 q_depth;
 117         s16 cq_vector;
 118         u16 sq_head;
 119         u16 sq_tail;
 120         u16 cq_head;
 121         u16 qid;
 122         u8 cq_phase;
 123         u8 cqe_seen;
 124         struct async_cmd_info cmdinfo;
 125 };
 126
 127 /*
 128  * Check we didin't inadvertently grow the command struct
 129  */
 130 static inline void _nvme_check_size(void)
 131 {
 132         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
 133         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
 134         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
 135         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
 136         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
 137         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
 138         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
 139         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
 140         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
 141         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
 142         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
 143         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
 144 }
 145
 146 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
 147                                                 struct nvme_completion *);
 148
 149 struct nvme_cmd_info {
 150         nvme_completion_fn fn;
 151         void *ctx;
 152         int aborted;
 153         struct nvme_queue *nvmeq;
 154         struct nvme_iod iod[0];
 155 };
 156
 157 /*
 158  * Max size of iod being embedded in the request payload
 159  */
 160 #define NVME_INT_PAGES          2
 161 #define NVME_INT_BYTES(dev)     (NVME_INT_PAGES * (dev)->page_size)
 162 #define NVME_INT_MASK           0x01
 163
 164 /*
 165  * Will slightly overestimate the number of pages needed.  This is OK
 166  * as it only leads to a small amount of wasted memory for the lifetime of
 167  * the I/O.
 168  */
 169 static int nvme_npages(unsigned size, struct nvme_dev *dev)
 170 {
 171         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
 172         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
 173 }
 174
 175 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
 176 {
 177         unsigned int ret = sizeof(struct nvme_cmd_info);
 178
 179         ret += sizeof(struct nvme_iod);
 180         ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
 181         ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
 182
 183         return ret;
 184 }
 185
 186 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 187                                 unsigned int hctx_idx)
 188 {
 189         struct nvme_dev *dev = data;
 190         struct nvme_queue *nvmeq = dev->queues[0];
 191
 192         WARN_ON(hctx_idx != 0);
 193         WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
 194         WARN_ON(nvmeq->tags);
 195
 196         hctx->driver_data = nvmeq;
 197         nvmeq->tags = &dev->admin_tagset.tags[0];
 198         return 0;
 199 }
 200
 201 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
 202 {
 203         struct nvme_queue *nvmeq = hctx->driver_data;
 204
 205         nvmeq->tags = NULL;
 206 }
 207
 208 static int nvme_admin_init_request(void *data, struct request *req,
 209                                 unsigned int hctx_idx, unsigned int rq_idx,
 210                                 unsigned int numa_node)
 211 {
 212         struct nvme_dev *dev = data;
 213         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 214         struct nvme_queue *nvmeq = dev->queues[0];
 215
 216         BUG_ON(!nvmeq);
 217         cmd->nvmeq = nvmeq;
 218         return 0;
 219 }
 220
 221 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 222                           unsigned int hctx_idx)
 223 {
 224         struct nvme_dev *dev = data;
 225         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 226
 227         if (!nvmeq->tags)
 228                 nvmeq->tags = &dev->tagset.tags[hctx_idx];
 229
 230         WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
 231         hctx->driver_data = nvmeq;
 232         return 0;
 233 }
 234
 235 static int nvme_init_request(void *data, struct request *req,
 236                                 unsigned int hctx_idx, unsigned int rq_idx,
 237                                 unsigned int numa_node)
 238 {
 239         struct nvme_dev *dev = data;
 240         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 241         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 242
 243         BUG_ON(!nvmeq);
 244         cmd->nvmeq = nvmeq;
 245         return 0;
 246 }
 247
 248 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
 249                                 nvme_completion_fn handler)
 250 {
 251         cmd->fn = handler;
 252         cmd->ctx = ctx;
 253         cmd->aborted = 0;
 254         blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
 255 }
 256
 257 static void *iod_get_private(struct nvme_iod *iod)
 258 {
 259         return (void *) (iod->private & ~0x1UL);
 260 }
 261
 262 /*
 263  * If bit 0 is set, the iod is embedded in the request payload.
 264  */
 265 static bool iod_should_kfree(struct nvme_iod *iod)
 266 {
 267         return (iod->private & NVME_INT_MASK) == 0;
 268 }
 269
 270 /* Special values must be less than 0x1000 */
 271 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
 272 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
 273 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
 274 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
 275
 276 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
 277                                                 struct nvme_completion *cqe)
 278 {
 279         if (ctx == CMD_CTX_CANCELLED)
 280                 return;
 281         if (ctx == CMD_CTX_COMPLETED) {
 282                 dev_warn(nvmeq->q_dmadev,
 283                                 "completed id %d twice on queue %d\n",
 284                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 285                 return;
 286         }
 287         if (ctx == CMD_CTX_INVALID) {
 288                 dev_warn(nvmeq->q_dmadev,
 289                                 "invalid id %d completed on queue %d\n",
 290                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 291                 return;
 292         }
 293         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
 294 }
 295
 296 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
 297 {
 298         void *ctx;
 299
 300         if (fn)
 301                 *fn = cmd->fn;
 302         ctx = cmd->ctx;
 303         cmd->fn = special_completion;
 304         cmd->ctx = CMD_CTX_CANCELLED;
 305         return ctx;
 306 }
 307
 308 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
 309                                                 struct nvme_completion *cqe)
 310 {
 311         u32 result = le32_to_cpup(&cqe->result);
 312         u16 status = le16_to_cpup(&cqe->status) >> 1;
 313
 314         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
 315                 ++nvmeq->dev->event_limit;
 316         if (status != NVME_SC_SUCCESS)
 317                 return;
 318
 319         switch (result & 0xff07) {
 320         case NVME_AER_NOTICE_NS_CHANGED:
 321                 dev_info(nvmeq->q_dmadev, "rescanning\n");
 322                 schedule_work(&nvmeq->dev->scan_work);
 323         default:
 324                 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
 325         }
 326 }
 327
 328 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
 329                                                 struct nvme_completion *cqe)
 330 {
 331         struct request *req = ctx;
 332
 333         u16 status = le16_to_cpup(&cqe->status) >> 1;
 334         u32 result = le32_to_cpup(&cqe->result);
 335
 336         blk_mq_free_request(req);
 337
 338         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
 339         ++nvmeq->dev->abort_limit;
 340 }
 341
 342 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
 343                                                 struct nvme_completion *cqe)
 344 {
 345         struct async_cmd_info *cmdinfo = ctx;
 346         cmdinfo->result = le32_to_cpup(&cqe->result);
 347         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 348         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
 349         blk_mq_free_request(cmdinfo->req);
 350 }
 351
 352 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
 353                                   unsigned int tag)
 354 {
 355         struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
 356
 357         return blk_mq_rq_to_pdu(req);
 358 }
 359
 360 /*
 361  * Called with local interrupts disabled and the q_lock held.  May not sleep.
 362  */
 363 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
 364                                                 nvme_completion_fn *fn)
 365 {
 366         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
 367         void *ctx;
 368         if (tag >= nvmeq->q_depth) {
 369                 *fn = special_completion;
 370                 return CMD_CTX_INVALID;
 371         }
 372         if (fn)
 373                 *fn = cmd->fn;
 374         ctx = cmd->ctx;
 375         cmd->fn = special_completion;
 376         cmd->ctx = CMD_CTX_COMPLETED;
 377         return ctx;
 378 }
 379
 380 /**
 381  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
 382  * @nvmeq: The queue to use
 383  * @cmd: The command to send
 384  *
 385  * Safe to use from interrupt context
 386  */
 387 static void __nvme_submit_cmd(struct nvme_queue *nvmeq,
 388                                                 struct nvme_command *cmd)
 389 {
 390         u16 tail = nvmeq->sq_tail;
 391
 392         if (nvmeq->sq_cmds_io)
 393                 memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd));
 394         else
 395                 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
 396
 397         if (++tail == nvmeq->q_depth)
 398                 tail = 0;
 399         writel(tail, nvmeq->q_db);
 400         nvmeq->sq_tail = tail;
 401 }
 402
 403 static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 404 {
 405         unsigned long flags;
 406         spin_lock_irqsave(&nvmeq->q_lock, flags);
 407         __nvme_submit_cmd(nvmeq, cmd);
 408         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
 409 }
 410
 411 static __le64 **iod_list(struct nvme_iod *iod)
 412 {
 413         return ((void *)iod) + iod->offset;
 414 }
 415
 416 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
 417                             unsigned nseg, unsigned long private)
 418 {
 419         iod->private = private;
 420         iod->offset = offsetof(struct nvme_iod, sg[nseg]);
 421         iod->npages = -1;
 422         iod->length = nbytes;
 423         iod->nents = 0;
 424 }
 425
 426 static struct nvme_iod *
 427 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
 428                  unsigned long priv, gfp_t gfp)
 429 {
 430         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
 431                                 sizeof(__le64 *) * nvme_npages(bytes, dev) +
 432                                 sizeof(struct scatterlist) * nseg, gfp);
 433
 434         if (iod)
 435                 iod_init(iod, bytes, nseg, priv);
 436
 437         return iod;
 438 }
 439
 440 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
 441                                        gfp_t gfp)
 442 {
 443         unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
 444                                                 sizeof(struct nvme_dsm_range);
 445         struct nvme_iod *iod;
 446
 447         if (rq->nr_phys_segments <= NVME_INT_PAGES &&
 448             size <= NVME_INT_BYTES(dev)) {
 449                 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
 450
 451                 iod = cmd->iod;
 452                 iod_init(iod, size, rq->nr_phys_segments,
 453                                 (unsigned long) rq | NVME_INT_MASK);
 454                 return iod;
 455         }
 456
 457         return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
 458                                 (unsigned long) rq, gfp);
 459 }
 460
 461 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
 462 {
 463         const int last_prp = dev->page_size / 8 - 1;
 464         int i;
 465         __le64 **list = iod_list(iod);
 466         dma_addr_t prp_dma = iod->first_dma;
 467
 468         if (iod->npages == 0)
 469                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
 470         for (i = 0; i < iod->npages; i++) {
 471                 __le64 *prp_list = list[i];
 472                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
 473                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
 474                 prp_dma = next_prp_dma;
 475         }
 476
 477         if (iod_should_kfree(iod))
 478                 kfree(iod);
 479 }
 480
 481 static int nvme_error_status(u16 status)
 482 {
 483         switch (status & 0x7ff) {
 484         case NVME_SC_SUCCESS:
 485                 return 0;
 486         case NVME_SC_CAP_EXCEEDED:
 487                 return -ENOSPC;
 488         default:
 489                 return -EIO;
 490         }
 491 }
 492
 493 #ifdef CONFIG_BLK_DEV_INTEGRITY
 494 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
 495 {
 496         if (be32_to_cpu(pi->ref_tag) == v)
 497                 pi->ref_tag = cpu_to_be32(p);
 498 }
 499
 500 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
 501 {
 502         if (be32_to_cpu(pi->ref_tag) == p)
 503                 pi->ref_tag = cpu_to_be32(v);
 504 }
 505
 506 /**
 507  * nvme_dif_remap - remaps ref tags to bip seed and physical lba
 508  *
 509  * The virtual start sector is the one that was originally submitted by the
 510  * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
 511  * start sector may be different. Remap protection information to match the
 512  * physical LBA on writes, and back to the original seed on reads.
 513  *
 514  * Type 0 and 3 do not have a ref tag, so no remapping required.
 515  */
 516 static void nvme_dif_remap(struct request *req,
 517                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
 518 {
 519         struct nvme_ns *ns = req->rq_disk->private_data;
 520         struct bio_integrity_payload *bip;
 521         struct t10_pi_tuple *pi;
 522         void *p, *pmap;
 523         u32 i, nlb, ts, phys, virt;
 524
 525         if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
 526                 return;
 527
 528         bip = bio_integrity(req->bio);
 529         if (!bip)
 530                 return;
 531
 532         pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
 533
 534         p = pmap;
 535         virt = bip_get_seed(bip);
 536         phys = nvme_block_nr(ns, blk_rq_pos(req));
 537         nlb = (blk_rq_bytes(req) >> ns->lba_shift);
 538         ts = ns->disk->integrity->tuple_size;
 539
 540         for (i = 0; i < nlb; i++, virt++, phys++) {
 541                 pi = (struct t10_pi_tuple *)p;
 542                 dif_swap(phys, virt, pi);
 543                 p += ts;
 544         }
 545         kunmap_atomic(pmap);
 546 }
 547
 548 static int nvme_noop_verify(struct blk_integrity_iter *iter)
 549 {
 550         return 0;
 551 }
 552
 553 static int nvme_noop_generate(struct blk_integrity_iter *iter)
 554 {
 555         return 0;
 556 }
 557
 558 struct blk_integrity nvme_meta_noop = {
 559         .name                   = "NVME_META_NOOP",
 560         .generate_fn            = nvme_noop_generate,
 561         .verify_fn              = nvme_noop_verify,
 562 };
 563
 564 static void nvme_init_integrity(struct nvme_ns *ns)
 565 {
 566         struct blk_integrity integrity;
 567
 568         switch (ns->pi_type) {
 569         case NVME_NS_DPS_PI_TYPE3:
 570                 integrity = t10_pi_type3_crc;
 571                 break;
 572         case NVME_NS_DPS_PI_TYPE1:
 573         case NVME_NS_DPS_PI_TYPE2:
 574                 integrity = t10_pi_type1_crc;
 575                 break;
 576         default:
 577                 integrity = nvme_meta_noop;
 578                 break;
 579         }
 580         integrity.tuple_size = ns->ms;
 581         blk_integrity_register(ns->disk, &integrity);
 582         blk_queue_max_integrity_segments(ns->queue, 1);
 583 }
 584 #else /* CONFIG_BLK_DEV_INTEGRITY */
 585 static void nvme_dif_remap(struct request *req,
 586                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
 587 {
 588 }
 589 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
 590 {
 591 }
 592 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
 593 {
 594 }
 595 static void nvme_init_integrity(struct nvme_ns *ns)
 596 {
 597 }
 598 #endif
 599
 600 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
 601                                                 struct nvme_completion *cqe)
 602 {
 603         struct nvme_iod *iod = ctx;
 604         struct request *req = iod_get_private(iod);
 605         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
 606
 607         u16 status = le16_to_cpup(&cqe->status) >> 1;
 608
 609         if (unlikely(status)) {
 610                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
 611                     && (jiffies - req->start_time) < req->timeout) {
 612                         unsigned long flags;
 613
 614                         blk_mq_requeue_request(req);
 615                         spin_lock_irqsave(req->q->queue_lock, flags);
 616                         if (!blk_queue_stopped(req->q))
 617                                 blk_mq_kick_requeue_list(req->q);
 618                         spin_unlock_irqrestore(req->q->queue_lock, flags);
 619                         return;
 620                 }
 621
 622                 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
 623                         if (cmd_rq->ctx == CMD_CTX_CANCELLED)
 624                                 status = -EINTR;
 625                 } else {
 626                         status = nvme_error_status(status);
 627                 }
 628         }
 629
 630         if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
 631                 u32 result = le32_to_cpup(&cqe->result);
 632                 req->special = (void *)(uintptr_t)result;
 633         }
 634
 635         if (cmd_rq->aborted)
 636                 dev_warn(nvmeq->dev->dev,
 637                         "completing aborted command with status:%04x\n",
 638                         status);
 639
 640         if (iod->nents) {
 641                 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
 642                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 643                 if (blk_integrity_rq(req)) {
 644                         if (!rq_data_dir(req))
 645                                 nvme_dif_remap(req, nvme_dif_complete);
 646                         dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
 647                                 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 648                 }
 649         }
 650         nvme_free_iod(nvmeq->dev, iod);
 651
 652         blk_mq_complete_request(req, status);
 653 }
 654
 655 /* length is in bytes.  gfp flags indicates whether we may sleep. */
 656 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
 657                 int total_len, gfp_t gfp)
 658 {
 659         struct dma_pool *pool;
 660         int length = total_len;
 661         struct scatterlist *sg = iod->sg;
 662         int dma_len = sg_dma_len(sg);
 663         u64 dma_addr = sg_dma_address(sg);
 664         u32 page_size = dev->page_size;
 665         int offset = dma_addr & (page_size - 1);
 666         __le64 *prp_list;
 667         __le64 **list = iod_list(iod);
 668         dma_addr_t prp_dma;
 669         int nprps, i;
 670
 671         length -= (page_size - offset);
 672         if (length <= 0)
 673                 return total_len;
 674
 675         dma_len -= (page_size - offset);
 676         if (dma_len) {
 677                 dma_addr += (page_size - offset);
 678         } else {
 679                 sg = sg_next(sg);
 680                 dma_addr = sg_dma_address(sg);
 681                 dma_len = sg_dma_len(sg);
 682         }
 683
 684         if (length <= page_size) {
 685                 iod->first_dma = dma_addr;
 686                 return total_len;
 687         }
 688
 689         nprps = DIV_ROUND_UP(length, page_size);
 690         if (nprps <= (256 / 8)) {
 691                 pool = dev->prp_small_pool;
 692                 iod->npages = 0;
 693         } else {
 694                 pool = dev->prp_page_pool;
 695                 iod->npages = 1;
 696         }
 697
 698         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 699         if (!prp_list) {
 700                 iod->first_dma = dma_addr;
 701                 iod->npages = -1;
 702                 return (total_len - length) + page_size;
 703         }
 704         list[0] = prp_list;
 705         iod->first_dma = prp_dma;
 706         i = 0;
 707         for (;;) {
 708                 if (i == page_size >> 3) {
 709                         __le64 *old_prp_list = prp_list;
 710                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 711                         if (!prp_list)
 712                                 return total_len - length;
 713                         list[iod->npages++] = prp_list;
 714                         prp_list[0] = old_prp_list[i - 1];
 715                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
 716                         i = 1;
 717                 }
 718                 prp_list[i++] = cpu_to_le64(dma_addr);
 719                 dma_len -= page_size;
 720                 dma_addr += page_size;
 721                 length -= page_size;
 722                 if (length <= 0)
 723                         break;
 724                 if (dma_len > 0)
 725                         continue;
 726                 BUG_ON(dma_len < 0);
 727                 sg = sg_next(sg);
 728                 dma_addr = sg_dma_address(sg);
 729                 dma_len = sg_dma_len(sg);
 730         }
 731
 732         return total_len;
 733 }
 734
 735 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
 736                 struct nvme_iod *iod)
 737 {
 738         struct nvme_command cmnd;
 739
 740         memcpy(&cmnd, req->cmd, sizeof(cmnd));
 741         cmnd.rw.command_id = req->tag;
 742         if (req->nr_phys_segments) {
 743                 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 744                 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
 745         }
 746
 747         __nvme_submit_cmd(nvmeq, &cmnd);
 748 }
 749
 750 /*
 751  * We reuse the small pool to allocate the 16-byte range here as it is not
 752  * worth having a special pool for these or additional cases to handle freeing
 753  * the iod.
 754  */
 755 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 756                 struct request *req, struct nvme_iod *iod)
 757 {
 758         struct nvme_dsm_range *range =
 759                                 (struct nvme_dsm_range *)iod_list(iod)[0];
 760         struct nvme_command cmnd;
 761
 762         range->cattr = cpu_to_le32(0);
 763         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
 764         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 765
 766         memset(&cmnd, 0, sizeof(cmnd));
 767         cmnd.dsm.opcode = nvme_cmd_dsm;
 768         cmnd.dsm.command_id = req->tag;
 769         cmnd.dsm.nsid = cpu_to_le32(ns->ns_id);
 770         cmnd.dsm.prp1 = cpu_to_le64(iod->first_dma);
 771         cmnd.dsm.nr = 0;
 772         cmnd.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
 773
 774         __nvme_submit_cmd(nvmeq, &cmnd);
 775 }
 776
 777 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 778                                                                 int cmdid)
 779 {
 780         struct nvme_command cmnd;
 781
 782         memset(&cmnd, 0, sizeof(cmnd));
 783         cmnd.common.opcode = nvme_cmd_flush;
 784         cmnd.common.command_id = cmdid;
 785         cmnd.common.nsid = cpu_to_le32(ns->ns_id);
 786
 787         __nvme_submit_cmd(nvmeq, &cmnd);
 788 }
 789
 790 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
 791                                                         struct nvme_ns *ns)
 792 {
 793         struct request *req = iod_get_private(iod);
 794         struct nvme_command cmnd;
 795         u16 control = 0;
 796         u32 dsmgmt = 0;
 797
 798         if (req->cmd_flags & REQ_FUA)
 799                 control |= NVME_RW_FUA;
 800         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
 801                 control |= NVME_RW_LR;
 802
 803         if (req->cmd_flags & REQ_RAHEAD)
 804                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
 805
 806         memset(&cmnd, 0, sizeof(cmnd));
 807         cmnd.rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
 808         cmnd.rw.command_id = req->tag;
 809         cmnd.rw.nsid = cpu_to_le32(ns->ns_id);
 810         cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 811         cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
 812         cmnd.rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 813         cmnd.rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
 814
 815         if (ns->ms) {
 816                 switch (ns->pi_type) {
 817                 case NVME_NS_DPS_PI_TYPE3:
 818                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
 819                         break;
 820                 case NVME_NS_DPS_PI_TYPE1:
 821                 case NVME_NS_DPS_PI_TYPE2:
 822                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
 823                                         NVME_RW_PRINFO_PRCHK_REF;
 824                         cmnd.rw.reftag = cpu_to_le32(
 825                                         nvme_block_nr(ns, blk_rq_pos(req)));
 826                         break;
 827                 }
 828                 if (blk_integrity_rq(req))
 829                         cmnd.rw.metadata =
 830                                 cpu_to_le64(sg_dma_address(iod->meta_sg));
 831                 else
 832                         control |= NVME_RW_PRINFO_PRACT;
 833         }
 834
 835         cmnd.rw.control = cpu_to_le16(control);
 836         cmnd.rw.dsmgmt = cpu_to_le32(dsmgmt);
 837
 838         __nvme_submit_cmd(nvmeq, &cmnd);
 839
 840         return 0;
 841 }
 842
 843 /*
 844  * NOTE: ns is NULL when called on the admin queue.
 845  */
 846 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
 847                          const struct blk_mq_queue_data *bd)
 848 {
 849         struct nvme_ns *ns = hctx->queue->queuedata;
 850         struct nvme_queue *nvmeq = hctx->driver_data;
 851         struct nvme_dev *dev = nvmeq->dev;
 852         struct request *req = bd->rq;
 853         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 854         struct nvme_iod *iod;
 855         enum dma_data_direction dma_dir;
 856
 857         /*
 858          * If formated with metadata, require the block layer provide a buffer
 859          * unless this namespace is formated such that the metadata can be
 860          * stripped/generated by the controller with PRACT=1.
 861          */
 862         if (ns && ns->ms && !blk_integrity_rq(req)) {
 863                 if (!(ns->pi_type && ns->ms == 8) &&
 864                                         req->cmd_type != REQ_TYPE_DRV_PRIV) {
 865                         blk_mq_complete_request(req, -EFAULT);
 866                         return BLK_MQ_RQ_QUEUE_OK;
 867                 }
 868         }
 869
 870         iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
 871         if (!iod)
 872                 return BLK_MQ_RQ_QUEUE_BUSY;
 873
 874         if (req->cmd_flags & REQ_DISCARD) {
 875                 void *range;
 876                 /*
 877                  * We reuse the small pool to allocate the 16-byte range here
 878                  * as it is not worth having a special pool for these or
 879                  * additional cases to handle freeing the iod.
 880                  */
 881                 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
 882                                                 &iod->first_dma);
 883                 if (!range)
 884                         goto retry_cmd;
 885                 iod_list(iod)[0] = (__le64 *)range;
 886                 iod->npages = 0;
 887         } else if (req->nr_phys_segments) {
 888                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 889
 890                 sg_init_table(iod->sg, req->nr_phys_segments);
 891                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
 892                 if (!iod->nents)
 893                         goto error_cmd;
 894
 895                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
 896                         goto retry_cmd;
 897
 898                 if (blk_rq_bytes(req) !=
 899                     nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
 900                         dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
 901                         goto retry_cmd;
 902                 }
 903                 if (blk_integrity_rq(req)) {
 904                         if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
 905                                 goto error_cmd;
 906
 907                         sg_init_table(iod->meta_sg, 1);
 908                         if (blk_rq_map_integrity_sg(
 909                                         req->q, req->bio, iod->meta_sg) != 1)
 910                                 goto error_cmd;
 911
 912                         if (rq_data_dir(req))
 913                                 nvme_dif_remap(req, nvme_dif_prep);
 914
 915                         if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
 916                                 goto error_cmd;
 917                 }
 918         }
 919
 920         nvme_set_info(cmd, iod, req_completion);
 921         spin_lock_irq(&nvmeq->q_lock);
 922         if (req->cmd_type == REQ_TYPE_DRV_PRIV)
 923                 nvme_submit_priv(nvmeq, req, iod);
 924         else if (req->cmd_flags & REQ_DISCARD)
 925                 nvme_submit_discard(nvmeq, ns, req, iod);
 926         else if (req->cmd_flags & REQ_FLUSH)
 927                 nvme_submit_flush(nvmeq, ns, req->tag);
 928         else
 929                 nvme_submit_iod(nvmeq, iod, ns);
 930
 931         nvme_process_cq(nvmeq);
 932         spin_unlock_irq(&nvmeq->q_lock);
 933         return BLK_MQ_RQ_QUEUE_OK;
 934
 935  error_cmd:
 936         nvme_free_iod(dev, iod);
 937         return BLK_MQ_RQ_QUEUE_ERROR;
 938  retry_cmd:
 939         nvme_free_iod(dev, iod);
 940         return BLK_MQ_RQ_QUEUE_BUSY;
 941 }
 942
 943 static int nvme_process_cq(struct nvme_queue *nvmeq)
 944 {
 945         u16 head, phase;
 946
 947         head = nvmeq->cq_head;
 948         phase = nvmeq->cq_phase;
 949
 950         for (;;) {
 951                 void *ctx;
 952                 nvme_completion_fn fn;
 953                 struct nvme_completion cqe = nvmeq->cqes[head];
 954                 if ((le16_to_cpu(cqe.status) & 1) != phase)
 955                         break;
 956                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
 957                 if (++head == nvmeq->q_depth) {
 958                         head = 0;
 959                         phase = !phase;
 960                 }
 961                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
 962                 fn(nvmeq, ctx, &cqe);
 963         }
 964
 965         /* If the controller ignores the cq head doorbell and continuously
 966          * writes to the queue, it is theoretically possible to wrap around
 967          * the queue twice and mistakenly return IRQ_NONE.  Linux only
 968          * requires that 0.1% of your interrupts are handled, so this isn't
 969          * a big problem.
 970          */
 971         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
 972                 return 0;
 973
 974         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
 975         nvmeq->cq_head = head;
 976         nvmeq->cq_phase = phase;
 977
 978         nvmeq->cqe_seen = 1;
 979         return 1;
 980 }
 981
 982 static irqreturn_t nvme_irq(int irq, void *data)
 983 {
 984         irqreturn_t result;
 985         struct nvme_queue *nvmeq = data;
 986         spin_lock(&nvmeq->q_lock);
 987         nvme_process_cq(nvmeq);
 988         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
 989         nvmeq->cqe_seen = 0;
 990         spin_unlock(&nvmeq->q_lock);
 991         return result;
 992 }
 993
 994 static irqreturn_t nvme_irq_check(int irq, void *data)
 995 {
 996         struct nvme_queue *nvmeq = data;
 997         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
 998         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
 999                 return IRQ_NONE;
1000         return IRQ_WAKE_THREAD;
1001 }
1002
1003 /*
1004  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1005  * if the result is positive, it's an NVM Express status code
1006  */
1007 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1008                 void *buffer, void __user *ubuffer, unsigned bufflen,
1009                 u32 *result, unsigned timeout)
1010 {
1011         bool write = cmd->common.opcode & 1;
1012         struct bio *bio = NULL;
1013         struct request *req;
1014         int ret;
1015
1016         req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1017         if (IS_ERR(req))
1018                 return PTR_ERR(req);
1019
1020         req->cmd_type = REQ_TYPE_DRV_PRIV;
1021         req->cmd_flags |= REQ_FAILFAST_DRIVER;
1022         req->__data_len = 0;
1023         req->__sector = (sector_t) -1;
1024         req->bio = req->biotail = NULL;
1025
1026         req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1027
1028         req->cmd = (unsigned char *)cmd;
1029         req->cmd_len = sizeof(struct nvme_command);
1030         req->special = (void *)0;
1031
1032         if (buffer && bufflen) {
1033                 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1034                 if (ret)
1035                         goto out;
1036         } else if (ubuffer && bufflen) {
1037                 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1038                 if (ret)
1039                         goto out;
1040                 bio = req->bio;
1041         }
1042
1043         blk_execute_rq(req->q, NULL, req, 0);
1044         if (bio)
1045                 blk_rq_unmap_user(bio);
1046         if (result)
1047                 *result = (u32)(uintptr_t)req->special;
1048         ret = req->errors;
1049  out:
1050         blk_mq_free_request(req);
1051         return ret;
1052 }
1053
1054 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1055                 void *buffer, unsigned bufflen)
1056 {
1057         return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1058 }
1059
1060 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1061 {
1062         struct nvme_queue *nvmeq = dev->queues[0];
1063         struct nvme_command c;
1064         struct nvme_cmd_info *cmd_info;
1065         struct request *req;
1066
1067         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1068         if (IS_ERR(req))
1069                 return PTR_ERR(req);
1070
1071         req->cmd_flags |= REQ_NO_TIMEOUT;
1072         cmd_info = blk_mq_rq_to_pdu(req);
1073         nvme_set_info(cmd_info, NULL, async_req_completion);
1074
1075         memset(&c, 0, sizeof(c));
1076         c.common.opcode = nvme_admin_async_event;
1077         c.common.command_id = req->tag;
1078
1079         blk_mq_free_request(req);
1080         __nvme_submit_cmd(nvmeq, &c);
1081         return 0;
1082 }
1083
1084 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1085                         struct nvme_command *cmd,
1086                         struct async_cmd_info *cmdinfo, unsigned timeout)
1087 {
1088         struct nvme_queue *nvmeq = dev->queues[0];
1089         struct request *req;
1090         struct nvme_cmd_info *cmd_rq;
1091
1092         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1093         if (IS_ERR(req))
1094                 return PTR_ERR(req);
1095
1096         req->timeout = timeout;
1097         cmd_rq = blk_mq_rq_to_pdu(req);
1098         cmdinfo->req = req;
1099         nvme_set_info(cmd_rq, cmdinfo, async_completion);
1100         cmdinfo->status = -EINTR;
1101
1102         cmd->common.command_id = req->tag;
1103
1104         nvme_submit_cmd(nvmeq, cmd);
1105         return 0;
1106 }
1107
1108 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1109 {
1110         struct nvme_command c;
1111
1112         memset(&c, 0, sizeof(c));
1113         c.delete_queue.opcode = opcode;
1114         c.delete_queue.qid = cpu_to_le16(id);
1115
1116         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1117 }
1118
1119 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1120                                                 struct nvme_queue *nvmeq)
1121 {
1122         struct nvme_command c;
1123         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1124
1125         /*
1126          * Note: we (ab)use the fact the the prp fields survive if no data
1127          * is attached to the request.
1128          */
1129         memset(&c, 0, sizeof(c));
1130         c.create_cq.opcode = nvme_admin_create_cq;
1131         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1132         c.create_cq.cqid = cpu_to_le16(qid);
1133         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1134         c.create_cq.cq_flags = cpu_to_le16(flags);
1135         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1136
1137         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1138 }
1139
1140 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1141                                                 struct nvme_queue *nvmeq)
1142 {
1143         struct nvme_command c;
1144         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1145
1146         /*
1147          * Note: we (ab)use the fact the the prp fields survive if no data
1148          * is attached to the request.
1149          */
1150         memset(&c, 0, sizeof(c));
1151         c.create_sq.opcode = nvme_admin_create_sq;
1152         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1153         c.create_sq.sqid = cpu_to_le16(qid);
1154         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1155         c.create_sq.sq_flags = cpu_to_le16(flags);
1156         c.create_sq.cqid = cpu_to_le16(qid);
1157
1158         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1159 }
1160
1161 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1162 {
1163         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1164 }
1165
1166 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1167 {
1168         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1169 }
1170
1171 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1172 {
1173         struct nvme_command c = { };
1174         int error;
1175
1176         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1177         c.identify.opcode = nvme_admin_identify;
1178         c.identify.cns = cpu_to_le32(1);
1179
1180         *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1181         if (!*id)
1182                 return -ENOMEM;
1183
1184         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1185                         sizeof(struct nvme_id_ctrl));
1186         if (error)
1187                 kfree(*id);
1188         return error;
1189 }
1190
1191 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1192                 struct nvme_id_ns **id)
1193 {
1194         struct nvme_command c = { };
1195         int error;
1196
1197         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1198         c.identify.opcode = nvme_admin_identify,
1199         c.identify.nsid = cpu_to_le32(nsid),
1200
1201         *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1202         if (!*id)
1203                 return -ENOMEM;
1204
1205         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1206                         sizeof(struct nvme_id_ns));
1207         if (error)
1208                 kfree(*id);
1209         return error;
1210 }
1211
1212 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1213                                         dma_addr_t dma_addr, u32 *result)
1214 {
1215         struct nvme_command c;
1216
1217         memset(&c, 0, sizeof(c));
1218         c.features.opcode = nvme_admin_get_features;
1219         c.features.nsid = cpu_to_le32(nsid);
1220         c.features.prp1 = cpu_to_le64(dma_addr);
1221         c.features.fid = cpu_to_le32(fid);
1222
1223         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1224                         result, 0);
1225 }
1226
1227 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1228                                         dma_addr_t dma_addr, u32 *result)
1229 {
1230         struct nvme_command c;
1231
1232         memset(&c, 0, sizeof(c));
1233         c.features.opcode = nvme_admin_set_features;
1234         c.features.prp1 = cpu_to_le64(dma_addr);
1235         c.features.fid = cpu_to_le32(fid);
1236         c.features.dword11 = cpu_to_le32(dword11);
1237
1238         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1239                         result, 0);
1240 }
1241
1242 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1243 {
1244         struct nvme_command c = { };
1245         int error;
1246
1247         c.common.opcode = nvme_admin_get_log_page,
1248         c.common.nsid = cpu_to_le32(0xFFFFFFFF),
1249         c.common.cdw10[0] = cpu_to_le32(
1250                         (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1251                          NVME_LOG_SMART),
1252
1253         *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1254         if (!*log)
1255                 return -ENOMEM;
1256
1257         error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1258                         sizeof(struct nvme_smart_log));
1259         if (error)
1260                 kfree(*log);
1261         return error;
1262 }
1263
1264 /**
1265  * nvme_abort_req - Attempt aborting a request
1266  *
1267  * Schedule controller reset if the command was already aborted once before and
1268  * still hasn't been returned to the driver, or if this is the admin queue.
1269  */
1270 static void nvme_abort_req(struct request *req)
1271 {
1272         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1273         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1274         struct nvme_dev *dev = nvmeq->dev;
1275         struct request *abort_req;
1276         struct nvme_cmd_info *abort_cmd;
1277         struct nvme_command cmd;
1278
1279         if (!nvmeq->qid || cmd_rq->aborted) {
1280                 spin_lock(&dev_list_lock);
1281                 if (!__nvme_reset(dev)) {
1282                         dev_warn(dev->dev,
1283                                  "I/O %d QID %d timeout, reset controller\n",
1284                                  req->tag, nvmeq->qid);
1285                 }
1286                 spin_unlock(&dev_list_lock);
1287                 return;
1288         }
1289
1290         if (!dev->abort_limit)
1291                 return;
1292
1293         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1294                                                                         false);
1295         if (IS_ERR(abort_req))
1296                 return;
1297
1298         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1299         nvme_set_info(abort_cmd, abort_req, abort_completion);
1300
1301         memset(&cmd, 0, sizeof(cmd));
1302         cmd.abort.opcode = nvme_admin_abort_cmd;
1303         cmd.abort.cid = req->tag;
1304         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1305         cmd.abort.command_id = abort_req->tag;
1306
1307         --dev->abort_limit;
1308         cmd_rq->aborted = 1;
1309
1310         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1311                                                         nvmeq->qid);
1312         nvme_submit_cmd(dev->queues[0], &cmd);
1313 }
1314
1315 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1316 {
1317         struct nvme_queue *nvmeq = data;
1318         void *ctx;
1319         nvme_completion_fn fn;
1320         struct nvme_cmd_info *cmd;
1321         struct nvme_completion cqe;
1322
1323         if (!blk_mq_request_started(req))
1324                 return;
1325
1326         cmd = blk_mq_rq_to_pdu(req);
1327
1328         if (cmd->ctx == CMD_CTX_CANCELLED)
1329                 return;
1330
1331         if (blk_queue_dying(req->q))
1332                 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1333         else
1334                 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1335
1336
1337         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1338                                                 req->tag, nvmeq->qid);
1339         ctx = cancel_cmd_info(cmd, &fn);
1340         fn(nvmeq, ctx, &cqe);
1341 }
1342
1343 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1344 {
1345         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1346         struct nvme_queue *nvmeq = cmd->nvmeq;
1347
1348         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1349                                                         nvmeq->qid);
1350         spin_lock_irq(&nvmeq->q_lock);
1351         nvme_abort_req(req);
1352         spin_unlock_irq(&nvmeq->q_lock);
1353
1354         /*
1355          * The aborted req will be completed on receiving the abort req.
1356          * We enable the timer again. If hit twice, it'll cause a device reset,
1357          * as the device then is in a faulty state.
1358          */
1359         return BLK_EH_RESET_TIMER;
1360 }
1361
1362 static void nvme_free_queue(struct nvme_queue *nvmeq)
1363 {
1364         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1365                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1366         if (nvmeq->sq_cmds)
1367                 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1368                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1369         kfree(nvmeq);
1370 }
1371
1372 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1373 {
1374         int i;
1375
1376         for (i = dev->queue_count - 1; i >= lowest; i--) {
1377                 struct nvme_queue *nvmeq = dev->queues[i];
1378                 dev->queue_count--;
1379                 dev->queues[i] = NULL;
1380                 nvme_free_queue(nvmeq);
1381         }
1382 }
1383
1384 /**
1385  * nvme_suspend_queue - put queue into suspended state
1386  * @nvmeq - queue to suspend
1387  */
1388 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1389 {
1390         int vector;
1391
1392         spin_lock_irq(&nvmeq->q_lock);
1393         if (nvmeq->cq_vector == -1) {
1394                 spin_unlock_irq(&nvmeq->q_lock);
1395                 return 1;
1396         }
1397         vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1398         nvmeq->dev->online_queues--;
1399         nvmeq->cq_vector = -1;
1400         spin_unlock_irq(&nvmeq->q_lock);
1401
1402         if (!nvmeq->qid && nvmeq->dev->admin_q)
1403                 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1404
1405         irq_set_affinity_hint(vector, NULL);
1406         free_irq(vector, nvmeq);
1407
1408         return 0;
1409 }
1410
1411 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1412 {
1413         spin_lock_irq(&nvmeq->q_lock);
1414         if (nvmeq->tags && *nvmeq->tags)
1415                 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1416         spin_unlock_irq(&nvmeq->q_lock);
1417 }
1418
1419 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1420 {
1421         struct nvme_queue *nvmeq = dev->queues[qid];
1422
1423         if (!nvmeq)
1424                 return;
1425         if (nvme_suspend_queue(nvmeq))
1426                 return;
1427
1428         /* Don't tell the adapter to delete the admin queue.
1429          * Don't tell a removed adapter to delete IO queues. */
1430         if (qid && readl(&dev->bar->csts) != -1) {
1431                 adapter_delete_sq(dev, qid);
1432                 adapter_delete_cq(dev, qid);
1433         }
1434
1435         spin_lock_irq(&nvmeq->q_lock);
1436         nvme_process_cq(nvmeq);
1437         spin_unlock_irq(&nvmeq->q_lock);
1438 }
1439
1440 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
1441                                 int entry_size)
1442 {
1443         int q_depth = dev->q_depth;
1444         unsigned q_size_aligned = roundup(q_depth * entry_size, dev->page_size);
1445
1446         if (q_size_aligned * nr_io_queues > dev->cmb_size) {
1447                 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
1448                 mem_per_q = round_down(mem_per_q, dev->page_size);
1449                 q_depth = div_u64(mem_per_q, entry_size);
1450
1451                 /*
1452                  * Ensure the reduced q_depth is above some threshold where it
1453                  * would be better to map queues in system memory with the
1454                  * original depth
1455                  */
1456                 if (q_depth < 64)
1457                         return -ENOMEM;
1458         }
1459
1460         return q_depth;
1461 }
1462
1463 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1464                                 int qid, int depth)
1465 {
1466         if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) {
1467                 unsigned offset = (qid - 1) *
1468                                         roundup(SQ_SIZE(depth), dev->page_size);
1469                 nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset;
1470                 nvmeq->sq_cmds_io = dev->cmb + offset;
1471         } else {
1472                 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1473                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1474                 if (!nvmeq->sq_cmds)
1475                         return -ENOMEM;
1476         }
1477
1478         return 0;
1479 }
1480
1481 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1482                                                         int depth)
1483 {
1484         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1485         if (!nvmeq)
1486                 return NULL;
1487
1488         nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1489                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1490         if (!nvmeq->cqes)
1491                 goto free_nvmeq;
1492
1493         if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
1494                 goto free_cqdma;
1495
1496         nvmeq->q_dmadev = dev->dev;
1497         nvmeq->dev = dev;
1498         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1499                         dev->instance, qid);
1500         spin_lock_init(&nvmeq->q_lock);
1501         nvmeq->cq_head = 0;
1502         nvmeq->cq_phase = 1;
1503         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1504         nvmeq->q_depth = depth;
1505         nvmeq->qid = qid;
1506         nvmeq->cq_vector = -1;
1507         dev->queues[qid] = nvmeq;
1508
1509         /* make sure queue descriptor is set before queue count, for kthread */
1510         mb();
1511         dev->queue_count++;
1512
1513         return nvmeq;
1514
1515  free_cqdma:
1516         dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1517                                                         nvmeq->cq_dma_addr);
1518  free_nvmeq:
1519         kfree(nvmeq);
1520         return NULL;
1521 }
1522
1523 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1524                                                         const char *name)
1525 {
1526         if (use_threaded_interrupts)
1527                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1528                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1529                                         name, nvmeq);
1530         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1531                                 IRQF_SHARED, name, nvmeq);
1532 }
1533
1534 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1535 {
1536         struct nvme_dev *dev = nvmeq->dev;
1537
1538         spin_lock_irq(&nvmeq->q_lock);
1539         nvmeq->sq_tail = 0;
1540         nvmeq->cq_head = 0;
1541         nvmeq->cq_phase = 1;
1542         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1543         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1544         dev->online_queues++;
1545         spin_unlock_irq(&nvmeq->q_lock);
1546 }
1547
1548 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1549 {
1550         struct nvme_dev *dev = nvmeq->dev;
1551         int result;
1552
1553         nvmeq->cq_vector = qid - 1;
1554         result = adapter_alloc_cq(dev, qid, nvmeq);
1555         if (result < 0)
1556                 return result;
1557
1558         result = adapter_alloc_sq(dev, qid, nvmeq);
1559         if (result < 0)
1560                 goto release_cq;
1561
1562         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1563         if (result < 0)
1564                 goto release_sq;
1565
1566         nvme_init_queue(nvmeq, qid);
1567         return result;
1568
1569  release_sq:
1570         adapter_delete_sq(dev, qid);
1571  release_cq:
1572         adapter_delete_cq(dev, qid);
1573         return result;
1574 }
1575
1576 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1577 {
1578         unsigned long timeout;
1579         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1580
1581         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1582
1583         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1584                 msleep(100);
1585                 if (fatal_signal_pending(current))
1586                         return -EINTR;
1587                 if (time_after(jiffies, timeout)) {
1588                         dev_err(dev->dev,
1589                                 "Device not ready; aborting %s\n", enabled ?
1590                                                 "initialisation" : "reset");
1591                         return -ENODEV;
1592                 }
1593         }
1594
1595         return 0;
1596 }
1597
1598 /*
1599  * If the device has been passed off to us in an enabled state, just clear
1600  * the enabled bit.  The spec says we should set the 'shutdown notification
1601  * bits', but doing so may cause the device to complete commands to the
1602  * admin queue ... and we don't know what memory that might be pointing at!
1603  */
1604 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1605 {
1606         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1607         dev->ctrl_config &= ~NVME_CC_ENABLE;
1608         writel(dev->ctrl_config, &dev->bar->cc);
1609
1610         return nvme_wait_ready(dev, cap, false);
1611 }
1612
1613 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1614 {
1615         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1616         dev->ctrl_config |= NVME_CC_ENABLE;
1617         writel(dev->ctrl_config, &dev->bar->cc);
1618
1619         return nvme_wait_ready(dev, cap, true);
1620 }
1621
1622 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1623 {
1624         unsigned long timeout;
1625
1626         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1627         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1628
1629         writel(dev->ctrl_config, &dev->bar->cc);
1630
1631         timeout = SHUTDOWN_TIMEOUT + jiffies;
1632         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1633                                                         NVME_CSTS_SHST_CMPLT) {
1634                 msleep(100);
1635                 if (fatal_signal_pending(current))
1636                         return -EINTR;
1637                 if (time_after(jiffies, timeout)) {
1638                         dev_err(dev->dev,
1639                                 "Device shutdown incomplete; abort shutdown\n");
1640                         return -ENODEV;
1641                 }
1642         }
1643
1644         return 0;
1645 }
1646
1647 static struct blk_mq_ops nvme_mq_admin_ops = {
1648         .queue_rq       = nvme_queue_rq,
1649         .map_queue      = blk_mq_map_queue,
1650         .init_hctx      = nvme_admin_init_hctx,
1651         .exit_hctx      = nvme_admin_exit_hctx,
1652         .init_request   = nvme_admin_init_request,
1653         .timeout        = nvme_timeout,
1654 };
1655
1656 static struct blk_mq_ops nvme_mq_ops = {
1657         .queue_rq       = nvme_queue_rq,
1658         .map_queue      = blk_mq_map_queue,
1659         .init_hctx      = nvme_init_hctx,
1660         .init_request   = nvme_init_request,
1661         .timeout        = nvme_timeout,
1662 };
1663
1664 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1665 {
1666         if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1667                 blk_cleanup_queue(dev->admin_q);
1668                 blk_mq_free_tag_set(&dev->admin_tagset);
1669         }
1670 }
1671
1672 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1673 {
1674         if (!dev->admin_q) {
1675                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1676                 dev->admin_tagset.nr_hw_queues = 1;
1677                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1678                 dev->admin_tagset.reserved_tags = 1;
1679                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1680                 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1681                 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1682                 dev->admin_tagset.driver_data = dev;
1683
1684                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1685                         return -ENOMEM;
1686
1687                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1688                 if (IS_ERR(dev->admin_q)) {
1689                         blk_mq_free_tag_set(&dev->admin_tagset);
1690                         return -ENOMEM;
1691                 }
1692                 if (!blk_get_queue(dev->admin_q)) {
1693                         nvme_dev_remove_admin(dev);
1694                         dev->admin_q = NULL;
1695                         return -ENODEV;
1696                 }
1697         } else
1698                 blk_mq_unfreeze_queue(dev->admin_q);
1699
1700         return 0;
1701 }
1702
1703 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1704 {
1705         int result;
1706         u32 aqa;
1707         u64 cap = readq(&dev->bar->cap);
1708         struct nvme_queue *nvmeq;
1709         unsigned page_shift = PAGE_SHIFT;
1710         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1711         unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1712
1713         if (page_shift < dev_page_min) {
1714                 dev_err(dev->dev,
1715                                 "Minimum device page size (%u) too large for "
1716                                 "host (%u)\n", 1 << dev_page_min,
1717                                 1 << page_shift);
1718                 return -ENODEV;
1719         }
1720         if (page_shift > dev_page_max) {
1721                 dev_info(dev->dev,
1722                                 "Device maximum page size (%u) smaller than "
1723                                 "host (%u); enabling work-around\n",
1724                                 1 << dev_page_max, 1 << page_shift);
1725                 page_shift = dev_page_max;
1726         }
1727
1728         dev->subsystem = readl(&dev->bar->vs) >= NVME_VS(1, 1) ?
1729                                                 NVME_CAP_NSSRC(cap) : 0;
1730
1731         if (dev->subsystem && (readl(&dev->bar->csts) & NVME_CSTS_NSSRO))
1732                 writel(NVME_CSTS_NSSRO, &dev->bar->csts);
1733
1734         result = nvme_disable_ctrl(dev, cap);
1735         if (result < 0)
1736                 return result;
1737
1738         nvmeq = dev->queues[0];
1739         if (!nvmeq) {
1740                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1741                 if (!nvmeq)
1742                         return -ENOMEM;
1743         }
1744
1745         aqa = nvmeq->q_depth - 1;
1746         aqa |= aqa << 16;
1747
1748         dev->page_size = 1 << page_shift;
1749
1750         dev->ctrl_config = NVME_CC_CSS_NVM;
1751         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1752         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1753         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1754
1755         writel(aqa, &dev->bar->aqa);
1756         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1757         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1758
1759         result = nvme_enable_ctrl(dev, cap);
1760         if (result)
1761                 goto free_nvmeq;
1762
1763         nvmeq->cq_vector = 0;
1764         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1765         if (result) {
1766                 nvmeq->cq_vector = -1;
1767                 goto free_nvmeq;
1768         }
1769
1770         return result;
1771
1772  free_nvmeq:
1773         nvme_free_queues(dev, 0);
1774         return result;
1775 }
1776
1777 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1778 {
1779         struct nvme_dev *dev = ns->dev;
1780         struct nvme_user_io io;
1781         struct nvme_command c;
1782         unsigned length, meta_len;
1783         int status, write;
1784         dma_addr_t meta_dma = 0;
1785         void *meta = NULL;
1786         void __user *metadata;
1787
1788         if (copy_from_user(&io, uio, sizeof(io)))
1789                 return -EFAULT;
1790
1791         switch (io.opcode) {
1792         case nvme_cmd_write:
1793         case nvme_cmd_read:
1794         case nvme_cmd_compare:
1795                 break;
1796         default:
1797                 return -EINVAL;
1798         }
1799
1800         length = (io.nblocks + 1) << ns->lba_shift;
1801         meta_len = (io.nblocks + 1) * ns->ms;
1802         metadata = (void __user *)(unsigned long)io.metadata;
1803         write = io.opcode & 1;
1804
1805         if (ns->ext) {
1806                 length += meta_len;
1807                 meta_len = 0;
1808         }
1809         if (meta_len) {
1810                 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1811                         return -EINVAL;
1812
1813                 meta = dma_alloc_coherent(dev->dev, meta_len,
1814                                                 &meta_dma, GFP_KERNEL);
1815
1816                 if (!meta) {
1817                         status = -ENOMEM;
1818                         goto unmap;
1819                 }
1820                 if (write) {
1821                         if (copy_from_user(meta, metadata, meta_len)) {
1822                                 status = -EFAULT;
1823                                 goto unmap;
1824                         }
1825                 }
1826         }
1827
1828         memset(&c, 0, sizeof(c));
1829         c.rw.opcode = io.opcode;
1830         c.rw.flags = io.flags;
1831         c.rw.nsid = cpu_to_le32(ns->ns_id);
1832         c.rw.slba = cpu_to_le64(io.slba);
1833         c.rw.length = cpu_to_le16(io.nblocks);
1834         c.rw.control = cpu_to_le16(io.control);
1835         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1836         c.rw.reftag = cpu_to_le32(io.reftag);
1837         c.rw.apptag = cpu_to_le16(io.apptag);
1838         c.rw.appmask = cpu_to_le16(io.appmask);
1839         c.rw.metadata = cpu_to_le64(meta_dma);
1840
1841         status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1842                         (void __user *)io.addr, length, NULL, 0);
1843  unmap:
1844         if (meta) {
1845                 if (status == NVME_SC_SUCCESS && !write) {
1846                         if (copy_to_user(metadata, meta, meta_len))
1847                                 status = -EFAULT;
1848                 }
1849                 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1850         }
1851         return status;
1852 }
1853
1854 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1855                         struct nvme_passthru_cmd __user *ucmd)
1856 {
1857         struct nvme_passthru_cmd cmd;
1858         struct nvme_command c;
1859         unsigned timeout = 0;
1860         int status;
1861
1862         if (!capable(CAP_SYS_ADMIN))
1863                 return -EACCES;
1864         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1865                 return -EFAULT;
1866
1867         memset(&c, 0, sizeof(c));
1868         c.common.opcode = cmd.opcode;
1869         c.common.flags = cmd.flags;
1870         c.common.nsid = cpu_to_le32(cmd.nsid);
1871         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1872         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1873         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1874         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1875         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1876         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1877         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1878         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1879
1880         if (cmd.timeout_ms)
1881                 timeout = msecs_to_jiffies(cmd.timeout_ms);
1882
1883         status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1884                         NULL, (void __user *)cmd.addr, cmd.data_len,
1885                         &cmd.result, timeout);
1886         if (status >= 0) {
1887                 if (put_user(cmd.result, &ucmd->result))
1888                         return -EFAULT;
1889         }
1890
1891         return status;
1892 }
1893
1894 static int nvme_subsys_reset(struct nvme_dev *dev)
1895 {
1896         if (!dev->subsystem)
1897                 return -ENOTTY;
1898
1899         writel(0x4E564D65, &dev->bar->nssr); /* "NVMe" */
1900         return 0;
1901 }
1902
1903 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1904                                                         unsigned long arg)
1905 {
1906         struct nvme_ns *ns = bdev->bd_disk->private_data;
1907
1908         switch (cmd) {
1909         case NVME_IOCTL_ID:
1910                 force_successful_syscall_return();
1911                 return ns->ns_id;
1912         case NVME_IOCTL_ADMIN_CMD:
1913                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1914         case NVME_IOCTL_IO_CMD:
1915                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1916         case NVME_IOCTL_SUBMIT_IO:
1917                 return nvme_submit_io(ns, (void __user *)arg);
1918         case SG_GET_VERSION_NUM:
1919                 return nvme_sg_get_version_num((void __user *)arg);
1920         case SG_IO:
1921                 return nvme_sg_io(ns, (void __user *)arg);
1922         default:
1923                 return -ENOTTY;
1924         }
1925 }
1926
1927 #ifdef CONFIG_COMPAT
1928 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1929                                         unsigned int cmd, unsigned long arg)
1930 {
1931         switch (cmd) {
1932         case SG_IO:
1933                 return -ENOIOCTLCMD;
1934         }
1935         return nvme_ioctl(bdev, mode, cmd, arg);
1936 }
1937 #else
1938 #define nvme_compat_ioctl       NULL
1939 #endif
1940
1941 static void nvme_free_dev(struct kref *kref);
1942 static void nvme_free_ns(struct kref *kref)
1943 {
1944         struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
1945
1946         spin_lock(&dev_list_lock);
1947         ns->disk->private_data = NULL;
1948         spin_unlock(&dev_list_lock);
1949
1950         kref_put(&ns->dev->kref, nvme_free_dev);
1951         put_disk(ns->disk);
1952         kfree(ns);
1953 }
1954
1955 static int nvme_open(struct block_device *bdev, fmode_t mode)
1956 {
1957         int ret = 0;
1958         struct nvme_ns *ns;
1959
1960         spin_lock(&dev_list_lock);
1961         ns = bdev->bd_disk->private_data;
1962         if (!ns)
1963                 ret = -ENXIO;
1964         else if (!kref_get_unless_zero(&ns->kref))
1965                 ret = -ENXIO;
1966         spin_unlock(&dev_list_lock);
1967
1968         return ret;
1969 }
1970
1971 static void nvme_release(struct gendisk *disk, fmode_t mode)
1972 {
1973         struct nvme_ns *ns = disk->private_data;
1974         kref_put(&ns->kref, nvme_free_ns);
1975 }
1976
1977 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1978 {
1979         /* some standard values */
1980         geo->heads = 1 << 6;
1981         geo->sectors = 1 << 5;
1982         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1983         return 0;
1984 }
1985
1986 static void nvme_config_discard(struct nvme_ns *ns)
1987 {
1988         u32 logical_block_size = queue_logical_block_size(ns->queue);
1989         ns->queue->limits.discard_zeroes_data = 0;
1990         ns->queue->limits.discard_alignment = logical_block_size;
1991         ns->queue->limits.discard_granularity = logical_block_size;
1992         blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
1993         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1994 }
1995
1996 static int nvme_revalidate_disk(struct gendisk *disk)
1997 {
1998         struct nvme_ns *ns = disk->private_data;
1999         struct nvme_dev *dev = ns->dev;
2000         struct nvme_id_ns *id;
2001         u8 lbaf, pi_type;
2002         u16 old_ms;
2003         unsigned short bs;
2004
2005         if (nvme_identify_ns(dev, ns->ns_id, &id)) {
2006                 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
2007                                                 dev->instance, ns->ns_id);
2008                 return -ENODEV;
2009         }
2010         if (id->ncap == 0) {
2011                 kfree(id);
2012                 return -ENODEV;
2013         }
2014
2015         old_ms = ns->ms;
2016         lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2017         ns->lba_shift = id->lbaf[lbaf].ds;
2018         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2019         ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
2020
2021         /*
2022          * If identify namespace failed, use default 512 byte block size so
2023          * block layer can use before failing read/write for 0 capacity.
2024          */
2025         if (ns->lba_shift == 0)
2026                 ns->lba_shift = 9;
2027         bs = 1 << ns->lba_shift;
2028
2029         /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2030         pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2031                                         id->dps & NVME_NS_DPS_PI_MASK : 0;
2032
2033         if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2034                                 ns->ms != old_ms ||
2035                                 bs != queue_logical_block_size(disk->queue) ||
2036                                 (ns->ms && ns->ext)))
2037                 blk_integrity_unregister(disk);
2038
2039         ns->pi_type = pi_type;
2040         blk_queue_logical_block_size(ns->queue, bs);
2041
2042         if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
2043                                                                 !ns->ext)
2044                 nvme_init_integrity(ns);
2045
2046         if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
2047                 set_capacity(disk, 0);
2048         else
2049                 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2050
2051         if (dev->oncs & NVME_CTRL_ONCS_DSM)
2052                 nvme_config_discard(ns);
2053
2054         kfree(id);
2055         return 0;
2056 }
2057
2058 static const struct block_device_operations nvme_fops = {
2059         .owner          = THIS_MODULE,
2060         .ioctl          = nvme_ioctl,
2061         .compat_ioctl   = nvme_compat_ioctl,
2062         .open           = nvme_open,
2063         .release        = nvme_release,
2064         .getgeo         = nvme_getgeo,
2065         .revalidate_disk= nvme_revalidate_disk,
2066 };
2067
2068 static int nvme_kthread(void *data)
2069 {
2070         struct nvme_dev *dev, *next;
2071
2072         while (!kthread_should_stop()) {
2073                 set_current_state(TASK_INTERRUPTIBLE);
2074                 spin_lock(&dev_list_lock);
2075                 list_for_each_entry_safe(dev, next, &dev_list, node) {
2076                         int i;
2077                         u32 csts = readl(&dev->bar->csts);
2078
2079                         if ((dev->subsystem && (csts & NVME_CSTS_NSSRO)) ||
2080                                                         csts & NVME_CSTS_CFS) {
2081                                 if (!__nvme_reset(dev)) {
2082                                         dev_warn(dev->dev,
2083                                                 "Failed status: %x, reset controller\n",
2084                                                 readl(&dev->bar->csts));
2085                                 }
2086                                 continue;
2087                         }
2088                         for (i = 0; i < dev->queue_count; i++) {
2089                                 struct nvme_queue *nvmeq = dev->queues[i];
2090                                 if (!nvmeq)
2091                                         continue;
2092                                 spin_lock_irq(&nvmeq->q_lock);
2093                                 nvme_process_cq(nvmeq);
2094
2095                                 while ((i == 0) && (dev->event_limit > 0)) {
2096                                         if (nvme_submit_async_admin_req(dev))
2097                                                 break;
2098                                         dev->event_limit--;
2099                                 }
2100                                 spin_unlock_irq(&nvmeq->q_lock);
2101                         }
2102                 }
2103                 spin_unlock(&dev_list_lock);
2104                 schedule_timeout(round_jiffies_relative(HZ));
2105         }
2106         return 0;
2107 }
2108
2109 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2110 {
2111         struct nvme_ns *ns;
2112         struct gendisk *disk;
2113         int node = dev_to_node(dev->dev);
2114
2115         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2116         if (!ns)
2117                 return;
2118
2119         ns->queue = blk_mq_init_queue(&dev->tagset);
2120         if (IS_ERR(ns->queue))
2121                 goto out_free_ns;
2122         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2123         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2124         ns->dev = dev;
2125         ns->queue->queuedata = ns;
2126
2127         disk = alloc_disk_node(0, node);
2128         if (!disk)
2129                 goto out_free_queue;
2130
2131         kref_init(&ns->kref);
2132         ns->ns_id = nsid;
2133         ns->disk = disk;
2134         ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2135         list_add_tail(&ns->list, &dev->namespaces);
2136
2137         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2138         if (dev->max_hw_sectors) {
2139                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2140                 blk_queue_max_segments(ns->queue,
2141                         ((dev->max_hw_sectors << 9) / dev->page_size) + 1);
2142         }
2143         if (dev->stripe_size)
2144                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2145         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2146                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2147         blk_queue_virt_boundary(ns->queue, dev->page_size - 1);
2148
2149         disk->major = nvme_major;
2150         disk->first_minor = 0;
2151         disk->fops = &nvme_fops;
2152         disk->private_data = ns;
2153         disk->queue = ns->queue;
2154         disk->driverfs_dev = dev->device;
2155         disk->flags = GENHD_FL_EXT_DEVT;
2156         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2157
2158         /*
2159          * Initialize capacity to 0 until we establish the namespace format and
2160          * setup integrity extentions if necessary. The revalidate_disk after
2161          * add_disk allows the driver to register with integrity if the format
2162          * requires it.
2163          */
2164         set_capacity(disk, 0);
2165         if (nvme_revalidate_disk(ns->disk))
2166                 goto out_free_disk;
2167
2168         kref_get(&dev->kref);
2169         add_disk(ns->disk);
2170         if (ns->ms) {
2171                 struct block_device *bd = bdget_disk(ns->disk, 0);
2172                 if (!bd)
2173                         return;
2174                 if (blkdev_get(bd, FMODE_READ, NULL)) {
2175                         bdput(bd);
2176                         return;
2177                 }
2178                 blkdev_reread_part(bd);
2179                 blkdev_put(bd, FMODE_READ);
2180         }
2181         return;
2182  out_free_disk:
2183         kfree(disk);
2184         list_del(&ns->list);
2185  out_free_queue:
2186         blk_cleanup_queue(ns->queue);
2187  out_free_ns:
2188         kfree(ns);
2189 }
2190
2191 static void nvme_create_io_queues(struct nvme_dev *dev)
2192 {
2193         unsigned i;
2194
2195         for (i = dev->queue_count; i <= dev->max_qid; i++)
2196                 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2197                         break;
2198
2199         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2200                 if (nvme_create_queue(dev->queues[i], i))
2201                         break;
2202 }
2203
2204 static int set_queue_count(struct nvme_dev *dev, int count)
2205 {
2206         int status;
2207         u32 result;
2208         u32 q_count = (count - 1) | ((count - 1) << 16);
2209
2210         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2211                                                                 &result);
2212         if (status < 0)
2213                 return status;
2214         if (status > 0) {
2215                 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2216                 return 0;
2217         }
2218         return min(result & 0xffff, result >> 16) + 1;
2219 }
2220
2221 static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
2222 {
2223         u64 szu, size, offset;
2224         u32 cmbloc;
2225         resource_size_t bar_size;
2226         struct pci_dev *pdev = to_pci_dev(dev->dev);
2227         void __iomem *cmb;
2228         dma_addr_t dma_addr;
2229
2230         if (!use_cmb_sqes)
2231                 return NULL;
2232
2233         dev->cmbsz = readl(&dev->bar->cmbsz);
2234         if (!(NVME_CMB_SZ(dev->cmbsz)))
2235                 return NULL;
2236
2237         cmbloc = readl(&dev->bar->cmbloc);
2238
2239         szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz));
2240         size = szu * NVME_CMB_SZ(dev->cmbsz);
2241         offset = szu * NVME_CMB_OFST(cmbloc);
2242         bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc));
2243
2244         if (offset > bar_size)
2245                 return NULL;
2246
2247         /*
2248          * Controllers may support a CMB size larger than their BAR,
2249          * for example, due to being behind a bridge. Reduce the CMB to
2250          * the reported size of the BAR
2251          */
2252         if (size > bar_size - offset)
2253                 size = bar_size - offset;
2254
2255         dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset;
2256         cmb = ioremap_wc(dma_addr, size);
2257         if (!cmb)
2258                 return NULL;
2259
2260         dev->cmb_dma_addr = dma_addr;
2261         dev->cmb_size = size;
2262         return cmb;
2263 }
2264
2265 static inline void nvme_release_cmb(struct nvme_dev *dev)
2266 {
2267         if (dev->cmb) {
2268                 iounmap(dev->cmb);
2269                 dev->cmb = NULL;
2270         }
2271 }
2272
2273 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2274 {
2275         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2276 }
2277
2278 static int nvme_setup_io_queues(struct nvme_dev *dev)
2279 {
2280         struct nvme_queue *adminq = dev->queues[0];
2281         struct pci_dev *pdev = to_pci_dev(dev->dev);
2282         int result, i, vecs, nr_io_queues, size;
2283
2284         nr_io_queues = num_possible_cpus();
2285         result = set_queue_count(dev, nr_io_queues);
2286         if (result <= 0)
2287                 return result;
2288         if (result < nr_io_queues)
2289                 nr_io_queues = result;
2290
2291         if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) {
2292                 result = nvme_cmb_qdepth(dev, nr_io_queues,
2293                                 sizeof(struct nvme_command));
2294                 if (result > 0)
2295                         dev->q_depth = result;
2296                 else
2297                         nvme_release_cmb(dev);
2298         }
2299
2300         size = db_bar_size(dev, nr_io_queues);
2301         if (size > 8192) {
2302                 iounmap(dev->bar);
2303                 do {
2304                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2305                         if (dev->bar)
2306                                 break;
2307                         if (!--nr_io_queues)
2308                                 return -ENOMEM;
2309                         size = db_bar_size(dev, nr_io_queues);
2310                 } while (1);
2311                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2312                 adminq->q_db = dev->dbs;
2313         }
2314
2315         /* Deregister the admin queue's interrupt */
2316         free_irq(dev->entry[0].vector, adminq);
2317
2318         /*
2319          * If we enable msix early due to not intx, disable it again before
2320          * setting up the full range we need.
2321          */
2322         if (!pdev->irq)
2323                 pci_disable_msix(pdev);
2324
2325         for (i = 0; i < nr_io_queues; i++)
2326                 dev->entry[i].entry = i;
2327         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2328         if (vecs < 0) {
2329                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2330                 if (vecs < 0) {
2331                         vecs = 1;
2332                 } else {
2333                         for (i = 0; i < vecs; i++)
2334                                 dev->entry[i].vector = i + pdev->irq;
2335                 }
2336         }
2337
2338         /*
2339          * Should investigate if there's a performance win from allocating
2340          * more queues than interrupt vectors; it might allow the submission
2341          * path to scale better, even if the receive path is limited by the
2342          * number of interrupts.
2343          */
2344         nr_io_queues = vecs;
2345         dev->max_qid = nr_io_queues;
2346
2347         result = queue_request_irq(dev, adminq, adminq->irqname);
2348         if (result) {
2349                 adminq->cq_vector = -1;
2350                 goto free_queues;
2351         }
2352
2353         /* Free previously allocated queues that are no longer usable */
2354         nvme_free_queues(dev, nr_io_queues + 1);
2355         nvme_create_io_queues(dev);
2356
2357         return 0;
2358
2359  free_queues:
2360         nvme_free_queues(dev, 1);
2361         return result;
2362 }
2363
2364 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2365 {
2366         struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2367         struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2368
2369         return nsa->ns_id - nsb->ns_id;
2370 }
2371
2372 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2373 {
2374         struct nvme_ns *ns;
2375
2376         list_for_each_entry(ns, &dev->namespaces, list) {
2377                 if (ns->ns_id == nsid)
2378                         return ns;
2379                 if (ns->ns_id > nsid)
2380                         break;
2381         }
2382         return NULL;
2383 }
2384
2385 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2386 {
2387         return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2388                                                         dev->online_queues < 2);
2389 }
2390
2391 static void nvme_ns_remove(struct nvme_ns *ns)
2392 {
2393         bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2394
2395         if (kill)
2396                 blk_set_queue_dying(ns->queue);
2397         if (ns->disk->flags & GENHD_FL_UP) {
2398                 if (blk_get_integrity(ns->disk))
2399                         blk_integrity_unregister(ns->disk);
2400                 del_gendisk(ns->disk);
2401         }
2402         if (kill || !blk_queue_dying(ns->queue)) {
2403                 blk_mq_abort_requeue_list(ns->queue);
2404                 blk_cleanup_queue(ns->queue);
2405         }
2406         list_del_init(&ns->list);
2407         kref_put(&ns->kref, nvme_free_ns);
2408 }
2409
2410 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2411 {
2412         struct nvme_ns *ns, *next;
2413         unsigned i;
2414
2415         for (i = 1; i <= nn; i++) {
2416                 ns = nvme_find_ns(dev, i);
2417                 if (ns) {
2418                         if (revalidate_disk(ns->disk))
2419                                 nvme_ns_remove(ns);
2420                 } else
2421                         nvme_alloc_ns(dev, i);
2422         }
2423         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2424                 if (ns->ns_id > nn)
2425                         nvme_ns_remove(ns);
2426         }
2427         list_sort(NULL, &dev->namespaces, ns_cmp);
2428 }
2429
2430 static void nvme_set_irq_hints(struct nvme_dev *dev)
2431 {
2432         struct nvme_queue *nvmeq;
2433         int i;
2434
2435         for (i = 0; i < dev->online_queues; i++) {
2436                 nvmeq = dev->queues[i];
2437
2438                 if (!nvmeq->tags || !(*nvmeq->tags))
2439                         continue;
2440
2441                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2442                                         blk_mq_tags_cpumask(*nvmeq->tags));
2443         }
2444 }
2445
2446 static void nvme_dev_scan(struct work_struct *work)
2447 {
2448         struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2449         struct nvme_id_ctrl *ctrl;
2450
2451         if (!dev->tagset.tags)
2452                 return;
2453         if (nvme_identify_ctrl(dev, &ctrl))
2454                 return;
2455         nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2456         kfree(ctrl);
2457         nvme_set_irq_hints(dev);
2458 }
2459
2460 /*
2461  * Return: error value if an error occurred setting up the queues or calling
2462  * Identify Device.  0 if these succeeded, even if adding some of the
2463  * namespaces failed.  At the moment, these failures are silent.  TBD which
2464  * failures should be reported.
2465  */
2466 static int nvme_dev_add(struct nvme_dev *dev)
2467 {
2468         struct pci_dev *pdev = to_pci_dev(dev->dev);
2469         int res;
2470         struct nvme_id_ctrl *ctrl;
2471         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2472
2473         res = nvme_identify_ctrl(dev, &ctrl);
2474         if (res) {
2475                 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2476                 return -EIO;
2477         }
2478
2479         dev->oncs = le16_to_cpup(&ctrl->oncs);
2480         dev->abort_limit = ctrl->acl + 1;
2481         dev->vwc = ctrl->vwc;
2482         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2483         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2484         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2485         if (ctrl->mdts)
2486                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2487         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2488                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2489                 unsigned int max_hw_sectors;
2490
2491                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2492                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2493                 if (dev->max_hw_sectors) {
2494                         dev->max_hw_sectors = min(max_hw_sectors,
2495                                                         dev->max_hw_sectors);
2496                 } else
2497                         dev->max_hw_sectors = max_hw_sectors;
2498         }
2499         kfree(ctrl);
2500
2501         if (!dev->tagset.tags) {
2502                 dev->tagset.ops = &nvme_mq_ops;
2503                 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2504                 dev->tagset.timeout = NVME_IO_TIMEOUT;
2505                 dev->tagset.numa_node = dev_to_node(dev->dev);
2506                 dev->tagset.queue_depth =
2507                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2508                 dev->tagset.cmd_size = nvme_cmd_size(dev);
2509                 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2510                 dev->tagset.driver_data = dev;
2511
2512                 if (blk_mq_alloc_tag_set(&dev->tagset))
2513                         return 0;
2514         }
2515         schedule_work(&dev->scan_work);
2516         return 0;
2517 }
2518
2519 static int nvme_dev_map(struct nvme_dev *dev)
2520 {
2521         u64 cap;
2522         int bars, result = -ENOMEM;
2523         struct pci_dev *pdev = to_pci_dev(dev->dev);
2524
2525         if (pci_enable_device_mem(pdev))
2526                 return result;
2527
2528         dev->entry[0].vector = pdev->irq;
2529         pci_set_master(pdev);
2530         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2531         if (!bars)
2532                 goto disable_pci;
2533
2534         if (pci_request_selected_regions(pdev, bars, "nvme"))
2535                 goto disable_pci;
2536
2537         if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2538             dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2539                 goto disable;
2540
2541         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2542         if (!dev->bar)
2543                 goto disable;
2544
2545         if (readl(&dev->bar->csts) == -1) {
2546                 result = -ENODEV;
2547                 goto unmap;
2548         }
2549
2550         /*
2551          * Some devices don't advertse INTx interrupts, pre-enable a single
2552          * MSIX vec for setup. We'll adjust this later.
2553          */
2554         if (!pdev->irq) {
2555                 result = pci_enable_msix(pdev, dev->entry, 1);
2556                 if (result < 0)
2557                         goto unmap;
2558         }
2559
2560         cap = readq(&dev->bar->cap);
2561         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2562         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2563         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2564         if (readl(&dev->bar->vs) >= NVME_VS(1, 2))
2565                 dev->cmb = nvme_map_cmb(dev);
2566
2567         return 0;
2568
2569  unmap:
2570         iounmap(dev->bar);
2571         dev->bar = NULL;
2572  disable:
2573         pci_release_regions(pdev);
2574  disable_pci:
2575         pci_disable_device(pdev);
2576         return result;
2577 }
2578
2579 static void nvme_dev_unmap(struct nvme_dev *dev)
2580 {
2581         struct pci_dev *pdev = to_pci_dev(dev->dev);
2582
2583         if (pdev->msi_enabled)
2584                 pci_disable_msi(pdev);
2585         else if (pdev->msix_enabled)
2586                 pci_disable_msix(pdev);
2587
2588         if (dev->bar) {
2589                 iounmap(dev->bar);
2590                 dev->bar = NULL;
2591                 pci_release_regions(pdev);
2592         }
2593
2594         if (pci_is_enabled(pdev))
2595                 pci_disable_device(pdev);
2596 }
2597
2598 struct nvme_delq_ctx {
2599         struct task_struct *waiter;
2600         struct kthread_worker *worker;
2601         atomic_t refcount;
2602 };
2603
2604 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2605 {
2606         dq->waiter = current;
2607         mb();
2608
2609         for (;;) {
2610                 set_current_state(TASK_KILLABLE);
2611                 if (!atomic_read(&dq->refcount))
2612                         break;
2613                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2614                                         fatal_signal_pending(current)) {
2615                         /*
2616                          * Disable the controller first since we can't trust it
2617                          * at this point, but leave the admin queue enabled
2618                          * until all queue deletion requests are flushed.
2619                          * FIXME: This may take a while if there are more h/w
2620                          * queues than admin tags.
2621                          */
2622                         set_current_state(TASK_RUNNING);
2623                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2624                         nvme_clear_queue(dev->queues[0]);
2625                         flush_kthread_worker(dq->worker);
2626                         nvme_disable_queue(dev, 0);
2627                         return;
2628                 }
2629         }
2630         set_current_state(TASK_RUNNING);
2631 }
2632
2633 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2634 {
2635         atomic_dec(&dq->refcount);
2636         if (dq->waiter)
2637                 wake_up_process(dq->waiter);
2638 }
2639
2640 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2641 {
2642         atomic_inc(&dq->refcount);
2643         return dq;
2644 }
2645
2646 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2647 {
2648         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2649         nvme_put_dq(dq);
2650 }
2651
2652 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2653                                                 kthread_work_func_t fn)
2654 {
2655         struct nvme_command c;
2656
2657         memset(&c, 0, sizeof(c));
2658         c.delete_queue.opcode = opcode;
2659         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2660
2661         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2662         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2663                                                                 ADMIN_TIMEOUT);
2664 }
2665
2666 static void nvme_del_cq_work_handler(struct kthread_work *work)
2667 {
2668         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2669                                                         cmdinfo.work);
2670         nvme_del_queue_end(nvmeq);
2671 }
2672
2673 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2674 {
2675         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2676                                                 nvme_del_cq_work_handler);
2677 }
2678
2679 static void nvme_del_sq_work_handler(struct kthread_work *work)
2680 {
2681         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2682                                                         cmdinfo.work);
2683         int status = nvmeq->cmdinfo.status;
2684
2685         if (!status)
2686                 status = nvme_delete_cq(nvmeq);
2687         if (status)
2688                 nvme_del_queue_end(nvmeq);
2689 }
2690
2691 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2692 {
2693         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2694                                                 nvme_del_sq_work_handler);
2695 }
2696
2697 static void nvme_del_queue_start(struct kthread_work *work)
2698 {
2699         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2700                                                         cmdinfo.work);
2701         if (nvme_delete_sq(nvmeq))
2702                 nvme_del_queue_end(nvmeq);
2703 }
2704
2705 static void nvme_disable_io_queues(struct nvme_dev *dev)
2706 {
2707         int i;
2708         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2709         struct nvme_delq_ctx dq;
2710         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2711                                         &worker, "nvme%d", dev->instance);
2712
2713         if (IS_ERR(kworker_task)) {
2714                 dev_err(dev->dev,
2715                         "Failed to create queue del task\n");
2716                 for (i = dev->queue_count - 1; i > 0; i--)
2717                         nvme_disable_queue(dev, i);
2718                 return;
2719         }
2720
2721         dq.waiter = NULL;
2722         atomic_set(&dq.refcount, 0);
2723         dq.worker = &worker;
2724         for (i = dev->queue_count - 1; i > 0; i--) {
2725                 struct nvme_queue *nvmeq = dev->queues[i];
2726
2727                 if (nvme_suspend_queue(nvmeq))
2728                         continue;
2729                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2730                 nvmeq->cmdinfo.worker = dq.worker;
2731                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2732                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2733         }
2734         nvme_wait_dq(&dq, dev);
2735         kthread_stop(kworker_task);
2736 }
2737
2738 /*
2739 * Remove the node from the device list and check
2740 * for whether or not we need to stop the nvme_thread.
2741 */
2742 static void nvme_dev_list_remove(struct nvme_dev *dev)
2743 {
2744         struct task_struct *tmp = NULL;
2745
2746         spin_lock(&dev_list_lock);
2747         list_del_init(&dev->node);
2748         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2749                 tmp = nvme_thread;
2750                 nvme_thread = NULL;
2751         }
2752         spin_unlock(&dev_list_lock);
2753
2754         if (tmp)
2755                 kthread_stop(tmp);
2756 }
2757
2758 static void nvme_freeze_queues(struct nvme_dev *dev)
2759 {
2760         struct nvme_ns *ns;
2761
2762         list_for_each_entry(ns, &dev->namespaces, list) {
2763                 blk_mq_freeze_queue_start(ns->queue);
2764
2765                 spin_lock_irq(ns->queue->queue_lock);
2766                 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2767                 spin_unlock_irq(ns->queue->queue_lock);
2768
2769                 blk_mq_cancel_requeue_work(ns->queue);
2770                 blk_mq_stop_hw_queues(ns->queue);
2771         }
2772 }
2773
2774 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2775 {
2776         struct nvme_ns *ns;
2777
2778         list_for_each_entry(ns, &dev->namespaces, list) {
2779                 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2780                 blk_mq_unfreeze_queue(ns->queue);
2781                 blk_mq_start_stopped_hw_queues(ns->queue, true);
2782                 blk_mq_kick_requeue_list(ns->queue);
2783         }
2784 }
2785
2786 static void nvme_dev_shutdown(struct nvme_dev *dev)
2787 {
2788         int i;
2789         u32 csts = -1;
2790
2791         nvme_dev_list_remove(dev);
2792
2793         if (dev->bar) {
2794                 nvme_freeze_queues(dev);
2795                 csts = readl(&dev->bar->csts);
2796         }
2797         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2798                 for (i = dev->queue_count - 1; i >= 0; i--) {
2799                         struct nvme_queue *nvmeq = dev->queues[i];
2800                         nvme_suspend_queue(nvmeq);
2801                 }
2802         } else {
2803                 nvme_disable_io_queues(dev);
2804                 nvme_shutdown_ctrl(dev);
2805                 nvme_disable_queue(dev, 0);
2806         }
2807         nvme_dev_unmap(dev);
2808
2809         for (i = dev->queue_count - 1; i >= 0; i--)
2810                 nvme_clear_queue(dev->queues[i]);
2811 }
2812
2813 static void nvme_dev_remove(struct nvme_dev *dev)
2814 {
2815         struct nvme_ns *ns, *next;
2816
2817         list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2818                 nvme_ns_remove(ns);
2819 }
2820
2821 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2822 {
2823         dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2824                                                 PAGE_SIZE, PAGE_SIZE, 0);
2825         if (!dev->prp_page_pool)
2826                 return -ENOMEM;
2827
2828         /* Optimisation for I/Os between 4k and 128k */
2829         dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2830                                                 256, 256, 0);
2831         if (!dev->prp_small_pool) {
2832                 dma_pool_destroy(dev->prp_page_pool);
2833                 return -ENOMEM;
2834         }
2835         return 0;
2836 }
2837
2838 static void nvme_release_prp_pools(struct nvme_dev *dev)
2839 {
2840         dma_pool_destroy(dev->prp_page_pool);
2841         dma_pool_destroy(dev->prp_small_pool);
2842 }
2843
2844 static DEFINE_IDA(nvme_instance_ida);
2845
2846 static int nvme_set_instance(struct nvme_dev *dev)
2847 {
2848         int instance, error;
2849
2850         do {
2851                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2852                         return -ENODEV;
2853
2854                 spin_lock(&dev_list_lock);
2855                 error = ida_get_new(&nvme_instance_ida, &instance);
2856                 spin_unlock(&dev_list_lock);
2857         } while (error == -EAGAIN);
2858
2859         if (error)
2860                 return -ENODEV;
2861
2862         dev->instance = instance;
2863         return 0;
2864 }
2865
2866 static void nvme_release_instance(struct nvme_dev *dev)
2867 {
2868         spin_lock(&dev_list_lock);
2869         ida_remove(&nvme_instance_ida, dev->instance);
2870         spin_unlock(&dev_list_lock);
2871 }
2872
2873 static void nvme_free_dev(struct kref *kref)
2874 {
2875         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2876
2877         put_device(dev->dev);
2878         put_device(dev->device);
2879         nvme_release_instance(dev);
2880         if (dev->tagset.tags)
2881                 blk_mq_free_tag_set(&dev->tagset);
2882         if (dev->admin_q)
2883                 blk_put_queue(dev->admin_q);
2884         kfree(dev->queues);
2885         kfree(dev->entry);
2886         kfree(dev);
2887 }
2888
2889 static int nvme_dev_open(struct inode *inode, struct file *f)
2890 {
2891         struct nvme_dev *dev;
2892         int instance = iminor(inode);
2893         int ret = -ENODEV;
2894
2895         spin_lock(&dev_list_lock);
2896         list_for_each_entry(dev, &dev_list, node) {
2897                 if (dev->instance == instance) {
2898                         if (!dev->admin_q) {
2899                                 ret = -EWOULDBLOCK;
2900                                 break;
2901                         }
2902                         if (!kref_get_unless_zero(&dev->kref))
2903                                 break;
2904                         f->private_data = dev;
2905                         ret = 0;
2906                         break;
2907                 }
2908         }
2909         spin_unlock(&dev_list_lock);
2910
2911         return ret;
2912 }
2913
2914 static int nvme_dev_release(struct inode *inode, struct file *f)
2915 {
2916         struct nvme_dev *dev = f->private_data;
2917         kref_put(&dev->kref, nvme_free_dev);
2918         return 0;
2919 }
2920
2921 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2922 {
2923         struct nvme_dev *dev = f->private_data;
2924         struct nvme_ns *ns;
2925
2926         switch (cmd) {
2927         case NVME_IOCTL_ADMIN_CMD:
2928                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2929         case NVME_IOCTL_IO_CMD:
2930                 if (list_empty(&dev->namespaces))
2931                         return -ENOTTY;
2932                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2933                 return nvme_user_cmd(dev, ns, (void __user *)arg);
2934         case NVME_IOCTL_RESET:
2935                 dev_warn(dev->dev, "resetting controller\n");
2936                 return nvme_reset(dev);
2937         case NVME_IOCTL_SUBSYS_RESET:
2938                 return nvme_subsys_reset(dev);
2939         default:
2940                 return -ENOTTY;
2941         }
2942 }
2943
2944 static const struct file_operations nvme_dev_fops = {
2945         .owner          = THIS_MODULE,
2946         .open           = nvme_dev_open,
2947         .release        = nvme_dev_release,
2948         .unlocked_ioctl = nvme_dev_ioctl,
2949         .compat_ioctl   = nvme_dev_ioctl,
2950 };
2951
2952 static int nvme_dev_start(struct nvme_dev *dev)
2953 {
2954         int result;
2955         bool start_thread = false;
2956
2957         result = nvme_dev_map(dev);
2958         if (result)
2959                 return result;
2960
2961         result = nvme_configure_admin_queue(dev);
2962         if (result)
2963                 goto unmap;
2964
2965         spin_lock(&dev_list_lock);
2966         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2967                 start_thread = true;
2968                 nvme_thread = NULL;
2969         }
2970         list_add(&dev->node, &dev_list);
2971         spin_unlock(&dev_list_lock);
2972
2973         if (start_thread) {
2974                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2975                 wake_up_all(&nvme_kthread_wait);
2976         } else
2977                 wait_event_killable(nvme_kthread_wait, nvme_thread);
2978
2979         if (IS_ERR_OR_NULL(nvme_thread)) {
2980                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2981                 goto disable;
2982         }
2983
2984         nvme_init_queue(dev->queues[0], 0);
2985         result = nvme_alloc_admin_tags(dev);
2986         if (result)
2987                 goto disable;
2988
2989         result = nvme_setup_io_queues(dev);
2990         if (result)
2991                 goto free_tags;
2992
2993         dev->event_limit = 1;
2994         return result;
2995
2996  free_tags:
2997         nvme_dev_remove_admin(dev);
2998         blk_put_queue(dev->admin_q);
2999         dev->admin_q = NULL;
3000         dev->queues[0]->tags = NULL;
3001  disable:
3002         nvme_disable_queue(dev, 0);
3003         nvme_dev_list_remove(dev);
3004  unmap:
3005         nvme_dev_unmap(dev);
3006         return result;
3007 }
3008
3009 static int nvme_remove_dead_ctrl(void *arg)
3010 {
3011         struct nvme_dev *dev = (struct nvme_dev *)arg;
3012         struct pci_dev *pdev = to_pci_dev(dev->dev);
3013
3014         if (pci_get_drvdata(pdev))
3015                 pci_stop_and_remove_bus_device_locked(pdev);
3016         kref_put(&dev->kref, nvme_free_dev);
3017         return 0;
3018 }
3019
3020 static int nvme_dev_resume(struct nvme_dev *dev)
3021 {
3022         int ret;
3023
3024         ret = nvme_dev_start(dev);
3025         if (ret)
3026                 return ret;
3027         if (dev->online_queues < 2) {
3028                 dev_warn(dev->dev, "IO queues not created\n");
3029                 nvme_free_queues(dev, 1);
3030                 nvme_dev_remove(dev);
3031         } else {
3032                 nvme_unfreeze_queues(dev);
3033                 nvme_dev_add(dev);
3034         }
3035         return 0;
3036 }
3037
3038 static void nvme_dead_ctrl(struct nvme_dev *dev)
3039 {
3040         dev_warn(dev->dev, "Device failed to resume\n");
3041         kref_get(&dev->kref);
3042         if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
3043                                                 dev->instance))) {
3044                 dev_err(dev->dev,
3045                         "Failed to start controller remove task\n");
3046                 kref_put(&dev->kref, nvme_free_dev);
3047         }
3048 }
3049
3050 static void nvme_reset_work(struct work_struct *ws)
3051 {
3052         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3053         bool in_probe = work_busy(&dev->probe_work);
3054
3055         nvme_dev_shutdown(dev);
3056
3057         /* Synchronize with device probe so that work will see failure status
3058          * and exit gracefully without trying to schedule another reset */
3059         flush_work(&dev->probe_work);
3060
3061         /* Fail this device if reset occured during probe to avoid
3062          * infinite initialization loops. */
3063         if (in_probe) {
3064                 nvme_dead_ctrl(dev);
3065                 return;
3066         }
3067         /* Schedule device resume asynchronously so the reset work is available
3068          * to cleanup errors that may occur during reinitialization */
3069         schedule_work(&dev->probe_work);
3070 }
3071
3072 static int __nvme_reset(struct nvme_dev *dev)
3073 {
3074         if (work_pending(&dev->reset_work))
3075                 return -EBUSY;
3076         list_del_init(&dev->node);
3077         queue_work(nvme_workq, &dev->reset_work);
3078         return 0;
3079 }
3080
3081 static int nvme_reset(struct nvme_dev *dev)
3082 {
3083         int ret;
3084
3085         if (!dev->admin_q || blk_queue_dying(dev->admin_q))
3086                 return -ENODEV;
3087
3088         spin_lock(&dev_list_lock);
3089         ret = __nvme_reset(dev);
3090         spin_unlock(&dev_list_lock);
3091
3092         if (!ret) {
3093                 flush_work(&dev->reset_work);
3094                 flush_work(&dev->probe_work);
3095                 return 0;
3096         }
3097
3098         return ret;
3099 }
3100
3101 static ssize_t nvme_sysfs_reset(struct device *dev,
3102                                 struct device_attribute *attr, const char *buf,
3103                                 size_t count)
3104 {
3105         struct nvme_dev *ndev = dev_get_drvdata(dev);
3106         int ret;
3107
3108         ret = nvme_reset(ndev);
3109         if (ret < 0)
3110                 return ret;
3111
3112         return count;
3113 }
3114 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3115
3116 static void nvme_async_probe(struct work_struct *work);
3117 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3118 {
3119         int node, result = -ENOMEM;
3120         struct nvme_dev *dev;
3121
3122         node = dev_to_node(&pdev->dev);
3123         if (node == NUMA_NO_NODE)
3124                 set_dev_node(&pdev->dev, 0);
3125
3126         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
3127         if (!dev)
3128                 return -ENOMEM;
3129         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
3130                                                         GFP_KERNEL, node);
3131         if (!dev->entry)
3132                 goto free;
3133         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3134                                                         GFP_KERNEL, node);
3135         if (!dev->queues)
3136                 goto free;
3137
3138         INIT_LIST_HEAD(&dev->namespaces);
3139         INIT_WORK(&dev->reset_work, nvme_reset_work);
3140         dev->dev = get_device(&pdev->dev);
3141         pci_set_drvdata(pdev, dev);
3142         result = nvme_set_instance(dev);
3143         if (result)
3144                 goto put_pci;
3145
3146         result = nvme_setup_prp_pools(dev);
3147         if (result)
3148                 goto release;
3149
3150         kref_init(&dev->kref);
3151         dev->device = device_create(nvme_class, &pdev->dev,
3152                                 MKDEV(nvme_char_major, dev->instance),
3153                                 dev, "nvme%d", dev->instance);
3154         if (IS_ERR(dev->device)) {
3155                 result = PTR_ERR(dev->device);
3156                 goto release_pools;
3157         }
3158         get_device(dev->device);
3159         dev_set_drvdata(dev->device, dev);
3160
3161         result = device_create_file(dev->device, &dev_attr_reset_controller);
3162         if (result)
3163                 goto put_dev;
3164
3165         INIT_LIST_HEAD(&dev->node);
3166         INIT_WORK(&dev->scan_work, nvme_dev_scan);
3167         INIT_WORK(&dev->probe_work, nvme_async_probe);
3168         schedule_work(&dev->probe_work);
3169         return 0;
3170
3171  put_dev:
3172         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3173         put_device(dev->device);
3174  release_pools:
3175         nvme_release_prp_pools(dev);
3176  release:
3177         nvme_release_instance(dev);
3178  put_pci:
3179         put_device(dev->dev);
3180  free:
3181         kfree(dev->queues);
3182         kfree(dev->entry);
3183         kfree(dev);
3184         return result;
3185 }
3186
3187 static void nvme_async_probe(struct work_struct *work)
3188 {
3189         struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3190
3191         if (nvme_dev_resume(dev) && !work_busy(&dev->reset_work))
3192                 nvme_dead_ctrl(dev);
3193 }
3194
3195 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3196 {
3197         struct nvme_dev *dev = pci_get_drvdata(pdev);
3198
3199         if (prepare)
3200                 nvme_dev_shutdown(dev);
3201         else
3202                 schedule_work(&dev->probe_work);
3203 }
3204
3205 static void nvme_shutdown(struct pci_dev *pdev)
3206 {
3207         struct nvme_dev *dev = pci_get_drvdata(pdev);
3208         nvme_dev_shutdown(dev);
3209 }
3210
3211 static void nvme_remove(struct pci_dev *pdev)
3212 {
3213         struct nvme_dev *dev = pci_get_drvdata(pdev);
3214
3215         spin_lock(&dev_list_lock);
3216         list_del_init(&dev->node);
3217         spin_unlock(&dev_list_lock);
3218
3219         pci_set_drvdata(pdev, NULL);
3220         flush_work(&dev->probe_work);
3221         flush_work(&dev->reset_work);
3222         flush_work(&dev->scan_work);
3223         device_remove_file(dev->device, &dev_attr_reset_controller);
3224         nvme_dev_remove(dev);
3225         nvme_dev_shutdown(dev);
3226         nvme_dev_remove_admin(dev);
3227         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3228         nvme_free_queues(dev, 0);
3229         nvme_release_cmb(dev);
3230         nvme_release_prp_pools(dev);
3231         kref_put(&dev->kref, nvme_free_dev);
3232 }
3233
3234 /* These functions are yet to be implemented */
3235 #define nvme_error_detected NULL
3236 #define nvme_dump_registers NULL
3237 #define nvme_link_reset NULL
3238 #define nvme_slot_reset NULL
3239 #define nvme_error_resume NULL
3240
3241 #ifdef CONFIG_PM_SLEEP
3242 static int nvme_suspend(struct device *dev)
3243 {
3244         struct pci_dev *pdev = to_pci_dev(dev);
3245         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3246
3247         nvme_dev_shutdown(ndev);
3248         return 0;
3249 }
3250
3251 static int nvme_resume(struct device *dev)
3252 {
3253         struct pci_dev *pdev = to_pci_dev(dev);
3254         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3255
3256         schedule_work(&ndev->probe_work);
3257         return 0;
3258 }
3259 #endif
3260
3261 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3262
3263 static const struct pci_error_handlers nvme_err_handler = {
3264         .error_detected = nvme_error_detected,
3265         .mmio_enabled   = nvme_dump_registers,
3266         .link_reset     = nvme_link_reset,
3267         .slot_reset     = nvme_slot_reset,
3268         .resume         = nvme_error_resume,
3269         .reset_notify   = nvme_reset_notify,
3270 };
3271
3272 /* Move to pci_ids.h later */
3273 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
3274
3275 static const struct pci_device_id nvme_id_table[] = {
3276         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3277         { 0, }
3278 };
3279 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3280
3281 static struct pci_driver nvme_driver = {
3282         .name           = "nvme",
3283         .id_table       = nvme_id_table,
3284         .probe          = nvme_probe,
3285         .remove         = nvme_remove,
3286         .shutdown       = nvme_shutdown,
3287         .driver         = {
3288                 .pm     = &nvme_dev_pm_ops,
3289         },
3290         .err_handler    = &nvme_err_handler,
3291 };
3292
3293 static int __init nvme_init(void)
3294 {
3295         int result;
3296
3297         init_waitqueue_head(&nvme_kthread_wait);
3298
3299         nvme_workq = create_singlethread_workqueue("nvme");
3300         if (!nvme_workq)
3301                 return -ENOMEM;
3302
3303         result = register_blkdev(nvme_major, "nvme");
3304         if (result < 0)
3305                 goto kill_workq;
3306         else if (result > 0)
3307                 nvme_major = result;
3308
3309         result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3310                                                         &nvme_dev_fops);
3311         if (result < 0)
3312                 goto unregister_blkdev;
3313         else if (result > 0)
3314                 nvme_char_major = result;
3315
3316         nvme_class = class_create(THIS_MODULE, "nvme");
3317         if (IS_ERR(nvme_class)) {
3318                 result = PTR_ERR(nvme_class);
3319                 goto unregister_chrdev;
3320         }
3321
3322         result = pci_register_driver(&nvme_driver);
3323         if (result)
3324                 goto destroy_class;
3325         return 0;
3326
3327  destroy_class:
3328         class_destroy(nvme_class);
3329  unregister_chrdev:
3330         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3331  unregister_blkdev:
3332         unregister_blkdev(nvme_major, "nvme");
3333  kill_workq:
3334         destroy_workqueue(nvme_workq);
3335         return result;
3336 }
3337
3338 static void __exit nvme_exit(void)
3339 {
3340         pci_unregister_driver(&nvme_driver);
3341         unregister_blkdev(nvme_major, "nvme");
3342         destroy_workqueue(nvme_workq);
3343         class_destroy(nvme_class);
3344         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3345         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3346         _nvme_check_size();
3347 }
3348
3349 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3350 MODULE_LICENSE("GPL");
3351 MODULE_VERSION("1.0");
3352 module_init(nvme_init);
3353 module_exit(nvme_exit);