drivers/block/nvme-core.c

   1 /*
   2  * NVM Express device driver
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include <linux/nvme.h>
  16 #include <linux/bitops.h>
  17 #include <linux/blkdev.h>
  18 #include <linux/blk-mq.h>
  19 #include <linux/cpu.h>
  20 #include <linux/delay.h>
  21 #include <linux/errno.h>
  22 #include <linux/fs.h>
  23 #include <linux/genhd.h>
  24 #include <linux/hdreg.h>
  25 #include <linux/idr.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/io.h>
  29 #include <linux/kdev_t.h>
  30 #include <linux/kthread.h>
  31 #include <linux/kernel.h>
  32 #include <linux/mm.h>
  33 #include <linux/module.h>
  34 #include <linux/moduleparam.h>
  35 #include <linux/pci.h>
  36 #include <linux/poison.h>
  37 #include <linux/ptrace.h>
  38 #include <linux/sched.h>
  39 #include <linux/slab.h>
  40 #include <linux/t10-pi.h>
  41 #include <linux/types.h>
  42 #include <scsi/sg.h>
  43 #include <asm-generic/io-64-nonatomic-lo-hi.h>
  44
  45 #define NVME_MINORS             (1U << MINORBITS)
  46 #define NVME_Q_DEPTH            1024
  47 #define NVME_AQ_DEPTH           64
  48 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
  49 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
  50 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
  51 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
  52 #define IOD_TIMEOUT             (retry_time * HZ)
  53
  54 static unsigned char admin_timeout = 60;
  55 module_param(admin_timeout, byte, 0644);
  56 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  57
  58 unsigned char nvme_io_timeout = 30;
  59 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  60 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  61
  62 static unsigned char retry_time = 30;
  63 module_param(retry_time, byte, 0644);
  64 MODULE_PARM_DESC(retry_time, "time in seconds to retry failed I/O");
  65
  66 static unsigned char shutdown_timeout = 5;
  67 module_param(shutdown_timeout, byte, 0644);
  68 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  69
  70 static int nvme_major;
  71 module_param(nvme_major, int, 0);
  72
  73 static int nvme_char_major;
  74 module_param(nvme_char_major, int, 0);
  75
  76 static int use_threaded_interrupts;
  77 module_param(use_threaded_interrupts, int, 0);
  78
  79 static DEFINE_SPINLOCK(dev_list_lock);
  80 static LIST_HEAD(dev_list);
  81 static struct task_struct *nvme_thread;
  82 static struct workqueue_struct *nvme_workq;
  83 static wait_queue_head_t nvme_kthread_wait;
  84 static struct notifier_block nvme_nb;
  85
  86 static struct class *nvme_class;
  87
  88 static void nvme_reset_failed_dev(struct work_struct *ws);
  89 static int nvme_process_cq(struct nvme_queue *nvmeq);
  90
  91 struct async_cmd_info {
  92         struct kthread_work work;
  93         struct kthread_worker *worker;
  94         struct request *req;
  95         u32 result;
  96         int status;
  97         void *ctx;
  98 };
  99
 100 /*
 101  * An NVM Express queue.  Each device has at least two (one for admin
 102  * commands and one for I/O commands).
 103  */
 104 struct nvme_queue {
 105         struct llist_node node;
 106         struct device *q_dmadev;
 107         struct nvme_dev *dev;
 108         char irqname[24];       /* nvme4294967295-65535\0 */
 109         spinlock_t q_lock;
 110         struct nvme_command *sq_cmds;
 111         volatile struct nvme_completion *cqes;
 112         dma_addr_t sq_dma_addr;
 113         dma_addr_t cq_dma_addr;
 114         u32 __iomem *q_db;
 115         u16 q_depth;
 116         s16 cq_vector;
 117         u16 sq_head;
 118         u16 sq_tail;
 119         u16 cq_head;
 120         u16 qid;
 121         u8 cq_phase;
 122         u8 cqe_seen;
 123         struct async_cmd_info cmdinfo;
 124         struct blk_mq_hw_ctx *hctx;
 125 };
 126
 127 /*
 128  * Check we didin't inadvertently grow the command struct
 129  */
 130 static inline void _nvme_check_size(void)
 131 {
 132         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
 133         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
 134         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
 135         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
 136         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
 137         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
 138         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
 139         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
 140         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
 141         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
 142         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
 143         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
 144 }
 145
 146 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
 147                                                 struct nvme_completion *);
 148
 149 struct nvme_cmd_info {
 150         nvme_completion_fn fn;
 151         void *ctx;
 152         int aborted;
 153         struct nvme_queue *nvmeq;
 154         struct nvme_iod iod[0];
 155 };
 156
 157 /*
 158  * Max size of iod being embedded in the request payload
 159  */
 160 #define NVME_INT_PAGES          2
 161 #define NVME_INT_BYTES(dev)     (NVME_INT_PAGES * (dev)->page_size)
 162
 163 /*
 164  * Will slightly overestimate the number of pages needed.  This is OK
 165  * as it only leads to a small amount of wasted memory for the lifetime of
 166  * the I/O.
 167  */
 168 static int nvme_npages(unsigned size, struct nvme_dev *dev)
 169 {
 170         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
 171         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
 172 }
 173
 174 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
 175 {
 176         unsigned int ret = sizeof(struct nvme_cmd_info);
 177
 178         ret += sizeof(struct nvme_iod);
 179         ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
 180         ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
 181
 182         return ret;
 183 }
 184
 185 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 186                                 unsigned int hctx_idx)
 187 {
 188         struct nvme_dev *dev = data;
 189         struct nvme_queue *nvmeq = dev->queues[0];
 190
 191         WARN_ON(nvmeq->hctx);
 192         nvmeq->hctx = hctx;
 193         hctx->driver_data = nvmeq;
 194         return 0;
 195 }
 196
 197 static int nvme_admin_init_request(void *data, struct request *req,
 198                                 unsigned int hctx_idx, unsigned int rq_idx,
 199                                 unsigned int numa_node)
 200 {
 201         struct nvme_dev *dev = data;
 202         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 203         struct nvme_queue *nvmeq = dev->queues[0];
 204
 205         BUG_ON(!nvmeq);
 206         cmd->nvmeq = nvmeq;
 207         return 0;
 208 }
 209
 210 static void nvme_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
 211 {
 212         struct nvme_queue *nvmeq = hctx->driver_data;
 213
 214         nvmeq->hctx = NULL;
 215 }
 216
 217 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 218                           unsigned int hctx_idx)
 219 {
 220         struct nvme_dev *dev = data;
 221         struct nvme_queue *nvmeq = dev->queues[
 222                                         (hctx_idx % dev->queue_count) + 1];
 223
 224         if (!nvmeq->hctx)
 225                 nvmeq->hctx = hctx;
 226
 227         /* nvmeq queues are shared between namespaces. We assume here that
 228          * blk-mq map the tags so they match up with the nvme queue tags. */
 229         WARN_ON(nvmeq->hctx->tags != hctx->tags);
 230
 231         hctx->driver_data = nvmeq;
 232         return 0;
 233 }
 234
 235 static int nvme_init_request(void *data, struct request *req,
 236                                 unsigned int hctx_idx, unsigned int rq_idx,
 237                                 unsigned int numa_node)
 238 {
 239         struct nvme_dev *dev = data;
 240         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 241         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 242
 243         BUG_ON(!nvmeq);
 244         cmd->nvmeq = nvmeq;
 245         return 0;
 246 }
 247
 248 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
 249                                 nvme_completion_fn handler)
 250 {
 251         cmd->fn = handler;
 252         cmd->ctx = ctx;
 253         cmd->aborted = 0;
 254         blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
 255 }
 256
 257 static void *iod_get_private(struct nvme_iod *iod)
 258 {
 259         return (void *) (iod->private & ~0x1UL);
 260 }
 261
 262 /*
 263  * If bit 0 is set, the iod is embedded in the request payload.
 264  */
 265 static bool iod_should_kfree(struct nvme_iod *iod)
 266 {
 267         return (iod->private & 0x01) == 0;
 268 }
 269
 270 /* Special values must be less than 0x1000 */
 271 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
 272 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
 273 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
 274 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
 275
 276 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
 277                                                 struct nvme_completion *cqe)
 278 {
 279         if (ctx == CMD_CTX_CANCELLED)
 280                 return;
 281         if (ctx == CMD_CTX_COMPLETED) {
 282                 dev_warn(nvmeq->q_dmadev,
 283                                 "completed id %d twice on queue %d\n",
 284                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 285                 return;
 286         }
 287         if (ctx == CMD_CTX_INVALID) {
 288                 dev_warn(nvmeq->q_dmadev,
 289                                 "invalid id %d completed on queue %d\n",
 290                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 291                 return;
 292         }
 293         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
 294 }
 295
 296 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
 297 {
 298         void *ctx;
 299
 300         if (fn)
 301                 *fn = cmd->fn;
 302         ctx = cmd->ctx;
 303         cmd->fn = special_completion;
 304         cmd->ctx = CMD_CTX_CANCELLED;
 305         return ctx;
 306 }
 307
 308 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
 309                                                 struct nvme_completion *cqe)
 310 {
 311         struct request *req = ctx;
 312
 313         u32 result = le32_to_cpup(&cqe->result);
 314         u16 status = le16_to_cpup(&cqe->status) >> 1;
 315
 316         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
 317                 ++nvmeq->dev->event_limit;
 318         if (status == NVME_SC_SUCCESS)
 319                 dev_warn(nvmeq->q_dmadev,
 320                         "async event result %08x\n", result);
 321
 322         blk_mq_free_hctx_request(nvmeq->hctx, req);
 323 }
 324
 325 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
 326                                                 struct nvme_completion *cqe)
 327 {
 328         struct request *req = ctx;
 329
 330         u16 status = le16_to_cpup(&cqe->status) >> 1;
 331         u32 result = le32_to_cpup(&cqe->result);
 332
 333         blk_mq_free_hctx_request(nvmeq->hctx, req);
 334
 335         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
 336         ++nvmeq->dev->abort_limit;
 337 }
 338
 339 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
 340                                                 struct nvme_completion *cqe)
 341 {
 342         struct async_cmd_info *cmdinfo = ctx;
 343         cmdinfo->result = le32_to_cpup(&cqe->result);
 344         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 345         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
 346         blk_mq_free_hctx_request(nvmeq->hctx, cmdinfo->req);
 347 }
 348
 349 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
 350                                   unsigned int tag)
 351 {
 352         struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
 353         struct request *req = blk_mq_tag_to_rq(hctx->tags, tag);
 354
 355         return blk_mq_rq_to_pdu(req);
 356 }
 357
 358 /*
 359  * Called with local interrupts disabled and the q_lock held.  May not sleep.
 360  */
 361 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
 362                                                 nvme_completion_fn *fn)
 363 {
 364         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
 365         void *ctx;
 366         if (tag >= nvmeq->q_depth) {
 367                 *fn = special_completion;
 368                 return CMD_CTX_INVALID;
 369         }
 370         if (fn)
 371                 *fn = cmd->fn;
 372         ctx = cmd->ctx;
 373         cmd->fn = special_completion;
 374         cmd->ctx = CMD_CTX_COMPLETED;
 375         return ctx;
 376 }
 377
 378 /**
 379  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
 380  * @nvmeq: The queue to use
 381  * @cmd: The command to send
 382  *
 383  * Safe to use from interrupt context
 384  */
 385 static int __nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 386 {
 387         u16 tail = nvmeq->sq_tail;
 388
 389         memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
 390         if (++tail == nvmeq->q_depth)
 391                 tail = 0;
 392         writel(tail, nvmeq->q_db);
 393         nvmeq->sq_tail = tail;
 394
 395         return 0;
 396 }
 397
 398 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 399 {
 400         unsigned long flags;
 401         int ret;
 402         spin_lock_irqsave(&nvmeq->q_lock, flags);
 403         ret = __nvme_submit_cmd(nvmeq, cmd);
 404         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
 405         return ret;
 406 }
 407
 408 static __le64 **iod_list(struct nvme_iod *iod)
 409 {
 410         return ((void *)iod) + iod->offset;
 411 }
 412
 413 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
 414                             unsigned nseg, unsigned long private)
 415 {
 416         iod->private = private;
 417         iod->offset = offsetof(struct nvme_iod, sg[nseg]);
 418         iod->npages = -1;
 419         iod->length = nbytes;
 420         iod->nents = 0;
 421 }
 422
 423 static struct nvme_iod *
 424 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
 425                  unsigned long priv, gfp_t gfp)
 426 {
 427         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
 428                                 sizeof(__le64 *) * nvme_npages(bytes, dev) +
 429                                 sizeof(struct scatterlist) * nseg, gfp);
 430
 431         if (iod)
 432                 iod_init(iod, bytes, nseg, priv);
 433
 434         return iod;
 435 }
 436
 437 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
 438                                        gfp_t gfp)
 439 {
 440         unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
 441                                                 sizeof(struct nvme_dsm_range);
 442         unsigned long mask = 0;
 443         struct nvme_iod *iod;
 444
 445         if (rq->nr_phys_segments <= NVME_INT_PAGES &&
 446             size <= NVME_INT_BYTES(dev)) {
 447                 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
 448
 449                 iod = cmd->iod;
 450                 mask = 0x01;
 451                 iod_init(iod, size, rq->nr_phys_segments,
 452                                 (unsigned long) rq | 0x01);
 453                 return iod;
 454         }
 455
 456         return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
 457                                 (unsigned long) rq, gfp);
 458 }
 459
 460 void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
 461 {
 462         const int last_prp = dev->page_size / 8 - 1;
 463         int i;
 464         __le64 **list = iod_list(iod);
 465         dma_addr_t prp_dma = iod->first_dma;
 466
 467         if (iod->npages == 0)
 468                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
 469         for (i = 0; i < iod->npages; i++) {
 470                 __le64 *prp_list = list[i];
 471                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
 472                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
 473                 prp_dma = next_prp_dma;
 474         }
 475
 476         if (iod_should_kfree(iod))
 477                 kfree(iod);
 478 }
 479
 480 static int nvme_error_status(u16 status)
 481 {
 482         switch (status & 0x7ff) {
 483         case NVME_SC_SUCCESS:
 484                 return 0;
 485         case NVME_SC_CAP_EXCEEDED:
 486                 return -ENOSPC;
 487         default:
 488                 return -EIO;
 489         }
 490 }
 491
 492 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
 493 {
 494         if (be32_to_cpu(pi->ref_tag) == v)
 495                 pi->ref_tag = cpu_to_be32(p);
 496 }
 497
 498 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
 499 {
 500         if (be32_to_cpu(pi->ref_tag) == p)
 501                 pi->ref_tag = cpu_to_be32(v);
 502 }
 503
 504 /**
 505  * nvme_dif_remap - remaps ref tags to bip seed and physical lba
 506  *
 507  * The virtual start sector is the one that was originally submitted by the
 508  * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
 509  * start sector may be different. Remap protection information to match the
 510  * physical LBA on writes, and back to the original seed on reads.
 511  *
 512  * Type 0 and 3 do not have a ref tag, so no remapping required.
 513  */
 514 static void nvme_dif_remap(struct request *req,
 515                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
 516 {
 517         struct nvme_ns *ns = req->rq_disk->private_data;
 518         struct bio_integrity_payload *bip;
 519         struct t10_pi_tuple *pi;
 520         void *p, *pmap;
 521         u32 i, nlb, ts, phys, virt;
 522
 523         if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
 524                 return;
 525
 526         bip = bio_integrity(req->bio);
 527         if (!bip)
 528                 return;
 529
 530         pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
 531         if (!pmap)
 532                 return;
 533
 534         p = pmap;
 535         virt = bip_get_seed(bip);
 536         phys = nvme_block_nr(ns, blk_rq_pos(req));
 537         nlb = (blk_rq_bytes(req) >> ns->lba_shift);
 538         ts = ns->disk->integrity->tuple_size;
 539
 540         for (i = 0; i < nlb; i++, virt++, phys++) {
 541                 pi = (struct t10_pi_tuple *)p;
 542                 dif_swap(phys, virt, pi);
 543                 p += ts;
 544         }
 545         kunmap_atomic(pmap);
 546 }
 547
 548 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
 549                                                 struct nvme_completion *cqe)
 550 {
 551         struct nvme_iod *iod = ctx;
 552         struct request *req = iod_get_private(iod);
 553         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
 554
 555         u16 status = le16_to_cpup(&cqe->status) >> 1;
 556
 557         if (unlikely(status)) {
 558                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
 559                     && (jiffies - req->start_time) < req->timeout) {
 560                         unsigned long flags;
 561
 562                         blk_mq_requeue_request(req);
 563                         spin_lock_irqsave(req->q->queue_lock, flags);
 564                         if (!blk_queue_stopped(req->q))
 565                                 blk_mq_kick_requeue_list(req->q);
 566                         spin_unlock_irqrestore(req->q->queue_lock, flags);
 567                         return;
 568                 }
 569                 req->errors = nvme_error_status(status);
 570         } else
 571                 req->errors = 0;
 572
 573         if (cmd_rq->aborted)
 574                 dev_warn(&nvmeq->dev->pci_dev->dev,
 575                         "completing aborted command with status:%04x\n",
 576                         status);
 577
 578         if (iod->nents) {
 579                 dma_unmap_sg(&nvmeq->dev->pci_dev->dev, iod->sg, iod->nents,
 580                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 581                 if (blk_integrity_rq(req)) {
 582                         if (!rq_data_dir(req))
 583                                 nvme_dif_remap(req, nvme_dif_complete);
 584                         dma_unmap_sg(&nvmeq->dev->pci_dev->dev, iod->meta_sg, 1,
 585                                 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 586                 }
 587         }
 588         nvme_free_iod(nvmeq->dev, iod);
 589
 590         blk_mq_complete_request(req);
 591 }
 592
 593 /* length is in bytes.  gfp flags indicates whether we may sleep. */
 594 int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod, int total_len,
 595                                                                 gfp_t gfp)
 596 {
 597         struct dma_pool *pool;
 598         int length = total_len;
 599         struct scatterlist *sg = iod->sg;
 600         int dma_len = sg_dma_len(sg);
 601         u64 dma_addr = sg_dma_address(sg);
 602         int offset = offset_in_page(dma_addr);
 603         __le64 *prp_list;
 604         __le64 **list = iod_list(iod);
 605         dma_addr_t prp_dma;
 606         int nprps, i;
 607         u32 page_size = dev->page_size;
 608
 609         length -= (page_size - offset);
 610         if (length <= 0)
 611                 return total_len;
 612
 613         dma_len -= (page_size - offset);
 614         if (dma_len) {
 615                 dma_addr += (page_size - offset);
 616         } else {
 617                 sg = sg_next(sg);
 618                 dma_addr = sg_dma_address(sg);
 619                 dma_len = sg_dma_len(sg);
 620         }
 621
 622         if (length <= page_size) {
 623                 iod->first_dma = dma_addr;
 624                 return total_len;
 625         }
 626
 627         nprps = DIV_ROUND_UP(length, page_size);
 628         if (nprps <= (256 / 8)) {
 629                 pool = dev->prp_small_pool;
 630                 iod->npages = 0;
 631         } else {
 632                 pool = dev->prp_page_pool;
 633                 iod->npages = 1;
 634         }
 635
 636         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 637         if (!prp_list) {
 638                 iod->first_dma = dma_addr;
 639                 iod->npages = -1;
 640                 return (total_len - length) + page_size;
 641         }
 642         list[0] = prp_list;
 643         iod->first_dma = prp_dma;
 644         i = 0;
 645         for (;;) {
 646                 if (i == page_size >> 3) {
 647                         __le64 *old_prp_list = prp_list;
 648                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 649                         if (!prp_list)
 650                                 return total_len - length;
 651                         list[iod->npages++] = prp_list;
 652                         prp_list[0] = old_prp_list[i - 1];
 653                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
 654                         i = 1;
 655                 }
 656                 prp_list[i++] = cpu_to_le64(dma_addr);
 657                 dma_len -= page_size;
 658                 dma_addr += page_size;
 659                 length -= page_size;
 660                 if (length <= 0)
 661                         break;
 662                 if (dma_len > 0)
 663                         continue;
 664                 BUG_ON(dma_len < 0);
 665                 sg = sg_next(sg);
 666                 dma_addr = sg_dma_address(sg);
 667                 dma_len = sg_dma_len(sg);
 668         }
 669
 670         return total_len;
 671 }
 672
 673 /*
 674  * We reuse the small pool to allocate the 16-byte range here as it is not
 675  * worth having a special pool for these or additional cases to handle freeing
 676  * the iod.
 677  */
 678 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 679                 struct request *req, struct nvme_iod *iod)
 680 {
 681         struct nvme_dsm_range *range =
 682                                 (struct nvme_dsm_range *)iod_list(iod)[0];
 683         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 684
 685         range->cattr = cpu_to_le32(0);
 686         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
 687         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 688
 689         memset(cmnd, 0, sizeof(*cmnd));
 690         cmnd->dsm.opcode = nvme_cmd_dsm;
 691         cmnd->dsm.command_id = req->tag;
 692         cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
 693         cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
 694         cmnd->dsm.nr = 0;
 695         cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
 696
 697         if (++nvmeq->sq_tail == nvmeq->q_depth)
 698                 nvmeq->sq_tail = 0;
 699         writel(nvmeq->sq_tail, nvmeq->q_db);
 700 }
 701
 702 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 703                                                                 int cmdid)
 704 {
 705         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 706
 707         memset(cmnd, 0, sizeof(*cmnd));
 708         cmnd->common.opcode = nvme_cmd_flush;
 709         cmnd->common.command_id = cmdid;
 710         cmnd->common.nsid = cpu_to_le32(ns->ns_id);
 711
 712         if (++nvmeq->sq_tail == nvmeq->q_depth)
 713                 nvmeq->sq_tail = 0;
 714         writel(nvmeq->sq_tail, nvmeq->q_db);
 715 }
 716
 717 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
 718                                                         struct nvme_ns *ns)
 719 {
 720         struct request *req = iod_get_private(iod);
 721         struct nvme_command *cmnd;
 722         u16 control = 0;
 723         u32 dsmgmt = 0;
 724
 725         if (req->cmd_flags & REQ_FUA)
 726                 control |= NVME_RW_FUA;
 727         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
 728                 control |= NVME_RW_LR;
 729
 730         if (req->cmd_flags & REQ_RAHEAD)
 731                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
 732
 733         cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 734         memset(cmnd, 0, sizeof(*cmnd));
 735
 736         cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
 737         cmnd->rw.command_id = req->tag;
 738         cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
 739         cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 740         cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
 741         cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 742         cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
 743
 744         if (blk_integrity_rq(req)) {
 745                 cmnd->rw.metadata = cpu_to_le64(sg_dma_address(iod->meta_sg));
 746                 switch (ns->pi_type) {
 747                 case NVME_NS_DPS_PI_TYPE3:
 748                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
 749                         break;
 750                 case NVME_NS_DPS_PI_TYPE1:
 751                 case NVME_NS_DPS_PI_TYPE2:
 752                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
 753                                         NVME_RW_PRINFO_PRCHK_REF;
 754                         cmnd->rw.reftag = cpu_to_le32(
 755                                         nvme_block_nr(ns, blk_rq_pos(req)));
 756                         break;
 757                 }
 758         } else if (ns->ms)
 759                 control |= NVME_RW_PRINFO_PRACT;
 760
 761         cmnd->rw.control = cpu_to_le16(control);
 762         cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
 763
 764         if (++nvmeq->sq_tail == nvmeq->q_depth)
 765                 nvmeq->sq_tail = 0;
 766         writel(nvmeq->sq_tail, nvmeq->q_db);
 767
 768         return 0;
 769 }
 770
 771 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
 772                          const struct blk_mq_queue_data *bd)
 773 {
 774         struct nvme_ns *ns = hctx->queue->queuedata;
 775         struct nvme_queue *nvmeq = hctx->driver_data;
 776         struct request *req = bd->rq;
 777         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 778         struct nvme_iod *iod;
 779         enum dma_data_direction dma_dir;
 780
 781         /*
 782          * If formated with metadata, require the block layer provide a buffer
 783          * unless this namespace is formated such that the metadata can be
 784          * stripped/generated by the controller with PRACT=1.
 785          */
 786         if (ns->ms && !blk_integrity_rq(req)) {
 787                 if (!(ns->pi_type && ns->ms == 8)) {
 788                         req->errors = -EFAULT;
 789                         blk_mq_complete_request(req);
 790                         return BLK_MQ_RQ_QUEUE_OK;
 791                 }
 792         }
 793
 794         iod = nvme_alloc_iod(req, ns->dev, GFP_ATOMIC);
 795         if (!iod)
 796                 return BLK_MQ_RQ_QUEUE_BUSY;
 797
 798         if (req->cmd_flags & REQ_DISCARD) {
 799                 void *range;
 800                 /*
 801                  * We reuse the small pool to allocate the 16-byte range here
 802                  * as it is not worth having a special pool for these or
 803                  * additional cases to handle freeing the iod.
 804                  */
 805                 range = dma_pool_alloc(nvmeq->dev->prp_small_pool,
 806                                                 GFP_ATOMIC,
 807                                                 &iod->first_dma);
 808                 if (!range)
 809                         goto retry_cmd;
 810                 iod_list(iod)[0] = (__le64 *)range;
 811                 iod->npages = 0;
 812         } else if (req->nr_phys_segments) {
 813                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 814
 815                 sg_init_table(iod->sg, req->nr_phys_segments);
 816                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
 817                 if (!iod->nents)
 818                         goto error_cmd;
 819
 820                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
 821                         goto retry_cmd;
 822
 823                 if (blk_rq_bytes(req) !=
 824                     nvme_setup_prps(nvmeq->dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
 825                         dma_unmap_sg(&nvmeq->dev->pci_dev->dev, iod->sg,
 826                                         iod->nents, dma_dir);
 827                         goto retry_cmd;
 828                 }
 829                 if (blk_integrity_rq(req)) {
 830                         if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
 831                                 goto error_cmd;
 832
 833                         sg_init_table(iod->meta_sg, 1);
 834                         if (blk_rq_map_integrity_sg(
 835                                         req->q, req->bio, iod->meta_sg) != 1)
 836                                 goto error_cmd;
 837
 838                         if (rq_data_dir(req))
 839                                 nvme_dif_remap(req, nvme_dif_prep);
 840
 841                         if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
 842                                 goto error_cmd;
 843                 }
 844         }
 845
 846         nvme_set_info(cmd, iod, req_completion);
 847         spin_lock_irq(&nvmeq->q_lock);
 848         if (req->cmd_flags & REQ_DISCARD)
 849                 nvme_submit_discard(nvmeq, ns, req, iod);
 850         else if (req->cmd_flags & REQ_FLUSH)
 851                 nvme_submit_flush(nvmeq, ns, req->tag);
 852         else
 853                 nvme_submit_iod(nvmeq, iod, ns);
 854
 855         nvme_process_cq(nvmeq);
 856         spin_unlock_irq(&nvmeq->q_lock);
 857         return BLK_MQ_RQ_QUEUE_OK;
 858
 859  error_cmd:
 860         nvme_free_iod(nvmeq->dev, iod);
 861         return BLK_MQ_RQ_QUEUE_ERROR;
 862  retry_cmd:
 863         nvme_free_iod(nvmeq->dev, iod);
 864         return BLK_MQ_RQ_QUEUE_BUSY;
 865 }
 866
 867 static int nvme_process_cq(struct nvme_queue *nvmeq)
 868 {
 869         u16 head, phase;
 870
 871         head = nvmeq->cq_head;
 872         phase = nvmeq->cq_phase;
 873
 874         for (;;) {
 875                 void *ctx;
 876                 nvme_completion_fn fn;
 877                 struct nvme_completion cqe = nvmeq->cqes[head];
 878                 if ((le16_to_cpu(cqe.status) & 1) != phase)
 879                         break;
 880                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
 881                 if (++head == nvmeq->q_depth) {
 882                         head = 0;
 883                         phase = !phase;
 884                 }
 885                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
 886                 fn(nvmeq, ctx, &cqe);
 887         }
 888
 889         /* If the controller ignores the cq head doorbell and continuously
 890          * writes to the queue, it is theoretically possible to wrap around
 891          * the queue twice and mistakenly return IRQ_NONE.  Linux only
 892          * requires that 0.1% of your interrupts are handled, so this isn't
 893          * a big problem.
 894          */
 895         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
 896                 return 0;
 897
 898         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
 899         nvmeq->cq_head = head;
 900         nvmeq->cq_phase = phase;
 901
 902         nvmeq->cqe_seen = 1;
 903         return 1;
 904 }
 905
 906 /* Admin queue isn't initialized as a request queue. If at some point this
 907  * happens anyway, make sure to notify the user */
 908 static int nvme_admin_queue_rq(struct blk_mq_hw_ctx *hctx,
 909                                const struct blk_mq_queue_data *bd)
 910 {
 911         WARN_ON_ONCE(1);
 912         return BLK_MQ_RQ_QUEUE_ERROR;
 913 }
 914
 915 static irqreturn_t nvme_irq(int irq, void *data)
 916 {
 917         irqreturn_t result;
 918         struct nvme_queue *nvmeq = data;
 919         spin_lock(&nvmeq->q_lock);
 920         nvme_process_cq(nvmeq);
 921         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
 922         nvmeq->cqe_seen = 0;
 923         spin_unlock(&nvmeq->q_lock);
 924         return result;
 925 }
 926
 927 static irqreturn_t nvme_irq_check(int irq, void *data)
 928 {
 929         struct nvme_queue *nvmeq = data;
 930         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
 931         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
 932                 return IRQ_NONE;
 933         return IRQ_WAKE_THREAD;
 934 }
 935
 936 static void nvme_abort_cmd_info(struct nvme_queue *nvmeq, struct nvme_cmd_info *
 937                                                                 cmd_info)
 938 {
 939         spin_lock_irq(&nvmeq->q_lock);
 940         cancel_cmd_info(cmd_info, NULL);
 941         spin_unlock_irq(&nvmeq->q_lock);
 942 }
 943
 944 struct sync_cmd_info {
 945         struct task_struct *task;
 946         u32 result;
 947         int status;
 948 };
 949
 950 static void sync_completion(struct nvme_queue *nvmeq, void *ctx,
 951                                                 struct nvme_completion *cqe)
 952 {
 953         struct sync_cmd_info *cmdinfo = ctx;
 954         cmdinfo->result = le32_to_cpup(&cqe->result);
 955         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 956         wake_up_process(cmdinfo->task);
 957 }
 958
 959 /*
 960  * Returns 0 on success.  If the result is negative, it's a Linux error code;
 961  * if the result is positive, it's an NVM Express status code
 962  */
 963 static int nvme_submit_sync_cmd(struct request *req, struct nvme_command *cmd,
 964                                                 u32 *result, unsigned timeout)
 965 {
 966         int ret;
 967         struct sync_cmd_info cmdinfo;
 968         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
 969         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
 970
 971         cmdinfo.task = current;
 972         cmdinfo.status = -EINTR;
 973
 974         cmd->common.command_id = req->tag;
 975
 976         nvme_set_info(cmd_rq, &cmdinfo, sync_completion);
 977
 978         set_current_state(TASK_KILLABLE);
 979         ret = nvme_submit_cmd(nvmeq, cmd);
 980         if (ret) {
 981                 nvme_finish_cmd(nvmeq, req->tag, NULL);
 982                 set_current_state(TASK_RUNNING);
 983         }
 984         ret = schedule_timeout(timeout);
 985
 986         /*
 987          * Ensure that sync_completion has either run, or that it will
 988          * never run.
 989          */
 990         nvme_abort_cmd_info(nvmeq, blk_mq_rq_to_pdu(req));
 991
 992         /*
 993          * We never got the completion
 994          */
 995         if (cmdinfo.status == -EINTR)
 996                 return -EINTR;
 997
 998         if (result)
 999                 *result = cmdinfo.result;
1000
1001         return cmdinfo.status;
1002 }
1003
1004 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1005 {
1006         struct nvme_queue *nvmeq = dev->queues[0];
1007         struct nvme_command c;
1008         struct nvme_cmd_info *cmd_info;
1009         struct request *req;
1010
1011         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, false);
1012         if (IS_ERR(req))
1013                 return PTR_ERR(req);
1014
1015         req->cmd_flags |= REQ_NO_TIMEOUT;
1016         cmd_info = blk_mq_rq_to_pdu(req);
1017         nvme_set_info(cmd_info, req, async_req_completion);
1018
1019         memset(&c, 0, sizeof(c));
1020         c.common.opcode = nvme_admin_async_event;
1021         c.common.command_id = req->tag;
1022
1023         return __nvme_submit_cmd(nvmeq, &c);
1024 }
1025
1026 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1027                         struct nvme_command *cmd,
1028                         struct async_cmd_info *cmdinfo, unsigned timeout)
1029 {
1030         struct nvme_queue *nvmeq = dev->queues[0];
1031         struct request *req;
1032         struct nvme_cmd_info *cmd_rq;
1033
1034         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1035         if (IS_ERR(req))
1036                 return PTR_ERR(req);
1037
1038         req->timeout = timeout;
1039         cmd_rq = blk_mq_rq_to_pdu(req);
1040         cmdinfo->req = req;
1041         nvme_set_info(cmd_rq, cmdinfo, async_completion);
1042         cmdinfo->status = -EINTR;
1043
1044         cmd->common.command_id = req->tag;
1045
1046         return nvme_submit_cmd(nvmeq, cmd);
1047 }
1048
1049 static int __nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
1050                                                 u32 *result, unsigned timeout)
1051 {
1052         int res;
1053         struct request *req;
1054
1055         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1056         if (IS_ERR(req))
1057                 return PTR_ERR(req);
1058         res = nvme_submit_sync_cmd(req, cmd, result, timeout);
1059         blk_mq_free_request(req);
1060         return res;
1061 }
1062
1063 int nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
1064                                                                 u32 *result)
1065 {
1066         return __nvme_submit_admin_cmd(dev, cmd, result, ADMIN_TIMEOUT);
1067 }
1068
1069 int nvme_submit_io_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1070                                         struct nvme_command *cmd, u32 *result)
1071 {
1072         int res;
1073         struct request *req;
1074
1075         req = blk_mq_alloc_request(ns->queue, WRITE, (GFP_KERNEL|__GFP_WAIT),
1076                                                                         false);
1077         if (IS_ERR(req))
1078                 return PTR_ERR(req);
1079         res = nvme_submit_sync_cmd(req, cmd, result, NVME_IO_TIMEOUT);
1080         blk_mq_free_request(req);
1081         return res;
1082 }
1083
1084 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1085 {
1086         struct nvme_command c;
1087
1088         memset(&c, 0, sizeof(c));
1089         c.delete_queue.opcode = opcode;
1090         c.delete_queue.qid = cpu_to_le16(id);
1091
1092         return nvme_submit_admin_cmd(dev, &c, NULL);
1093 }
1094
1095 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1096                                                 struct nvme_queue *nvmeq)
1097 {
1098         struct nvme_command c;
1099         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1100
1101         memset(&c, 0, sizeof(c));
1102         c.create_cq.opcode = nvme_admin_create_cq;
1103         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1104         c.create_cq.cqid = cpu_to_le16(qid);
1105         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1106         c.create_cq.cq_flags = cpu_to_le16(flags);
1107         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1108
1109         return nvme_submit_admin_cmd(dev, &c, NULL);
1110 }
1111
1112 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1113                                                 struct nvme_queue *nvmeq)
1114 {
1115         struct nvme_command c;
1116         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1117
1118         memset(&c, 0, sizeof(c));
1119         c.create_sq.opcode = nvme_admin_create_sq;
1120         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1121         c.create_sq.sqid = cpu_to_le16(qid);
1122         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1123         c.create_sq.sq_flags = cpu_to_le16(flags);
1124         c.create_sq.cqid = cpu_to_le16(qid);
1125
1126         return nvme_submit_admin_cmd(dev, &c, NULL);
1127 }
1128
1129 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1130 {
1131         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1132 }
1133
1134 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1135 {
1136         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1137 }
1138
1139 int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns,
1140                                                         dma_addr_t dma_addr)
1141 {
1142         struct nvme_command c;
1143
1144         memset(&c, 0, sizeof(c));
1145         c.identify.opcode = nvme_admin_identify;
1146         c.identify.nsid = cpu_to_le32(nsid);
1147         c.identify.prp1 = cpu_to_le64(dma_addr);
1148         c.identify.cns = cpu_to_le32(cns);
1149
1150         return nvme_submit_admin_cmd(dev, &c, NULL);
1151 }
1152
1153 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1154                                         dma_addr_t dma_addr, u32 *result)
1155 {
1156         struct nvme_command c;
1157
1158         memset(&c, 0, sizeof(c));
1159         c.features.opcode = nvme_admin_get_features;
1160         c.features.nsid = cpu_to_le32(nsid);
1161         c.features.prp1 = cpu_to_le64(dma_addr);
1162         c.features.fid = cpu_to_le32(fid);
1163
1164         return nvme_submit_admin_cmd(dev, &c, result);
1165 }
1166
1167 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1168                                         dma_addr_t dma_addr, u32 *result)
1169 {
1170         struct nvme_command c;
1171
1172         memset(&c, 0, sizeof(c));
1173         c.features.opcode = nvme_admin_set_features;
1174         c.features.prp1 = cpu_to_le64(dma_addr);
1175         c.features.fid = cpu_to_le32(fid);
1176         c.features.dword11 = cpu_to_le32(dword11);
1177
1178         return nvme_submit_admin_cmd(dev, &c, result);
1179 }
1180
1181 /**
1182  * nvme_abort_req - Attempt aborting a request
1183  *
1184  * Schedule controller reset if the command was already aborted once before and
1185  * still hasn't been returned to the driver, or if this is the admin queue.
1186  */
1187 static void nvme_abort_req(struct request *req)
1188 {
1189         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1190         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1191         struct nvme_dev *dev = nvmeq->dev;
1192         struct request *abort_req;
1193         struct nvme_cmd_info *abort_cmd;
1194         struct nvme_command cmd;
1195
1196         if (!nvmeq->qid || cmd_rq->aborted) {
1197                 unsigned long flags;
1198
1199                 spin_lock_irqsave(&dev_list_lock, flags);
1200                 if (work_busy(&dev->reset_work))
1201                         goto out;
1202                 list_del_init(&dev->node);
1203                 dev_warn(&dev->pci_dev->dev,
1204                         "I/O %d QID %d timeout, reset controller\n",
1205                                                         req->tag, nvmeq->qid);
1206                 dev->reset_workfn = nvme_reset_failed_dev;
1207                 queue_work(nvme_workq, &dev->reset_work);
1208  out:
1209                 spin_unlock_irqrestore(&dev_list_lock, flags);
1210                 return;
1211         }
1212
1213         if (!dev->abort_limit)
1214                 return;
1215
1216         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1217                                                                         false);
1218         if (IS_ERR(abort_req))
1219                 return;
1220
1221         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1222         nvme_set_info(abort_cmd, abort_req, abort_completion);
1223
1224         memset(&cmd, 0, sizeof(cmd));
1225         cmd.abort.opcode = nvme_admin_abort_cmd;
1226         cmd.abort.cid = req->tag;
1227         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1228         cmd.abort.command_id = abort_req->tag;
1229
1230         --dev->abort_limit;
1231         cmd_rq->aborted = 1;
1232
1233         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1234                                                         nvmeq->qid);
1235         if (nvme_submit_cmd(dev->queues[0], &cmd) < 0) {
1236                 dev_warn(nvmeq->q_dmadev,
1237                                 "Could not abort I/O %d QID %d",
1238                                 req->tag, nvmeq->qid);
1239                 blk_mq_free_request(abort_req);
1240         }
1241 }
1242
1243 static void nvme_cancel_queue_ios(struct blk_mq_hw_ctx *hctx,
1244                                 struct request *req, void *data, bool reserved)
1245 {
1246         struct nvme_queue *nvmeq = data;
1247         void *ctx;
1248         nvme_completion_fn fn;
1249         struct nvme_cmd_info *cmd;
1250         struct nvme_completion cqe;
1251
1252         if (!blk_mq_request_started(req))
1253                 return;
1254
1255         cmd = blk_mq_rq_to_pdu(req);
1256
1257         if (cmd->ctx == CMD_CTX_CANCELLED)
1258                 return;
1259
1260         if (blk_queue_dying(req->q))
1261                 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1262         else
1263                 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1264
1265
1266         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1267                                                 req->tag, nvmeq->qid);
1268         ctx = cancel_cmd_info(cmd, &fn);
1269         fn(nvmeq, ctx, &cqe);
1270 }
1271
1272 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1273 {
1274         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1275         struct nvme_queue *nvmeq = cmd->nvmeq;
1276
1277         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1278                                                         nvmeq->qid);
1279         spin_lock_irq(&nvmeq->q_lock);
1280         nvme_abort_req(req);
1281         spin_unlock_irq(&nvmeq->q_lock);
1282
1283         /*
1284          * The aborted req will be completed on receiving the abort req.
1285          * We enable the timer again. If hit twice, it'll cause a device reset,
1286          * as the device then is in a faulty state.
1287          */
1288         return BLK_EH_RESET_TIMER;
1289 }
1290
1291 static void nvme_free_queue(struct nvme_queue *nvmeq)
1292 {
1293         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1294                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1295         dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1296                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1297         kfree(nvmeq);
1298 }
1299
1300 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1301 {
1302         int i;
1303
1304         for (i = dev->queue_count - 1; i >= lowest; i--) {
1305                 struct nvme_queue *nvmeq = dev->queues[i];
1306                 dev->queue_count--;
1307                 dev->queues[i] = NULL;
1308                 nvme_free_queue(nvmeq);
1309         }
1310 }
1311
1312 /**
1313  * nvme_suspend_queue - put queue into suspended state
1314  * @nvmeq - queue to suspend
1315  */
1316 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1317 {
1318         int vector;
1319
1320         spin_lock_irq(&nvmeq->q_lock);
1321         if (nvmeq->cq_vector == -1) {
1322                 spin_unlock_irq(&nvmeq->q_lock);
1323                 return 1;
1324         }
1325         vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1326         nvmeq->dev->online_queues--;
1327         nvmeq->cq_vector = -1;
1328         spin_unlock_irq(&nvmeq->q_lock);
1329
1330         irq_set_affinity_hint(vector, NULL);
1331         free_irq(vector, nvmeq);
1332
1333         return 0;
1334 }
1335
1336 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1337 {
1338         struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
1339
1340         spin_lock_irq(&nvmeq->q_lock);
1341         if (hctx && hctx->tags)
1342                 blk_mq_tag_busy_iter(hctx, nvme_cancel_queue_ios, nvmeq);
1343         spin_unlock_irq(&nvmeq->q_lock);
1344 }
1345
1346 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1347 {
1348         struct nvme_queue *nvmeq = dev->queues[qid];
1349
1350         if (!nvmeq)
1351                 return;
1352         if (nvme_suspend_queue(nvmeq))
1353                 return;
1354
1355         /* Don't tell the adapter to delete the admin queue.
1356          * Don't tell a removed adapter to delete IO queues. */
1357         if (qid && readl(&dev->bar->csts) != -1) {
1358                 adapter_delete_sq(dev, qid);
1359                 adapter_delete_cq(dev, qid);
1360         }
1361         if (!qid && dev->admin_q)
1362                 blk_mq_freeze_queue_start(dev->admin_q);
1363
1364         spin_lock_irq(&nvmeq->q_lock);
1365         nvme_process_cq(nvmeq);
1366         spin_unlock_irq(&nvmeq->q_lock);
1367 }
1368
1369 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1370                                                         int depth)
1371 {
1372         struct device *dmadev = &dev->pci_dev->dev;
1373         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1374         if (!nvmeq)
1375                 return NULL;
1376
1377         nvmeq->cqes = dma_zalloc_coherent(dmadev, CQ_SIZE(depth),
1378                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1379         if (!nvmeq->cqes)
1380                 goto free_nvmeq;
1381
1382         nvmeq->sq_cmds = dma_alloc_coherent(dmadev, SQ_SIZE(depth),
1383                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1384         if (!nvmeq->sq_cmds)
1385                 goto free_cqdma;
1386
1387         nvmeq->q_dmadev = dmadev;
1388         nvmeq->dev = dev;
1389         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1390                         dev->instance, qid);
1391         spin_lock_init(&nvmeq->q_lock);
1392         nvmeq->cq_head = 0;
1393         nvmeq->cq_phase = 1;
1394         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1395         nvmeq->q_depth = depth;
1396         nvmeq->qid = qid;
1397         dev->queue_count++;
1398         dev->queues[qid] = nvmeq;
1399
1400         return nvmeq;
1401
1402  free_cqdma:
1403         dma_free_coherent(dmadev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1404                                                         nvmeq->cq_dma_addr);
1405  free_nvmeq:
1406         kfree(nvmeq);
1407         return NULL;
1408 }
1409
1410 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1411                                                         const char *name)
1412 {
1413         if (use_threaded_interrupts)
1414                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1415                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1416                                         name, nvmeq);
1417         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1418                                 IRQF_SHARED, name, nvmeq);
1419 }
1420
1421 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1422 {
1423         struct nvme_dev *dev = nvmeq->dev;
1424
1425         spin_lock_irq(&nvmeq->q_lock);
1426         nvmeq->sq_tail = 0;
1427         nvmeq->cq_head = 0;
1428         nvmeq->cq_phase = 1;
1429         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1430         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1431         dev->online_queues++;
1432         spin_unlock_irq(&nvmeq->q_lock);
1433 }
1434
1435 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1436 {
1437         struct nvme_dev *dev = nvmeq->dev;
1438         int result;
1439
1440         nvmeq->cq_vector = qid - 1;
1441         result = adapter_alloc_cq(dev, qid, nvmeq);
1442         if (result < 0)
1443                 return result;
1444
1445         result = adapter_alloc_sq(dev, qid, nvmeq);
1446         if (result < 0)
1447                 goto release_cq;
1448
1449         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1450         if (result < 0)
1451                 goto release_sq;
1452
1453         nvme_init_queue(nvmeq, qid);
1454         return result;
1455
1456  release_sq:
1457         adapter_delete_sq(dev, qid);
1458  release_cq:
1459         adapter_delete_cq(dev, qid);
1460         return result;
1461 }
1462
1463 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1464 {
1465         unsigned long timeout;
1466         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1467
1468         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1469
1470         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1471                 msleep(100);
1472                 if (fatal_signal_pending(current))
1473                         return -EINTR;
1474                 if (time_after(jiffies, timeout)) {
1475                         dev_err(&dev->pci_dev->dev,
1476                                 "Device not ready; aborting %s\n", enabled ?
1477                                                 "initialisation" : "reset");
1478                         return -ENODEV;
1479                 }
1480         }
1481
1482         return 0;
1483 }
1484
1485 /*
1486  * If the device has been passed off to us in an enabled state, just clear
1487  * the enabled bit.  The spec says we should set the 'shutdown notification
1488  * bits', but doing so may cause the device to complete commands to the
1489  * admin queue ... and we don't know what memory that might be pointing at!
1490  */
1491 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1492 {
1493         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1494         dev->ctrl_config &= ~NVME_CC_ENABLE;
1495         writel(dev->ctrl_config, &dev->bar->cc);
1496
1497         return nvme_wait_ready(dev, cap, false);
1498 }
1499
1500 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1501 {
1502         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1503         dev->ctrl_config |= NVME_CC_ENABLE;
1504         writel(dev->ctrl_config, &dev->bar->cc);
1505
1506         return nvme_wait_ready(dev, cap, true);
1507 }
1508
1509 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1510 {
1511         unsigned long timeout;
1512
1513         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1514         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1515
1516         writel(dev->ctrl_config, &dev->bar->cc);
1517
1518         timeout = SHUTDOWN_TIMEOUT + jiffies;
1519         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1520                                                         NVME_CSTS_SHST_CMPLT) {
1521                 msleep(100);
1522                 if (fatal_signal_pending(current))
1523                         return -EINTR;
1524                 if (time_after(jiffies, timeout)) {
1525                         dev_err(&dev->pci_dev->dev,
1526                                 "Device shutdown incomplete; abort shutdown\n");
1527                         return -ENODEV;
1528                 }
1529         }
1530
1531         return 0;
1532 }
1533
1534 static struct blk_mq_ops nvme_mq_admin_ops = {
1535         .queue_rq       = nvme_admin_queue_rq,
1536         .map_queue      = blk_mq_map_queue,
1537         .init_hctx      = nvme_admin_init_hctx,
1538         .exit_hctx      = nvme_exit_hctx,
1539         .init_request   = nvme_admin_init_request,
1540         .timeout        = nvme_timeout,
1541 };
1542
1543 static struct blk_mq_ops nvme_mq_ops = {
1544         .queue_rq       = nvme_queue_rq,
1545         .map_queue      = blk_mq_map_queue,
1546         .init_hctx      = nvme_init_hctx,
1547         .exit_hctx      = nvme_exit_hctx,
1548         .init_request   = nvme_init_request,
1549         .timeout        = nvme_timeout,
1550 };
1551
1552 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1553 {
1554         if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1555                 blk_cleanup_queue(dev->admin_q);
1556                 blk_mq_free_tag_set(&dev->admin_tagset);
1557         }
1558 }
1559
1560 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1561 {
1562         if (!dev->admin_q) {
1563                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1564                 dev->admin_tagset.nr_hw_queues = 1;
1565                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1566                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1567                 dev->admin_tagset.numa_node = dev_to_node(&dev->pci_dev->dev);
1568                 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1569                 dev->admin_tagset.driver_data = dev;
1570
1571                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1572                         return -ENOMEM;
1573
1574                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1575                 if (IS_ERR(dev->admin_q)) {
1576                         blk_mq_free_tag_set(&dev->admin_tagset);
1577                         return -ENOMEM;
1578                 }
1579                 if (!blk_get_queue(dev->admin_q)) {
1580                         nvme_dev_remove_admin(dev);
1581                         return -ENODEV;
1582                 }
1583         } else
1584                 blk_mq_unfreeze_queue(dev->admin_q);
1585
1586         return 0;
1587 }
1588
1589 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1590 {
1591         int result;
1592         u32 aqa;
1593         u64 cap = readq(&dev->bar->cap);
1594         struct nvme_queue *nvmeq;
1595         unsigned page_shift = PAGE_SHIFT;
1596         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1597         unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1598
1599         if (page_shift < dev_page_min) {
1600                 dev_err(&dev->pci_dev->dev,
1601                                 "Minimum device page size (%u) too large for "
1602                                 "host (%u)\n", 1 << dev_page_min,
1603                                 1 << page_shift);
1604                 return -ENODEV;
1605         }
1606         if (page_shift > dev_page_max) {
1607                 dev_info(&dev->pci_dev->dev,
1608                                 "Device maximum page size (%u) smaller than "
1609                                 "host (%u); enabling work-around\n",
1610                                 1 << dev_page_max, 1 << page_shift);
1611                 page_shift = dev_page_max;
1612         }
1613
1614         result = nvme_disable_ctrl(dev, cap);
1615         if (result < 0)
1616                 return result;
1617
1618         nvmeq = dev->queues[0];
1619         if (!nvmeq) {
1620                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1621                 if (!nvmeq)
1622                         return -ENOMEM;
1623         }
1624
1625         aqa = nvmeq->q_depth - 1;
1626         aqa |= aqa << 16;
1627
1628         dev->page_size = 1 << page_shift;
1629
1630         dev->ctrl_config = NVME_CC_CSS_NVM;
1631         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1632         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1633         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1634
1635         writel(aqa, &dev->bar->aqa);
1636         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1637         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1638
1639         result = nvme_enable_ctrl(dev, cap);
1640         if (result)
1641                 goto free_nvmeq;
1642
1643         nvmeq->cq_vector = 0;
1644         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1645         if (result)
1646                 goto free_nvmeq;
1647
1648         return result;
1649
1650  free_nvmeq:
1651         nvme_free_queues(dev, 0);
1652         return result;
1653 }
1654
1655 struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write,
1656                                 unsigned long addr, unsigned length)
1657 {
1658         int i, err, count, nents, offset;
1659         struct scatterlist *sg;
1660         struct page **pages;
1661         struct nvme_iod *iod;
1662
1663         if (addr & 3)
1664                 return ERR_PTR(-EINVAL);
1665         if (!length || length > INT_MAX - PAGE_SIZE)
1666                 return ERR_PTR(-EINVAL);
1667
1668         offset = offset_in_page(addr);
1669         count = DIV_ROUND_UP(offset + length, PAGE_SIZE);
1670         pages = kcalloc(count, sizeof(*pages), GFP_KERNEL);
1671         if (!pages)
1672                 return ERR_PTR(-ENOMEM);
1673
1674         err = get_user_pages_fast(addr, count, 1, pages);
1675         if (err < count) {
1676                 count = err;
1677                 err = -EFAULT;
1678                 goto put_pages;
1679         }
1680
1681         err = -ENOMEM;
1682         iod = __nvme_alloc_iod(count, length, dev, 0, GFP_KERNEL);
1683         if (!iod)
1684                 goto put_pages;
1685
1686         sg = iod->sg;
1687         sg_init_table(sg, count);
1688         for (i = 0; i < count; i++) {
1689                 sg_set_page(&sg[i], pages[i],
1690                             min_t(unsigned, length, PAGE_SIZE - offset),
1691                             offset);
1692                 length -= (PAGE_SIZE - offset);
1693                 offset = 0;
1694         }
1695         sg_mark_end(&sg[i - 1]);
1696         iod->nents = count;
1697
1698         nents = dma_map_sg(&dev->pci_dev->dev, sg, count,
1699                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1700         if (!nents)
1701                 goto free_iod;
1702
1703         kfree(pages);
1704         return iod;
1705
1706  free_iod:
1707         kfree(iod);
1708  put_pages:
1709         for (i = 0; i < count; i++)
1710                 put_page(pages[i]);
1711         kfree(pages);
1712         return ERR_PTR(err);
1713 }
1714
1715 void nvme_unmap_user_pages(struct nvme_dev *dev, int write,
1716                         struct nvme_iod *iod)
1717 {
1718         int i;
1719
1720         dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents,
1721                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1722
1723         for (i = 0; i < iod->nents; i++)
1724                 put_page(sg_page(&iod->sg[i]));
1725 }
1726
1727 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1728 {
1729         struct nvme_dev *dev = ns->dev;
1730         struct nvme_user_io io;
1731         struct nvme_command c;
1732         unsigned length, meta_len;
1733         int status, i;
1734         struct nvme_iod *iod, *meta_iod = NULL;
1735         dma_addr_t meta_dma_addr;
1736         void *meta, *uninitialized_var(meta_mem);
1737
1738         if (copy_from_user(&io, uio, sizeof(io)))
1739                 return -EFAULT;
1740         length = (io.nblocks + 1) << ns->lba_shift;
1741         meta_len = (io.nblocks + 1) * ns->ms;
1742
1743         if (meta_len && ((io.metadata & 3) || !io.metadata))
1744                 return -EINVAL;
1745
1746         switch (io.opcode) {
1747         case nvme_cmd_write:
1748         case nvme_cmd_read:
1749         case nvme_cmd_compare:
1750                 iod = nvme_map_user_pages(dev, io.opcode & 1, io.addr, length);
1751                 break;
1752         default:
1753                 return -EINVAL;
1754         }
1755
1756         if (IS_ERR(iod))
1757                 return PTR_ERR(iod);
1758
1759         memset(&c, 0, sizeof(c));
1760         c.rw.opcode = io.opcode;
1761         c.rw.flags = io.flags;
1762         c.rw.nsid = cpu_to_le32(ns->ns_id);
1763         c.rw.slba = cpu_to_le64(io.slba);
1764         c.rw.length = cpu_to_le16(io.nblocks);
1765         c.rw.control = cpu_to_le16(io.control);
1766         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1767         c.rw.reftag = cpu_to_le32(io.reftag);
1768         c.rw.apptag = cpu_to_le16(io.apptag);
1769         c.rw.appmask = cpu_to_le16(io.appmask);
1770
1771         if (meta_len) {
1772                 meta_iod = nvme_map_user_pages(dev, io.opcode & 1, io.metadata,
1773                                                                 meta_len);
1774                 if (IS_ERR(meta_iod)) {
1775                         status = PTR_ERR(meta_iod);
1776                         meta_iod = NULL;
1777                         goto unmap;
1778                 }
1779
1780                 meta_mem = dma_alloc_coherent(&dev->pci_dev->dev, meta_len,
1781                                                 &meta_dma_addr, GFP_KERNEL);
1782                 if (!meta_mem) {
1783                         status = -ENOMEM;
1784                         goto unmap;
1785                 }
1786
1787                 if (io.opcode & 1) {
1788                         int meta_offset = 0;
1789
1790                         for (i = 0; i < meta_iod->nents; i++) {
1791                                 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1792                                                 meta_iod->sg[i].offset;
1793                                 memcpy(meta_mem + meta_offset, meta,
1794                                                 meta_iod->sg[i].length);
1795                                 kunmap_atomic(meta);
1796                                 meta_offset += meta_iod->sg[i].length;
1797                         }
1798                 }
1799
1800                 c.rw.metadata = cpu_to_le64(meta_dma_addr);
1801         }
1802
1803         length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1804         c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1805         c.rw.prp2 = cpu_to_le64(iod->first_dma);
1806
1807         if (length != (io.nblocks + 1) << ns->lba_shift)
1808                 status = -ENOMEM;
1809         else
1810                 status = nvme_submit_io_cmd(dev, ns, &c, NULL);
1811
1812         if (meta_len) {
1813                 if (status == NVME_SC_SUCCESS && !(io.opcode & 1)) {
1814                         int meta_offset = 0;
1815
1816                         for (i = 0; i < meta_iod->nents; i++) {
1817                                 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1818                                                 meta_iod->sg[i].offset;
1819                                 memcpy(meta, meta_mem + meta_offset,
1820                                                 meta_iod->sg[i].length);
1821                                 kunmap_atomic(meta);
1822                                 meta_offset += meta_iod->sg[i].length;
1823                         }
1824                 }
1825
1826                 dma_free_coherent(&dev->pci_dev->dev, meta_len, meta_mem,
1827                                                                 meta_dma_addr);
1828         }
1829
1830  unmap:
1831         nvme_unmap_user_pages(dev, io.opcode & 1, iod);
1832         nvme_free_iod(dev, iod);
1833
1834         if (meta_iod) {
1835                 nvme_unmap_user_pages(dev, io.opcode & 1, meta_iod);
1836                 nvme_free_iod(dev, meta_iod);
1837         }
1838
1839         return status;
1840 }
1841
1842 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1843                         struct nvme_passthru_cmd __user *ucmd)
1844 {
1845         struct nvme_passthru_cmd cmd;
1846         struct nvme_command c;
1847         int status, length;
1848         struct nvme_iod *uninitialized_var(iod);
1849         unsigned timeout;
1850
1851         if (!capable(CAP_SYS_ADMIN))
1852                 return -EACCES;
1853         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1854                 return -EFAULT;
1855
1856         memset(&c, 0, sizeof(c));
1857         c.common.opcode = cmd.opcode;
1858         c.common.flags = cmd.flags;
1859         c.common.nsid = cpu_to_le32(cmd.nsid);
1860         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1861         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1862         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1863         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1864         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1865         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1866         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1867         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1868
1869         length = cmd.data_len;
1870         if (cmd.data_len) {
1871                 iod = nvme_map_user_pages(dev, cmd.opcode & 1, cmd.addr,
1872                                                                 length);
1873                 if (IS_ERR(iod))
1874                         return PTR_ERR(iod);
1875                 length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1876                 c.common.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1877                 c.common.prp2 = cpu_to_le64(iod->first_dma);
1878         }
1879
1880         timeout = cmd.timeout_ms ? msecs_to_jiffies(cmd.timeout_ms) :
1881                                                                 ADMIN_TIMEOUT;
1882
1883         if (length != cmd.data_len)
1884                 status = -ENOMEM;
1885         else if (ns) {
1886                 struct request *req;
1887
1888                 req = blk_mq_alloc_request(ns->queue, WRITE,
1889                                                 (GFP_KERNEL|__GFP_WAIT), false);
1890                 if (IS_ERR(req))
1891                         status = PTR_ERR(req);
1892                 else {
1893                         status = nvme_submit_sync_cmd(req, &c, &cmd.result,
1894                                                                 timeout);
1895                         blk_mq_free_request(req);
1896                 }
1897         } else
1898                 status = __nvme_submit_admin_cmd(dev, &c, &cmd.result, timeout);
1899
1900         if (cmd.data_len) {
1901                 nvme_unmap_user_pages(dev, cmd.opcode & 1, iod);
1902                 nvme_free_iod(dev, iod);
1903         }
1904
1905         if ((status >= 0) && copy_to_user(&ucmd->result, &cmd.result,
1906                                                         sizeof(cmd.result)))
1907                 status = -EFAULT;
1908
1909         return status;
1910 }
1911
1912 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1913                                                         unsigned long arg)
1914 {
1915         struct nvme_ns *ns = bdev->bd_disk->private_data;
1916
1917         switch (cmd) {
1918         case NVME_IOCTL_ID:
1919                 force_successful_syscall_return();
1920                 return ns->ns_id;
1921         case NVME_IOCTL_ADMIN_CMD:
1922                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1923         case NVME_IOCTL_IO_CMD:
1924                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1925         case NVME_IOCTL_SUBMIT_IO:
1926                 return nvme_submit_io(ns, (void __user *)arg);
1927         case SG_GET_VERSION_NUM:
1928                 return nvme_sg_get_version_num((void __user *)arg);
1929         case SG_IO:
1930                 return nvme_sg_io(ns, (void __user *)arg);
1931         default:
1932                 return -ENOTTY;
1933         }
1934 }
1935
1936 #ifdef CONFIG_COMPAT
1937 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1938                                         unsigned int cmd, unsigned long arg)
1939 {
1940         switch (cmd) {
1941         case SG_IO:
1942                 return -ENOIOCTLCMD;
1943         }
1944         return nvme_ioctl(bdev, mode, cmd, arg);
1945 }
1946 #else
1947 #define nvme_compat_ioctl       NULL
1948 #endif
1949
1950 static int nvme_open(struct block_device *bdev, fmode_t mode)
1951 {
1952         int ret = 0;
1953         struct nvme_ns *ns;
1954
1955         spin_lock(&dev_list_lock);
1956         ns = bdev->bd_disk->private_data;
1957         if (!ns)
1958                 ret = -ENXIO;
1959         else if (!kref_get_unless_zero(&ns->dev->kref))
1960                 ret = -ENXIO;
1961         spin_unlock(&dev_list_lock);
1962
1963         return ret;
1964 }
1965
1966 static void nvme_free_dev(struct kref *kref);
1967
1968 static void nvme_release(struct gendisk *disk, fmode_t mode)
1969 {
1970         struct nvme_ns *ns = disk->private_data;
1971         struct nvme_dev *dev = ns->dev;
1972
1973         kref_put(&dev->kref, nvme_free_dev);
1974 }
1975
1976 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1977 {
1978         /* some standard values */
1979         geo->heads = 1 << 6;
1980         geo->sectors = 1 << 5;
1981         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1982         return 0;
1983 }
1984
1985 static void nvme_config_discard(struct nvme_ns *ns)
1986 {
1987         u32 logical_block_size = queue_logical_block_size(ns->queue);
1988         ns->queue->limits.discard_zeroes_data = 0;
1989         ns->queue->limits.discard_alignment = logical_block_size;
1990         ns->queue->limits.discard_granularity = logical_block_size;
1991         ns->queue->limits.max_discard_sectors = 0xffffffff;
1992         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1993 }
1994
1995 static int nvme_noop_verify(struct blk_integrity_iter *iter)
1996 {
1997         return 0;
1998 }
1999
2000 static int nvme_noop_generate(struct blk_integrity_iter *iter)
2001 {
2002         return 0;
2003 }
2004
2005 struct blk_integrity nvme_meta_noop = {
2006         .name                   = "NVME_META_NOOP",
2007         .generate_fn            = nvme_noop_generate,
2008         .verify_fn              = nvme_noop_verify,
2009 };
2010
2011 static void nvme_init_integrity(struct nvme_ns *ns)
2012 {
2013         struct blk_integrity integrity;
2014
2015         switch (ns->pi_type) {
2016         case NVME_NS_DPS_PI_TYPE3:
2017                 integrity = t10_pi_type3_crc;
2018                 break;
2019         case NVME_NS_DPS_PI_TYPE1:
2020         case NVME_NS_DPS_PI_TYPE2:
2021                 integrity = t10_pi_type1_crc;
2022                 break;
2023         default:
2024                 integrity = nvme_meta_noop;
2025                 break;
2026         }
2027         integrity.tuple_size = ns->ms;
2028         blk_integrity_register(ns->disk, &integrity);
2029         blk_queue_max_integrity_segments(ns->queue, 1);
2030 }
2031
2032 static int nvme_revalidate_disk(struct gendisk *disk)
2033 {
2034         struct nvme_ns *ns = disk->private_data;
2035         struct nvme_dev *dev = ns->dev;
2036         struct nvme_id_ns *id;
2037         dma_addr_t dma_addr;
2038         int lbaf, pi_type, old_ms;
2039         unsigned short bs;
2040
2041         id = dma_alloc_coherent(&dev->pci_dev->dev, 4096, &dma_addr,
2042                                                                 GFP_KERNEL);
2043         if (!id) {
2044                 dev_warn(&dev->pci_dev->dev, "%s: Memory alocation failure\n",
2045                                                                 __func__);
2046                 return 0;
2047         }
2048         if (nvme_identify(dev, ns->ns_id, 0, dma_addr)) {
2049                 dev_warn(&dev->pci_dev->dev,
2050                         "identify failed ns:%d, setting capacity to 0\n",
2051                         ns->ns_id);
2052                 memset(id, 0, sizeof(*id));
2053         }
2054
2055         old_ms = ns->ms;
2056         lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2057         ns->lba_shift = id->lbaf[lbaf].ds;
2058         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2059
2060         /*
2061          * If identify namespace failed, use default 512 byte block size so
2062          * block layer can use before failing read/write for 0 capacity.
2063          */
2064         if (ns->lba_shift == 0)
2065                 ns->lba_shift = 9;
2066         bs = 1 << ns->lba_shift;
2067
2068         /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2069         pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2070                                         id->dps & NVME_NS_DPS_PI_MASK : 0;
2071
2072         if (disk->integrity && (ns->pi_type != pi_type || ns->ms != old_ms ||
2073                                 bs != queue_logical_block_size(disk->queue) ||
2074                                 (ns->ms && id->flbas & NVME_NS_FLBAS_META_EXT)))
2075                 blk_integrity_unregister(disk);
2076
2077         ns->pi_type = pi_type;
2078         blk_queue_logical_block_size(ns->queue, bs);
2079
2080         if (ns->ms && !disk->integrity && (disk->flags & GENHD_FL_UP) &&
2081                                 !(id->flbas & NVME_NS_FLBAS_META_EXT))
2082                 nvme_init_integrity(ns);
2083
2084         if (id->ncap == 0 || (ns->ms && !disk->integrity))
2085                 set_capacity(disk, 0);
2086         else
2087                 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2088
2089         if (dev->oncs & NVME_CTRL_ONCS_DSM)
2090                 nvme_config_discard(ns);
2091
2092         dma_free_coherent(&dev->pci_dev->dev, 4096, id, dma_addr);
2093         return 0;
2094 }
2095
2096 static const struct block_device_operations nvme_fops = {
2097         .owner          = THIS_MODULE,
2098         .ioctl          = nvme_ioctl,
2099         .compat_ioctl   = nvme_compat_ioctl,
2100         .open           = nvme_open,
2101         .release        = nvme_release,
2102         .getgeo         = nvme_getgeo,
2103         .revalidate_disk= nvme_revalidate_disk,
2104 };
2105
2106 static int nvme_kthread(void *data)
2107 {
2108         struct nvme_dev *dev, *next;
2109
2110         while (!kthread_should_stop()) {
2111                 set_current_state(TASK_INTERRUPTIBLE);
2112                 spin_lock(&dev_list_lock);
2113                 list_for_each_entry_safe(dev, next, &dev_list, node) {
2114                         int i;
2115                         if (readl(&dev->bar->csts) & NVME_CSTS_CFS) {
2116                                 if (work_busy(&dev->reset_work))
2117                                         continue;
2118                                 list_del_init(&dev->node);
2119                                 dev_warn(&dev->pci_dev->dev,
2120                                         "Failed status: %x, reset controller\n",
2121                                         readl(&dev->bar->csts));
2122                                 dev->reset_workfn = nvme_reset_failed_dev;
2123                                 queue_work(nvme_workq, &dev->reset_work);
2124                                 continue;
2125                         }
2126                         for (i = 0; i < dev->queue_count; i++) {
2127                                 struct nvme_queue *nvmeq = dev->queues[i];
2128                                 if (!nvmeq)
2129                                         continue;
2130                                 spin_lock_irq(&nvmeq->q_lock);
2131                                 nvme_process_cq(nvmeq);
2132
2133                                 while ((i == 0) && (dev->event_limit > 0)) {
2134                                         if (nvme_submit_async_admin_req(dev))
2135                                                 break;
2136                                         dev->event_limit--;
2137                                 }
2138                                 spin_unlock_irq(&nvmeq->q_lock);
2139                         }
2140                 }
2141                 spin_unlock(&dev_list_lock);
2142                 schedule_timeout(round_jiffies_relative(HZ));
2143         }
2144         return 0;
2145 }
2146
2147 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2148 {
2149         struct nvme_ns *ns;
2150         struct gendisk *disk;
2151         int node = dev_to_node(&dev->pci_dev->dev);
2152
2153         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2154         if (!ns)
2155                 return;
2156
2157         ns->queue = blk_mq_init_queue(&dev->tagset);
2158         if (IS_ERR(ns->queue))
2159                 goto out_free_ns;
2160         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2161         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2162         queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS, ns->queue);
2163         ns->dev = dev;
2164         ns->queue->queuedata = ns;
2165
2166         disk = alloc_disk_node(0, node);
2167         if (!disk)
2168                 goto out_free_queue;
2169
2170         ns->ns_id = nsid;
2171         ns->disk = disk;
2172         ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2173         list_add_tail(&ns->list, &dev->namespaces);
2174
2175         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2176         if (dev->max_hw_sectors)
2177                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2178         if (dev->stripe_size)
2179                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2180         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2181                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2182
2183         disk->major = nvme_major;
2184         disk->first_minor = 0;
2185         disk->fops = &nvme_fops;
2186         disk->private_data = ns;
2187         disk->queue = ns->queue;
2188         disk->driverfs_dev = dev->device;
2189         disk->flags = GENHD_FL_EXT_DEVT;
2190         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2191
2192         /*
2193          * Initialize capacity to 0 until we establish the namespace format and
2194          * setup integrity extentions if necessary. The revalidate_disk after
2195          * add_disk allows the driver to register with integrity if the format
2196          * requires it.
2197          */
2198         set_capacity(disk, 0);
2199         nvme_revalidate_disk(ns->disk);
2200         add_disk(ns->disk);
2201         if (ns->ms)
2202                 revalidate_disk(ns->disk);
2203         return;
2204  out_free_queue:
2205         blk_cleanup_queue(ns->queue);
2206  out_free_ns:
2207         kfree(ns);
2208 }
2209
2210 static void nvme_create_io_queues(struct nvme_dev *dev)
2211 {
2212         unsigned i;
2213
2214         for (i = dev->queue_count; i <= dev->max_qid; i++)
2215                 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2216                         break;
2217
2218         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2219                 if (nvme_create_queue(dev->queues[i], i))
2220                         break;
2221 }
2222
2223 static int set_queue_count(struct nvme_dev *dev, int count)
2224 {
2225         int status;
2226         u32 result;
2227         u32 q_count = (count - 1) | ((count - 1) << 16);
2228
2229         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2230                                                                 &result);
2231         if (status < 0)
2232                 return status;
2233         if (status > 0) {
2234                 dev_err(&dev->pci_dev->dev, "Could not set queue count (%d)\n",
2235                                                                         status);
2236                 return 0;
2237         }
2238         return min(result & 0xffff, result >> 16) + 1;
2239 }
2240
2241 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2242 {
2243         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2244 }
2245
2246 static int nvme_setup_io_queues(struct nvme_dev *dev)
2247 {
2248         struct nvme_queue *adminq = dev->queues[0];
2249         struct pci_dev *pdev = dev->pci_dev;
2250         int result, i, vecs, nr_io_queues, size;
2251
2252         nr_io_queues = num_possible_cpus();
2253         result = set_queue_count(dev, nr_io_queues);
2254         if (result <= 0)
2255                 return result;
2256         if (result < nr_io_queues)
2257                 nr_io_queues = result;
2258
2259         size = db_bar_size(dev, nr_io_queues);
2260         if (size > 8192) {
2261                 iounmap(dev->bar);
2262                 do {
2263                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2264                         if (dev->bar)
2265                                 break;
2266                         if (!--nr_io_queues)
2267                                 return -ENOMEM;
2268                         size = db_bar_size(dev, nr_io_queues);
2269                 } while (1);
2270                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2271                 adminq->q_db = dev->dbs;
2272         }
2273
2274         /* Deregister the admin queue's interrupt */
2275         free_irq(dev->entry[0].vector, adminq);
2276
2277         /*
2278          * If we enable msix early due to not intx, disable it again before
2279          * setting up the full range we need.
2280          */
2281         if (!pdev->irq)
2282                 pci_disable_msix(pdev);
2283
2284         for (i = 0; i < nr_io_queues; i++)
2285                 dev->entry[i].entry = i;
2286         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2287         if (vecs < 0) {
2288                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2289                 if (vecs < 0) {
2290                         vecs = 1;
2291                 } else {
2292                         for (i = 0; i < vecs; i++)
2293                                 dev->entry[i].vector = i + pdev->irq;
2294                 }
2295         }
2296
2297         /*
2298          * Should investigate if there's a performance win from allocating
2299          * more queues than interrupt vectors; it might allow the submission
2300          * path to scale better, even if the receive path is limited by the
2301          * number of interrupts.
2302          */
2303         nr_io_queues = vecs;
2304         dev->max_qid = nr_io_queues;
2305
2306         result = queue_request_irq(dev, adminq, adminq->irqname);
2307         if (result)
2308                 goto free_queues;
2309
2310         /* Free previously allocated queues that are no longer usable */
2311         nvme_free_queues(dev, nr_io_queues + 1);
2312         nvme_create_io_queues(dev);
2313
2314         return 0;
2315
2316  free_queues:
2317         nvme_free_queues(dev, 1);
2318         return result;
2319 }
2320
2321 /*
2322  * Return: error value if an error occurred setting up the queues or calling
2323  * Identify Device.  0 if these succeeded, even if adding some of the
2324  * namespaces failed.  At the moment, these failures are silent.  TBD which
2325  * failures should be reported.
2326  */
2327 static int nvme_dev_add(struct nvme_dev *dev)
2328 {
2329         struct pci_dev *pdev = dev->pci_dev;
2330         int res;
2331         unsigned nn, i;
2332         struct nvme_id_ctrl *ctrl;
2333         void *mem;
2334         dma_addr_t dma_addr;
2335         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2336
2337         mem = dma_alloc_coherent(&pdev->dev, 4096, &dma_addr, GFP_KERNEL);
2338         if (!mem)
2339                 return -ENOMEM;
2340
2341         res = nvme_identify(dev, 0, 1, dma_addr);
2342         if (res) {
2343                 dev_err(&pdev->dev, "Identify Controller failed (%d)\n", res);
2344                 dma_free_coherent(&dev->pci_dev->dev, 4096, mem, dma_addr);
2345                 return -EIO;
2346         }
2347
2348         ctrl = mem;
2349         nn = le32_to_cpup(&ctrl->nn);
2350         dev->oncs = le16_to_cpup(&ctrl->oncs);
2351         dev->abort_limit = ctrl->acl + 1;
2352         dev->vwc = ctrl->vwc;
2353         dev->event_limit = min(ctrl->aerl + 1, 8);
2354         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2355         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2356         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2357         if (ctrl->mdts)
2358                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2359         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2360                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2361                 unsigned int max_hw_sectors;
2362
2363                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2364                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2365                 if (dev->max_hw_sectors) {
2366                         dev->max_hw_sectors = min(max_hw_sectors,
2367                                                         dev->max_hw_sectors);
2368                 } else
2369                         dev->max_hw_sectors = max_hw_sectors;
2370         }
2371         dma_free_coherent(&dev->pci_dev->dev, 4096, mem, dma_addr);
2372
2373         dev->tagset.ops = &nvme_mq_ops;
2374         dev->tagset.nr_hw_queues = dev->online_queues - 1;
2375         dev->tagset.timeout = NVME_IO_TIMEOUT;
2376         dev->tagset.numa_node = dev_to_node(&dev->pci_dev->dev);
2377         dev->tagset.queue_depth =
2378                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2379         dev->tagset.cmd_size = nvme_cmd_size(dev);
2380         dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2381         dev->tagset.driver_data = dev;
2382
2383         if (blk_mq_alloc_tag_set(&dev->tagset))
2384                 return 0;
2385
2386         for (i = 1; i <= nn; i++)
2387                 nvme_alloc_ns(dev, i);
2388
2389         return 0;
2390 }
2391
2392 static int nvme_dev_map(struct nvme_dev *dev)
2393 {
2394         u64 cap;
2395         int bars, result = -ENOMEM;
2396         struct pci_dev *pdev = dev->pci_dev;
2397
2398         if (pci_enable_device_mem(pdev))
2399                 return result;
2400
2401         dev->entry[0].vector = pdev->irq;
2402         pci_set_master(pdev);
2403         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2404         if (!bars)
2405                 goto disable_pci;
2406
2407         if (pci_request_selected_regions(pdev, bars, "nvme"))
2408                 goto disable_pci;
2409
2410         if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) &&
2411             dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))
2412                 goto disable;
2413
2414         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2415         if (!dev->bar)
2416                 goto disable;
2417
2418         if (readl(&dev->bar->csts) == -1) {
2419                 result = -ENODEV;
2420                 goto unmap;
2421         }
2422
2423         /*
2424          * Some devices don't advertse INTx interrupts, pre-enable a single
2425          * MSIX vec for setup. We'll adjust this later.
2426          */
2427         if (!pdev->irq) {
2428                 result = pci_enable_msix(pdev, dev->entry, 1);
2429                 if (result < 0)
2430                         goto unmap;
2431         }
2432
2433         cap = readq(&dev->bar->cap);
2434         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2435         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2436         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2437
2438         return 0;
2439
2440  unmap:
2441         iounmap(dev->bar);
2442         dev->bar = NULL;
2443  disable:
2444         pci_release_regions(pdev);
2445  disable_pci:
2446         pci_disable_device(pdev);
2447         return result;
2448 }
2449
2450 static void nvme_dev_unmap(struct nvme_dev *dev)
2451 {
2452         if (dev->pci_dev->msi_enabled)
2453                 pci_disable_msi(dev->pci_dev);
2454         else if (dev->pci_dev->msix_enabled)
2455                 pci_disable_msix(dev->pci_dev);
2456
2457         if (dev->bar) {
2458                 iounmap(dev->bar);
2459                 dev->bar = NULL;
2460                 pci_release_regions(dev->pci_dev);
2461         }
2462
2463         if (pci_is_enabled(dev->pci_dev))
2464                 pci_disable_device(dev->pci_dev);
2465 }
2466
2467 struct nvme_delq_ctx {
2468         struct task_struct *waiter;
2469         struct kthread_worker *worker;
2470         atomic_t refcount;
2471 };
2472
2473 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2474 {
2475         dq->waiter = current;
2476         mb();
2477
2478         for (;;) {
2479                 set_current_state(TASK_KILLABLE);
2480                 if (!atomic_read(&dq->refcount))
2481                         break;
2482                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2483                                         fatal_signal_pending(current)) {
2484                         /*
2485                          * Disable the controller first since we can't trust it
2486                          * at this point, but leave the admin queue enabled
2487                          * until all queue deletion requests are flushed.
2488                          * FIXME: This may take a while if there are more h/w
2489                          * queues than admin tags.
2490                          */
2491                         set_current_state(TASK_RUNNING);
2492                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2493                         nvme_clear_queue(dev->queues[0]);
2494                         flush_kthread_worker(dq->worker);
2495                         nvme_disable_queue(dev, 0);
2496                         return;
2497                 }
2498         }
2499         set_current_state(TASK_RUNNING);
2500 }
2501
2502 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2503 {
2504         atomic_dec(&dq->refcount);
2505         if (dq->waiter)
2506                 wake_up_process(dq->waiter);
2507 }
2508
2509 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2510 {
2511         atomic_inc(&dq->refcount);
2512         return dq;
2513 }
2514
2515 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2516 {
2517         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2518         nvme_put_dq(dq);
2519 }
2520
2521 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2522                                                 kthread_work_func_t fn)
2523 {
2524         struct nvme_command c;
2525
2526         memset(&c, 0, sizeof(c));
2527         c.delete_queue.opcode = opcode;
2528         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2529
2530         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2531         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2532                                                                 ADMIN_TIMEOUT);
2533 }
2534
2535 static void nvme_del_cq_work_handler(struct kthread_work *work)
2536 {
2537         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2538                                                         cmdinfo.work);
2539         nvme_del_queue_end(nvmeq);
2540 }
2541
2542 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2543 {
2544         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2545                                                 nvme_del_cq_work_handler);
2546 }
2547
2548 static void nvme_del_sq_work_handler(struct kthread_work *work)
2549 {
2550         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2551                                                         cmdinfo.work);
2552         int status = nvmeq->cmdinfo.status;
2553
2554         if (!status)
2555                 status = nvme_delete_cq(nvmeq);
2556         if (status)
2557                 nvme_del_queue_end(nvmeq);
2558 }
2559
2560 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2561 {
2562         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2563                                                 nvme_del_sq_work_handler);
2564 }
2565
2566 static void nvme_del_queue_start(struct kthread_work *work)
2567 {
2568         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2569                                                         cmdinfo.work);
2570         if (nvme_delete_sq(nvmeq))
2571                 nvme_del_queue_end(nvmeq);
2572 }
2573
2574 static void nvme_disable_io_queues(struct nvme_dev *dev)
2575 {
2576         int i;
2577         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2578         struct nvme_delq_ctx dq;
2579         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2580                                         &worker, "nvme%d", dev->instance);
2581
2582         if (IS_ERR(kworker_task)) {
2583                 dev_err(&dev->pci_dev->dev,
2584                         "Failed to create queue del task\n");
2585                 for (i = dev->queue_count - 1; i > 0; i--)
2586                         nvme_disable_queue(dev, i);
2587                 return;
2588         }
2589
2590         dq.waiter = NULL;
2591         atomic_set(&dq.refcount, 0);
2592         dq.worker = &worker;
2593         for (i = dev->queue_count - 1; i > 0; i--) {
2594                 struct nvme_queue *nvmeq = dev->queues[i];
2595
2596                 if (nvme_suspend_queue(nvmeq))
2597                         continue;
2598                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2599                 nvmeq->cmdinfo.worker = dq.worker;
2600                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2601                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2602         }
2603         nvme_wait_dq(&dq, dev);
2604         kthread_stop(kworker_task);
2605 }
2606
2607 /*
2608 * Remove the node from the device list and check
2609 * for whether or not we need to stop the nvme_thread.
2610 */
2611 static void nvme_dev_list_remove(struct nvme_dev *dev)
2612 {
2613         struct task_struct *tmp = NULL;
2614
2615         spin_lock(&dev_list_lock);
2616         list_del_init(&dev->node);
2617         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2618                 tmp = nvme_thread;
2619                 nvme_thread = NULL;
2620         }
2621         spin_unlock(&dev_list_lock);
2622
2623         if (tmp)
2624                 kthread_stop(tmp);
2625 }
2626
2627 static void nvme_freeze_queues(struct nvme_dev *dev)
2628 {
2629         struct nvme_ns *ns;
2630
2631         list_for_each_entry(ns, &dev->namespaces, list) {
2632                 blk_mq_freeze_queue_start(ns->queue);
2633
2634                 spin_lock(ns->queue->queue_lock);
2635                 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2636                 spin_unlock(ns->queue->queue_lock);
2637
2638                 blk_mq_cancel_requeue_work(ns->queue);
2639                 blk_mq_stop_hw_queues(ns->queue);
2640         }
2641 }
2642
2643 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2644 {
2645         struct nvme_ns *ns;
2646
2647         list_for_each_entry(ns, &dev->namespaces, list) {
2648                 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2649                 blk_mq_unfreeze_queue(ns->queue);
2650                 blk_mq_start_stopped_hw_queues(ns->queue, true);
2651                 blk_mq_kick_requeue_list(ns->queue);
2652         }
2653 }
2654
2655 static void nvme_dev_shutdown(struct nvme_dev *dev)
2656 {
2657         int i;
2658         u32 csts = -1;
2659
2660         nvme_dev_list_remove(dev);
2661
2662         if (dev->bar) {
2663                 nvme_freeze_queues(dev);
2664                 csts = readl(&dev->bar->csts);
2665         }
2666         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2667                 for (i = dev->queue_count - 1; i >= 0; i--) {
2668                         struct nvme_queue *nvmeq = dev->queues[i];
2669                         nvme_suspend_queue(nvmeq);
2670                 }
2671         } else {
2672                 nvme_disable_io_queues(dev);
2673                 nvme_shutdown_ctrl(dev);
2674                 nvme_disable_queue(dev, 0);
2675         }
2676         nvme_dev_unmap(dev);
2677
2678         for (i = dev->queue_count - 1; i >= 0; i--)
2679                 nvme_clear_queue(dev->queues[i]);
2680 }
2681
2682 static void nvme_dev_remove(struct nvme_dev *dev)
2683 {
2684         struct nvme_ns *ns;
2685
2686         list_for_each_entry(ns, &dev->namespaces, list) {
2687                 if (ns->disk->flags & GENHD_FL_UP) {
2688                         if (ns->disk->integrity)
2689                                 blk_integrity_unregister(ns->disk);
2690                         del_gendisk(ns->disk);
2691                 }
2692                 if (!blk_queue_dying(ns->queue)) {
2693                         blk_mq_abort_requeue_list(ns->queue);
2694                         blk_cleanup_queue(ns->queue);
2695                 }
2696         }
2697 }
2698
2699 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2700 {
2701         struct device *dmadev = &dev->pci_dev->dev;
2702         dev->prp_page_pool = dma_pool_create("prp list page", dmadev,
2703                                                 PAGE_SIZE, PAGE_SIZE, 0);
2704         if (!dev->prp_page_pool)
2705                 return -ENOMEM;
2706
2707         /* Optimisation for I/Os between 4k and 128k */
2708         dev->prp_small_pool = dma_pool_create("prp list 256", dmadev,
2709                                                 256, 256, 0);
2710         if (!dev->prp_small_pool) {
2711                 dma_pool_destroy(dev->prp_page_pool);
2712                 return -ENOMEM;
2713         }
2714         return 0;
2715 }
2716
2717 static void nvme_release_prp_pools(struct nvme_dev *dev)
2718 {
2719         dma_pool_destroy(dev->prp_page_pool);
2720         dma_pool_destroy(dev->prp_small_pool);
2721 }
2722
2723 static DEFINE_IDA(nvme_instance_ida);
2724
2725 static int nvme_set_instance(struct nvme_dev *dev)
2726 {
2727         int instance, error;
2728
2729         do {
2730                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2731                         return -ENODEV;
2732
2733                 spin_lock(&dev_list_lock);
2734                 error = ida_get_new(&nvme_instance_ida, &instance);
2735                 spin_unlock(&dev_list_lock);
2736         } while (error == -EAGAIN);
2737
2738         if (error)
2739                 return -ENODEV;
2740
2741         dev->instance = instance;
2742         return 0;
2743 }
2744
2745 static void nvme_release_instance(struct nvme_dev *dev)
2746 {
2747         spin_lock(&dev_list_lock);
2748         ida_remove(&nvme_instance_ida, dev->instance);
2749         spin_unlock(&dev_list_lock);
2750 }
2751
2752 static void nvme_free_namespaces(struct nvme_dev *dev)
2753 {
2754         struct nvme_ns *ns, *next;
2755
2756         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2757                 list_del(&ns->list);
2758
2759                 spin_lock(&dev_list_lock);
2760                 ns->disk->private_data = NULL;
2761                 spin_unlock(&dev_list_lock);
2762
2763                 put_disk(ns->disk);
2764                 kfree(ns);
2765         }
2766 }
2767
2768 static void nvme_free_dev(struct kref *kref)
2769 {
2770         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2771
2772         pci_dev_put(dev->pci_dev);
2773         put_device(dev->device);
2774         nvme_free_namespaces(dev);
2775         nvme_release_instance(dev);
2776         blk_mq_free_tag_set(&dev->tagset);
2777         blk_put_queue(dev->admin_q);
2778         kfree(dev->queues);
2779         kfree(dev->entry);
2780         kfree(dev);
2781 }
2782
2783 static int nvme_dev_open(struct inode *inode, struct file *f)
2784 {
2785         struct nvme_dev *dev;
2786         int instance = iminor(inode);
2787         int ret = -ENODEV;
2788
2789         spin_lock(&dev_list_lock);
2790         list_for_each_entry(dev, &dev_list, node) {
2791                 if (dev->instance == instance) {
2792                         if (!dev->admin_q) {
2793                                 ret = -EWOULDBLOCK;
2794                                 break;
2795                         }
2796                         if (!kref_get_unless_zero(&dev->kref))
2797                                 break;
2798                         f->private_data = dev;
2799                         ret = 0;
2800                         break;
2801                 }
2802         }
2803         spin_unlock(&dev_list_lock);
2804
2805         return ret;
2806 }
2807
2808 static int nvme_dev_release(struct inode *inode, struct file *f)
2809 {
2810         struct nvme_dev *dev = f->private_data;
2811         kref_put(&dev->kref, nvme_free_dev);
2812         return 0;
2813 }
2814
2815 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2816 {
2817         struct nvme_dev *dev = f->private_data;
2818         struct nvme_ns *ns;
2819
2820         switch (cmd) {
2821         case NVME_IOCTL_ADMIN_CMD:
2822                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2823         case NVME_IOCTL_IO_CMD:
2824                 if (list_empty(&dev->namespaces))
2825                         return -ENOTTY;
2826                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2827                 return nvme_user_cmd(dev, ns, (void __user *)arg);
2828         default:
2829                 return -ENOTTY;
2830         }
2831 }
2832
2833 static const struct file_operations nvme_dev_fops = {
2834         .owner          = THIS_MODULE,
2835         .open           = nvme_dev_open,
2836         .release        = nvme_dev_release,
2837         .unlocked_ioctl = nvme_dev_ioctl,
2838         .compat_ioctl   = nvme_dev_ioctl,
2839 };
2840
2841 static void nvme_set_irq_hints(struct nvme_dev *dev)
2842 {
2843         struct nvme_queue *nvmeq;
2844         int i;
2845
2846         for (i = 0; i < dev->online_queues; i++) {
2847                 nvmeq = dev->queues[i];
2848
2849                 if (!nvmeq->hctx)
2850                         continue;
2851
2852                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2853                                                         nvmeq->hctx->cpumask);
2854         }
2855 }
2856
2857 static int nvme_dev_start(struct nvme_dev *dev)
2858 {
2859         int result;
2860         bool start_thread = false;
2861
2862         result = nvme_dev_map(dev);
2863         if (result)
2864                 return result;
2865
2866         result = nvme_configure_admin_queue(dev);
2867         if (result)
2868                 goto unmap;
2869
2870         spin_lock(&dev_list_lock);
2871         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2872                 start_thread = true;
2873                 nvme_thread = NULL;
2874         }
2875         list_add(&dev->node, &dev_list);
2876         spin_unlock(&dev_list_lock);
2877
2878         if (start_thread) {
2879                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2880                 wake_up_all(&nvme_kthread_wait);
2881         } else
2882                 wait_event_killable(nvme_kthread_wait, nvme_thread);
2883
2884         if (IS_ERR_OR_NULL(nvme_thread)) {
2885                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2886                 goto disable;
2887         }
2888
2889         nvme_init_queue(dev->queues[0], 0);
2890         result = nvme_alloc_admin_tags(dev);
2891         if (result)
2892                 goto disable;
2893
2894         result = nvme_setup_io_queues(dev);
2895         if (result)
2896                 goto free_tags;
2897
2898         nvme_set_irq_hints(dev);
2899
2900         return result;
2901
2902  free_tags:
2903         nvme_dev_remove_admin(dev);
2904  disable:
2905         nvme_disable_queue(dev, 0);
2906         nvme_dev_list_remove(dev);
2907  unmap:
2908         nvme_dev_unmap(dev);
2909         return result;
2910 }
2911
2912 static int nvme_remove_dead_ctrl(void *arg)
2913 {
2914         struct nvme_dev *dev = (struct nvme_dev *)arg;
2915         struct pci_dev *pdev = dev->pci_dev;
2916
2917         if (pci_get_drvdata(pdev))
2918                 pci_stop_and_remove_bus_device_locked(pdev);
2919         kref_put(&dev->kref, nvme_free_dev);
2920         return 0;
2921 }
2922
2923 static void nvme_remove_disks(struct work_struct *ws)
2924 {
2925         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2926
2927         nvme_free_queues(dev, 1);
2928         nvme_dev_remove(dev);
2929 }
2930
2931 static int nvme_dev_resume(struct nvme_dev *dev)
2932 {
2933         int ret;
2934
2935         ret = nvme_dev_start(dev);
2936         if (ret)
2937                 return ret;
2938         if (dev->online_queues < 2) {
2939                 spin_lock(&dev_list_lock);
2940                 dev->reset_workfn = nvme_remove_disks;
2941                 queue_work(nvme_workq, &dev->reset_work);
2942                 spin_unlock(&dev_list_lock);
2943         } else {
2944                 nvme_unfreeze_queues(dev);
2945                 nvme_set_irq_hints(dev);
2946         }
2947         return 0;
2948 }
2949
2950 static void nvme_dev_reset(struct nvme_dev *dev)
2951 {
2952         nvme_dev_shutdown(dev);
2953         if (nvme_dev_resume(dev)) {
2954                 dev_warn(&dev->pci_dev->dev, "Device failed to resume\n");
2955                 kref_get(&dev->kref);
2956                 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
2957                                                         dev->instance))) {
2958                         dev_err(&dev->pci_dev->dev,
2959                                 "Failed to start controller remove task\n");
2960                         kref_put(&dev->kref, nvme_free_dev);
2961                 }
2962         }
2963 }
2964
2965 static void nvme_reset_failed_dev(struct work_struct *ws)
2966 {
2967         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2968         nvme_dev_reset(dev);
2969 }
2970
2971 static void nvme_reset_workfn(struct work_struct *work)
2972 {
2973         struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
2974         dev->reset_workfn(work);
2975 }
2976
2977 static void nvme_async_probe(struct work_struct *work);
2978 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2979 {
2980         int node, result = -ENOMEM;
2981         struct nvme_dev *dev;
2982
2983         node = dev_to_node(&pdev->dev);
2984         if (node == NUMA_NO_NODE)
2985                 set_dev_node(&pdev->dev, 0);
2986
2987         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
2988         if (!dev)
2989                 return -ENOMEM;
2990         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
2991                                                         GFP_KERNEL, node);
2992         if (!dev->entry)
2993                 goto free;
2994         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
2995                                                         GFP_KERNEL, node);
2996         if (!dev->queues)
2997                 goto free;
2998
2999         INIT_LIST_HEAD(&dev->namespaces);
3000         dev->reset_workfn = nvme_reset_failed_dev;
3001         INIT_WORK(&dev->reset_work, nvme_reset_workfn);
3002         dev->pci_dev = pci_dev_get(pdev);
3003         pci_set_drvdata(pdev, dev);
3004         result = nvme_set_instance(dev);
3005         if (result)
3006                 goto put_pci;
3007
3008         result = nvme_setup_prp_pools(dev);
3009         if (result)
3010                 goto release;
3011
3012         kref_init(&dev->kref);
3013         dev->device = device_create(nvme_class, &pdev->dev,
3014                                 MKDEV(nvme_char_major, dev->instance),
3015                                 dev, "nvme%d", dev->instance);
3016         if (IS_ERR(dev->device)) {
3017                 result = PTR_ERR(dev->device);
3018                 goto release_pools;
3019         }
3020         get_device(dev->device);
3021
3022         INIT_WORK(&dev->probe_work, nvme_async_probe);
3023         schedule_work(&dev->probe_work);
3024         return 0;
3025
3026  release_pools:
3027         nvme_release_prp_pools(dev);
3028  release:
3029         nvme_release_instance(dev);
3030  put_pci:
3031         pci_dev_put(dev->pci_dev);
3032  free:
3033         kfree(dev->queues);
3034         kfree(dev->entry);
3035         kfree(dev);
3036         return result;
3037 }
3038
3039 static void nvme_async_probe(struct work_struct *work)
3040 {
3041         struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3042         int result;
3043
3044         result = nvme_dev_start(dev);
3045         if (result)
3046                 goto reset;
3047
3048         if (dev->online_queues > 1)
3049                 result = nvme_dev_add(dev);
3050         if (result)
3051                 goto reset;
3052
3053         nvme_set_irq_hints(dev);
3054         return;
3055  reset:
3056         if (!work_busy(&dev->reset_work)) {
3057                 dev->reset_workfn = nvme_reset_failed_dev;
3058                 queue_work(nvme_workq, &dev->reset_work);
3059         }
3060 }
3061
3062 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3063 {
3064         struct nvme_dev *dev = pci_get_drvdata(pdev);
3065
3066         if (prepare)
3067                 nvme_dev_shutdown(dev);
3068         else
3069                 nvme_dev_resume(dev);
3070 }
3071
3072 static void nvme_shutdown(struct pci_dev *pdev)
3073 {
3074         struct nvme_dev *dev = pci_get_drvdata(pdev);
3075         nvme_dev_shutdown(dev);
3076 }
3077
3078 static void nvme_remove(struct pci_dev *pdev)
3079 {
3080         struct nvme_dev *dev = pci_get_drvdata(pdev);
3081
3082         spin_lock(&dev_list_lock);
3083         list_del_init(&dev->node);
3084         spin_unlock(&dev_list_lock);
3085
3086         pci_set_drvdata(pdev, NULL);
3087         flush_work(&dev->probe_work);
3088         flush_work(&dev->reset_work);
3089         nvme_dev_shutdown(dev);
3090         nvme_dev_remove(dev);
3091         nvme_dev_remove_admin(dev);
3092         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3093         nvme_free_queues(dev, 0);
3094         nvme_release_prp_pools(dev);
3095         kref_put(&dev->kref, nvme_free_dev);
3096 }
3097
3098 /* These functions are yet to be implemented */
3099 #define nvme_error_detected NULL
3100 #define nvme_dump_registers NULL
3101 #define nvme_link_reset NULL
3102 #define nvme_slot_reset NULL
3103 #define nvme_error_resume NULL
3104
3105 #ifdef CONFIG_PM_SLEEP
3106 static int nvme_suspend(struct device *dev)
3107 {
3108         struct pci_dev *pdev = to_pci_dev(dev);
3109         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3110
3111         nvme_dev_shutdown(ndev);
3112         return 0;
3113 }
3114
3115 static int nvme_resume(struct device *dev)
3116 {
3117         struct pci_dev *pdev = to_pci_dev(dev);
3118         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3119
3120         if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
3121                 ndev->reset_workfn = nvme_reset_failed_dev;
3122                 queue_work(nvme_workq, &ndev->reset_work);
3123         }
3124         return 0;
3125 }
3126 #endif
3127
3128 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3129
3130 static const struct pci_error_handlers nvme_err_handler = {
3131         .error_detected = nvme_error_detected,
3132         .mmio_enabled   = nvme_dump_registers,
3133         .link_reset     = nvme_link_reset,
3134         .slot_reset     = nvme_slot_reset,
3135         .resume         = nvme_error_resume,
3136         .reset_notify   = nvme_reset_notify,
3137 };
3138
3139 /* Move to pci_ids.h later */
3140 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
3141
3142 static const struct pci_device_id nvme_id_table[] = {
3143         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3144         { 0, }
3145 };
3146 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3147
3148 static struct pci_driver nvme_driver = {
3149         .name           = "nvme",
3150         .id_table       = nvme_id_table,
3151         .probe          = nvme_probe,
3152         .remove         = nvme_remove,
3153         .shutdown       = nvme_shutdown,
3154         .driver         = {
3155                 .pm     = &nvme_dev_pm_ops,
3156         },
3157         .err_handler    = &nvme_err_handler,
3158 };
3159
3160 static int __init nvme_init(void)
3161 {
3162         int result;
3163
3164         init_waitqueue_head(&nvme_kthread_wait);
3165
3166         nvme_workq = create_singlethread_workqueue("nvme");
3167         if (!nvme_workq)
3168                 return -ENOMEM;
3169
3170         result = register_blkdev(nvme_major, "nvme");
3171         if (result < 0)
3172                 goto kill_workq;
3173         else if (result > 0)
3174                 nvme_major = result;
3175
3176         result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3177                                                         &nvme_dev_fops);
3178         if (result < 0)
3179                 goto unregister_blkdev;
3180         else if (result > 0)
3181                 nvme_char_major = result;
3182
3183         nvme_class = class_create(THIS_MODULE, "nvme");
3184         if (!nvme_class)
3185                 goto unregister_chrdev;
3186
3187         result = pci_register_driver(&nvme_driver);
3188         if (result)
3189                 goto destroy_class;
3190         return 0;
3191
3192  destroy_class:
3193         class_destroy(nvme_class);
3194  unregister_chrdev:
3195         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3196  unregister_blkdev:
3197         unregister_blkdev(nvme_major, "nvme");
3198  kill_workq:
3199         destroy_workqueue(nvme_workq);
3200         return result;
3201 }
3202
3203 static void __exit nvme_exit(void)
3204 {
3205         pci_unregister_driver(&nvme_driver);
3206         unregister_hotcpu_notifier(&nvme_nb);
3207         unregister_blkdev(nvme_major, "nvme");
3208         destroy_workqueue(nvme_workq);
3209         class_destroy(nvme_class);
3210         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3211         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3212         _nvme_check_size();
3213 }
3214
3215 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3216 MODULE_LICENSE("GPL");
3217 MODULE_VERSION("1.0");
3218 module_init(nvme_init);
3219 module_exit(nvme_exit);