drivers/block/nvme-core.c

   1 /*
   2  * NVM Express device driver
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include <linux/nvme.h>
  16 #include <linux/bitops.h>
  17 #include <linux/blkdev.h>
  18 #include <linux/blk-mq.h>
  19 #include <linux/cpu.h>
  20 #include <linux/delay.h>
  21 #include <linux/errno.h>
  22 #include <linux/fs.h>
  23 #include <linux/genhd.h>
  24 #include <linux/hdreg.h>
  25 #include <linux/idr.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/io.h>
  29 #include <linux/kdev_t.h>
  30 #include <linux/kthread.h>
  31 #include <linux/kernel.h>
  32 #include <linux/list_sort.h>
  33 #include <linux/mm.h>
  34 #include <linux/module.h>
  35 #include <linux/moduleparam.h>
  36 #include <linux/pci.h>
  37 #include <linux/poison.h>
  38 #include <linux/ptrace.h>
  39 #include <linux/sched.h>
  40 #include <linux/slab.h>
  41 #include <linux/t10-pi.h>
  42 #include <linux/types.h>
  43 #include <scsi/sg.h>
  44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
  45
  46 #define NVME_MINORS             (1U << MINORBITS)
  47 #define NVME_Q_DEPTH            1024
  48 #define NVME_AQ_DEPTH           256
  49 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
  50 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
  51 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
  52 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
  53
  54 static unsigned char admin_timeout = 60;
  55 module_param(admin_timeout, byte, 0644);
  56 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  57
  58 unsigned char nvme_io_timeout = 30;
  59 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  60 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  61
  62 static unsigned char shutdown_timeout = 5;
  63 module_param(shutdown_timeout, byte, 0644);
  64 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  65
  66 static int nvme_major;
  67 module_param(nvme_major, int, 0);
  68
  69 static int nvme_char_major;
  70 module_param(nvme_char_major, int, 0);
  71
  72 static int use_threaded_interrupts;
  73 module_param(use_threaded_interrupts, int, 0);
  74
  75 static DEFINE_SPINLOCK(dev_list_lock);
  76 static LIST_HEAD(dev_list);
  77 static struct task_struct *nvme_thread;
  78 static struct workqueue_struct *nvme_workq;
  79 static wait_queue_head_t nvme_kthread_wait;
  80
  81 static struct class *nvme_class;
  82
  83 static void nvme_reset_failed_dev(struct work_struct *ws);
  84 static int nvme_reset(struct nvme_dev *dev);
  85 static int nvme_process_cq(struct nvme_queue *nvmeq);
  86
  87 struct async_cmd_info {
  88         struct kthread_work work;
  89         struct kthread_worker *worker;
  90         struct request *req;
  91         u32 result;
  92         int status;
  93         void *ctx;
  94 };
  95
  96 /*
  97  * An NVM Express queue.  Each device has at least two (one for admin
  98  * commands and one for I/O commands).
  99  */
 100 struct nvme_queue {
 101         struct device *q_dmadev;
 102         struct nvme_dev *dev;
 103         char irqname[24];       /* nvme4294967295-65535\0 */
 104         spinlock_t q_lock;
 105         struct nvme_command *sq_cmds;
 106         volatile struct nvme_completion *cqes;
 107         struct blk_mq_tags **tags;
 108         dma_addr_t sq_dma_addr;
 109         dma_addr_t cq_dma_addr;
 110         u32 __iomem *q_db;
 111         u16 q_depth;
 112         s16 cq_vector;
 113         u16 sq_head;
 114         u16 sq_tail;
 115         u16 cq_head;
 116         u16 qid;
 117         u8 cq_phase;
 118         u8 cqe_seen;
 119         struct async_cmd_info cmdinfo;
 120 };
 121
 122 /*
 123  * Check we didin't inadvertently grow the command struct
 124  */
 125 static inline void _nvme_check_size(void)
 126 {
 127         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
 128         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
 129         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
 130         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
 131         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
 132         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
 133         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
 134         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
 135         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
 136         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
 137         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
 138         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
 139 }
 140
 141 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
 142                                                 struct nvme_completion *);
 143
 144 struct nvme_cmd_info {
 145         nvme_completion_fn fn;
 146         void *ctx;
 147         int aborted;
 148         struct nvme_queue *nvmeq;
 149         struct nvme_iod iod[0];
 150 };
 151
 152 /*
 153  * Max size of iod being embedded in the request payload
 154  */
 155 #define NVME_INT_PAGES          2
 156 #define NVME_INT_BYTES(dev)     (NVME_INT_PAGES * (dev)->page_size)
 157 #define NVME_INT_MASK           0x01
 158
 159 /*
 160  * Will slightly overestimate the number of pages needed.  This is OK
 161  * as it only leads to a small amount of wasted memory for the lifetime of
 162  * the I/O.
 163  */
 164 static int nvme_npages(unsigned size, struct nvme_dev *dev)
 165 {
 166         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
 167         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
 168 }
 169
 170 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
 171 {
 172         unsigned int ret = sizeof(struct nvme_cmd_info);
 173
 174         ret += sizeof(struct nvme_iod);
 175         ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
 176         ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
 177
 178         return ret;
 179 }
 180
 181 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 182                                 unsigned int hctx_idx)
 183 {
 184         struct nvme_dev *dev = data;
 185         struct nvme_queue *nvmeq = dev->queues[0];
 186
 187         WARN_ON(hctx_idx != 0);
 188         WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
 189         WARN_ON(nvmeq->tags);
 190
 191         hctx->driver_data = nvmeq;
 192         nvmeq->tags = &dev->admin_tagset.tags[0];
 193         return 0;
 194 }
 195
 196 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
 197 {
 198         struct nvme_queue *nvmeq = hctx->driver_data;
 199
 200         nvmeq->tags = NULL;
 201 }
 202
 203 static int nvme_admin_init_request(void *data, struct request *req,
 204                                 unsigned int hctx_idx, unsigned int rq_idx,
 205                                 unsigned int numa_node)
 206 {
 207         struct nvme_dev *dev = data;
 208         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 209         struct nvme_queue *nvmeq = dev->queues[0];
 210
 211         BUG_ON(!nvmeq);
 212         cmd->nvmeq = nvmeq;
 213         return 0;
 214 }
 215
 216 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 217                           unsigned int hctx_idx)
 218 {
 219         struct nvme_dev *dev = data;
 220         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 221
 222         if (!nvmeq->tags)
 223                 nvmeq->tags = &dev->tagset.tags[hctx_idx];
 224
 225         WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
 226         hctx->driver_data = nvmeq;
 227         return 0;
 228 }
 229
 230 static int nvme_init_request(void *data, struct request *req,
 231                                 unsigned int hctx_idx, unsigned int rq_idx,
 232                                 unsigned int numa_node)
 233 {
 234         struct nvme_dev *dev = data;
 235         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 236         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 237
 238         BUG_ON(!nvmeq);
 239         cmd->nvmeq = nvmeq;
 240         return 0;
 241 }
 242
 243 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
 244                                 nvme_completion_fn handler)
 245 {
 246         cmd->fn = handler;
 247         cmd->ctx = ctx;
 248         cmd->aborted = 0;
 249         blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
 250 }
 251
 252 static void *iod_get_private(struct nvme_iod *iod)
 253 {
 254         return (void *) (iod->private & ~0x1UL);
 255 }
 256
 257 /*
 258  * If bit 0 is set, the iod is embedded in the request payload.
 259  */
 260 static bool iod_should_kfree(struct nvme_iod *iod)
 261 {
 262         return (iod->private & NVME_INT_MASK) == 0;
 263 }
 264
 265 /* Special values must be less than 0x1000 */
 266 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
 267 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
 268 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
 269 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
 270
 271 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
 272                                                 struct nvme_completion *cqe)
 273 {
 274         if (ctx == CMD_CTX_CANCELLED)
 275                 return;
 276         if (ctx == CMD_CTX_COMPLETED) {
 277                 dev_warn(nvmeq->q_dmadev,
 278                                 "completed id %d twice on queue %d\n",
 279                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 280                 return;
 281         }
 282         if (ctx == CMD_CTX_INVALID) {
 283                 dev_warn(nvmeq->q_dmadev,
 284                                 "invalid id %d completed on queue %d\n",
 285                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 286                 return;
 287         }
 288         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
 289 }
 290
 291 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
 292 {
 293         void *ctx;
 294
 295         if (fn)
 296                 *fn = cmd->fn;
 297         ctx = cmd->ctx;
 298         cmd->fn = special_completion;
 299         cmd->ctx = CMD_CTX_CANCELLED;
 300         return ctx;
 301 }
 302
 303 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
 304                                                 struct nvme_completion *cqe)
 305 {
 306         u32 result = le32_to_cpup(&cqe->result);
 307         u16 status = le16_to_cpup(&cqe->status) >> 1;
 308
 309         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
 310                 ++nvmeq->dev->event_limit;
 311         if (status != NVME_SC_SUCCESS)
 312                 return;
 313
 314         switch (result & 0xff07) {
 315         case NVME_AER_NOTICE_NS_CHANGED:
 316                 dev_info(nvmeq->q_dmadev, "rescanning\n");
 317                 schedule_work(&nvmeq->dev->scan_work);
 318         default:
 319                 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
 320         }
 321 }
 322
 323 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
 324                                                 struct nvme_completion *cqe)
 325 {
 326         struct request *req = ctx;
 327
 328         u16 status = le16_to_cpup(&cqe->status) >> 1;
 329         u32 result = le32_to_cpup(&cqe->result);
 330
 331         blk_mq_free_request(req);
 332
 333         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
 334         ++nvmeq->dev->abort_limit;
 335 }
 336
 337 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
 338                                                 struct nvme_completion *cqe)
 339 {
 340         struct async_cmd_info *cmdinfo = ctx;
 341         cmdinfo->result = le32_to_cpup(&cqe->result);
 342         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 343         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
 344         blk_mq_free_request(cmdinfo->req);
 345 }
 346
 347 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
 348                                   unsigned int tag)
 349 {
 350         struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
 351
 352         return blk_mq_rq_to_pdu(req);
 353 }
 354
 355 /*
 356  * Called with local interrupts disabled and the q_lock held.  May not sleep.
 357  */
 358 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
 359                                                 nvme_completion_fn *fn)
 360 {
 361         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
 362         void *ctx;
 363         if (tag >= nvmeq->q_depth) {
 364                 *fn = special_completion;
 365                 return CMD_CTX_INVALID;
 366         }
 367         if (fn)
 368                 *fn = cmd->fn;
 369         ctx = cmd->ctx;
 370         cmd->fn = special_completion;
 371         cmd->ctx = CMD_CTX_COMPLETED;
 372         return ctx;
 373 }
 374
 375 /**
 376  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
 377  * @nvmeq: The queue to use
 378  * @cmd: The command to send
 379  *
 380  * Safe to use from interrupt context
 381  */
 382 static int __nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 383 {
 384         u16 tail = nvmeq->sq_tail;
 385
 386         memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
 387         if (++tail == nvmeq->q_depth)
 388                 tail = 0;
 389         writel(tail, nvmeq->q_db);
 390         nvmeq->sq_tail = tail;
 391
 392         return 0;
 393 }
 394
 395 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 396 {
 397         unsigned long flags;
 398         int ret;
 399         spin_lock_irqsave(&nvmeq->q_lock, flags);
 400         ret = __nvme_submit_cmd(nvmeq, cmd);
 401         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
 402         return ret;
 403 }
 404
 405 static __le64 **iod_list(struct nvme_iod *iod)
 406 {
 407         return ((void *)iod) + iod->offset;
 408 }
 409
 410 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
 411                             unsigned nseg, unsigned long private)
 412 {
 413         iod->private = private;
 414         iod->offset = offsetof(struct nvme_iod, sg[nseg]);
 415         iod->npages = -1;
 416         iod->length = nbytes;
 417         iod->nents = 0;
 418 }
 419
 420 static struct nvme_iod *
 421 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
 422                  unsigned long priv, gfp_t gfp)
 423 {
 424         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
 425                                 sizeof(__le64 *) * nvme_npages(bytes, dev) +
 426                                 sizeof(struct scatterlist) * nseg, gfp);
 427
 428         if (iod)
 429                 iod_init(iod, bytes, nseg, priv);
 430
 431         return iod;
 432 }
 433
 434 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
 435                                        gfp_t gfp)
 436 {
 437         unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
 438                                                 sizeof(struct nvme_dsm_range);
 439         struct nvme_iod *iod;
 440
 441         if (rq->nr_phys_segments <= NVME_INT_PAGES &&
 442             size <= NVME_INT_BYTES(dev)) {
 443                 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
 444
 445                 iod = cmd->iod;
 446                 iod_init(iod, size, rq->nr_phys_segments,
 447                                 (unsigned long) rq | NVME_INT_MASK);
 448                 return iod;
 449         }
 450
 451         return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
 452                                 (unsigned long) rq, gfp);
 453 }
 454
 455 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
 456 {
 457         const int last_prp = dev->page_size / 8 - 1;
 458         int i;
 459         __le64 **list = iod_list(iod);
 460         dma_addr_t prp_dma = iod->first_dma;
 461
 462         if (iod->npages == 0)
 463                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
 464         for (i = 0; i < iod->npages; i++) {
 465                 __le64 *prp_list = list[i];
 466                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
 467                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
 468                 prp_dma = next_prp_dma;
 469         }
 470
 471         if (iod_should_kfree(iod))
 472                 kfree(iod);
 473 }
 474
 475 static int nvme_error_status(u16 status)
 476 {
 477         switch (status & 0x7ff) {
 478         case NVME_SC_SUCCESS:
 479                 return 0;
 480         case NVME_SC_CAP_EXCEEDED:
 481                 return -ENOSPC;
 482         default:
 483                 return -EIO;
 484         }
 485 }
 486
 487 #ifdef CONFIG_BLK_DEV_INTEGRITY
 488 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
 489 {
 490         if (be32_to_cpu(pi->ref_tag) == v)
 491                 pi->ref_tag = cpu_to_be32(p);
 492 }
 493
 494 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
 495 {
 496         if (be32_to_cpu(pi->ref_tag) == p)
 497                 pi->ref_tag = cpu_to_be32(v);
 498 }
 499
 500 /**
 501  * nvme_dif_remap - remaps ref tags to bip seed and physical lba
 502  *
 503  * The virtual start sector is the one that was originally submitted by the
 504  * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
 505  * start sector may be different. Remap protection information to match the
 506  * physical LBA on writes, and back to the original seed on reads.
 507  *
 508  * Type 0 and 3 do not have a ref tag, so no remapping required.
 509  */
 510 static void nvme_dif_remap(struct request *req,
 511                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
 512 {
 513         struct nvme_ns *ns = req->rq_disk->private_data;
 514         struct bio_integrity_payload *bip;
 515         struct t10_pi_tuple *pi;
 516         void *p, *pmap;
 517         u32 i, nlb, ts, phys, virt;
 518
 519         if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
 520                 return;
 521
 522         bip = bio_integrity(req->bio);
 523         if (!bip)
 524                 return;
 525
 526         pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
 527
 528         p = pmap;
 529         virt = bip_get_seed(bip);
 530         phys = nvme_block_nr(ns, blk_rq_pos(req));
 531         nlb = (blk_rq_bytes(req) >> ns->lba_shift);
 532         ts = ns->disk->integrity->tuple_size;
 533
 534         for (i = 0; i < nlb; i++, virt++, phys++) {
 535                 pi = (struct t10_pi_tuple *)p;
 536                 dif_swap(phys, virt, pi);
 537                 p += ts;
 538         }
 539         kunmap_atomic(pmap);
 540 }
 541
 542 static int nvme_noop_verify(struct blk_integrity_iter *iter)
 543 {
 544         return 0;
 545 }
 546
 547 static int nvme_noop_generate(struct blk_integrity_iter *iter)
 548 {
 549         return 0;
 550 }
 551
 552 struct blk_integrity nvme_meta_noop = {
 553         .name                   = "NVME_META_NOOP",
 554         .generate_fn            = nvme_noop_generate,
 555         .verify_fn              = nvme_noop_verify,
 556 };
 557
 558 static void nvme_init_integrity(struct nvme_ns *ns)
 559 {
 560         struct blk_integrity integrity;
 561
 562         switch (ns->pi_type) {
 563         case NVME_NS_DPS_PI_TYPE3:
 564                 integrity = t10_pi_type3_crc;
 565                 break;
 566         case NVME_NS_DPS_PI_TYPE1:
 567         case NVME_NS_DPS_PI_TYPE2:
 568                 integrity = t10_pi_type1_crc;
 569                 break;
 570         default:
 571                 integrity = nvme_meta_noop;
 572                 break;
 573         }
 574         integrity.tuple_size = ns->ms;
 575         blk_integrity_register(ns->disk, &integrity);
 576         blk_queue_max_integrity_segments(ns->queue, 1);
 577 }
 578 #else /* CONFIG_BLK_DEV_INTEGRITY */
 579 static void nvme_dif_remap(struct request *req,
 580                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
 581 {
 582 }
 583 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
 584 {
 585 }
 586 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
 587 {
 588 }
 589 static void nvme_init_integrity(struct nvme_ns *ns)
 590 {
 591 }
 592 #endif
 593
 594 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
 595                                                 struct nvme_completion *cqe)
 596 {
 597         struct nvme_iod *iod = ctx;
 598         struct request *req = iod_get_private(iod);
 599         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
 600
 601         u16 status = le16_to_cpup(&cqe->status) >> 1;
 602
 603         if (unlikely(status)) {
 604                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
 605                     && (jiffies - req->start_time) < req->timeout) {
 606                         unsigned long flags;
 607
 608                         blk_mq_requeue_request(req);
 609                         spin_lock_irqsave(req->q->queue_lock, flags);
 610                         if (!blk_queue_stopped(req->q))
 611                                 blk_mq_kick_requeue_list(req->q);
 612                         spin_unlock_irqrestore(req->q->queue_lock, flags);
 613                         return;
 614                 }
 615                 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
 616                         req->errors = status;
 617                 } else {
 618                         req->errors = nvme_error_status(status);
 619                 }
 620         } else
 621                 req->errors = 0;
 622         if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
 623                 u32 result = le32_to_cpup(&cqe->result);
 624                 req->special = (void *)(uintptr_t)result;
 625         }
 626
 627         if (cmd_rq->aborted)
 628                 dev_warn(nvmeq->dev->dev,
 629                         "completing aborted command with status:%04x\n",
 630                         status);
 631
 632         if (iod->nents) {
 633                 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
 634                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 635                 if (blk_integrity_rq(req)) {
 636                         if (!rq_data_dir(req))
 637                                 nvme_dif_remap(req, nvme_dif_complete);
 638                         dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
 639                                 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 640                 }
 641         }
 642         nvme_free_iod(nvmeq->dev, iod);
 643
 644         blk_mq_complete_request(req);
 645 }
 646
 647 /* length is in bytes.  gfp flags indicates whether we may sleep. */
 648 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
 649                 int total_len, gfp_t gfp)
 650 {
 651         struct dma_pool *pool;
 652         int length = total_len;
 653         struct scatterlist *sg = iod->sg;
 654         int dma_len = sg_dma_len(sg);
 655         u64 dma_addr = sg_dma_address(sg);
 656         u32 page_size = dev->page_size;
 657         int offset = dma_addr & (page_size - 1);
 658         __le64 *prp_list;
 659         __le64 **list = iod_list(iod);
 660         dma_addr_t prp_dma;
 661         int nprps, i;
 662
 663         length -= (page_size - offset);
 664         if (length <= 0)
 665                 return total_len;
 666
 667         dma_len -= (page_size - offset);
 668         if (dma_len) {
 669                 dma_addr += (page_size - offset);
 670         } else {
 671                 sg = sg_next(sg);
 672                 dma_addr = sg_dma_address(sg);
 673                 dma_len = sg_dma_len(sg);
 674         }
 675
 676         if (length <= page_size) {
 677                 iod->first_dma = dma_addr;
 678                 return total_len;
 679         }
 680
 681         nprps = DIV_ROUND_UP(length, page_size);
 682         if (nprps <= (256 / 8)) {
 683                 pool = dev->prp_small_pool;
 684                 iod->npages = 0;
 685         } else {
 686                 pool = dev->prp_page_pool;
 687                 iod->npages = 1;
 688         }
 689
 690         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 691         if (!prp_list) {
 692                 iod->first_dma = dma_addr;
 693                 iod->npages = -1;
 694                 return (total_len - length) + page_size;
 695         }
 696         list[0] = prp_list;
 697         iod->first_dma = prp_dma;
 698         i = 0;
 699         for (;;) {
 700                 if (i == page_size >> 3) {
 701                         __le64 *old_prp_list = prp_list;
 702                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 703                         if (!prp_list)
 704                                 return total_len - length;
 705                         list[iod->npages++] = prp_list;
 706                         prp_list[0] = old_prp_list[i - 1];
 707                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
 708                         i = 1;
 709                 }
 710                 prp_list[i++] = cpu_to_le64(dma_addr);
 711                 dma_len -= page_size;
 712                 dma_addr += page_size;
 713                 length -= page_size;
 714                 if (length <= 0)
 715                         break;
 716                 if (dma_len > 0)
 717                         continue;
 718                 BUG_ON(dma_len < 0);
 719                 sg = sg_next(sg);
 720                 dma_addr = sg_dma_address(sg);
 721                 dma_len = sg_dma_len(sg);
 722         }
 723
 724         return total_len;
 725 }
 726
 727 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
 728                 struct nvme_iod *iod)
 729 {
 730         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 731
 732         memcpy(cmnd, req->cmd, sizeof(struct nvme_command));
 733         cmnd->rw.command_id = req->tag;
 734         if (req->nr_phys_segments) {
 735                 cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 736                 cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
 737         }
 738
 739         if (++nvmeq->sq_tail == nvmeq->q_depth)
 740                 nvmeq->sq_tail = 0;
 741         writel(nvmeq->sq_tail, nvmeq->q_db);
 742 }
 743
 744 /*
 745  * We reuse the small pool to allocate the 16-byte range here as it is not
 746  * worth having a special pool for these or additional cases to handle freeing
 747  * the iod.
 748  */
 749 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 750                 struct request *req, struct nvme_iod *iod)
 751 {
 752         struct nvme_dsm_range *range =
 753                                 (struct nvme_dsm_range *)iod_list(iod)[0];
 754         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 755
 756         range->cattr = cpu_to_le32(0);
 757         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
 758         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 759
 760         memset(cmnd, 0, sizeof(*cmnd));
 761         cmnd->dsm.opcode = nvme_cmd_dsm;
 762         cmnd->dsm.command_id = req->tag;
 763         cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
 764         cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
 765         cmnd->dsm.nr = 0;
 766         cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
 767
 768         if (++nvmeq->sq_tail == nvmeq->q_depth)
 769                 nvmeq->sq_tail = 0;
 770         writel(nvmeq->sq_tail, nvmeq->q_db);
 771 }
 772
 773 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 774                                                                 int cmdid)
 775 {
 776         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 777
 778         memset(cmnd, 0, sizeof(*cmnd));
 779         cmnd->common.opcode = nvme_cmd_flush;
 780         cmnd->common.command_id = cmdid;
 781         cmnd->common.nsid = cpu_to_le32(ns->ns_id);
 782
 783         if (++nvmeq->sq_tail == nvmeq->q_depth)
 784                 nvmeq->sq_tail = 0;
 785         writel(nvmeq->sq_tail, nvmeq->q_db);
 786 }
 787
 788 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
 789                                                         struct nvme_ns *ns)
 790 {
 791         struct request *req = iod_get_private(iod);
 792         struct nvme_command *cmnd;
 793         u16 control = 0;
 794         u32 dsmgmt = 0;
 795
 796         if (req->cmd_flags & REQ_FUA)
 797                 control |= NVME_RW_FUA;
 798         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
 799                 control |= NVME_RW_LR;
 800
 801         if (req->cmd_flags & REQ_RAHEAD)
 802                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
 803
 804         cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 805         memset(cmnd, 0, sizeof(*cmnd));
 806
 807         cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
 808         cmnd->rw.command_id = req->tag;
 809         cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
 810         cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 811         cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
 812         cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 813         cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
 814
 815         if (blk_integrity_rq(req)) {
 816                 cmnd->rw.metadata = cpu_to_le64(sg_dma_address(iod->meta_sg));
 817                 switch (ns->pi_type) {
 818                 case NVME_NS_DPS_PI_TYPE3:
 819                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
 820                         break;
 821                 case NVME_NS_DPS_PI_TYPE1:
 822                 case NVME_NS_DPS_PI_TYPE2:
 823                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
 824                                         NVME_RW_PRINFO_PRCHK_REF;
 825                         cmnd->rw.reftag = cpu_to_le32(
 826                                         nvme_block_nr(ns, blk_rq_pos(req)));
 827                         break;
 828                 }
 829         } else if (ns->ms)
 830                 control |= NVME_RW_PRINFO_PRACT;
 831
 832         cmnd->rw.control = cpu_to_le16(control);
 833         cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
 834
 835         if (++nvmeq->sq_tail == nvmeq->q_depth)
 836                 nvmeq->sq_tail = 0;
 837         writel(nvmeq->sq_tail, nvmeq->q_db);
 838
 839         return 0;
 840 }
 841
 842 /*
 843  * NOTE: ns is NULL when called on the admin queue.
 844  */
 845 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
 846                          const struct blk_mq_queue_data *bd)
 847 {
 848         struct nvme_ns *ns = hctx->queue->queuedata;
 849         struct nvme_queue *nvmeq = hctx->driver_data;
 850         struct nvme_dev *dev = nvmeq->dev;
 851         struct request *req = bd->rq;
 852         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 853         struct nvme_iod *iod;
 854         enum dma_data_direction dma_dir;
 855
 856         /*
 857          * If formated with metadata, require the block layer provide a buffer
 858          * unless this namespace is formated such that the metadata can be
 859          * stripped/generated by the controller with PRACT=1.
 860          */
 861         if (ns && ns->ms && !blk_integrity_rq(req)) {
 862                 if (!(ns->pi_type && ns->ms == 8) &&
 863                                         req->cmd_type != REQ_TYPE_DRV_PRIV) {
 864                         req->errors = -EFAULT;
 865                         blk_mq_complete_request(req);
 866                         return BLK_MQ_RQ_QUEUE_OK;
 867                 }
 868         }
 869
 870         iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
 871         if (!iod)
 872                 return BLK_MQ_RQ_QUEUE_BUSY;
 873
 874         if (req->cmd_flags & REQ_DISCARD) {
 875                 void *range;
 876                 /*
 877                  * We reuse the small pool to allocate the 16-byte range here
 878                  * as it is not worth having a special pool for these or
 879                  * additional cases to handle freeing the iod.
 880                  */
 881                 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
 882                                                 &iod->first_dma);
 883                 if (!range)
 884                         goto retry_cmd;
 885                 iod_list(iod)[0] = (__le64 *)range;
 886                 iod->npages = 0;
 887         } else if (req->nr_phys_segments) {
 888                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 889
 890                 sg_init_table(iod->sg, req->nr_phys_segments);
 891                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
 892                 if (!iod->nents)
 893                         goto error_cmd;
 894
 895                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
 896                         goto retry_cmd;
 897
 898                 if (blk_rq_bytes(req) !=
 899                     nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
 900                         dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
 901                         goto retry_cmd;
 902                 }
 903                 if (blk_integrity_rq(req)) {
 904                         if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
 905                                 goto error_cmd;
 906
 907                         sg_init_table(iod->meta_sg, 1);
 908                         if (blk_rq_map_integrity_sg(
 909                                         req->q, req->bio, iod->meta_sg) != 1)
 910                                 goto error_cmd;
 911
 912                         if (rq_data_dir(req))
 913                                 nvme_dif_remap(req, nvme_dif_prep);
 914
 915                         if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
 916                                 goto error_cmd;
 917                 }
 918         }
 919
 920         nvme_set_info(cmd, iod, req_completion);
 921         spin_lock_irq(&nvmeq->q_lock);
 922         if (req->cmd_type == REQ_TYPE_DRV_PRIV)
 923                 nvme_submit_priv(nvmeq, req, iod);
 924         else if (req->cmd_flags & REQ_DISCARD)
 925                 nvme_submit_discard(nvmeq, ns, req, iod);
 926         else if (req->cmd_flags & REQ_FLUSH)
 927                 nvme_submit_flush(nvmeq, ns, req->tag);
 928         else
 929                 nvme_submit_iod(nvmeq, iod, ns);
 930
 931         nvme_process_cq(nvmeq);
 932         spin_unlock_irq(&nvmeq->q_lock);
 933         return BLK_MQ_RQ_QUEUE_OK;
 934
 935  error_cmd:
 936         nvme_free_iod(dev, iod);
 937         return BLK_MQ_RQ_QUEUE_ERROR;
 938  retry_cmd:
 939         nvme_free_iod(dev, iod);
 940         return BLK_MQ_RQ_QUEUE_BUSY;
 941 }
 942
 943 static int nvme_process_cq(struct nvme_queue *nvmeq)
 944 {
 945         u16 head, phase;
 946
 947         head = nvmeq->cq_head;
 948         phase = nvmeq->cq_phase;
 949
 950         for (;;) {
 951                 void *ctx;
 952                 nvme_completion_fn fn;
 953                 struct nvme_completion cqe = nvmeq->cqes[head];
 954                 if ((le16_to_cpu(cqe.status) & 1) != phase)
 955                         break;
 956                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
 957                 if (++head == nvmeq->q_depth) {
 958                         head = 0;
 959                         phase = !phase;
 960                 }
 961                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
 962                 fn(nvmeq, ctx, &cqe);
 963         }
 964
 965         /* If the controller ignores the cq head doorbell and continuously
 966          * writes to the queue, it is theoretically possible to wrap around
 967          * the queue twice and mistakenly return IRQ_NONE.  Linux only
 968          * requires that 0.1% of your interrupts are handled, so this isn't
 969          * a big problem.
 970          */
 971         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
 972                 return 0;
 973
 974         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
 975         nvmeq->cq_head = head;
 976         nvmeq->cq_phase = phase;
 977
 978         nvmeq->cqe_seen = 1;
 979         return 1;
 980 }
 981
 982 static irqreturn_t nvme_irq(int irq, void *data)
 983 {
 984         irqreturn_t result;
 985         struct nvme_queue *nvmeq = data;
 986         spin_lock(&nvmeq->q_lock);
 987         nvme_process_cq(nvmeq);
 988         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
 989         nvmeq->cqe_seen = 0;
 990         spin_unlock(&nvmeq->q_lock);
 991         return result;
 992 }
 993
 994 static irqreturn_t nvme_irq_check(int irq, void *data)
 995 {
 996         struct nvme_queue *nvmeq = data;
 997         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
 998         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
 999                 return IRQ_NONE;
1000         return IRQ_WAKE_THREAD;
1001 }
1002
1003 /*
1004  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1005  * if the result is positive, it's an NVM Express status code
1006  */
1007 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1008                 void *buffer, void __user *ubuffer, unsigned bufflen,
1009                 u32 *result, unsigned timeout)
1010 {
1011         bool write = cmd->common.opcode & 1;
1012         struct bio *bio = NULL;
1013         struct request *req;
1014         int ret;
1015
1016         req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1017         if (IS_ERR(req))
1018                 return PTR_ERR(req);
1019
1020         req->cmd_type = REQ_TYPE_DRV_PRIV;
1021         req->cmd_flags |= REQ_FAILFAST_DRIVER;
1022         req->__data_len = 0;
1023         req->__sector = (sector_t) -1;
1024         req->bio = req->biotail = NULL;
1025
1026         req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1027
1028         req->cmd = (unsigned char *)cmd;
1029         req->cmd_len = sizeof(struct nvme_command);
1030         req->special = (void *)0;
1031
1032         if (buffer && bufflen) {
1033                 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1034                 if (ret)
1035                         goto out;
1036         } else if (ubuffer && bufflen) {
1037                 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1038                 if (ret)
1039                         goto out;
1040                 bio = req->bio;
1041         }
1042
1043         blk_execute_rq(req->q, NULL, req, 0);
1044         if (bio)
1045                 blk_rq_unmap_user(bio);
1046         if (result)
1047                 *result = (u32)(uintptr_t)req->special;
1048         ret = req->errors;
1049  out:
1050         blk_mq_free_request(req);
1051         return ret;
1052 }
1053
1054 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1055                 void *buffer, unsigned bufflen)
1056 {
1057         return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1058 }
1059
1060 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1061 {
1062         struct nvme_queue *nvmeq = dev->queues[0];
1063         struct nvme_command c;
1064         struct nvme_cmd_info *cmd_info;
1065         struct request *req;
1066
1067         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1068         if (IS_ERR(req))
1069                 return PTR_ERR(req);
1070
1071         req->cmd_flags |= REQ_NO_TIMEOUT;
1072         cmd_info = blk_mq_rq_to_pdu(req);
1073         nvme_set_info(cmd_info, NULL, async_req_completion);
1074
1075         memset(&c, 0, sizeof(c));
1076         c.common.opcode = nvme_admin_async_event;
1077         c.common.command_id = req->tag;
1078
1079         blk_mq_free_request(req);
1080         return __nvme_submit_cmd(nvmeq, &c);
1081 }
1082
1083 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1084                         struct nvme_command *cmd,
1085                         struct async_cmd_info *cmdinfo, unsigned timeout)
1086 {
1087         struct nvme_queue *nvmeq = dev->queues[0];
1088         struct request *req;
1089         struct nvme_cmd_info *cmd_rq;
1090
1091         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1092         if (IS_ERR(req))
1093                 return PTR_ERR(req);
1094
1095         req->timeout = timeout;
1096         cmd_rq = blk_mq_rq_to_pdu(req);
1097         cmdinfo->req = req;
1098         nvme_set_info(cmd_rq, cmdinfo, async_completion);
1099         cmdinfo->status = -EINTR;
1100
1101         cmd->common.command_id = req->tag;
1102
1103         return nvme_submit_cmd(nvmeq, cmd);
1104 }
1105
1106 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1107 {
1108         struct nvme_command c;
1109
1110         memset(&c, 0, sizeof(c));
1111         c.delete_queue.opcode = opcode;
1112         c.delete_queue.qid = cpu_to_le16(id);
1113
1114         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1115 }
1116
1117 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1118                                                 struct nvme_queue *nvmeq)
1119 {
1120         struct nvme_command c;
1121         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1122
1123         /*
1124          * Note: we (ab)use the fact the the prp fields survive if no data
1125          * is attached to the request.
1126          */
1127         memset(&c, 0, sizeof(c));
1128         c.create_cq.opcode = nvme_admin_create_cq;
1129         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1130         c.create_cq.cqid = cpu_to_le16(qid);
1131         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1132         c.create_cq.cq_flags = cpu_to_le16(flags);
1133         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1134
1135         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1136 }
1137
1138 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1139                                                 struct nvme_queue *nvmeq)
1140 {
1141         struct nvme_command c;
1142         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1143
1144         /*
1145          * Note: we (ab)use the fact the the prp fields survive if no data
1146          * is attached to the request.
1147          */
1148         memset(&c, 0, sizeof(c));
1149         c.create_sq.opcode = nvme_admin_create_sq;
1150         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1151         c.create_sq.sqid = cpu_to_le16(qid);
1152         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1153         c.create_sq.sq_flags = cpu_to_le16(flags);
1154         c.create_sq.cqid = cpu_to_le16(qid);
1155
1156         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1157 }
1158
1159 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1160 {
1161         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1162 }
1163
1164 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1165 {
1166         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1167 }
1168
1169 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1170 {
1171         struct nvme_command c = {
1172                 .identify.opcode = nvme_admin_identify,
1173                 .identify.cns = cpu_to_le32(1),
1174         };
1175         int error;
1176
1177         *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1178         if (!*id)
1179                 return -ENOMEM;
1180
1181         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1182                         sizeof(struct nvme_id_ctrl));
1183         if (error)
1184                 kfree(*id);
1185         return error;
1186 }
1187
1188 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1189                 struct nvme_id_ns **id)
1190 {
1191         struct nvme_command c = {
1192                 .identify.opcode = nvme_admin_identify,
1193                 .identify.nsid = cpu_to_le32(nsid),
1194         };
1195         int error;
1196
1197         *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1198         if (!*id)
1199                 return -ENOMEM;
1200
1201         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1202                         sizeof(struct nvme_id_ns));
1203         if (error)
1204                 kfree(*id);
1205         return error;
1206 }
1207
1208 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1209                                         dma_addr_t dma_addr, u32 *result)
1210 {
1211         struct nvme_command c;
1212
1213         memset(&c, 0, sizeof(c));
1214         c.features.opcode = nvme_admin_get_features;
1215         c.features.nsid = cpu_to_le32(nsid);
1216         c.features.prp1 = cpu_to_le64(dma_addr);
1217         c.features.fid = cpu_to_le32(fid);
1218
1219         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1220                         result, 0);
1221 }
1222
1223 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1224                                         dma_addr_t dma_addr, u32 *result)
1225 {
1226         struct nvme_command c;
1227
1228         memset(&c, 0, sizeof(c));
1229         c.features.opcode = nvme_admin_set_features;
1230         c.features.prp1 = cpu_to_le64(dma_addr);
1231         c.features.fid = cpu_to_le32(fid);
1232         c.features.dword11 = cpu_to_le32(dword11);
1233
1234         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1235                         result, 0);
1236 }
1237
1238 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1239 {
1240         struct nvme_command c = {
1241                 .common.opcode = nvme_admin_get_log_page,
1242                 .common.nsid = cpu_to_le32(0xFFFFFFFF),
1243                 .common.cdw10[0] = cpu_to_le32(
1244                         (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1245                          NVME_LOG_SMART),
1246         };
1247         int error;
1248
1249         *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1250         if (!*log)
1251                 return -ENOMEM;
1252
1253         error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1254                         sizeof(struct nvme_smart_log));
1255         if (error)
1256                 kfree(*log);
1257         return error;
1258 }
1259
1260 /**
1261  * nvme_abort_req - Attempt aborting a request
1262  *
1263  * Schedule controller reset if the command was already aborted once before and
1264  * still hasn't been returned to the driver, or if this is the admin queue.
1265  */
1266 static void nvme_abort_req(struct request *req)
1267 {
1268         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1269         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1270         struct nvme_dev *dev = nvmeq->dev;
1271         struct request *abort_req;
1272         struct nvme_cmd_info *abort_cmd;
1273         struct nvme_command cmd;
1274
1275         if (!nvmeq->qid || cmd_rq->aborted) {
1276                 unsigned long flags;
1277
1278                 spin_lock_irqsave(&dev_list_lock, flags);
1279                 if (work_busy(&dev->reset_work))
1280                         goto out;
1281                 list_del_init(&dev->node);
1282                 dev_warn(dev->dev, "I/O %d QID %d timeout, reset controller\n",
1283                                                         req->tag, nvmeq->qid);
1284                 dev->reset_workfn = nvme_reset_failed_dev;
1285                 queue_work(nvme_workq, &dev->reset_work);
1286  out:
1287                 spin_unlock_irqrestore(&dev_list_lock, flags);
1288                 return;
1289         }
1290
1291         if (!dev->abort_limit)
1292                 return;
1293
1294         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1295                                                                         false);
1296         if (IS_ERR(abort_req))
1297                 return;
1298
1299         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1300         nvme_set_info(abort_cmd, abort_req, abort_completion);
1301
1302         memset(&cmd, 0, sizeof(cmd));
1303         cmd.abort.opcode = nvme_admin_abort_cmd;
1304         cmd.abort.cid = req->tag;
1305         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1306         cmd.abort.command_id = abort_req->tag;
1307
1308         --dev->abort_limit;
1309         cmd_rq->aborted = 1;
1310
1311         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1312                                                         nvmeq->qid);
1313         if (nvme_submit_cmd(dev->queues[0], &cmd) < 0) {
1314                 dev_warn(nvmeq->q_dmadev,
1315                                 "Could not abort I/O %d QID %d",
1316                                 req->tag, nvmeq->qid);
1317                 blk_mq_free_request(abort_req);
1318         }
1319 }
1320
1321 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1322 {
1323         struct nvme_queue *nvmeq = data;
1324         void *ctx;
1325         nvme_completion_fn fn;
1326         struct nvme_cmd_info *cmd;
1327         struct nvme_completion cqe;
1328
1329         if (!blk_mq_request_started(req))
1330                 return;
1331
1332         cmd = blk_mq_rq_to_pdu(req);
1333
1334         if (cmd->ctx == CMD_CTX_CANCELLED)
1335                 return;
1336
1337         if (blk_queue_dying(req->q))
1338                 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1339         else
1340                 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1341
1342
1343         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1344                                                 req->tag, nvmeq->qid);
1345         ctx = cancel_cmd_info(cmd, &fn);
1346         fn(nvmeq, ctx, &cqe);
1347 }
1348
1349 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1350 {
1351         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1352         struct nvme_queue *nvmeq = cmd->nvmeq;
1353
1354         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1355                                                         nvmeq->qid);
1356         spin_lock_irq(&nvmeq->q_lock);
1357         nvme_abort_req(req);
1358         spin_unlock_irq(&nvmeq->q_lock);
1359
1360         /*
1361          * The aborted req will be completed on receiving the abort req.
1362          * We enable the timer again. If hit twice, it'll cause a device reset,
1363          * as the device then is in a faulty state.
1364          */
1365         return BLK_EH_RESET_TIMER;
1366 }
1367
1368 static void nvme_free_queue(struct nvme_queue *nvmeq)
1369 {
1370         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1371                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1372         dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1373                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1374         kfree(nvmeq);
1375 }
1376
1377 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1378 {
1379         int i;
1380
1381         for (i = dev->queue_count - 1; i >= lowest; i--) {
1382                 struct nvme_queue *nvmeq = dev->queues[i];
1383                 dev->queue_count--;
1384                 dev->queues[i] = NULL;
1385                 nvme_free_queue(nvmeq);
1386         }
1387 }
1388
1389 /**
1390  * nvme_suspend_queue - put queue into suspended state
1391  * @nvmeq - queue to suspend
1392  */
1393 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1394 {
1395         int vector;
1396
1397         spin_lock_irq(&nvmeq->q_lock);
1398         if (nvmeq->cq_vector == -1) {
1399                 spin_unlock_irq(&nvmeq->q_lock);
1400                 return 1;
1401         }
1402         vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1403         nvmeq->dev->online_queues--;
1404         nvmeq->cq_vector = -1;
1405         spin_unlock_irq(&nvmeq->q_lock);
1406
1407         if (!nvmeq->qid && nvmeq->dev->admin_q)
1408                 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1409
1410         irq_set_affinity_hint(vector, NULL);
1411         free_irq(vector, nvmeq);
1412
1413         return 0;
1414 }
1415
1416 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1417 {
1418         spin_lock_irq(&nvmeq->q_lock);
1419         if (nvmeq->tags && *nvmeq->tags)
1420                 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1421         spin_unlock_irq(&nvmeq->q_lock);
1422 }
1423
1424 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1425 {
1426         struct nvme_queue *nvmeq = dev->queues[qid];
1427
1428         if (!nvmeq)
1429                 return;
1430         if (nvme_suspend_queue(nvmeq))
1431                 return;
1432
1433         /* Don't tell the adapter to delete the admin queue.
1434          * Don't tell a removed adapter to delete IO queues. */
1435         if (qid && readl(&dev->bar->csts) != -1) {
1436                 adapter_delete_sq(dev, qid);
1437                 adapter_delete_cq(dev, qid);
1438         }
1439
1440         spin_lock_irq(&nvmeq->q_lock);
1441         nvme_process_cq(nvmeq);
1442         spin_unlock_irq(&nvmeq->q_lock);
1443 }
1444
1445 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1446                                                         int depth)
1447 {
1448         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1449         if (!nvmeq)
1450                 return NULL;
1451
1452         nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1453                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1454         if (!nvmeq->cqes)
1455                 goto free_nvmeq;
1456
1457         nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1458                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1459         if (!nvmeq->sq_cmds)
1460                 goto free_cqdma;
1461
1462         nvmeq->q_dmadev = dev->dev;
1463         nvmeq->dev = dev;
1464         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1465                         dev->instance, qid);
1466         spin_lock_init(&nvmeq->q_lock);
1467         nvmeq->cq_head = 0;
1468         nvmeq->cq_phase = 1;
1469         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1470         nvmeq->q_depth = depth;
1471         nvmeq->qid = qid;
1472         dev->queues[qid] = nvmeq;
1473
1474         /* make sure queue descriptor is set before queue count, for kthread */
1475         mb();
1476         dev->queue_count++;
1477
1478         return nvmeq;
1479
1480  free_cqdma:
1481         dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1482                                                         nvmeq->cq_dma_addr);
1483  free_nvmeq:
1484         kfree(nvmeq);
1485         return NULL;
1486 }
1487
1488 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1489                                                         const char *name)
1490 {
1491         if (use_threaded_interrupts)
1492                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1493                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1494                                         name, nvmeq);
1495         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1496                                 IRQF_SHARED, name, nvmeq);
1497 }
1498
1499 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1500 {
1501         struct nvme_dev *dev = nvmeq->dev;
1502
1503         spin_lock_irq(&nvmeq->q_lock);
1504         nvmeq->sq_tail = 0;
1505         nvmeq->cq_head = 0;
1506         nvmeq->cq_phase = 1;
1507         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1508         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1509         dev->online_queues++;
1510         spin_unlock_irq(&nvmeq->q_lock);
1511 }
1512
1513 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1514 {
1515         struct nvme_dev *dev = nvmeq->dev;
1516         int result;
1517
1518         nvmeq->cq_vector = qid - 1;
1519         result = adapter_alloc_cq(dev, qid, nvmeq);
1520         if (result < 0)
1521                 return result;
1522
1523         result = adapter_alloc_sq(dev, qid, nvmeq);
1524         if (result < 0)
1525                 goto release_cq;
1526
1527         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1528         if (result < 0)
1529                 goto release_sq;
1530
1531         nvme_init_queue(nvmeq, qid);
1532         return result;
1533
1534  release_sq:
1535         adapter_delete_sq(dev, qid);
1536  release_cq:
1537         adapter_delete_cq(dev, qid);
1538         return result;
1539 }
1540
1541 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1542 {
1543         unsigned long timeout;
1544         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1545
1546         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1547
1548         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1549                 msleep(100);
1550                 if (fatal_signal_pending(current))
1551                         return -EINTR;
1552                 if (time_after(jiffies, timeout)) {
1553                         dev_err(dev->dev,
1554                                 "Device not ready; aborting %s\n", enabled ?
1555                                                 "initialisation" : "reset");
1556                         return -ENODEV;
1557                 }
1558         }
1559
1560         return 0;
1561 }
1562
1563 /*
1564  * If the device has been passed off to us in an enabled state, just clear
1565  * the enabled bit.  The spec says we should set the 'shutdown notification
1566  * bits', but doing so may cause the device to complete commands to the
1567  * admin queue ... and we don't know what memory that might be pointing at!
1568  */
1569 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1570 {
1571         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1572         dev->ctrl_config &= ~NVME_CC_ENABLE;
1573         writel(dev->ctrl_config, &dev->bar->cc);
1574
1575         return nvme_wait_ready(dev, cap, false);
1576 }
1577
1578 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1579 {
1580         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1581         dev->ctrl_config |= NVME_CC_ENABLE;
1582         writel(dev->ctrl_config, &dev->bar->cc);
1583
1584         return nvme_wait_ready(dev, cap, true);
1585 }
1586
1587 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1588 {
1589         unsigned long timeout;
1590
1591         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1592         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1593
1594         writel(dev->ctrl_config, &dev->bar->cc);
1595
1596         timeout = SHUTDOWN_TIMEOUT + jiffies;
1597         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1598                                                         NVME_CSTS_SHST_CMPLT) {
1599                 msleep(100);
1600                 if (fatal_signal_pending(current))
1601                         return -EINTR;
1602                 if (time_after(jiffies, timeout)) {
1603                         dev_err(dev->dev,
1604                                 "Device shutdown incomplete; abort shutdown\n");
1605                         return -ENODEV;
1606                 }
1607         }
1608
1609         return 0;
1610 }
1611
1612 static struct blk_mq_ops nvme_mq_admin_ops = {
1613         .queue_rq       = nvme_queue_rq,
1614         .map_queue      = blk_mq_map_queue,
1615         .init_hctx      = nvme_admin_init_hctx,
1616         .exit_hctx      = nvme_admin_exit_hctx,
1617         .init_request   = nvme_admin_init_request,
1618         .timeout        = nvme_timeout,
1619 };
1620
1621 static struct blk_mq_ops nvme_mq_ops = {
1622         .queue_rq       = nvme_queue_rq,
1623         .map_queue      = blk_mq_map_queue,
1624         .init_hctx      = nvme_init_hctx,
1625         .init_request   = nvme_init_request,
1626         .timeout        = nvme_timeout,
1627 };
1628
1629 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1630 {
1631         if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1632                 blk_cleanup_queue(dev->admin_q);
1633                 blk_mq_free_tag_set(&dev->admin_tagset);
1634         }
1635 }
1636
1637 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1638 {
1639         if (!dev->admin_q) {
1640                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1641                 dev->admin_tagset.nr_hw_queues = 1;
1642                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1643                 dev->admin_tagset.reserved_tags = 1;
1644                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1645                 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1646                 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1647                 dev->admin_tagset.driver_data = dev;
1648
1649                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1650                         return -ENOMEM;
1651
1652                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1653                 if (IS_ERR(dev->admin_q)) {
1654                         blk_mq_free_tag_set(&dev->admin_tagset);
1655                         return -ENOMEM;
1656                 }
1657                 if (!blk_get_queue(dev->admin_q)) {
1658                         nvme_dev_remove_admin(dev);
1659                         dev->admin_q = NULL;
1660                         return -ENODEV;
1661                 }
1662         } else
1663                 blk_mq_unfreeze_queue(dev->admin_q);
1664
1665         return 0;
1666 }
1667
1668 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1669 {
1670         int result;
1671         u32 aqa;
1672         u64 cap = readq(&dev->bar->cap);
1673         struct nvme_queue *nvmeq;
1674         unsigned page_shift = PAGE_SHIFT;
1675         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1676         unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1677
1678         if (page_shift < dev_page_min) {
1679                 dev_err(dev->dev,
1680                                 "Minimum device page size (%u) too large for "
1681                                 "host (%u)\n", 1 << dev_page_min,
1682                                 1 << page_shift);
1683                 return -ENODEV;
1684         }
1685         if (page_shift > dev_page_max) {
1686                 dev_info(dev->dev,
1687                                 "Device maximum page size (%u) smaller than "
1688                                 "host (%u); enabling work-around\n",
1689                                 1 << dev_page_max, 1 << page_shift);
1690                 page_shift = dev_page_max;
1691         }
1692
1693         result = nvme_disable_ctrl(dev, cap);
1694         if (result < 0)
1695                 return result;
1696
1697         nvmeq = dev->queues[0];
1698         if (!nvmeq) {
1699                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1700                 if (!nvmeq)
1701                         return -ENOMEM;
1702         }
1703
1704         aqa = nvmeq->q_depth - 1;
1705         aqa |= aqa << 16;
1706
1707         dev->page_size = 1 << page_shift;
1708
1709         dev->ctrl_config = NVME_CC_CSS_NVM;
1710         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1711         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1712         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1713
1714         writel(aqa, &dev->bar->aqa);
1715         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1716         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1717
1718         result = nvme_enable_ctrl(dev, cap);
1719         if (result)
1720                 goto free_nvmeq;
1721
1722         nvmeq->cq_vector = 0;
1723         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1724         if (result)
1725                 goto free_nvmeq;
1726
1727         return result;
1728
1729  free_nvmeq:
1730         nvme_free_queues(dev, 0);
1731         return result;
1732 }
1733
1734 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1735 {
1736         struct nvme_dev *dev = ns->dev;
1737         struct nvme_user_io io;
1738         struct nvme_command c;
1739         unsigned length, meta_len;
1740         int status, write;
1741         dma_addr_t meta_dma = 0;
1742         void *meta = NULL;
1743         void __user *metadata;
1744
1745         if (copy_from_user(&io, uio, sizeof(io)))
1746                 return -EFAULT;
1747
1748         switch (io.opcode) {
1749         case nvme_cmd_write:
1750         case nvme_cmd_read:
1751         case nvme_cmd_compare:
1752                 break;
1753         default:
1754                 return -EINVAL;
1755         }
1756
1757         length = (io.nblocks + 1) << ns->lba_shift;
1758         meta_len = (io.nblocks + 1) * ns->ms;
1759         metadata = (void __user *)(unsigned long)io.metadata;
1760         write = io.opcode & 1;
1761
1762         if (ns->ext) {
1763                 length += meta_len;
1764                 meta_len = 0;
1765         }
1766         if (meta_len) {
1767                 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1768                         return -EINVAL;
1769
1770                 meta = dma_alloc_coherent(dev->dev, meta_len,
1771                                                 &meta_dma, GFP_KERNEL);
1772
1773                 if (!meta) {
1774                         status = -ENOMEM;
1775                         goto unmap;
1776                 }
1777                 if (write) {
1778                         if (copy_from_user(meta, metadata, meta_len)) {
1779                                 status = -EFAULT;
1780                                 goto unmap;
1781                         }
1782                 }
1783         }
1784
1785         memset(&c, 0, sizeof(c));
1786         c.rw.opcode = io.opcode;
1787         c.rw.flags = io.flags;
1788         c.rw.nsid = cpu_to_le32(ns->ns_id);
1789         c.rw.slba = cpu_to_le64(io.slba);
1790         c.rw.length = cpu_to_le16(io.nblocks);
1791         c.rw.control = cpu_to_le16(io.control);
1792         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1793         c.rw.reftag = cpu_to_le32(io.reftag);
1794         c.rw.apptag = cpu_to_le16(io.apptag);
1795         c.rw.appmask = cpu_to_le16(io.appmask);
1796         c.rw.metadata = cpu_to_le64(meta_dma);
1797
1798         status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1799                         (void __user *)io.addr, length, NULL, 0);
1800  unmap:
1801         if (meta) {
1802                 if (status == NVME_SC_SUCCESS && !write) {
1803                         if (copy_to_user(metadata, meta, meta_len))
1804                                 status = -EFAULT;
1805                 }
1806                 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1807         }
1808         return status;
1809 }
1810
1811 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1812                         struct nvme_passthru_cmd __user *ucmd)
1813 {
1814         struct nvme_passthru_cmd cmd;
1815         struct nvme_command c;
1816         unsigned timeout = 0;
1817         int status;
1818
1819         if (!capable(CAP_SYS_ADMIN))
1820                 return -EACCES;
1821         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1822                 return -EFAULT;
1823
1824         memset(&c, 0, sizeof(c));
1825         c.common.opcode = cmd.opcode;
1826         c.common.flags = cmd.flags;
1827         c.common.nsid = cpu_to_le32(cmd.nsid);
1828         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1829         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1830         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1831         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1832         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1833         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1834         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1835         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1836
1837         if (cmd.timeout_ms)
1838                 timeout = msecs_to_jiffies(cmd.timeout_ms);
1839
1840         status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1841                         NULL, (void __user *)cmd.addr, cmd.data_len,
1842                         &cmd.result, timeout);
1843         if (status >= 0) {
1844                 if (put_user(cmd.result, &ucmd->result))
1845                         return -EFAULT;
1846         }
1847
1848         return status;
1849 }
1850
1851 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1852                                                         unsigned long arg)
1853 {
1854         struct nvme_ns *ns = bdev->bd_disk->private_data;
1855
1856         switch (cmd) {
1857         case NVME_IOCTL_ID:
1858                 force_successful_syscall_return();
1859                 return ns->ns_id;
1860         case NVME_IOCTL_ADMIN_CMD:
1861                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1862         case NVME_IOCTL_IO_CMD:
1863                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1864         case NVME_IOCTL_SUBMIT_IO:
1865                 return nvme_submit_io(ns, (void __user *)arg);
1866         case SG_GET_VERSION_NUM:
1867                 return nvme_sg_get_version_num((void __user *)arg);
1868         case SG_IO:
1869                 return nvme_sg_io(ns, (void __user *)arg);
1870         default:
1871                 return -ENOTTY;
1872         }
1873 }
1874
1875 #ifdef CONFIG_COMPAT
1876 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1877                                         unsigned int cmd, unsigned long arg)
1878 {
1879         switch (cmd) {
1880         case SG_IO:
1881                 return -ENOIOCTLCMD;
1882         }
1883         return nvme_ioctl(bdev, mode, cmd, arg);
1884 }
1885 #else
1886 #define nvme_compat_ioctl       NULL
1887 #endif
1888
1889 static int nvme_open(struct block_device *bdev, fmode_t mode)
1890 {
1891         int ret = 0;
1892         struct nvme_ns *ns;
1893
1894         spin_lock(&dev_list_lock);
1895         ns = bdev->bd_disk->private_data;
1896         if (!ns)
1897                 ret = -ENXIO;
1898         else if (!kref_get_unless_zero(&ns->dev->kref))
1899                 ret = -ENXIO;
1900         spin_unlock(&dev_list_lock);
1901
1902         return ret;
1903 }
1904
1905 static void nvme_free_dev(struct kref *kref);
1906
1907 static void nvme_release(struct gendisk *disk, fmode_t mode)
1908 {
1909         struct nvme_ns *ns = disk->private_data;
1910         struct nvme_dev *dev = ns->dev;
1911
1912         kref_put(&dev->kref, nvme_free_dev);
1913 }
1914
1915 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1916 {
1917         /* some standard values */
1918         geo->heads = 1 << 6;
1919         geo->sectors = 1 << 5;
1920         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1921         return 0;
1922 }
1923
1924 static void nvme_config_discard(struct nvme_ns *ns)
1925 {
1926         u32 logical_block_size = queue_logical_block_size(ns->queue);
1927         ns->queue->limits.discard_zeroes_data = 0;
1928         ns->queue->limits.discard_alignment = logical_block_size;
1929         ns->queue->limits.discard_granularity = logical_block_size;
1930         ns->queue->limits.max_discard_sectors = 0xffffffff;
1931         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1932 }
1933
1934 static int nvme_revalidate_disk(struct gendisk *disk)
1935 {
1936         struct nvme_ns *ns = disk->private_data;
1937         struct nvme_dev *dev = ns->dev;
1938         struct nvme_id_ns *id;
1939         u8 lbaf, pi_type;
1940         u16 old_ms;
1941         unsigned short bs;
1942
1943         if (nvme_identify_ns(dev, ns->ns_id, &id)) {
1944                 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
1945                                                 dev->instance, ns->ns_id);
1946                 return -ENODEV;
1947         }
1948         if (id->ncap == 0) {
1949                 kfree(id);
1950                 return -ENODEV;
1951         }
1952
1953         old_ms = ns->ms;
1954         lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
1955         ns->lba_shift = id->lbaf[lbaf].ds;
1956         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1957         ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
1958
1959         /*
1960          * If identify namespace failed, use default 512 byte block size so
1961          * block layer can use before failing read/write for 0 capacity.
1962          */
1963         if (ns->lba_shift == 0)
1964                 ns->lba_shift = 9;
1965         bs = 1 << ns->lba_shift;
1966
1967         /* XXX: PI implementation requires metadata equal t10 pi tuple size */
1968         pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
1969                                         id->dps & NVME_NS_DPS_PI_MASK : 0;
1970
1971         if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
1972                                 ns->ms != old_ms ||
1973                                 bs != queue_logical_block_size(disk->queue) ||
1974                                 (ns->ms && ns->ext)))
1975                 blk_integrity_unregister(disk);
1976
1977         ns->pi_type = pi_type;
1978         blk_queue_logical_block_size(ns->queue, bs);
1979
1980         if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
1981                                                                 !ns->ext)
1982                 nvme_init_integrity(ns);
1983
1984         if (ns->ms && !blk_get_integrity(disk))
1985                 set_capacity(disk, 0);
1986         else
1987                 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1988
1989         if (dev->oncs & NVME_CTRL_ONCS_DSM)
1990                 nvme_config_discard(ns);
1991
1992         kfree(id);
1993         return 0;
1994 }
1995
1996 static const struct block_device_operations nvme_fops = {
1997         .owner          = THIS_MODULE,
1998         .ioctl          = nvme_ioctl,
1999         .compat_ioctl   = nvme_compat_ioctl,
2000         .open           = nvme_open,
2001         .release        = nvme_release,
2002         .getgeo         = nvme_getgeo,
2003         .revalidate_disk= nvme_revalidate_disk,
2004 };
2005
2006 static int nvme_kthread(void *data)
2007 {
2008         struct nvme_dev *dev, *next;
2009
2010         while (!kthread_should_stop()) {
2011                 set_current_state(TASK_INTERRUPTIBLE);
2012                 spin_lock(&dev_list_lock);
2013                 list_for_each_entry_safe(dev, next, &dev_list, node) {
2014                         int i;
2015                         if (readl(&dev->bar->csts) & NVME_CSTS_CFS) {
2016                                 if (work_busy(&dev->reset_work))
2017                                         continue;
2018                                 list_del_init(&dev->node);
2019                                 dev_warn(dev->dev,
2020                                         "Failed status: %x, reset controller\n",
2021                                         readl(&dev->bar->csts));
2022                                 dev->reset_workfn = nvme_reset_failed_dev;
2023                                 queue_work(nvme_workq, &dev->reset_work);
2024                                 continue;
2025                         }
2026                         for (i = 0; i < dev->queue_count; i++) {
2027                                 struct nvme_queue *nvmeq = dev->queues[i];
2028                                 if (!nvmeq)
2029                                         continue;
2030                                 spin_lock_irq(&nvmeq->q_lock);
2031                                 nvme_process_cq(nvmeq);
2032
2033                                 while ((i == 0) && (dev->event_limit > 0)) {
2034                                         if (nvme_submit_async_admin_req(dev))
2035                                                 break;
2036                                         dev->event_limit--;
2037                                 }
2038                                 spin_unlock_irq(&nvmeq->q_lock);
2039                         }
2040                 }
2041                 spin_unlock(&dev_list_lock);
2042                 schedule_timeout(round_jiffies_relative(HZ));
2043         }
2044         return 0;
2045 }
2046
2047 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2048 {
2049         struct nvme_ns *ns;
2050         struct gendisk *disk;
2051         int node = dev_to_node(dev->dev);
2052
2053         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2054         if (!ns)
2055                 return;
2056
2057         ns->queue = blk_mq_init_queue(&dev->tagset);
2058         if (IS_ERR(ns->queue))
2059                 goto out_free_ns;
2060         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2061         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2062         queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS, ns->queue);
2063         ns->dev = dev;
2064         ns->queue->queuedata = ns;
2065
2066         disk = alloc_disk_node(0, node);
2067         if (!disk)
2068                 goto out_free_queue;
2069
2070         ns->ns_id = nsid;
2071         ns->disk = disk;
2072         ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2073         list_add_tail(&ns->list, &dev->namespaces);
2074
2075         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2076         if (dev->max_hw_sectors)
2077                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2078         if (dev->stripe_size)
2079                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2080         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2081                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2082
2083         disk->major = nvme_major;
2084         disk->first_minor = 0;
2085         disk->fops = &nvme_fops;
2086         disk->private_data = ns;
2087         disk->queue = ns->queue;
2088         disk->driverfs_dev = dev->device;
2089         disk->flags = GENHD_FL_EXT_DEVT;
2090         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2091
2092         /*
2093          * Initialize capacity to 0 until we establish the namespace format and
2094          * setup integrity extentions if necessary. The revalidate_disk after
2095          * add_disk allows the driver to register with integrity if the format
2096          * requires it.
2097          */
2098         set_capacity(disk, 0);
2099         if (nvme_revalidate_disk(ns->disk))
2100                 goto out_free_disk;
2101
2102         add_disk(ns->disk);
2103         if (ns->ms)
2104                 revalidate_disk(ns->disk);
2105         return;
2106  out_free_disk:
2107         kfree(disk);
2108         list_del(&ns->list);
2109  out_free_queue:
2110         blk_cleanup_queue(ns->queue);
2111  out_free_ns:
2112         kfree(ns);
2113 }
2114
2115 static void nvme_create_io_queues(struct nvme_dev *dev)
2116 {
2117         unsigned i;
2118
2119         for (i = dev->queue_count; i <= dev->max_qid; i++)
2120                 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2121                         break;
2122
2123         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2124                 if (nvme_create_queue(dev->queues[i], i))
2125                         break;
2126 }
2127
2128 static int set_queue_count(struct nvme_dev *dev, int count)
2129 {
2130         int status;
2131         u32 result;
2132         u32 q_count = (count - 1) | ((count - 1) << 16);
2133
2134         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2135                                                                 &result);
2136         if (status < 0)
2137                 return status;
2138         if (status > 0) {
2139                 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2140                 return 0;
2141         }
2142         return min(result & 0xffff, result >> 16) + 1;
2143 }
2144
2145 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2146 {
2147         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2148 }
2149
2150 static int nvme_setup_io_queues(struct nvme_dev *dev)
2151 {
2152         struct nvme_queue *adminq = dev->queues[0];
2153         struct pci_dev *pdev = to_pci_dev(dev->dev);
2154         int result, i, vecs, nr_io_queues, size;
2155
2156         nr_io_queues = num_possible_cpus();
2157         result = set_queue_count(dev, nr_io_queues);
2158         if (result <= 0)
2159                 return result;
2160         if (result < nr_io_queues)
2161                 nr_io_queues = result;
2162
2163         size = db_bar_size(dev, nr_io_queues);
2164         if (size > 8192) {
2165                 iounmap(dev->bar);
2166                 do {
2167                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2168                         if (dev->bar)
2169                                 break;
2170                         if (!--nr_io_queues)
2171                                 return -ENOMEM;
2172                         size = db_bar_size(dev, nr_io_queues);
2173                 } while (1);
2174                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2175                 adminq->q_db = dev->dbs;
2176         }
2177
2178         /* Deregister the admin queue's interrupt */
2179         free_irq(dev->entry[0].vector, adminq);
2180
2181         /*
2182          * If we enable msix early due to not intx, disable it again before
2183          * setting up the full range we need.
2184          */
2185         if (!pdev->irq)
2186                 pci_disable_msix(pdev);
2187
2188         for (i = 0; i < nr_io_queues; i++)
2189                 dev->entry[i].entry = i;
2190         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2191         if (vecs < 0) {
2192                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2193                 if (vecs < 0) {
2194                         vecs = 1;
2195                 } else {
2196                         for (i = 0; i < vecs; i++)
2197                                 dev->entry[i].vector = i + pdev->irq;
2198                 }
2199         }
2200
2201         /*
2202          * Should investigate if there's a performance win from allocating
2203          * more queues than interrupt vectors; it might allow the submission
2204          * path to scale better, even if the receive path is limited by the
2205          * number of interrupts.
2206          */
2207         nr_io_queues = vecs;
2208         dev->max_qid = nr_io_queues;
2209
2210         result = queue_request_irq(dev, adminq, adminq->irqname);
2211         if (result)
2212                 goto free_queues;
2213
2214         /* Free previously allocated queues that are no longer usable */
2215         nvme_free_queues(dev, nr_io_queues + 1);
2216         nvme_create_io_queues(dev);
2217
2218         return 0;
2219
2220  free_queues:
2221         nvme_free_queues(dev, 1);
2222         return result;
2223 }
2224
2225 static void nvme_free_namespace(struct nvme_ns *ns)
2226 {
2227         list_del(&ns->list);
2228
2229         spin_lock(&dev_list_lock);
2230         ns->disk->private_data = NULL;
2231         spin_unlock(&dev_list_lock);
2232
2233         put_disk(ns->disk);
2234         kfree(ns);
2235 }
2236
2237 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2238 {
2239         struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2240         struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2241
2242         return nsa->ns_id - nsb->ns_id;
2243 }
2244
2245 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2246 {
2247         struct nvme_ns *ns;
2248
2249         list_for_each_entry(ns, &dev->namespaces, list) {
2250                 if (ns->ns_id == nsid)
2251                         return ns;
2252                 if (ns->ns_id > nsid)
2253                         break;
2254         }
2255         return NULL;
2256 }
2257
2258 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2259 {
2260         return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2261                                                         dev->online_queues < 2);
2262 }
2263
2264 static void nvme_ns_remove(struct nvme_ns *ns)
2265 {
2266         bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2267
2268         if (kill)
2269                 blk_set_queue_dying(ns->queue);
2270         if (ns->disk->flags & GENHD_FL_UP) {
2271                 if (blk_get_integrity(ns->disk))
2272                         blk_integrity_unregister(ns->disk);
2273                 del_gendisk(ns->disk);
2274         }
2275         if (kill || !blk_queue_dying(ns->queue)) {
2276                 blk_mq_abort_requeue_list(ns->queue);
2277                 blk_cleanup_queue(ns->queue);
2278         }
2279 }
2280
2281 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2282 {
2283         struct nvme_ns *ns, *next;
2284         unsigned i;
2285
2286         for (i = 1; i <= nn; i++) {
2287                 ns = nvme_find_ns(dev, i);
2288                 if (ns) {
2289                         if (revalidate_disk(ns->disk)) {
2290                                 nvme_ns_remove(ns);
2291                                 nvme_free_namespace(ns);
2292                         }
2293                 } else
2294                         nvme_alloc_ns(dev, i);
2295         }
2296         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2297                 if (ns->ns_id > nn) {
2298                         nvme_ns_remove(ns);
2299                         nvme_free_namespace(ns);
2300                 }
2301         }
2302         list_sort(NULL, &dev->namespaces, ns_cmp);
2303 }
2304
2305 static void nvme_dev_scan(struct work_struct *work)
2306 {
2307         struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2308         struct nvme_id_ctrl *ctrl;
2309
2310         if (!dev->tagset.tags)
2311                 return;
2312         if (nvme_identify_ctrl(dev, &ctrl))
2313                 return;
2314         nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2315         kfree(ctrl);
2316 }
2317
2318 /*
2319  * Return: error value if an error occurred setting up the queues or calling
2320  * Identify Device.  0 if these succeeded, even if adding some of the
2321  * namespaces failed.  At the moment, these failures are silent.  TBD which
2322  * failures should be reported.
2323  */
2324 static int nvme_dev_add(struct nvme_dev *dev)
2325 {
2326         struct pci_dev *pdev = to_pci_dev(dev->dev);
2327         int res;
2328         unsigned nn;
2329         struct nvme_id_ctrl *ctrl;
2330         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2331
2332         res = nvme_identify_ctrl(dev, &ctrl);
2333         if (res) {
2334                 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2335                 return -EIO;
2336         }
2337
2338         nn = le32_to_cpup(&ctrl->nn);
2339         dev->oncs = le16_to_cpup(&ctrl->oncs);
2340         dev->abort_limit = ctrl->acl + 1;
2341         dev->vwc = ctrl->vwc;
2342         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2343         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2344         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2345         if (ctrl->mdts)
2346                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2347         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2348                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2349                 unsigned int max_hw_sectors;
2350
2351                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2352                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2353                 if (dev->max_hw_sectors) {
2354                         dev->max_hw_sectors = min(max_hw_sectors,
2355                                                         dev->max_hw_sectors);
2356                 } else
2357                         dev->max_hw_sectors = max_hw_sectors;
2358         }
2359         kfree(ctrl);
2360
2361         dev->tagset.ops = &nvme_mq_ops;
2362         dev->tagset.nr_hw_queues = dev->online_queues - 1;
2363         dev->tagset.timeout = NVME_IO_TIMEOUT;
2364         dev->tagset.numa_node = dev_to_node(dev->dev);
2365         dev->tagset.queue_depth =
2366                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2367         dev->tagset.cmd_size = nvme_cmd_size(dev);
2368         dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2369         dev->tagset.driver_data = dev;
2370
2371         if (blk_mq_alloc_tag_set(&dev->tagset))
2372                 return 0;
2373
2374         schedule_work(&dev->scan_work);
2375         return 0;
2376 }
2377
2378 static int nvme_dev_map(struct nvme_dev *dev)
2379 {
2380         u64 cap;
2381         int bars, result = -ENOMEM;
2382         struct pci_dev *pdev = to_pci_dev(dev->dev);
2383
2384         if (pci_enable_device_mem(pdev))
2385                 return result;
2386
2387         dev->entry[0].vector = pdev->irq;
2388         pci_set_master(pdev);
2389         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2390         if (!bars)
2391                 goto disable_pci;
2392
2393         if (pci_request_selected_regions(pdev, bars, "nvme"))
2394                 goto disable_pci;
2395
2396         if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2397             dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2398                 goto disable;
2399
2400         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2401         if (!dev->bar)
2402                 goto disable;
2403
2404         if (readl(&dev->bar->csts) == -1) {
2405                 result = -ENODEV;
2406                 goto unmap;
2407         }
2408
2409         /*
2410          * Some devices don't advertse INTx interrupts, pre-enable a single
2411          * MSIX vec for setup. We'll adjust this later.
2412          */
2413         if (!pdev->irq) {
2414                 result = pci_enable_msix(pdev, dev->entry, 1);
2415                 if (result < 0)
2416                         goto unmap;
2417         }
2418
2419         cap = readq(&dev->bar->cap);
2420         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2421         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2422         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2423
2424         return 0;
2425
2426  unmap:
2427         iounmap(dev->bar);
2428         dev->bar = NULL;
2429  disable:
2430         pci_release_regions(pdev);
2431  disable_pci:
2432         pci_disable_device(pdev);
2433         return result;
2434 }
2435
2436 static void nvme_dev_unmap(struct nvme_dev *dev)
2437 {
2438         struct pci_dev *pdev = to_pci_dev(dev->dev);
2439
2440         if (pdev->msi_enabled)
2441                 pci_disable_msi(pdev);
2442         else if (pdev->msix_enabled)
2443                 pci_disable_msix(pdev);
2444
2445         if (dev->bar) {
2446                 iounmap(dev->bar);
2447                 dev->bar = NULL;
2448                 pci_release_regions(pdev);
2449         }
2450
2451         if (pci_is_enabled(pdev))
2452                 pci_disable_device(pdev);
2453 }
2454
2455 struct nvme_delq_ctx {
2456         struct task_struct *waiter;
2457         struct kthread_worker *worker;
2458         atomic_t refcount;
2459 };
2460
2461 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2462 {
2463         dq->waiter = current;
2464         mb();
2465
2466         for (;;) {
2467                 set_current_state(TASK_KILLABLE);
2468                 if (!atomic_read(&dq->refcount))
2469                         break;
2470                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2471                                         fatal_signal_pending(current)) {
2472                         /*
2473                          * Disable the controller first since we can't trust it
2474                          * at this point, but leave the admin queue enabled
2475                          * until all queue deletion requests are flushed.
2476                          * FIXME: This may take a while if there are more h/w
2477                          * queues than admin tags.
2478                          */
2479                         set_current_state(TASK_RUNNING);
2480                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2481                         nvme_clear_queue(dev->queues[0]);
2482                         flush_kthread_worker(dq->worker);
2483                         nvme_disable_queue(dev, 0);
2484                         return;
2485                 }
2486         }
2487         set_current_state(TASK_RUNNING);
2488 }
2489
2490 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2491 {
2492         atomic_dec(&dq->refcount);
2493         if (dq->waiter)
2494                 wake_up_process(dq->waiter);
2495 }
2496
2497 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2498 {
2499         atomic_inc(&dq->refcount);
2500         return dq;
2501 }
2502
2503 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2504 {
2505         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2506         nvme_put_dq(dq);
2507 }
2508
2509 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2510                                                 kthread_work_func_t fn)
2511 {
2512         struct nvme_command c;
2513
2514         memset(&c, 0, sizeof(c));
2515         c.delete_queue.opcode = opcode;
2516         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2517
2518         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2519         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2520                                                                 ADMIN_TIMEOUT);
2521 }
2522
2523 static void nvme_del_cq_work_handler(struct kthread_work *work)
2524 {
2525         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2526                                                         cmdinfo.work);
2527         nvme_del_queue_end(nvmeq);
2528 }
2529
2530 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2531 {
2532         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2533                                                 nvme_del_cq_work_handler);
2534 }
2535
2536 static void nvme_del_sq_work_handler(struct kthread_work *work)
2537 {
2538         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2539                                                         cmdinfo.work);
2540         int status = nvmeq->cmdinfo.status;
2541
2542         if (!status)
2543                 status = nvme_delete_cq(nvmeq);
2544         if (status)
2545                 nvme_del_queue_end(nvmeq);
2546 }
2547
2548 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2549 {
2550         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2551                                                 nvme_del_sq_work_handler);
2552 }
2553
2554 static void nvme_del_queue_start(struct kthread_work *work)
2555 {
2556         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2557                                                         cmdinfo.work);
2558         if (nvme_delete_sq(nvmeq))
2559                 nvme_del_queue_end(nvmeq);
2560 }
2561
2562 static void nvme_disable_io_queues(struct nvme_dev *dev)
2563 {
2564         int i;
2565         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2566         struct nvme_delq_ctx dq;
2567         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2568                                         &worker, "nvme%d", dev->instance);
2569
2570         if (IS_ERR(kworker_task)) {
2571                 dev_err(dev->dev,
2572                         "Failed to create queue del task\n");
2573                 for (i = dev->queue_count - 1; i > 0; i--)
2574                         nvme_disable_queue(dev, i);
2575                 return;
2576         }
2577
2578         dq.waiter = NULL;
2579         atomic_set(&dq.refcount, 0);
2580         dq.worker = &worker;
2581         for (i = dev->queue_count - 1; i > 0; i--) {
2582                 struct nvme_queue *nvmeq = dev->queues[i];
2583
2584                 if (nvme_suspend_queue(nvmeq))
2585                         continue;
2586                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2587                 nvmeq->cmdinfo.worker = dq.worker;
2588                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2589                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2590         }
2591         nvme_wait_dq(&dq, dev);
2592         kthread_stop(kworker_task);
2593 }
2594
2595 /*
2596 * Remove the node from the device list and check
2597 * for whether or not we need to stop the nvme_thread.
2598 */
2599 static void nvme_dev_list_remove(struct nvme_dev *dev)
2600 {
2601         struct task_struct *tmp = NULL;
2602
2603         spin_lock(&dev_list_lock);
2604         list_del_init(&dev->node);
2605         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2606                 tmp = nvme_thread;
2607                 nvme_thread = NULL;
2608         }
2609         spin_unlock(&dev_list_lock);
2610
2611         if (tmp)
2612                 kthread_stop(tmp);
2613 }
2614
2615 static void nvme_freeze_queues(struct nvme_dev *dev)
2616 {
2617         struct nvme_ns *ns;
2618
2619         list_for_each_entry(ns, &dev->namespaces, list) {
2620                 blk_mq_freeze_queue_start(ns->queue);
2621
2622                 spin_lock_irq(ns->queue->queue_lock);
2623                 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2624                 spin_unlock_irq(ns->queue->queue_lock);
2625
2626                 blk_mq_cancel_requeue_work(ns->queue);
2627                 blk_mq_stop_hw_queues(ns->queue);
2628         }
2629 }
2630
2631 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2632 {
2633         struct nvme_ns *ns;
2634
2635         list_for_each_entry(ns, &dev->namespaces, list) {
2636                 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2637                 blk_mq_unfreeze_queue(ns->queue);
2638                 blk_mq_start_stopped_hw_queues(ns->queue, true);
2639                 blk_mq_kick_requeue_list(ns->queue);
2640         }
2641 }
2642
2643 static void nvme_dev_shutdown(struct nvme_dev *dev)
2644 {
2645         int i;
2646         u32 csts = -1;
2647
2648         nvme_dev_list_remove(dev);
2649
2650         if (dev->bar) {
2651                 nvme_freeze_queues(dev);
2652                 csts = readl(&dev->bar->csts);
2653         }
2654         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2655                 for (i = dev->queue_count - 1; i >= 0; i--) {
2656                         struct nvme_queue *nvmeq = dev->queues[i];
2657                         nvme_suspend_queue(nvmeq);
2658                 }
2659         } else {
2660                 nvme_disable_io_queues(dev);
2661                 nvme_shutdown_ctrl(dev);
2662                 nvme_disable_queue(dev, 0);
2663         }
2664         nvme_dev_unmap(dev);
2665
2666         for (i = dev->queue_count - 1; i >= 0; i--)
2667                 nvme_clear_queue(dev->queues[i]);
2668 }
2669
2670 static void nvme_dev_remove(struct nvme_dev *dev)
2671 {
2672         struct nvme_ns *ns;
2673
2674         list_for_each_entry(ns, &dev->namespaces, list)
2675                 nvme_ns_remove(ns);
2676 }
2677
2678 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2679 {
2680         dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2681                                                 PAGE_SIZE, PAGE_SIZE, 0);
2682         if (!dev->prp_page_pool)
2683                 return -ENOMEM;
2684
2685         /* Optimisation for I/Os between 4k and 128k */
2686         dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2687                                                 256, 256, 0);
2688         if (!dev->prp_small_pool) {
2689                 dma_pool_destroy(dev->prp_page_pool);
2690                 return -ENOMEM;
2691         }
2692         return 0;
2693 }
2694
2695 static void nvme_release_prp_pools(struct nvme_dev *dev)
2696 {
2697         dma_pool_destroy(dev->prp_page_pool);
2698         dma_pool_destroy(dev->prp_small_pool);
2699 }
2700
2701 static DEFINE_IDA(nvme_instance_ida);
2702
2703 static int nvme_set_instance(struct nvme_dev *dev)
2704 {
2705         int instance, error;
2706
2707         do {
2708                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2709                         return -ENODEV;
2710
2711                 spin_lock(&dev_list_lock);
2712                 error = ida_get_new(&nvme_instance_ida, &instance);
2713                 spin_unlock(&dev_list_lock);
2714         } while (error == -EAGAIN);
2715
2716         if (error)
2717                 return -ENODEV;
2718
2719         dev->instance = instance;
2720         return 0;
2721 }
2722
2723 static void nvme_release_instance(struct nvme_dev *dev)
2724 {
2725         spin_lock(&dev_list_lock);
2726         ida_remove(&nvme_instance_ida, dev->instance);
2727         spin_unlock(&dev_list_lock);
2728 }
2729
2730 static void nvme_free_namespaces(struct nvme_dev *dev)
2731 {
2732         struct nvme_ns *ns, *next;
2733
2734         list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2735                 nvme_free_namespace(ns);
2736 }
2737
2738 static void nvme_free_dev(struct kref *kref)
2739 {
2740         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2741
2742         put_device(dev->dev);
2743         put_device(dev->device);
2744         nvme_free_namespaces(dev);
2745         nvme_release_instance(dev);
2746         if (dev->tagset.tags)
2747                 blk_mq_free_tag_set(&dev->tagset);
2748         if (dev->admin_q)
2749                 blk_put_queue(dev->admin_q);
2750         kfree(dev->queues);
2751         kfree(dev->entry);
2752         kfree(dev);
2753 }
2754
2755 static int nvme_dev_open(struct inode *inode, struct file *f)
2756 {
2757         struct nvme_dev *dev;
2758         int instance = iminor(inode);
2759         int ret = -ENODEV;
2760
2761         spin_lock(&dev_list_lock);
2762         list_for_each_entry(dev, &dev_list, node) {
2763                 if (dev->instance == instance) {
2764                         if (!dev->admin_q) {
2765                                 ret = -EWOULDBLOCK;
2766                                 break;
2767                         }
2768                         if (!kref_get_unless_zero(&dev->kref))
2769                                 break;
2770                         f->private_data = dev;
2771                         ret = 0;
2772                         break;
2773                 }
2774         }
2775         spin_unlock(&dev_list_lock);
2776
2777         return ret;
2778 }
2779
2780 static int nvme_dev_release(struct inode *inode, struct file *f)
2781 {
2782         struct nvme_dev *dev = f->private_data;
2783         kref_put(&dev->kref, nvme_free_dev);
2784         return 0;
2785 }
2786
2787 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2788 {
2789         struct nvme_dev *dev = f->private_data;
2790         struct nvme_ns *ns;
2791
2792         switch (cmd) {
2793         case NVME_IOCTL_ADMIN_CMD:
2794                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2795         case NVME_IOCTL_IO_CMD:
2796                 if (list_empty(&dev->namespaces))
2797                         return -ENOTTY;
2798                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2799                 return nvme_user_cmd(dev, ns, (void __user *)arg);
2800         case NVME_IOCTL_RESET:
2801                 dev_warn(dev->dev, "resetting controller\n");
2802                 return nvme_reset(dev);
2803         default:
2804                 return -ENOTTY;
2805         }
2806 }
2807
2808 static const struct file_operations nvme_dev_fops = {
2809         .owner          = THIS_MODULE,
2810         .open           = nvme_dev_open,
2811         .release        = nvme_dev_release,
2812         .unlocked_ioctl = nvme_dev_ioctl,
2813         .compat_ioctl   = nvme_dev_ioctl,
2814 };
2815
2816 static void nvme_set_irq_hints(struct nvme_dev *dev)
2817 {
2818         struct nvme_queue *nvmeq;
2819         int i;
2820
2821         for (i = 0; i < dev->online_queues; i++) {
2822                 nvmeq = dev->queues[i];
2823
2824                 if (!nvmeq->tags || !(*nvmeq->tags))
2825                         continue;
2826
2827                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2828                                         blk_mq_tags_cpumask(*nvmeq->tags));
2829         }
2830 }
2831
2832 static int nvme_dev_start(struct nvme_dev *dev)
2833 {
2834         int result;
2835         bool start_thread = false;
2836
2837         result = nvme_dev_map(dev);
2838         if (result)
2839                 return result;
2840
2841         result = nvme_configure_admin_queue(dev);
2842         if (result)
2843                 goto unmap;
2844
2845         spin_lock(&dev_list_lock);
2846         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2847                 start_thread = true;
2848                 nvme_thread = NULL;
2849         }
2850         list_add(&dev->node, &dev_list);
2851         spin_unlock(&dev_list_lock);
2852
2853         if (start_thread) {
2854                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2855                 wake_up_all(&nvme_kthread_wait);
2856         } else
2857                 wait_event_killable(nvme_kthread_wait, nvme_thread);
2858
2859         if (IS_ERR_OR_NULL(nvme_thread)) {
2860                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2861                 goto disable;
2862         }
2863
2864         nvme_init_queue(dev->queues[0], 0);
2865         result = nvme_alloc_admin_tags(dev);
2866         if (result)
2867                 goto disable;
2868
2869         result = nvme_setup_io_queues(dev);
2870         if (result)
2871                 goto free_tags;
2872
2873         nvme_set_irq_hints(dev);
2874
2875         dev->event_limit = 1;
2876         return result;
2877
2878  free_tags:
2879         nvme_dev_remove_admin(dev);
2880         blk_put_queue(dev->admin_q);
2881         dev->admin_q = NULL;
2882         dev->queues[0]->tags = NULL;
2883  disable:
2884         nvme_disable_queue(dev, 0);
2885         nvme_dev_list_remove(dev);
2886  unmap:
2887         nvme_dev_unmap(dev);
2888         return result;
2889 }
2890
2891 static int nvme_remove_dead_ctrl(void *arg)
2892 {
2893         struct nvme_dev *dev = (struct nvme_dev *)arg;
2894         struct pci_dev *pdev = to_pci_dev(dev->dev);
2895
2896         if (pci_get_drvdata(pdev))
2897                 pci_stop_and_remove_bus_device_locked(pdev);
2898         kref_put(&dev->kref, nvme_free_dev);
2899         return 0;
2900 }
2901
2902 static void nvme_remove_disks(struct work_struct *ws)
2903 {
2904         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2905
2906         nvme_free_queues(dev, 1);
2907         nvme_dev_remove(dev);
2908 }
2909
2910 static int nvme_dev_resume(struct nvme_dev *dev)
2911 {
2912         int ret;
2913
2914         ret = nvme_dev_start(dev);
2915         if (ret)
2916                 return ret;
2917         if (dev->online_queues < 2) {
2918                 spin_lock(&dev_list_lock);
2919                 dev->reset_workfn = nvme_remove_disks;
2920                 queue_work(nvme_workq, &dev->reset_work);
2921                 spin_unlock(&dev_list_lock);
2922         } else {
2923                 nvme_unfreeze_queues(dev);
2924                 schedule_work(&dev->scan_work);
2925                 nvme_set_irq_hints(dev);
2926         }
2927         return 0;
2928 }
2929
2930 static void nvme_dev_reset(struct nvme_dev *dev)
2931 {
2932         nvme_dev_shutdown(dev);
2933         if (nvme_dev_resume(dev)) {
2934                 dev_warn(dev->dev, "Device failed to resume\n");
2935                 kref_get(&dev->kref);
2936                 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
2937                                                         dev->instance))) {
2938                         dev_err(dev->dev,
2939                                 "Failed to start controller remove task\n");
2940                         kref_put(&dev->kref, nvme_free_dev);
2941                 }
2942         }
2943 }
2944
2945 static void nvme_reset_failed_dev(struct work_struct *ws)
2946 {
2947         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2948         nvme_dev_reset(dev);
2949 }
2950
2951 static void nvme_reset_workfn(struct work_struct *work)
2952 {
2953         struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
2954         dev->reset_workfn(work);
2955 }
2956
2957 static int nvme_reset(struct nvme_dev *dev)
2958 {
2959         int ret = -EBUSY;
2960
2961         if (!dev->admin_q || blk_queue_dying(dev->admin_q))
2962                 return -ENODEV;
2963
2964         spin_lock(&dev_list_lock);
2965         if (!work_pending(&dev->reset_work)) {
2966                 dev->reset_workfn = nvme_reset_failed_dev;
2967                 queue_work(nvme_workq, &dev->reset_work);
2968                 ret = 0;
2969         }
2970         spin_unlock(&dev_list_lock);
2971
2972         if (!ret) {
2973                 flush_work(&dev->reset_work);
2974                 return 0;
2975         }
2976
2977         return ret;
2978 }
2979
2980 static ssize_t nvme_sysfs_reset(struct device *dev,
2981                                 struct device_attribute *attr, const char *buf,
2982                                 size_t count)
2983 {
2984         struct nvme_dev *ndev = dev_get_drvdata(dev);
2985         int ret;
2986
2987         ret = nvme_reset(ndev);
2988         if (ret < 0)
2989                 return ret;
2990
2991         return count;
2992 }
2993 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
2994
2995 static void nvme_async_probe(struct work_struct *work);
2996 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2997 {
2998         int node, result = -ENOMEM;
2999         struct nvme_dev *dev;
3000
3001         node = dev_to_node(&pdev->dev);
3002         if (node == NUMA_NO_NODE)
3003                 set_dev_node(&pdev->dev, 0);
3004
3005         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
3006         if (!dev)
3007                 return -ENOMEM;
3008         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
3009                                                         GFP_KERNEL, node);
3010         if (!dev->entry)
3011                 goto free;
3012         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3013                                                         GFP_KERNEL, node);
3014         if (!dev->queues)
3015                 goto free;
3016
3017         INIT_LIST_HEAD(&dev->namespaces);
3018         dev->reset_workfn = nvme_reset_failed_dev;
3019         INIT_WORK(&dev->reset_work, nvme_reset_workfn);
3020         dev->dev = get_device(&pdev->dev);
3021         pci_set_drvdata(pdev, dev);
3022         result = nvme_set_instance(dev);
3023         if (result)
3024                 goto put_pci;
3025
3026         result = nvme_setup_prp_pools(dev);
3027         if (result)
3028                 goto release;
3029
3030         kref_init(&dev->kref);
3031         dev->device = device_create(nvme_class, &pdev->dev,
3032                                 MKDEV(nvme_char_major, dev->instance),
3033                                 dev, "nvme%d", dev->instance);
3034         if (IS_ERR(dev->device)) {
3035                 result = PTR_ERR(dev->device);
3036                 goto release_pools;
3037         }
3038         get_device(dev->device);
3039         dev_set_drvdata(dev->device, dev);
3040
3041         result = device_create_file(dev->device, &dev_attr_reset_controller);
3042         if (result)
3043                 goto put_dev;
3044
3045         INIT_LIST_HEAD(&dev->node);
3046         INIT_WORK(&dev->scan_work, nvme_dev_scan);
3047         INIT_WORK(&dev->probe_work, nvme_async_probe);
3048         schedule_work(&dev->probe_work);
3049         return 0;
3050
3051  put_dev:
3052         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3053         put_device(dev->device);
3054  release_pools:
3055         nvme_release_prp_pools(dev);
3056  release:
3057         nvme_release_instance(dev);
3058  put_pci:
3059         put_device(dev->dev);
3060  free:
3061         kfree(dev->queues);
3062         kfree(dev->entry);
3063         kfree(dev);
3064         return result;
3065 }
3066
3067 static void nvme_async_probe(struct work_struct *work)
3068 {
3069         struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3070         int result;
3071
3072         result = nvme_dev_start(dev);
3073         if (result)
3074                 goto reset;
3075
3076         if (dev->online_queues > 1)
3077                 result = nvme_dev_add(dev);
3078         if (result)
3079                 goto reset;
3080
3081         nvme_set_irq_hints(dev);
3082         return;
3083  reset:
3084         spin_lock(&dev_list_lock);
3085         if (!work_busy(&dev->reset_work)) {
3086                 dev->reset_workfn = nvme_reset_failed_dev;
3087                 queue_work(nvme_workq, &dev->reset_work);
3088         }
3089         spin_unlock(&dev_list_lock);
3090 }
3091
3092 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3093 {
3094         struct nvme_dev *dev = pci_get_drvdata(pdev);
3095
3096         if (prepare)
3097                 nvme_dev_shutdown(dev);
3098         else
3099                 nvme_dev_resume(dev);
3100 }
3101
3102 static void nvme_shutdown(struct pci_dev *pdev)
3103 {
3104         struct nvme_dev *dev = pci_get_drvdata(pdev);
3105         nvme_dev_shutdown(dev);
3106 }
3107
3108 static void nvme_remove(struct pci_dev *pdev)
3109 {
3110         struct nvme_dev *dev = pci_get_drvdata(pdev);
3111
3112         spin_lock(&dev_list_lock);
3113         list_del_init(&dev->node);
3114         spin_unlock(&dev_list_lock);
3115
3116         pci_set_drvdata(pdev, NULL);
3117         flush_work(&dev->probe_work);
3118         flush_work(&dev->reset_work);
3119         flush_work(&dev->scan_work);
3120         device_remove_file(dev->device, &dev_attr_reset_controller);
3121         nvme_dev_shutdown(dev);
3122         nvme_dev_remove(dev);
3123         nvme_dev_remove_admin(dev);
3124         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3125         nvme_free_queues(dev, 0);
3126         nvme_release_prp_pools(dev);
3127         kref_put(&dev->kref, nvme_free_dev);
3128 }
3129
3130 /* These functions are yet to be implemented */
3131 #define nvme_error_detected NULL
3132 #define nvme_dump_registers NULL
3133 #define nvme_link_reset NULL
3134 #define nvme_slot_reset NULL
3135 #define nvme_error_resume NULL
3136
3137 #ifdef CONFIG_PM_SLEEP
3138 static int nvme_suspend(struct device *dev)
3139 {
3140         struct pci_dev *pdev = to_pci_dev(dev);
3141         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3142
3143         nvme_dev_shutdown(ndev);
3144         return 0;
3145 }
3146
3147 static int nvme_resume(struct device *dev)
3148 {
3149         struct pci_dev *pdev = to_pci_dev(dev);
3150         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3151
3152         if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
3153                 ndev->reset_workfn = nvme_reset_failed_dev;
3154                 queue_work(nvme_workq, &ndev->reset_work);
3155         }
3156         return 0;
3157 }
3158 #endif
3159
3160 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3161
3162 static const struct pci_error_handlers nvme_err_handler = {
3163         .error_detected = nvme_error_detected,
3164         .mmio_enabled   = nvme_dump_registers,
3165         .link_reset     = nvme_link_reset,
3166         .slot_reset     = nvme_slot_reset,
3167         .resume         = nvme_error_resume,
3168         .reset_notify   = nvme_reset_notify,
3169 };
3170
3171 /* Move to pci_ids.h later */
3172 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
3173
3174 static const struct pci_device_id nvme_id_table[] = {
3175         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3176         { 0, }
3177 };
3178 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3179
3180 static struct pci_driver nvme_driver = {
3181         .name           = "nvme",
3182         .id_table       = nvme_id_table,
3183         .probe          = nvme_probe,
3184         .remove         = nvme_remove,
3185         .shutdown       = nvme_shutdown,
3186         .driver         = {
3187                 .pm     = &nvme_dev_pm_ops,
3188         },
3189         .err_handler    = &nvme_err_handler,
3190 };
3191
3192 static int __init nvme_init(void)
3193 {
3194         int result;
3195
3196         init_waitqueue_head(&nvme_kthread_wait);
3197
3198         nvme_workq = create_singlethread_workqueue("nvme");
3199         if (!nvme_workq)
3200                 return -ENOMEM;
3201
3202         result = register_blkdev(nvme_major, "nvme");
3203         if (result < 0)
3204                 goto kill_workq;
3205         else if (result > 0)
3206                 nvme_major = result;
3207
3208         result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3209                                                         &nvme_dev_fops);
3210         if (result < 0)
3211                 goto unregister_blkdev;
3212         else if (result > 0)
3213                 nvme_char_major = result;
3214
3215         nvme_class = class_create(THIS_MODULE, "nvme");
3216         if (IS_ERR(nvme_class)) {
3217                 result = PTR_ERR(nvme_class);
3218                 goto unregister_chrdev;
3219         }
3220
3221         result = pci_register_driver(&nvme_driver);
3222         if (result)
3223                 goto destroy_class;
3224         return 0;
3225
3226  destroy_class:
3227         class_destroy(nvme_class);
3228  unregister_chrdev:
3229         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3230  unregister_blkdev:
3231         unregister_blkdev(nvme_major, "nvme");
3232  kill_workq:
3233         destroy_workqueue(nvme_workq);
3234         return result;
3235 }
3236
3237 static void __exit nvme_exit(void)
3238 {
3239         pci_unregister_driver(&nvme_driver);
3240         unregister_blkdev(nvme_major, "nvme");
3241         destroy_workqueue(nvme_workq);
3242         class_destroy(nvme_class);
3243         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3244         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3245         _nvme_check_size();
3246 }
3247
3248 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3249 MODULE_LICENSE("GPL");
3250 MODULE_VERSION("1.0");
3251 module_init(nvme_init);
3252 module_exit(nvme_exit);