2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/nvme.h>
16 #include <linux/bitops.h>
17 #include <linux/blkdev.h>
18 #include <linux/blk-mq.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
23 #include <linux/genhd.h>
24 #include <linux/hdreg.h>
25 #include <linux/idr.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
29 #include <linux/kdev_t.h>
30 #include <linux/kthread.h>
31 #include <linux/kernel.h>
32 #include <linux/list_sort.h>
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/pci.h>
37 #include <linux/poison.h>
38 #include <linux/ptrace.h>
39 #include <linux/sched.h>
40 #include <linux/slab.h>
41 #include <linux/t10-pi.h>
42 #include <linux/types.h>
44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
46 #define NVME_MINORS (1U << MINORBITS)
47 #define NVME_Q_DEPTH 1024
48 #define NVME_AQ_DEPTH 256
49 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
50 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
51 #define ADMIN_TIMEOUT (admin_timeout * HZ)
52 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
54 static unsigned char admin_timeout = 60;
55 module_param(admin_timeout, byte, 0644);
56 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
58 unsigned char nvme_io_timeout = 30;
59 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
60 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
62 static unsigned char shutdown_timeout = 5;
63 module_param(shutdown_timeout, byte, 0644);
64 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
66 static int nvme_major;
67 module_param(nvme_major, int, 0);
69 static int nvme_char_major;
70 module_param(nvme_char_major, int, 0);
72 static int use_threaded_interrupts;
73 module_param(use_threaded_interrupts, int, 0);
75 static DEFINE_SPINLOCK(dev_list_lock);
76 static LIST_HEAD(dev_list);
77 static struct task_struct *nvme_thread;
78 static struct workqueue_struct *nvme_workq;
79 static wait_queue_head_t nvme_kthread_wait;
81 static struct class *nvme_class;
83 static void nvme_reset_failed_dev(struct work_struct *ws);
84 static int nvme_reset(struct nvme_dev *dev);
85 static int nvme_process_cq(struct nvme_queue *nvmeq);
87 struct async_cmd_info {
88 struct kthread_work work;
89 struct kthread_worker *worker;
97 * An NVM Express queue. Each device has at least two (one for admin
98 * commands and one for I/O commands).
101 struct device *q_dmadev;
102 struct nvme_dev *dev;
103 char irqname[24]; /* nvme4294967295-65535\0 */
105 struct nvme_command *sq_cmds;
106 volatile struct nvme_completion *cqes;
107 struct blk_mq_tags **tags;
108 dma_addr_t sq_dma_addr;
109 dma_addr_t cq_dma_addr;
119 struct async_cmd_info cmdinfo;
123 * Check we didin't inadvertently grow the command struct
125 static inline void _nvme_check_size(void)
127 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
128 BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
129 BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
130 BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
131 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
132 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
133 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
134 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
135 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
136 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
137 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
138 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
141 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
142 struct nvme_completion *);
144 struct nvme_cmd_info {
145 nvme_completion_fn fn;
148 struct nvme_queue *nvmeq;
149 struct nvme_iod iod[0];
153 * Max size of iod being embedded in the request payload
155 #define NVME_INT_PAGES 2
156 #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->page_size)
157 #define NVME_INT_MASK 0x01
160 * Will slightly overestimate the number of pages needed. This is OK
161 * as it only leads to a small amount of wasted memory for the lifetime of
164 static int nvme_npages(unsigned size, struct nvme_dev *dev)
166 unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
167 return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
170 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
172 unsigned int ret = sizeof(struct nvme_cmd_info);
174 ret += sizeof(struct nvme_iod);
175 ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
176 ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
181 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
182 unsigned int hctx_idx)
184 struct nvme_dev *dev = data;
185 struct nvme_queue *nvmeq = dev->queues[0];
187 WARN_ON(hctx_idx != 0);
188 WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
189 WARN_ON(nvmeq->tags);
191 hctx->driver_data = nvmeq;
192 nvmeq->tags = &dev->admin_tagset.tags[0];
196 static int nvme_admin_init_request(void *data, struct request *req,
197 unsigned int hctx_idx, unsigned int rq_idx,
198 unsigned int numa_node)
200 struct nvme_dev *dev = data;
201 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
202 struct nvme_queue *nvmeq = dev->queues[0];
209 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
210 unsigned int hctx_idx)
212 struct nvme_dev *dev = data;
213 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
216 nvmeq->tags = &dev->tagset.tags[hctx_idx];
218 WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
219 hctx->driver_data = nvmeq;
223 static int nvme_init_request(void *data, struct request *req,
224 unsigned int hctx_idx, unsigned int rq_idx,
225 unsigned int numa_node)
227 struct nvme_dev *dev = data;
228 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
229 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
236 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
237 nvme_completion_fn handler)
242 blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
245 static void *iod_get_private(struct nvme_iod *iod)
247 return (void *) (iod->private & ~0x1UL);
251 * If bit 0 is set, the iod is embedded in the request payload.
253 static bool iod_should_kfree(struct nvme_iod *iod)
255 return (iod->private & NVME_INT_MASK) == 0;
258 /* Special values must be less than 0x1000 */
259 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
260 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
261 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
262 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
264 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
265 struct nvme_completion *cqe)
267 if (ctx == CMD_CTX_CANCELLED)
269 if (ctx == CMD_CTX_COMPLETED) {
270 dev_warn(nvmeq->q_dmadev,
271 "completed id %d twice on queue %d\n",
272 cqe->command_id, le16_to_cpup(&cqe->sq_id));
275 if (ctx == CMD_CTX_INVALID) {
276 dev_warn(nvmeq->q_dmadev,
277 "invalid id %d completed on queue %d\n",
278 cqe->command_id, le16_to_cpup(&cqe->sq_id));
281 dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
284 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
291 cmd->fn = special_completion;
292 cmd->ctx = CMD_CTX_CANCELLED;
296 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
297 struct nvme_completion *cqe)
299 u32 result = le32_to_cpup(&cqe->result);
300 u16 status = le16_to_cpup(&cqe->status) >> 1;
302 if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
303 ++nvmeq->dev->event_limit;
304 if (status != NVME_SC_SUCCESS)
307 switch (result & 0xff07) {
308 case NVME_AER_NOTICE_NS_CHANGED:
309 dev_info(nvmeq->q_dmadev, "rescanning\n");
310 schedule_work(&nvmeq->dev->scan_work);
312 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
316 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
317 struct nvme_completion *cqe)
319 struct request *req = ctx;
321 u16 status = le16_to_cpup(&cqe->status) >> 1;
322 u32 result = le32_to_cpup(&cqe->result);
324 blk_mq_free_request(req);
326 dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
327 ++nvmeq->dev->abort_limit;
330 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
331 struct nvme_completion *cqe)
333 struct async_cmd_info *cmdinfo = ctx;
334 cmdinfo->result = le32_to_cpup(&cqe->result);
335 cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
336 queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
337 blk_mq_free_request(cmdinfo->req);
340 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
343 struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
345 return blk_mq_rq_to_pdu(req);
349 * Called with local interrupts disabled and the q_lock held. May not sleep.
351 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
352 nvme_completion_fn *fn)
354 struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
356 if (tag >= nvmeq->q_depth) {
357 *fn = special_completion;
358 return CMD_CTX_INVALID;
363 cmd->fn = special_completion;
364 cmd->ctx = CMD_CTX_COMPLETED;
369 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
370 * @nvmeq: The queue to use
371 * @cmd: The command to send
373 * Safe to use from interrupt context
375 static int __nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
377 u16 tail = nvmeq->sq_tail;
379 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
380 if (++tail == nvmeq->q_depth)
382 writel(tail, nvmeq->q_db);
383 nvmeq->sq_tail = tail;
388 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
392 spin_lock_irqsave(&nvmeq->q_lock, flags);
393 ret = __nvme_submit_cmd(nvmeq, cmd);
394 spin_unlock_irqrestore(&nvmeq->q_lock, flags);
398 static __le64 **iod_list(struct nvme_iod *iod)
400 return ((void *)iod) + iod->offset;
403 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
404 unsigned nseg, unsigned long private)
406 iod->private = private;
407 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
409 iod->length = nbytes;
413 static struct nvme_iod *
414 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
415 unsigned long priv, gfp_t gfp)
417 struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
418 sizeof(__le64 *) * nvme_npages(bytes, dev) +
419 sizeof(struct scatterlist) * nseg, gfp);
422 iod_init(iod, bytes, nseg, priv);
427 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
430 unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
431 sizeof(struct nvme_dsm_range);
432 struct nvme_iod *iod;
434 if (rq->nr_phys_segments <= NVME_INT_PAGES &&
435 size <= NVME_INT_BYTES(dev)) {
436 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
439 iod_init(iod, size, rq->nr_phys_segments,
440 (unsigned long) rq | NVME_INT_MASK);
444 return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
445 (unsigned long) rq, gfp);
448 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
450 const int last_prp = dev->page_size / 8 - 1;
452 __le64 **list = iod_list(iod);
453 dma_addr_t prp_dma = iod->first_dma;
455 if (iod->npages == 0)
456 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
457 for (i = 0; i < iod->npages; i++) {
458 __le64 *prp_list = list[i];
459 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
460 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
461 prp_dma = next_prp_dma;
464 if (iod_should_kfree(iod))
468 static int nvme_error_status(u16 status)
470 switch (status & 0x7ff) {
471 case NVME_SC_SUCCESS:
473 case NVME_SC_CAP_EXCEEDED:
480 #ifdef CONFIG_BLK_DEV_INTEGRITY
481 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
483 if (be32_to_cpu(pi->ref_tag) == v)
484 pi->ref_tag = cpu_to_be32(p);
487 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
489 if (be32_to_cpu(pi->ref_tag) == p)
490 pi->ref_tag = cpu_to_be32(v);
494 * nvme_dif_remap - remaps ref tags to bip seed and physical lba
496 * The virtual start sector is the one that was originally submitted by the
497 * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
498 * start sector may be different. Remap protection information to match the
499 * physical LBA on writes, and back to the original seed on reads.
501 * Type 0 and 3 do not have a ref tag, so no remapping required.
503 static void nvme_dif_remap(struct request *req,
504 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
506 struct nvme_ns *ns = req->rq_disk->private_data;
507 struct bio_integrity_payload *bip;
508 struct t10_pi_tuple *pi;
510 u32 i, nlb, ts, phys, virt;
512 if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
515 bip = bio_integrity(req->bio);
519 pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
522 virt = bip_get_seed(bip);
523 phys = nvme_block_nr(ns, blk_rq_pos(req));
524 nlb = (blk_rq_bytes(req) >> ns->lba_shift);
525 ts = ns->disk->integrity->tuple_size;
527 for (i = 0; i < nlb; i++, virt++, phys++) {
528 pi = (struct t10_pi_tuple *)p;
529 dif_swap(phys, virt, pi);
535 static int nvme_noop_verify(struct blk_integrity_iter *iter)
540 static int nvme_noop_generate(struct blk_integrity_iter *iter)
545 struct blk_integrity nvme_meta_noop = {
546 .name = "NVME_META_NOOP",
547 .generate_fn = nvme_noop_generate,
548 .verify_fn = nvme_noop_verify,
551 static void nvme_init_integrity(struct nvme_ns *ns)
553 struct blk_integrity integrity;
555 switch (ns->pi_type) {
556 case NVME_NS_DPS_PI_TYPE3:
557 integrity = t10_pi_type3_crc;
559 case NVME_NS_DPS_PI_TYPE1:
560 case NVME_NS_DPS_PI_TYPE2:
561 integrity = t10_pi_type1_crc;
564 integrity = nvme_meta_noop;
567 integrity.tuple_size = ns->ms;
568 blk_integrity_register(ns->disk, &integrity);
569 blk_queue_max_integrity_segments(ns->queue, 1);
571 #else /* CONFIG_BLK_DEV_INTEGRITY */
572 static void nvme_dif_remap(struct request *req,
573 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
576 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
579 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
582 static void nvme_init_integrity(struct nvme_ns *ns)
587 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
588 struct nvme_completion *cqe)
590 struct nvme_iod *iod = ctx;
591 struct request *req = iod_get_private(iod);
592 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
594 u16 status = le16_to_cpup(&cqe->status) >> 1;
596 if (unlikely(status)) {
597 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
598 && (jiffies - req->start_time) < req->timeout) {
601 blk_mq_requeue_request(req);
602 spin_lock_irqsave(req->q->queue_lock, flags);
603 if (!blk_queue_stopped(req->q))
604 blk_mq_kick_requeue_list(req->q);
605 spin_unlock_irqrestore(req->q->queue_lock, flags);
608 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
609 req->errors = status;
611 req->errors = nvme_error_status(status);
615 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
616 u32 result = le32_to_cpup(&cqe->result);
617 req->special = (void *)(uintptr_t)result;
621 dev_warn(nvmeq->dev->dev,
622 "completing aborted command with status:%04x\n",
626 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
627 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
628 if (blk_integrity_rq(req)) {
629 if (!rq_data_dir(req))
630 nvme_dif_remap(req, nvme_dif_complete);
631 dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
632 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
635 nvme_free_iod(nvmeq->dev, iod);
637 blk_mq_complete_request(req);
640 /* length is in bytes. gfp flags indicates whether we may sleep. */
641 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
642 int total_len, gfp_t gfp)
644 struct dma_pool *pool;
645 int length = total_len;
646 struct scatterlist *sg = iod->sg;
647 int dma_len = sg_dma_len(sg);
648 u64 dma_addr = sg_dma_address(sg);
649 u32 page_size = dev->page_size;
650 int offset = dma_addr & (page_size - 1);
652 __le64 **list = iod_list(iod);
656 length -= (page_size - offset);
660 dma_len -= (page_size - offset);
662 dma_addr += (page_size - offset);
665 dma_addr = sg_dma_address(sg);
666 dma_len = sg_dma_len(sg);
669 if (length <= page_size) {
670 iod->first_dma = dma_addr;
674 nprps = DIV_ROUND_UP(length, page_size);
675 if (nprps <= (256 / 8)) {
676 pool = dev->prp_small_pool;
679 pool = dev->prp_page_pool;
683 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
685 iod->first_dma = dma_addr;
687 return (total_len - length) + page_size;
690 iod->first_dma = prp_dma;
693 if (i == page_size >> 3) {
694 __le64 *old_prp_list = prp_list;
695 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
697 return total_len - length;
698 list[iod->npages++] = prp_list;
699 prp_list[0] = old_prp_list[i - 1];
700 old_prp_list[i - 1] = cpu_to_le64(prp_dma);
703 prp_list[i++] = cpu_to_le64(dma_addr);
704 dma_len -= page_size;
705 dma_addr += page_size;
713 dma_addr = sg_dma_address(sg);
714 dma_len = sg_dma_len(sg);
720 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
721 struct nvme_iod *iod)
723 struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
725 memcpy(cmnd, req->cmd, sizeof(struct nvme_command));
726 cmnd->rw.command_id = req->tag;
727 if (req->nr_phys_segments) {
728 cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
729 cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
732 if (++nvmeq->sq_tail == nvmeq->q_depth)
734 writel(nvmeq->sq_tail, nvmeq->q_db);
738 * We reuse the small pool to allocate the 16-byte range here as it is not
739 * worth having a special pool for these or additional cases to handle freeing
742 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
743 struct request *req, struct nvme_iod *iod)
745 struct nvme_dsm_range *range =
746 (struct nvme_dsm_range *)iod_list(iod)[0];
747 struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
749 range->cattr = cpu_to_le32(0);
750 range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
751 range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
753 memset(cmnd, 0, sizeof(*cmnd));
754 cmnd->dsm.opcode = nvme_cmd_dsm;
755 cmnd->dsm.command_id = req->tag;
756 cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
757 cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
759 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
761 if (++nvmeq->sq_tail == nvmeq->q_depth)
763 writel(nvmeq->sq_tail, nvmeq->q_db);
766 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
769 struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
771 memset(cmnd, 0, sizeof(*cmnd));
772 cmnd->common.opcode = nvme_cmd_flush;
773 cmnd->common.command_id = cmdid;
774 cmnd->common.nsid = cpu_to_le32(ns->ns_id);
776 if (++nvmeq->sq_tail == nvmeq->q_depth)
778 writel(nvmeq->sq_tail, nvmeq->q_db);
781 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
784 struct request *req = iod_get_private(iod);
785 struct nvme_command *cmnd;
789 if (req->cmd_flags & REQ_FUA)
790 control |= NVME_RW_FUA;
791 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
792 control |= NVME_RW_LR;
794 if (req->cmd_flags & REQ_RAHEAD)
795 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
797 cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
798 memset(cmnd, 0, sizeof(*cmnd));
800 cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
801 cmnd->rw.command_id = req->tag;
802 cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
803 cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
804 cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
805 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
806 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
808 if (blk_integrity_rq(req)) {
809 cmnd->rw.metadata = cpu_to_le64(sg_dma_address(iod->meta_sg));
810 switch (ns->pi_type) {
811 case NVME_NS_DPS_PI_TYPE3:
812 control |= NVME_RW_PRINFO_PRCHK_GUARD;
814 case NVME_NS_DPS_PI_TYPE1:
815 case NVME_NS_DPS_PI_TYPE2:
816 control |= NVME_RW_PRINFO_PRCHK_GUARD |
817 NVME_RW_PRINFO_PRCHK_REF;
818 cmnd->rw.reftag = cpu_to_le32(
819 nvme_block_nr(ns, blk_rq_pos(req)));
823 control |= NVME_RW_PRINFO_PRACT;
825 cmnd->rw.control = cpu_to_le16(control);
826 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
828 if (++nvmeq->sq_tail == nvmeq->q_depth)
830 writel(nvmeq->sq_tail, nvmeq->q_db);
836 * NOTE: ns is NULL when called on the admin queue.
838 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
839 const struct blk_mq_queue_data *bd)
841 struct nvme_ns *ns = hctx->queue->queuedata;
842 struct nvme_queue *nvmeq = hctx->driver_data;
843 struct nvme_dev *dev = nvmeq->dev;
844 struct request *req = bd->rq;
845 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
846 struct nvme_iod *iod;
847 enum dma_data_direction dma_dir;
850 * If formated with metadata, require the block layer provide a buffer
851 * unless this namespace is formated such that the metadata can be
852 * stripped/generated by the controller with PRACT=1.
854 if (ns && ns->ms && !blk_integrity_rq(req)) {
855 if (!(ns->pi_type && ns->ms == 8) &&
856 req->cmd_type != REQ_TYPE_DRV_PRIV) {
857 req->errors = -EFAULT;
858 blk_mq_complete_request(req);
859 return BLK_MQ_RQ_QUEUE_OK;
863 iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
865 return BLK_MQ_RQ_QUEUE_BUSY;
867 if (req->cmd_flags & REQ_DISCARD) {
870 * We reuse the small pool to allocate the 16-byte range here
871 * as it is not worth having a special pool for these or
872 * additional cases to handle freeing the iod.
874 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
878 iod_list(iod)[0] = (__le64 *)range;
880 } else if (req->nr_phys_segments) {
881 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
883 sg_init_table(iod->sg, req->nr_phys_segments);
884 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
888 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
891 if (blk_rq_bytes(req) !=
892 nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
893 dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
896 if (blk_integrity_rq(req)) {
897 if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
900 sg_init_table(iod->meta_sg, 1);
901 if (blk_rq_map_integrity_sg(
902 req->q, req->bio, iod->meta_sg) != 1)
905 if (rq_data_dir(req))
906 nvme_dif_remap(req, nvme_dif_prep);
908 if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
913 nvme_set_info(cmd, iod, req_completion);
914 spin_lock_irq(&nvmeq->q_lock);
915 if (req->cmd_type == REQ_TYPE_DRV_PRIV)
916 nvme_submit_priv(nvmeq, req, iod);
917 else if (req->cmd_flags & REQ_DISCARD)
918 nvme_submit_discard(nvmeq, ns, req, iod);
919 else if (req->cmd_flags & REQ_FLUSH)
920 nvme_submit_flush(nvmeq, ns, req->tag);
922 nvme_submit_iod(nvmeq, iod, ns);
924 nvme_process_cq(nvmeq);
925 spin_unlock_irq(&nvmeq->q_lock);
926 return BLK_MQ_RQ_QUEUE_OK;
929 nvme_free_iod(dev, iod);
930 return BLK_MQ_RQ_QUEUE_ERROR;
932 nvme_free_iod(dev, iod);
933 return BLK_MQ_RQ_QUEUE_BUSY;
936 static int nvme_process_cq(struct nvme_queue *nvmeq)
940 head = nvmeq->cq_head;
941 phase = nvmeq->cq_phase;
945 nvme_completion_fn fn;
946 struct nvme_completion cqe = nvmeq->cqes[head];
947 if ((le16_to_cpu(cqe.status) & 1) != phase)
949 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
950 if (++head == nvmeq->q_depth) {
954 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
955 fn(nvmeq, ctx, &cqe);
958 /* If the controller ignores the cq head doorbell and continuously
959 * writes to the queue, it is theoretically possible to wrap around
960 * the queue twice and mistakenly return IRQ_NONE. Linux only
961 * requires that 0.1% of your interrupts are handled, so this isn't
964 if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
967 writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
968 nvmeq->cq_head = head;
969 nvmeq->cq_phase = phase;
975 static irqreturn_t nvme_irq(int irq, void *data)
978 struct nvme_queue *nvmeq = data;
979 spin_lock(&nvmeq->q_lock);
980 nvme_process_cq(nvmeq);
981 result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
983 spin_unlock(&nvmeq->q_lock);
987 static irqreturn_t nvme_irq_check(int irq, void *data)
989 struct nvme_queue *nvmeq = data;
990 struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
991 if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
993 return IRQ_WAKE_THREAD;
997 * Returns 0 on success. If the result is negative, it's a Linux error code;
998 * if the result is positive, it's an NVM Express status code
1000 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1001 void *buffer, void __user *ubuffer, unsigned bufflen,
1002 u32 *result, unsigned timeout)
1004 bool write = cmd->common.opcode & 1;
1005 struct bio *bio = NULL;
1006 struct request *req;
1009 req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1011 return PTR_ERR(req);
1013 req->cmd_type = REQ_TYPE_DRV_PRIV;
1014 req->cmd_flags |= REQ_FAILFAST_DRIVER;
1015 req->__data_len = 0;
1016 req->__sector = (sector_t) -1;
1017 req->bio = req->biotail = NULL;
1019 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1021 req->cmd = (unsigned char *)cmd;
1022 req->cmd_len = sizeof(struct nvme_command);
1023 req->special = (void *)0;
1025 if (buffer && bufflen) {
1026 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1029 } else if (ubuffer && bufflen) {
1030 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1036 blk_execute_rq(req->q, NULL, req, 0);
1038 blk_rq_unmap_user(bio);
1040 *result = (u32)(uintptr_t)req->special;
1043 blk_mq_free_request(req);
1047 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1048 void *buffer, unsigned bufflen)
1050 return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1053 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1055 struct nvme_queue *nvmeq = dev->queues[0];
1056 struct nvme_command c;
1057 struct nvme_cmd_info *cmd_info;
1058 struct request *req;
1060 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1062 return PTR_ERR(req);
1064 req->cmd_flags |= REQ_NO_TIMEOUT;
1065 cmd_info = blk_mq_rq_to_pdu(req);
1066 nvme_set_info(cmd_info, NULL, async_req_completion);
1068 memset(&c, 0, sizeof(c));
1069 c.common.opcode = nvme_admin_async_event;
1070 c.common.command_id = req->tag;
1072 blk_mq_free_request(req);
1073 return __nvme_submit_cmd(nvmeq, &c);
1076 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1077 struct nvme_command *cmd,
1078 struct async_cmd_info *cmdinfo, unsigned timeout)
1080 struct nvme_queue *nvmeq = dev->queues[0];
1081 struct request *req;
1082 struct nvme_cmd_info *cmd_rq;
1084 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1086 return PTR_ERR(req);
1088 req->timeout = timeout;
1089 cmd_rq = blk_mq_rq_to_pdu(req);
1091 nvme_set_info(cmd_rq, cmdinfo, async_completion);
1092 cmdinfo->status = -EINTR;
1094 cmd->common.command_id = req->tag;
1096 return nvme_submit_cmd(nvmeq, cmd);
1099 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1101 struct nvme_command c;
1103 memset(&c, 0, sizeof(c));
1104 c.delete_queue.opcode = opcode;
1105 c.delete_queue.qid = cpu_to_le16(id);
1107 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1110 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1111 struct nvme_queue *nvmeq)
1113 struct nvme_command c;
1114 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1117 * Note: we (ab)use the fact the the prp fields survive if no data
1118 * is attached to the request.
1120 memset(&c, 0, sizeof(c));
1121 c.create_cq.opcode = nvme_admin_create_cq;
1122 c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1123 c.create_cq.cqid = cpu_to_le16(qid);
1124 c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1125 c.create_cq.cq_flags = cpu_to_le16(flags);
1126 c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1128 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1131 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1132 struct nvme_queue *nvmeq)
1134 struct nvme_command c;
1135 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1138 * Note: we (ab)use the fact the the prp fields survive if no data
1139 * is attached to the request.
1141 memset(&c, 0, sizeof(c));
1142 c.create_sq.opcode = nvme_admin_create_sq;
1143 c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1144 c.create_sq.sqid = cpu_to_le16(qid);
1145 c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1146 c.create_sq.sq_flags = cpu_to_le16(flags);
1147 c.create_sq.cqid = cpu_to_le16(qid);
1149 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1152 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1154 return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1157 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1159 return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1162 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1164 struct nvme_command c = {
1165 .identify.opcode = nvme_admin_identify,
1166 .identify.cns = cpu_to_le32(1),
1170 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1174 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1175 sizeof(struct nvme_id_ctrl));
1181 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1182 struct nvme_id_ns **id)
1184 struct nvme_command c = {
1185 .identify.opcode = nvme_admin_identify,
1186 .identify.nsid = cpu_to_le32(nsid),
1190 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1194 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1195 sizeof(struct nvme_id_ns));
1201 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1202 dma_addr_t dma_addr, u32 *result)
1204 struct nvme_command c;
1206 memset(&c, 0, sizeof(c));
1207 c.features.opcode = nvme_admin_get_features;
1208 c.features.nsid = cpu_to_le32(nsid);
1209 c.features.prp1 = cpu_to_le64(dma_addr);
1210 c.features.fid = cpu_to_le32(fid);
1212 return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1216 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1217 dma_addr_t dma_addr, u32 *result)
1219 struct nvme_command c;
1221 memset(&c, 0, sizeof(c));
1222 c.features.opcode = nvme_admin_set_features;
1223 c.features.prp1 = cpu_to_le64(dma_addr);
1224 c.features.fid = cpu_to_le32(fid);
1225 c.features.dword11 = cpu_to_le32(dword11);
1227 return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1231 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1233 struct nvme_command c = {
1234 .common.opcode = nvme_admin_get_log_page,
1235 .common.nsid = cpu_to_le32(0xFFFFFFFF),
1236 .common.cdw10[0] = cpu_to_le32(
1237 (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1242 *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1246 error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1247 sizeof(struct nvme_smart_log));
1254 * nvme_abort_req - Attempt aborting a request
1256 * Schedule controller reset if the command was already aborted once before and
1257 * still hasn't been returned to the driver, or if this is the admin queue.
1259 static void nvme_abort_req(struct request *req)
1261 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1262 struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1263 struct nvme_dev *dev = nvmeq->dev;
1264 struct request *abort_req;
1265 struct nvme_cmd_info *abort_cmd;
1266 struct nvme_command cmd;
1268 if (!nvmeq->qid || cmd_rq->aborted) {
1269 unsigned long flags;
1271 spin_lock_irqsave(&dev_list_lock, flags);
1272 if (work_busy(&dev->reset_work))
1274 list_del_init(&dev->node);
1275 dev_warn(dev->dev, "I/O %d QID %d timeout, reset controller\n",
1276 req->tag, nvmeq->qid);
1277 dev->reset_workfn = nvme_reset_failed_dev;
1278 queue_work(nvme_workq, &dev->reset_work);
1280 spin_unlock_irqrestore(&dev_list_lock, flags);
1284 if (!dev->abort_limit)
1287 abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1289 if (IS_ERR(abort_req))
1292 abort_cmd = blk_mq_rq_to_pdu(abort_req);
1293 nvme_set_info(abort_cmd, abort_req, abort_completion);
1295 memset(&cmd, 0, sizeof(cmd));
1296 cmd.abort.opcode = nvme_admin_abort_cmd;
1297 cmd.abort.cid = req->tag;
1298 cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1299 cmd.abort.command_id = abort_req->tag;
1302 cmd_rq->aborted = 1;
1304 dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1306 if (nvme_submit_cmd(dev->queues[0], &cmd) < 0) {
1307 dev_warn(nvmeq->q_dmadev,
1308 "Could not abort I/O %d QID %d",
1309 req->tag, nvmeq->qid);
1310 blk_mq_free_request(abort_req);
1314 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1316 struct nvme_queue *nvmeq = data;
1318 nvme_completion_fn fn;
1319 struct nvme_cmd_info *cmd;
1320 struct nvme_completion cqe;
1322 if (!blk_mq_request_started(req))
1325 cmd = blk_mq_rq_to_pdu(req);
1327 if (cmd->ctx == CMD_CTX_CANCELLED)
1330 if (blk_queue_dying(req->q))
1331 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1333 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1336 dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1337 req->tag, nvmeq->qid);
1338 ctx = cancel_cmd_info(cmd, &fn);
1339 fn(nvmeq, ctx, &cqe);
1342 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1344 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1345 struct nvme_queue *nvmeq = cmd->nvmeq;
1347 dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1349 spin_lock_irq(&nvmeq->q_lock);
1350 nvme_abort_req(req);
1351 spin_unlock_irq(&nvmeq->q_lock);
1354 * The aborted req will be completed on receiving the abort req.
1355 * We enable the timer again. If hit twice, it'll cause a device reset,
1356 * as the device then is in a faulty state.
1358 return BLK_EH_RESET_TIMER;
1361 static void nvme_free_queue(struct nvme_queue *nvmeq)
1363 dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1364 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1365 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1366 nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1370 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1374 for (i = dev->queue_count - 1; i >= lowest; i--) {
1375 struct nvme_queue *nvmeq = dev->queues[i];
1377 dev->queues[i] = NULL;
1378 nvme_free_queue(nvmeq);
1383 * nvme_suspend_queue - put queue into suspended state
1384 * @nvmeq - queue to suspend
1386 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1390 spin_lock_irq(&nvmeq->q_lock);
1391 if (nvmeq->cq_vector == -1) {
1392 spin_unlock_irq(&nvmeq->q_lock);
1395 vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1396 nvmeq->dev->online_queues--;
1397 nvmeq->cq_vector = -1;
1398 spin_unlock_irq(&nvmeq->q_lock);
1400 if (!nvmeq->qid && nvmeq->dev->admin_q)
1401 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1403 irq_set_affinity_hint(vector, NULL);
1404 free_irq(vector, nvmeq);
1409 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1411 spin_lock_irq(&nvmeq->q_lock);
1412 if (nvmeq->tags && *nvmeq->tags)
1413 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1414 spin_unlock_irq(&nvmeq->q_lock);
1417 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1419 struct nvme_queue *nvmeq = dev->queues[qid];
1423 if (nvme_suspend_queue(nvmeq))
1426 /* Don't tell the adapter to delete the admin queue.
1427 * Don't tell a removed adapter to delete IO queues. */
1428 if (qid && readl(&dev->bar->csts) != -1) {
1429 adapter_delete_sq(dev, qid);
1430 adapter_delete_cq(dev, qid);
1433 spin_lock_irq(&nvmeq->q_lock);
1434 nvme_process_cq(nvmeq);
1435 spin_unlock_irq(&nvmeq->q_lock);
1438 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1441 struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1445 nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1446 &nvmeq->cq_dma_addr, GFP_KERNEL);
1450 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1451 &nvmeq->sq_dma_addr, GFP_KERNEL);
1452 if (!nvmeq->sq_cmds)
1455 nvmeq->q_dmadev = dev->dev;
1457 snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1458 dev->instance, qid);
1459 spin_lock_init(&nvmeq->q_lock);
1461 nvmeq->cq_phase = 1;
1462 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1463 nvmeq->q_depth = depth;
1465 dev->queues[qid] = nvmeq;
1467 /* make sure queue descriptor is set before queue count, for kthread */
1474 dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1475 nvmeq->cq_dma_addr);
1481 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1484 if (use_threaded_interrupts)
1485 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1486 nvme_irq_check, nvme_irq, IRQF_SHARED,
1488 return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1489 IRQF_SHARED, name, nvmeq);
1492 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1494 struct nvme_dev *dev = nvmeq->dev;
1496 spin_lock_irq(&nvmeq->q_lock);
1499 nvmeq->cq_phase = 1;
1500 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1501 memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1502 dev->online_queues++;
1503 spin_unlock_irq(&nvmeq->q_lock);
1506 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1508 struct nvme_dev *dev = nvmeq->dev;
1511 nvmeq->cq_vector = qid - 1;
1512 result = adapter_alloc_cq(dev, qid, nvmeq);
1516 result = adapter_alloc_sq(dev, qid, nvmeq);
1520 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1524 nvme_init_queue(nvmeq, qid);
1528 adapter_delete_sq(dev, qid);
1530 adapter_delete_cq(dev, qid);
1534 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1536 unsigned long timeout;
1537 u32 bit = enabled ? NVME_CSTS_RDY : 0;
1539 timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1541 while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1543 if (fatal_signal_pending(current))
1545 if (time_after(jiffies, timeout)) {
1547 "Device not ready; aborting %s\n", enabled ?
1548 "initialisation" : "reset");
1557 * If the device has been passed off to us in an enabled state, just clear
1558 * the enabled bit. The spec says we should set the 'shutdown notification
1559 * bits', but doing so may cause the device to complete commands to the
1560 * admin queue ... and we don't know what memory that might be pointing at!
1562 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1564 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1565 dev->ctrl_config &= ~NVME_CC_ENABLE;
1566 writel(dev->ctrl_config, &dev->bar->cc);
1568 return nvme_wait_ready(dev, cap, false);
1571 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1573 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1574 dev->ctrl_config |= NVME_CC_ENABLE;
1575 writel(dev->ctrl_config, &dev->bar->cc);
1577 return nvme_wait_ready(dev, cap, true);
1580 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1582 unsigned long timeout;
1584 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1585 dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1587 writel(dev->ctrl_config, &dev->bar->cc);
1589 timeout = SHUTDOWN_TIMEOUT + jiffies;
1590 while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1591 NVME_CSTS_SHST_CMPLT) {
1593 if (fatal_signal_pending(current))
1595 if (time_after(jiffies, timeout)) {
1597 "Device shutdown incomplete; abort shutdown\n");
1605 static struct blk_mq_ops nvme_mq_admin_ops = {
1606 .queue_rq = nvme_queue_rq,
1607 .map_queue = blk_mq_map_queue,
1608 .init_hctx = nvme_admin_init_hctx,
1609 .init_request = nvme_admin_init_request,
1610 .timeout = nvme_timeout,
1613 static struct blk_mq_ops nvme_mq_ops = {
1614 .queue_rq = nvme_queue_rq,
1615 .map_queue = blk_mq_map_queue,
1616 .init_hctx = nvme_init_hctx,
1617 .init_request = nvme_init_request,
1618 .timeout = nvme_timeout,
1621 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1623 if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1624 blk_cleanup_queue(dev->admin_q);
1625 blk_mq_free_tag_set(&dev->admin_tagset);
1629 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1631 if (!dev->admin_q) {
1632 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1633 dev->admin_tagset.nr_hw_queues = 1;
1634 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1635 dev->admin_tagset.reserved_tags = 1;
1636 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1637 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1638 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1639 dev->admin_tagset.driver_data = dev;
1641 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1644 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1645 if (IS_ERR(dev->admin_q)) {
1646 blk_mq_free_tag_set(&dev->admin_tagset);
1649 if (!blk_get_queue(dev->admin_q)) {
1650 nvme_dev_remove_admin(dev);
1654 blk_mq_unfreeze_queue(dev->admin_q);
1659 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1663 u64 cap = readq(&dev->bar->cap);
1664 struct nvme_queue *nvmeq;
1665 unsigned page_shift = PAGE_SHIFT;
1666 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1667 unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1669 if (page_shift < dev_page_min) {
1671 "Minimum device page size (%u) too large for "
1672 "host (%u)\n", 1 << dev_page_min,
1676 if (page_shift > dev_page_max) {
1678 "Device maximum page size (%u) smaller than "
1679 "host (%u); enabling work-around\n",
1680 1 << dev_page_max, 1 << page_shift);
1681 page_shift = dev_page_max;
1684 result = nvme_disable_ctrl(dev, cap);
1688 nvmeq = dev->queues[0];
1690 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1695 aqa = nvmeq->q_depth - 1;
1698 dev->page_size = 1 << page_shift;
1700 dev->ctrl_config = NVME_CC_CSS_NVM;
1701 dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1702 dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1703 dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1705 writel(aqa, &dev->bar->aqa);
1706 writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1707 writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1709 result = nvme_enable_ctrl(dev, cap);
1713 nvmeq->cq_vector = 0;
1714 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1721 nvme_free_queues(dev, 0);
1725 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1727 struct nvme_dev *dev = ns->dev;
1728 struct nvme_user_io io;
1729 struct nvme_command c;
1730 unsigned length, meta_len;
1732 dma_addr_t meta_dma = 0;
1734 void __user *metadata;
1736 if (copy_from_user(&io, uio, sizeof(io)))
1739 switch (io.opcode) {
1740 case nvme_cmd_write:
1742 case nvme_cmd_compare:
1748 length = (io.nblocks + 1) << ns->lba_shift;
1749 meta_len = (io.nblocks + 1) * ns->ms;
1750 metadata = (void __user *)(unsigned long)io.metadata;
1751 write = io.opcode & 1;
1758 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1761 meta = dma_alloc_coherent(dev->dev, meta_len,
1762 &meta_dma, GFP_KERNEL);
1769 if (copy_from_user(meta, metadata, meta_len)) {
1776 memset(&c, 0, sizeof(c));
1777 c.rw.opcode = io.opcode;
1778 c.rw.flags = io.flags;
1779 c.rw.nsid = cpu_to_le32(ns->ns_id);
1780 c.rw.slba = cpu_to_le64(io.slba);
1781 c.rw.length = cpu_to_le16(io.nblocks);
1782 c.rw.control = cpu_to_le16(io.control);
1783 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1784 c.rw.reftag = cpu_to_le32(io.reftag);
1785 c.rw.apptag = cpu_to_le16(io.apptag);
1786 c.rw.appmask = cpu_to_le16(io.appmask);
1787 c.rw.metadata = cpu_to_le64(meta_dma);
1789 status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1790 (void __user *)io.addr, length, NULL, 0);
1793 if (status == NVME_SC_SUCCESS && !write) {
1794 if (copy_to_user(metadata, meta, meta_len))
1797 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1802 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1803 struct nvme_passthru_cmd __user *ucmd)
1805 struct nvme_passthru_cmd cmd;
1806 struct nvme_command c;
1807 unsigned timeout = 0;
1810 if (!capable(CAP_SYS_ADMIN))
1812 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1815 memset(&c, 0, sizeof(c));
1816 c.common.opcode = cmd.opcode;
1817 c.common.flags = cmd.flags;
1818 c.common.nsid = cpu_to_le32(cmd.nsid);
1819 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1820 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1821 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1822 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1823 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1824 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1825 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1826 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1829 timeout = msecs_to_jiffies(cmd.timeout_ms);
1831 status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1832 NULL, (void __user *)cmd.addr, cmd.data_len,
1833 &cmd.result, timeout);
1835 if (put_user(cmd.result, &ucmd->result))
1842 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1845 struct nvme_ns *ns = bdev->bd_disk->private_data;
1849 force_successful_syscall_return();
1851 case NVME_IOCTL_ADMIN_CMD:
1852 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1853 case NVME_IOCTL_IO_CMD:
1854 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1855 case NVME_IOCTL_SUBMIT_IO:
1856 return nvme_submit_io(ns, (void __user *)arg);
1857 case SG_GET_VERSION_NUM:
1858 return nvme_sg_get_version_num((void __user *)arg);
1860 return nvme_sg_io(ns, (void __user *)arg);
1866 #ifdef CONFIG_COMPAT
1867 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1868 unsigned int cmd, unsigned long arg)
1872 return -ENOIOCTLCMD;
1874 return nvme_ioctl(bdev, mode, cmd, arg);
1877 #define nvme_compat_ioctl NULL
1880 static int nvme_open(struct block_device *bdev, fmode_t mode)
1885 spin_lock(&dev_list_lock);
1886 ns = bdev->bd_disk->private_data;
1889 else if (!kref_get_unless_zero(&ns->dev->kref))
1891 spin_unlock(&dev_list_lock);
1896 static void nvme_free_dev(struct kref *kref);
1898 static void nvme_release(struct gendisk *disk, fmode_t mode)
1900 struct nvme_ns *ns = disk->private_data;
1901 struct nvme_dev *dev = ns->dev;
1903 kref_put(&dev->kref, nvme_free_dev);
1906 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1908 /* some standard values */
1909 geo->heads = 1 << 6;
1910 geo->sectors = 1 << 5;
1911 geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1915 static void nvme_config_discard(struct nvme_ns *ns)
1917 u32 logical_block_size = queue_logical_block_size(ns->queue);
1918 ns->queue->limits.discard_zeroes_data = 0;
1919 ns->queue->limits.discard_alignment = logical_block_size;
1920 ns->queue->limits.discard_granularity = logical_block_size;
1921 ns->queue->limits.max_discard_sectors = 0xffffffff;
1922 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1925 static int nvme_revalidate_disk(struct gendisk *disk)
1927 struct nvme_ns *ns = disk->private_data;
1928 struct nvme_dev *dev = ns->dev;
1929 struct nvme_id_ns *id;
1934 if (nvme_identify_ns(dev, ns->ns_id, &id)) {
1935 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
1936 dev->instance, ns->ns_id);
1939 if (id->ncap == 0) {
1945 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
1946 ns->lba_shift = id->lbaf[lbaf].ds;
1947 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1948 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
1951 * If identify namespace failed, use default 512 byte block size so
1952 * block layer can use before failing read/write for 0 capacity.
1954 if (ns->lba_shift == 0)
1956 bs = 1 << ns->lba_shift;
1958 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
1959 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
1960 id->dps & NVME_NS_DPS_PI_MASK : 0;
1962 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
1964 bs != queue_logical_block_size(disk->queue) ||
1965 (ns->ms && ns->ext)))
1966 blk_integrity_unregister(disk);
1968 ns->pi_type = pi_type;
1969 blk_queue_logical_block_size(ns->queue, bs);
1971 if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
1973 nvme_init_integrity(ns);
1975 if (ns->ms && !blk_get_integrity(disk))
1976 set_capacity(disk, 0);
1978 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1980 if (dev->oncs & NVME_CTRL_ONCS_DSM)
1981 nvme_config_discard(ns);
1987 static const struct block_device_operations nvme_fops = {
1988 .owner = THIS_MODULE,
1989 .ioctl = nvme_ioctl,
1990 .compat_ioctl = nvme_compat_ioctl,
1992 .release = nvme_release,
1993 .getgeo = nvme_getgeo,
1994 .revalidate_disk= nvme_revalidate_disk,
1997 static int nvme_kthread(void *data)
1999 struct nvme_dev *dev, *next;
2001 while (!kthread_should_stop()) {
2002 set_current_state(TASK_INTERRUPTIBLE);
2003 spin_lock(&dev_list_lock);
2004 list_for_each_entry_safe(dev, next, &dev_list, node) {
2006 if (readl(&dev->bar->csts) & NVME_CSTS_CFS) {
2007 if (work_busy(&dev->reset_work))
2009 list_del_init(&dev->node);
2011 "Failed status: %x, reset controller\n",
2012 readl(&dev->bar->csts));
2013 dev->reset_workfn = nvme_reset_failed_dev;
2014 queue_work(nvme_workq, &dev->reset_work);
2017 for (i = 0; i < dev->queue_count; i++) {
2018 struct nvme_queue *nvmeq = dev->queues[i];
2021 spin_lock_irq(&nvmeq->q_lock);
2022 nvme_process_cq(nvmeq);
2024 while ((i == 0) && (dev->event_limit > 0)) {
2025 if (nvme_submit_async_admin_req(dev))
2029 spin_unlock_irq(&nvmeq->q_lock);
2032 spin_unlock(&dev_list_lock);
2033 schedule_timeout(round_jiffies_relative(HZ));
2038 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2041 struct gendisk *disk;
2042 int node = dev_to_node(dev->dev);
2044 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2048 ns->queue = blk_mq_init_queue(&dev->tagset);
2049 if (IS_ERR(ns->queue))
2051 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2052 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2053 queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS, ns->queue);
2055 ns->queue->queuedata = ns;
2057 disk = alloc_disk_node(0, node);
2059 goto out_free_queue;
2063 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2064 list_add_tail(&ns->list, &dev->namespaces);
2066 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2067 if (dev->max_hw_sectors)
2068 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2069 if (dev->stripe_size)
2070 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2071 if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2072 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2074 disk->major = nvme_major;
2075 disk->first_minor = 0;
2076 disk->fops = &nvme_fops;
2077 disk->private_data = ns;
2078 disk->queue = ns->queue;
2079 disk->driverfs_dev = dev->device;
2080 disk->flags = GENHD_FL_EXT_DEVT;
2081 sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2084 * Initialize capacity to 0 until we establish the namespace format and
2085 * setup integrity extentions if necessary. The revalidate_disk after
2086 * add_disk allows the driver to register with integrity if the format
2089 set_capacity(disk, 0);
2090 if (nvme_revalidate_disk(ns->disk))
2095 revalidate_disk(ns->disk);
2099 list_del(&ns->list);
2101 blk_cleanup_queue(ns->queue);
2106 static void nvme_create_io_queues(struct nvme_dev *dev)
2110 for (i = dev->queue_count; i <= dev->max_qid; i++)
2111 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2114 for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2115 if (nvme_create_queue(dev->queues[i], i))
2119 static int set_queue_count(struct nvme_dev *dev, int count)
2123 u32 q_count = (count - 1) | ((count - 1) << 16);
2125 status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2130 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2133 return min(result & 0xffff, result >> 16) + 1;
2136 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2138 return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2141 static int nvme_setup_io_queues(struct nvme_dev *dev)
2143 struct nvme_queue *adminq = dev->queues[0];
2144 struct pci_dev *pdev = to_pci_dev(dev->dev);
2145 int result, i, vecs, nr_io_queues, size;
2147 nr_io_queues = num_possible_cpus();
2148 result = set_queue_count(dev, nr_io_queues);
2151 if (result < nr_io_queues)
2152 nr_io_queues = result;
2154 size = db_bar_size(dev, nr_io_queues);
2158 dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2161 if (!--nr_io_queues)
2163 size = db_bar_size(dev, nr_io_queues);
2165 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2166 adminq->q_db = dev->dbs;
2169 /* Deregister the admin queue's interrupt */
2170 free_irq(dev->entry[0].vector, adminq);
2173 * If we enable msix early due to not intx, disable it again before
2174 * setting up the full range we need.
2177 pci_disable_msix(pdev);
2179 for (i = 0; i < nr_io_queues; i++)
2180 dev->entry[i].entry = i;
2181 vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2183 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2187 for (i = 0; i < vecs; i++)
2188 dev->entry[i].vector = i + pdev->irq;
2193 * Should investigate if there's a performance win from allocating
2194 * more queues than interrupt vectors; it might allow the submission
2195 * path to scale better, even if the receive path is limited by the
2196 * number of interrupts.
2198 nr_io_queues = vecs;
2199 dev->max_qid = nr_io_queues;
2201 result = queue_request_irq(dev, adminq, adminq->irqname);
2205 /* Free previously allocated queues that are no longer usable */
2206 nvme_free_queues(dev, nr_io_queues + 1);
2207 nvme_create_io_queues(dev);
2212 nvme_free_queues(dev, 1);
2216 static void nvme_free_namespace(struct nvme_ns *ns)
2218 list_del(&ns->list);
2220 spin_lock(&dev_list_lock);
2221 ns->disk->private_data = NULL;
2222 spin_unlock(&dev_list_lock);
2228 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2230 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2231 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2233 return nsa->ns_id - nsb->ns_id;
2236 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2240 list_for_each_entry(ns, &dev->namespaces, list) {
2241 if (ns->ns_id == nsid)
2243 if (ns->ns_id > nsid)
2249 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2251 return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2252 dev->online_queues < 2);
2255 static void nvme_ns_remove(struct nvme_ns *ns)
2257 bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2260 blk_set_queue_dying(ns->queue);
2261 if (ns->disk->flags & GENHD_FL_UP) {
2262 if (blk_get_integrity(ns->disk))
2263 blk_integrity_unregister(ns->disk);
2264 del_gendisk(ns->disk);
2266 if (kill || !blk_queue_dying(ns->queue)) {
2267 blk_mq_abort_requeue_list(ns->queue);
2268 blk_cleanup_queue(ns->queue);
2272 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2274 struct nvme_ns *ns, *next;
2277 for (i = 1; i <= nn; i++) {
2278 ns = nvme_find_ns(dev, i);
2280 if (revalidate_disk(ns->disk)) {
2282 nvme_free_namespace(ns);
2285 nvme_alloc_ns(dev, i);
2287 list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2288 if (ns->ns_id > nn) {
2290 nvme_free_namespace(ns);
2293 list_sort(NULL, &dev->namespaces, ns_cmp);
2296 static void nvme_dev_scan(struct work_struct *work)
2298 struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2299 struct nvme_id_ctrl *ctrl;
2301 if (!dev->tagset.tags)
2303 if (nvme_identify_ctrl(dev, &ctrl))
2305 nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2310 * Return: error value if an error occurred setting up the queues or calling
2311 * Identify Device. 0 if these succeeded, even if adding some of the
2312 * namespaces failed. At the moment, these failures are silent. TBD which
2313 * failures should be reported.
2315 static int nvme_dev_add(struct nvme_dev *dev)
2317 struct pci_dev *pdev = to_pci_dev(dev->dev);
2320 struct nvme_id_ctrl *ctrl;
2321 int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2323 res = nvme_identify_ctrl(dev, &ctrl);
2325 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2329 nn = le32_to_cpup(&ctrl->nn);
2330 dev->oncs = le16_to_cpup(&ctrl->oncs);
2331 dev->abort_limit = ctrl->acl + 1;
2332 dev->vwc = ctrl->vwc;
2333 memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2334 memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2335 memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2337 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2338 if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2339 (pdev->device == 0x0953) && ctrl->vs[3]) {
2340 unsigned int max_hw_sectors;
2342 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2343 max_hw_sectors = dev->stripe_size >> (shift - 9);
2344 if (dev->max_hw_sectors) {
2345 dev->max_hw_sectors = min(max_hw_sectors,
2346 dev->max_hw_sectors);
2348 dev->max_hw_sectors = max_hw_sectors;
2352 dev->tagset.ops = &nvme_mq_ops;
2353 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2354 dev->tagset.timeout = NVME_IO_TIMEOUT;
2355 dev->tagset.numa_node = dev_to_node(dev->dev);
2356 dev->tagset.queue_depth =
2357 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2358 dev->tagset.cmd_size = nvme_cmd_size(dev);
2359 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2360 dev->tagset.driver_data = dev;
2362 if (blk_mq_alloc_tag_set(&dev->tagset))
2365 schedule_work(&dev->scan_work);
2369 static int nvme_dev_map(struct nvme_dev *dev)
2372 int bars, result = -ENOMEM;
2373 struct pci_dev *pdev = to_pci_dev(dev->dev);
2375 if (pci_enable_device_mem(pdev))
2378 dev->entry[0].vector = pdev->irq;
2379 pci_set_master(pdev);
2380 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2384 if (pci_request_selected_regions(pdev, bars, "nvme"))
2387 if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2388 dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2391 dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2395 if (readl(&dev->bar->csts) == -1) {
2401 * Some devices don't advertse INTx interrupts, pre-enable a single
2402 * MSIX vec for setup. We'll adjust this later.
2405 result = pci_enable_msix(pdev, dev->entry, 1);
2410 cap = readq(&dev->bar->cap);
2411 dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2412 dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2413 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2421 pci_release_regions(pdev);
2423 pci_disable_device(pdev);
2427 static void nvme_dev_unmap(struct nvme_dev *dev)
2429 struct pci_dev *pdev = to_pci_dev(dev->dev);
2431 if (pdev->msi_enabled)
2432 pci_disable_msi(pdev);
2433 else if (pdev->msix_enabled)
2434 pci_disable_msix(pdev);
2439 pci_release_regions(pdev);
2442 if (pci_is_enabled(pdev))
2443 pci_disable_device(pdev);
2446 struct nvme_delq_ctx {
2447 struct task_struct *waiter;
2448 struct kthread_worker *worker;
2452 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2454 dq->waiter = current;
2458 set_current_state(TASK_KILLABLE);
2459 if (!atomic_read(&dq->refcount))
2461 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2462 fatal_signal_pending(current)) {
2464 * Disable the controller first since we can't trust it
2465 * at this point, but leave the admin queue enabled
2466 * until all queue deletion requests are flushed.
2467 * FIXME: This may take a while if there are more h/w
2468 * queues than admin tags.
2470 set_current_state(TASK_RUNNING);
2471 nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2472 nvme_clear_queue(dev->queues[0]);
2473 flush_kthread_worker(dq->worker);
2474 nvme_disable_queue(dev, 0);
2478 set_current_state(TASK_RUNNING);
2481 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2483 atomic_dec(&dq->refcount);
2485 wake_up_process(dq->waiter);
2488 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2490 atomic_inc(&dq->refcount);
2494 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2496 struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2500 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2501 kthread_work_func_t fn)
2503 struct nvme_command c;
2505 memset(&c, 0, sizeof(c));
2506 c.delete_queue.opcode = opcode;
2507 c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2509 init_kthread_work(&nvmeq->cmdinfo.work, fn);
2510 return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2514 static void nvme_del_cq_work_handler(struct kthread_work *work)
2516 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2518 nvme_del_queue_end(nvmeq);
2521 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2523 return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2524 nvme_del_cq_work_handler);
2527 static void nvme_del_sq_work_handler(struct kthread_work *work)
2529 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2531 int status = nvmeq->cmdinfo.status;
2534 status = nvme_delete_cq(nvmeq);
2536 nvme_del_queue_end(nvmeq);
2539 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2541 return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2542 nvme_del_sq_work_handler);
2545 static void nvme_del_queue_start(struct kthread_work *work)
2547 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2549 if (nvme_delete_sq(nvmeq))
2550 nvme_del_queue_end(nvmeq);
2553 static void nvme_disable_io_queues(struct nvme_dev *dev)
2556 DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2557 struct nvme_delq_ctx dq;
2558 struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2559 &worker, "nvme%d", dev->instance);
2561 if (IS_ERR(kworker_task)) {
2563 "Failed to create queue del task\n");
2564 for (i = dev->queue_count - 1; i > 0; i--)
2565 nvme_disable_queue(dev, i);
2570 atomic_set(&dq.refcount, 0);
2571 dq.worker = &worker;
2572 for (i = dev->queue_count - 1; i > 0; i--) {
2573 struct nvme_queue *nvmeq = dev->queues[i];
2575 if (nvme_suspend_queue(nvmeq))
2577 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2578 nvmeq->cmdinfo.worker = dq.worker;
2579 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2580 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2582 nvme_wait_dq(&dq, dev);
2583 kthread_stop(kworker_task);
2587 * Remove the node from the device list and check
2588 * for whether or not we need to stop the nvme_thread.
2590 static void nvme_dev_list_remove(struct nvme_dev *dev)
2592 struct task_struct *tmp = NULL;
2594 spin_lock(&dev_list_lock);
2595 list_del_init(&dev->node);
2596 if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2600 spin_unlock(&dev_list_lock);
2606 static void nvme_freeze_queues(struct nvme_dev *dev)
2610 list_for_each_entry(ns, &dev->namespaces, list) {
2611 blk_mq_freeze_queue_start(ns->queue);
2613 spin_lock_irq(ns->queue->queue_lock);
2614 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2615 spin_unlock_irq(ns->queue->queue_lock);
2617 blk_mq_cancel_requeue_work(ns->queue);
2618 blk_mq_stop_hw_queues(ns->queue);
2622 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2626 list_for_each_entry(ns, &dev->namespaces, list) {
2627 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2628 blk_mq_unfreeze_queue(ns->queue);
2629 blk_mq_start_stopped_hw_queues(ns->queue, true);
2630 blk_mq_kick_requeue_list(ns->queue);
2634 static void nvme_dev_shutdown(struct nvme_dev *dev)
2639 nvme_dev_list_remove(dev);
2642 nvme_freeze_queues(dev);
2643 csts = readl(&dev->bar->csts);
2645 if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2646 for (i = dev->queue_count - 1; i >= 0; i--) {
2647 struct nvme_queue *nvmeq = dev->queues[i];
2648 nvme_suspend_queue(nvmeq);
2651 nvme_disable_io_queues(dev);
2652 nvme_shutdown_ctrl(dev);
2653 nvme_disable_queue(dev, 0);
2655 nvme_dev_unmap(dev);
2657 for (i = dev->queue_count - 1; i >= 0; i--)
2658 nvme_clear_queue(dev->queues[i]);
2661 static void nvme_dev_remove(struct nvme_dev *dev)
2665 list_for_each_entry(ns, &dev->namespaces, list)
2669 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2671 dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2672 PAGE_SIZE, PAGE_SIZE, 0);
2673 if (!dev->prp_page_pool)
2676 /* Optimisation for I/Os between 4k and 128k */
2677 dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2679 if (!dev->prp_small_pool) {
2680 dma_pool_destroy(dev->prp_page_pool);
2686 static void nvme_release_prp_pools(struct nvme_dev *dev)
2688 dma_pool_destroy(dev->prp_page_pool);
2689 dma_pool_destroy(dev->prp_small_pool);
2692 static DEFINE_IDA(nvme_instance_ida);
2694 static int nvme_set_instance(struct nvme_dev *dev)
2696 int instance, error;
2699 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2702 spin_lock(&dev_list_lock);
2703 error = ida_get_new(&nvme_instance_ida, &instance);
2704 spin_unlock(&dev_list_lock);
2705 } while (error == -EAGAIN);
2710 dev->instance = instance;
2714 static void nvme_release_instance(struct nvme_dev *dev)
2716 spin_lock(&dev_list_lock);
2717 ida_remove(&nvme_instance_ida, dev->instance);
2718 spin_unlock(&dev_list_lock);
2721 static void nvme_free_namespaces(struct nvme_dev *dev)
2723 struct nvme_ns *ns, *next;
2725 list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2726 nvme_free_namespace(ns);
2729 static void nvme_free_dev(struct kref *kref)
2731 struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2733 put_device(dev->dev);
2734 put_device(dev->device);
2735 nvme_free_namespaces(dev);
2736 nvme_release_instance(dev);
2737 blk_mq_free_tag_set(&dev->tagset);
2738 blk_put_queue(dev->admin_q);
2744 static int nvme_dev_open(struct inode *inode, struct file *f)
2746 struct nvme_dev *dev;
2747 int instance = iminor(inode);
2750 spin_lock(&dev_list_lock);
2751 list_for_each_entry(dev, &dev_list, node) {
2752 if (dev->instance == instance) {
2753 if (!dev->admin_q) {
2757 if (!kref_get_unless_zero(&dev->kref))
2759 f->private_data = dev;
2764 spin_unlock(&dev_list_lock);
2769 static int nvme_dev_release(struct inode *inode, struct file *f)
2771 struct nvme_dev *dev = f->private_data;
2772 kref_put(&dev->kref, nvme_free_dev);
2776 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2778 struct nvme_dev *dev = f->private_data;
2782 case NVME_IOCTL_ADMIN_CMD:
2783 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2784 case NVME_IOCTL_IO_CMD:
2785 if (list_empty(&dev->namespaces))
2787 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2788 return nvme_user_cmd(dev, ns, (void __user *)arg);
2789 case NVME_IOCTL_RESET:
2790 dev_warn(dev->dev, "resetting controller\n");
2791 return nvme_reset(dev);
2797 static const struct file_operations nvme_dev_fops = {
2798 .owner = THIS_MODULE,
2799 .open = nvme_dev_open,
2800 .release = nvme_dev_release,
2801 .unlocked_ioctl = nvme_dev_ioctl,
2802 .compat_ioctl = nvme_dev_ioctl,
2805 static void nvme_set_irq_hints(struct nvme_dev *dev)
2807 struct nvme_queue *nvmeq;
2810 for (i = 0; i < dev->online_queues; i++) {
2811 nvmeq = dev->queues[i];
2813 if (!nvmeq->tags || !(*nvmeq->tags))
2816 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2817 blk_mq_tags_cpumask(*nvmeq->tags));
2821 static int nvme_dev_start(struct nvme_dev *dev)
2824 bool start_thread = false;
2826 result = nvme_dev_map(dev);
2830 result = nvme_configure_admin_queue(dev);
2834 spin_lock(&dev_list_lock);
2835 if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2836 start_thread = true;
2839 list_add(&dev->node, &dev_list);
2840 spin_unlock(&dev_list_lock);
2843 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2844 wake_up_all(&nvme_kthread_wait);
2846 wait_event_killable(nvme_kthread_wait, nvme_thread);
2848 if (IS_ERR_OR_NULL(nvme_thread)) {
2849 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2853 nvme_init_queue(dev->queues[0], 0);
2854 result = nvme_alloc_admin_tags(dev);
2858 result = nvme_setup_io_queues(dev);
2862 nvme_set_irq_hints(dev);
2864 dev->event_limit = 1;
2868 nvme_dev_remove_admin(dev);
2870 nvme_disable_queue(dev, 0);
2871 nvme_dev_list_remove(dev);
2873 nvme_dev_unmap(dev);
2877 static int nvme_remove_dead_ctrl(void *arg)
2879 struct nvme_dev *dev = (struct nvme_dev *)arg;
2880 struct pci_dev *pdev = to_pci_dev(dev->dev);
2882 if (pci_get_drvdata(pdev))
2883 pci_stop_and_remove_bus_device_locked(pdev);
2884 kref_put(&dev->kref, nvme_free_dev);
2888 static void nvme_remove_disks(struct work_struct *ws)
2890 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2892 nvme_free_queues(dev, 1);
2893 nvme_dev_remove(dev);
2896 static int nvme_dev_resume(struct nvme_dev *dev)
2900 ret = nvme_dev_start(dev);
2903 if (dev->online_queues < 2) {
2904 spin_lock(&dev_list_lock);
2905 dev->reset_workfn = nvme_remove_disks;
2906 queue_work(nvme_workq, &dev->reset_work);
2907 spin_unlock(&dev_list_lock);
2909 nvme_unfreeze_queues(dev);
2910 schedule_work(&dev->scan_work);
2911 nvme_set_irq_hints(dev);
2916 static void nvme_dev_reset(struct nvme_dev *dev)
2918 nvme_dev_shutdown(dev);
2919 if (nvme_dev_resume(dev)) {
2920 dev_warn(dev->dev, "Device failed to resume\n");
2921 kref_get(&dev->kref);
2922 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
2925 "Failed to start controller remove task\n");
2926 kref_put(&dev->kref, nvme_free_dev);
2931 static void nvme_reset_failed_dev(struct work_struct *ws)
2933 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2934 nvme_dev_reset(dev);
2937 static void nvme_reset_workfn(struct work_struct *work)
2939 struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
2940 dev->reset_workfn(work);
2943 static int nvme_reset(struct nvme_dev *dev)
2947 if (!dev->admin_q || blk_queue_dying(dev->admin_q))
2950 spin_lock(&dev_list_lock);
2951 if (!work_pending(&dev->reset_work)) {
2952 dev->reset_workfn = nvme_reset_failed_dev;
2953 queue_work(nvme_workq, &dev->reset_work);
2956 spin_unlock(&dev_list_lock);
2959 flush_work(&dev->reset_work);
2966 static ssize_t nvme_sysfs_reset(struct device *dev,
2967 struct device_attribute *attr, const char *buf,
2970 struct nvme_dev *ndev = dev_get_drvdata(dev);
2973 ret = nvme_reset(ndev);
2979 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
2981 static void nvme_async_probe(struct work_struct *work);
2982 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2984 int node, result = -ENOMEM;
2985 struct nvme_dev *dev;
2987 node = dev_to_node(&pdev->dev);
2988 if (node == NUMA_NO_NODE)
2989 set_dev_node(&pdev->dev, 0);
2991 dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
2994 dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
2998 dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3003 INIT_LIST_HEAD(&dev->namespaces);
3004 dev->reset_workfn = nvme_reset_failed_dev;
3005 INIT_WORK(&dev->reset_work, nvme_reset_workfn);
3006 dev->dev = get_device(&pdev->dev);
3007 pci_set_drvdata(pdev, dev);
3008 result = nvme_set_instance(dev);
3012 result = nvme_setup_prp_pools(dev);
3016 kref_init(&dev->kref);
3017 dev->device = device_create(nvme_class, &pdev->dev,
3018 MKDEV(nvme_char_major, dev->instance),
3019 dev, "nvme%d", dev->instance);
3020 if (IS_ERR(dev->device)) {
3021 result = PTR_ERR(dev->device);
3024 get_device(dev->device);
3025 dev_set_drvdata(dev->device, dev);
3027 result = device_create_file(dev->device, &dev_attr_reset_controller);
3031 INIT_LIST_HEAD(&dev->node);
3032 INIT_WORK(&dev->scan_work, nvme_dev_scan);
3033 INIT_WORK(&dev->probe_work, nvme_async_probe);
3034 schedule_work(&dev->probe_work);
3038 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3039 put_device(dev->device);
3041 nvme_release_prp_pools(dev);
3043 nvme_release_instance(dev);
3045 put_device(dev->dev);
3053 static void nvme_async_probe(struct work_struct *work)
3055 struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3058 result = nvme_dev_start(dev);
3062 if (dev->online_queues > 1)
3063 result = nvme_dev_add(dev);
3067 nvme_set_irq_hints(dev);
3070 spin_lock(&dev_list_lock);
3071 if (!work_busy(&dev->reset_work)) {
3072 dev->reset_workfn = nvme_reset_failed_dev;
3073 queue_work(nvme_workq, &dev->reset_work);
3075 spin_unlock(&dev_list_lock);
3078 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3080 struct nvme_dev *dev = pci_get_drvdata(pdev);
3083 nvme_dev_shutdown(dev);
3085 nvme_dev_resume(dev);
3088 static void nvme_shutdown(struct pci_dev *pdev)
3090 struct nvme_dev *dev = pci_get_drvdata(pdev);
3091 nvme_dev_shutdown(dev);
3094 static void nvme_remove(struct pci_dev *pdev)
3096 struct nvme_dev *dev = pci_get_drvdata(pdev);
3098 spin_lock(&dev_list_lock);
3099 list_del_init(&dev->node);
3100 spin_unlock(&dev_list_lock);
3102 pci_set_drvdata(pdev, NULL);
3103 flush_work(&dev->probe_work);
3104 flush_work(&dev->reset_work);
3105 flush_work(&dev->scan_work);
3106 device_remove_file(dev->device, &dev_attr_reset_controller);
3107 nvme_dev_shutdown(dev);
3108 nvme_dev_remove(dev);
3109 nvme_dev_remove_admin(dev);
3110 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3111 nvme_free_queues(dev, 0);
3112 nvme_release_prp_pools(dev);
3113 kref_put(&dev->kref, nvme_free_dev);
3116 /* These functions are yet to be implemented */
3117 #define nvme_error_detected NULL
3118 #define nvme_dump_registers NULL
3119 #define nvme_link_reset NULL
3120 #define nvme_slot_reset NULL
3121 #define nvme_error_resume NULL
3123 #ifdef CONFIG_PM_SLEEP
3124 static int nvme_suspend(struct device *dev)
3126 struct pci_dev *pdev = to_pci_dev(dev);
3127 struct nvme_dev *ndev = pci_get_drvdata(pdev);
3129 nvme_dev_shutdown(ndev);
3133 static int nvme_resume(struct device *dev)
3135 struct pci_dev *pdev = to_pci_dev(dev);
3136 struct nvme_dev *ndev = pci_get_drvdata(pdev);
3138 if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
3139 ndev->reset_workfn = nvme_reset_failed_dev;
3140 queue_work(nvme_workq, &ndev->reset_work);
3146 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3148 static const struct pci_error_handlers nvme_err_handler = {
3149 .error_detected = nvme_error_detected,
3150 .mmio_enabled = nvme_dump_registers,
3151 .link_reset = nvme_link_reset,
3152 .slot_reset = nvme_slot_reset,
3153 .resume = nvme_error_resume,
3154 .reset_notify = nvme_reset_notify,
3157 /* Move to pci_ids.h later */
3158 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
3160 static const struct pci_device_id nvme_id_table[] = {
3161 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3164 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3166 static struct pci_driver nvme_driver = {
3168 .id_table = nvme_id_table,
3169 .probe = nvme_probe,
3170 .remove = nvme_remove,
3171 .shutdown = nvme_shutdown,
3173 .pm = &nvme_dev_pm_ops,
3175 .err_handler = &nvme_err_handler,
3178 static int __init nvme_init(void)
3182 init_waitqueue_head(&nvme_kthread_wait);
3184 nvme_workq = create_singlethread_workqueue("nvme");
3188 result = register_blkdev(nvme_major, "nvme");
3191 else if (result > 0)
3192 nvme_major = result;
3194 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3197 goto unregister_blkdev;
3198 else if (result > 0)
3199 nvme_char_major = result;
3201 nvme_class = class_create(THIS_MODULE, "nvme");
3202 if (IS_ERR(nvme_class)) {
3203 result = PTR_ERR(nvme_class);
3204 goto unregister_chrdev;
3207 result = pci_register_driver(&nvme_driver);
3213 class_destroy(nvme_class);
3215 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3217 unregister_blkdev(nvme_major, "nvme");
3219 destroy_workqueue(nvme_workq);
3223 static void __exit nvme_exit(void)
3225 pci_unregister_driver(&nvme_driver);
3226 unregister_blkdev(nvme_major, "nvme");
3227 destroy_workqueue(nvme_workq);
3228 class_destroy(nvme_class);
3229 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3230 BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3234 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3235 MODULE_LICENSE("GPL");
3236 MODULE_VERSION("1.0");
3237 module_init(nvme_init);
3238 module_exit(nvme_exit);