2 * Copyright(c) 2004 - 2009 Intel Corporation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free
6 * Software Foundation; either version 2 of the License, or (at your option)
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59
16 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 * The full GNU General Public License is included in this distribution in the
19 * file called COPYING.
24 /* PCI Configuration Space Values */
25 #define IOAT_MMIO_BAR 0
28 #define IOAT_PCI_DID_5000 0x1A38
29 #define IOAT_PCI_DID_CNB 0x360B
30 #define IOAT_PCI_DID_SCNB 0x65FF
31 #define IOAT_PCI_DID_SNB 0x402F
33 #define PCI_DEVICE_ID_INTEL_IOAT_IVB0 0x0e20
34 #define PCI_DEVICE_ID_INTEL_IOAT_IVB1 0x0e21
35 #define PCI_DEVICE_ID_INTEL_IOAT_IVB2 0x0e22
36 #define PCI_DEVICE_ID_INTEL_IOAT_IVB3 0x0e23
37 #define PCI_DEVICE_ID_INTEL_IOAT_IVB4 0x0e24
38 #define PCI_DEVICE_ID_INTEL_IOAT_IVB5 0x0e25
39 #define PCI_DEVICE_ID_INTEL_IOAT_IVB6 0x0e26
40 #define PCI_DEVICE_ID_INTEL_IOAT_IVB7 0x0e27
41 #define PCI_DEVICE_ID_INTEL_IOAT_IVB8 0x0e2e
42 #define PCI_DEVICE_ID_INTEL_IOAT_IVB9 0x0e2f
44 #define PCI_DEVICE_ID_INTEL_IOAT_HSW0 0x2f20
45 #define PCI_DEVICE_ID_INTEL_IOAT_HSW1 0x2f21
46 #define PCI_DEVICE_ID_INTEL_IOAT_HSW2 0x2f22
47 #define PCI_DEVICE_ID_INTEL_IOAT_HSW3 0x2f23
48 #define PCI_DEVICE_ID_INTEL_IOAT_HSW4 0x2f24
49 #define PCI_DEVICE_ID_INTEL_IOAT_HSW5 0x2f25
50 #define PCI_DEVICE_ID_INTEL_IOAT_HSW6 0x2f26
51 #define PCI_DEVICE_ID_INTEL_IOAT_HSW7 0x2f27
52 #define PCI_DEVICE_ID_INTEL_IOAT_HSW8 0x2f2e
53 #define PCI_DEVICE_ID_INTEL_IOAT_HSW9 0x2f2f
55 #define PCI_DEVICE_ID_INTEL_IOAT_BWD0 0x0C50
56 #define PCI_DEVICE_ID_INTEL_IOAT_BWD1 0x0C51
57 #define PCI_DEVICE_ID_INTEL_IOAT_BWD2 0x0C52
58 #define PCI_DEVICE_ID_INTEL_IOAT_BWD3 0x0C53
60 #define IOAT_VER_1_2 0x12 /* Version 1.2 */
61 #define IOAT_VER_2_0 0x20 /* Version 2.0 */
62 #define IOAT_VER_3_0 0x30 /* Version 3.0 */
63 #define IOAT_VER_3_2 0x32 /* Version 3.2 */
64 #define IOAT_VER_3_3 0x33 /* Version 3.3 */
67 int system_has_dca_enabled(struct pci_dev *pdev);
69 struct ioat_dma_descriptor {
74 unsigned int int_en:1;
75 unsigned int src_snoop_dis:1;
76 unsigned int dest_snoop_dis:1;
77 unsigned int compl_write:1;
80 unsigned int src_brk:1;
81 unsigned int dest_brk:1;
82 unsigned int bundle:1;
83 unsigned int dest_dca:1;
85 unsigned int rsvd2:13;
86 #define IOAT_OP_COPY 0x00
95 /* store some driver data in an unused portion of the descriptor */
103 struct ioat_fill_descriptor {
108 unsigned int int_en:1;
110 unsigned int dest_snoop_dis:1;
111 unsigned int compl_write:1;
112 unsigned int fence:1;
113 unsigned int rsvd2:2;
114 unsigned int dest_brk:1;
115 unsigned int bundle:1;
116 unsigned int rsvd4:15;
117 #define IOAT_OP_FILL 0x01
125 uint64_t next_dst_addr;
130 struct ioat_xor_descriptor {
135 unsigned int int_en:1;
136 unsigned int src_snoop_dis:1;
137 unsigned int dest_snoop_dis:1;
138 unsigned int compl_write:1;
139 unsigned int fence:1;
140 unsigned int src_cnt:3;
141 unsigned int bundle:1;
142 unsigned int dest_dca:1;
144 unsigned int rsvd:13;
145 #define IOAT_OP_XOR 0x87
146 #define IOAT_OP_XOR_VAL 0x88
159 struct ioat_xor_ext_descriptor {
167 struct ioat_pq_descriptor {
172 unsigned int int_en:1;
173 unsigned int src_snoop_dis:1;
174 unsigned int dest_snoop_dis:1;
175 unsigned int compl_write:1;
176 unsigned int fence:1;
177 unsigned int src_cnt:3;
178 unsigned int bundle:1;
179 unsigned int dest_dca:1;
181 unsigned int p_disable:1;
182 unsigned int q_disable:1;
183 unsigned int rsvd:11;
184 #define IOAT_OP_PQ 0x89
185 #define IOAT_OP_PQ_VAL 0x8a
198 struct ioat_pq_ext_descriptor {
208 struct ioat_pq_update_descriptor {
213 unsigned int int_en:1;
214 unsigned int src_snoop_dis:1;
215 unsigned int dest_snoop_dis:1;
216 unsigned int compl_write:1;
217 unsigned int fence:1;
218 unsigned int src_cnt:3;
219 unsigned int bundle:1;
220 unsigned int dest_dca:1;
222 unsigned int p_disable:1;
223 unsigned int q_disable:1;
226 #define IOAT_OP_PQ_UP 0x8b
239 struct ioat_raw_descriptor {