firmware: qcom: scm: Add support for ARM64 SoCs
[cascardo/linux.git] / drivers / firmware / qcom_scm.c
1 /* Copyright (c) 2010,2015, The Linux Foundation. All rights reserved.
2  * Copyright (C) 2015 Linaro Ltd.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 and
6  * only version 2 as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  *
13  */
14 #include <linux/platform_device.h>
15 #include <linux/module.h>
16 #include <linux/cpumask.h>
17 #include <linux/export.h>
18 #include <linux/types.h>
19 #include <linux/qcom_scm.h>
20 #include <linux/of.h>
21 #include <linux/of_platform.h>
22 #include <linux/clk.h>
23
24 #include "qcom_scm.h"
25
26 struct qcom_scm {
27         struct device *dev;
28         struct clk *core_clk;
29         struct clk *iface_clk;
30         struct clk *bus_clk;
31 };
32
33 static struct qcom_scm *__scm;
34
35 static int qcom_scm_clk_enable(void)
36 {
37         int ret;
38
39         ret = clk_prepare_enable(__scm->core_clk);
40         if (ret)
41                 goto bail;
42
43         ret = clk_prepare_enable(__scm->iface_clk);
44         if (ret)
45                 goto disable_core;
46
47         ret = clk_prepare_enable(__scm->bus_clk);
48         if (ret)
49                 goto disable_iface;
50
51         return 0;
52
53 disable_iface:
54         clk_disable_unprepare(__scm->iface_clk);
55 disable_core:
56         clk_disable_unprepare(__scm->core_clk);
57 bail:
58         return ret;
59 }
60
61 static void qcom_scm_clk_disable(void)
62 {
63         clk_disable_unprepare(__scm->core_clk);
64         clk_disable_unprepare(__scm->iface_clk);
65         clk_disable_unprepare(__scm->bus_clk);
66 }
67
68 /**
69  * qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
70  * @entry: Entry point function for the cpus
71  * @cpus: The cpumask of cpus that will use the entry point
72  *
73  * Set the cold boot address of the cpus. Any cpu outside the supported
74  * range would be removed from the cpu present mask.
75  */
76 int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
77 {
78         return __qcom_scm_set_cold_boot_addr(entry, cpus);
79 }
80 EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);
81
82 /**
83  * qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus
84  * @entry: Entry point function for the cpus
85  * @cpus: The cpumask of cpus that will use the entry point
86  *
87  * Set the Linux entry point for the SCM to transfer control to when coming
88  * out of a power down. CPU power down may be executed on cpuidle or hotplug.
89  */
90 int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
91 {
92         return __qcom_scm_set_warm_boot_addr(__scm->dev, entry, cpus);
93 }
94 EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr);
95
96 /**
97  * qcom_scm_cpu_power_down() - Power down the cpu
98  * @flags - Flags to flush cache
99  *
100  * This is an end point to power down cpu. If there was a pending interrupt,
101  * the control would return from this function, otherwise, the cpu jumps to the
102  * warm boot entry point set for this cpu upon reset.
103  */
104 void qcom_scm_cpu_power_down(u32 flags)
105 {
106         __qcom_scm_cpu_power_down(flags);
107 }
108 EXPORT_SYMBOL(qcom_scm_cpu_power_down);
109
110 /**
111  * qcom_scm_hdcp_available() - Check if secure environment supports HDCP.
112  *
113  * Return true if HDCP is supported, false if not.
114  */
115 bool qcom_scm_hdcp_available(void)
116 {
117         int ret = qcom_scm_clk_enable();
118
119         if (ret)
120                 return ret;
121
122         ret = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_HDCP,
123                                                 QCOM_SCM_CMD_HDCP);
124
125         qcom_scm_clk_disable();
126
127         return ret > 0 ? true : false;
128 }
129 EXPORT_SYMBOL(qcom_scm_hdcp_available);
130
131 /**
132  * qcom_scm_hdcp_req() - Send HDCP request.
133  * @req: HDCP request array
134  * @req_cnt: HDCP request array count
135  * @resp: response buffer passed to SCM
136  *
137  * Write HDCP register(s) through SCM.
138  */
139 int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp)
140 {
141         int ret = qcom_scm_clk_enable();
142
143         if (ret)
144                 return ret;
145
146         ret = __qcom_scm_hdcp_req(__scm->dev, req, req_cnt, resp);
147         qcom_scm_clk_disable();
148         return ret;
149 }
150 EXPORT_SYMBOL(qcom_scm_hdcp_req);
151
152 static int qcom_scm_probe(struct platform_device *pdev)
153 {
154         struct qcom_scm *scm;
155         int ret;
156
157         scm = devm_kzalloc(&pdev->dev, sizeof(*scm), GFP_KERNEL);
158         if (!scm)
159                 return -ENOMEM;
160
161         scm->core_clk = devm_clk_get(&pdev->dev, "core");
162         if (IS_ERR(scm->core_clk)) {
163                 if (PTR_ERR(scm->core_clk) == -EPROBE_DEFER)
164                         return PTR_ERR(scm->core_clk);
165
166                 scm->core_clk = NULL;
167         }
168
169         if (of_device_is_compatible(pdev->dev.of_node, "qcom,scm")) {
170                 scm->iface_clk = devm_clk_get(&pdev->dev, "iface");
171                 if (IS_ERR(scm->iface_clk)) {
172                         if (PTR_ERR(scm->iface_clk) != -EPROBE_DEFER)
173                                 dev_err(&pdev->dev, "failed to acquire iface clk\n");
174                         return PTR_ERR(scm->iface_clk);
175                 }
176
177                 scm->bus_clk = devm_clk_get(&pdev->dev, "bus");
178                 if (IS_ERR(scm->bus_clk)) {
179                         if (PTR_ERR(scm->bus_clk) != -EPROBE_DEFER)
180                                 dev_err(&pdev->dev, "failed to acquire bus clk\n");
181                         return PTR_ERR(scm->bus_clk);
182                 }
183         }
184
185         /* vote for max clk rate for highest performance */
186         ret = clk_set_rate(scm->core_clk, INT_MAX);
187         if (ret)
188                 return ret;
189
190         __scm = scm;
191         __scm->dev = &pdev->dev;
192
193         __qcom_scm_init();
194
195         return 0;
196 }
197
198 static const struct of_device_id qcom_scm_dt_match[] = {
199         { .compatible = "qcom,scm-apq8064",},
200         { .compatible = "qcom,scm-msm8660",},
201         { .compatible = "qcom,scm-msm8960",},
202         { .compatible = "qcom,scm",},
203         {}
204 };
205
206 MODULE_DEVICE_TABLE(of, qcom_scm_dt_match);
207
208 static struct platform_driver qcom_scm_driver = {
209         .driver = {
210                 .name   = "qcom_scm",
211                 .of_match_table = qcom_scm_dt_match,
212         },
213         .probe = qcom_scm_probe,
214 };
215
216 static int __init qcom_scm_init(void)
217 {
218         struct device_node *np, *fw_np;
219         int ret;
220
221         fw_np = of_find_node_by_name(NULL, "firmware");
222
223         if (!fw_np)
224                 return -ENODEV;
225
226         np = of_find_matching_node(fw_np, qcom_scm_dt_match);
227
228         if (!np) {
229                 of_node_put(fw_np);
230                 return -ENODEV;
231         }
232
233         of_node_put(np);
234
235         ret = of_platform_populate(fw_np, qcom_scm_dt_match, NULL, NULL);
236
237         of_node_put(fw_np);
238
239         if (ret)
240                 return ret;
241
242         return platform_driver_register(&qcom_scm_driver);
243 }
244
245 arch_initcall(qcom_scm_init);
246
247 static void __exit qcom_scm_exit(void)
248 {
249         platform_driver_unregister(&qcom_scm_driver);
250 }
251 module_exit(qcom_scm_exit);
252
253 MODULE_DESCRIPTION("Qualcomm SCM driver");
254 MODULE_LICENSE("GPL v2");