2 * Copyright 2013 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
28 typedef struct _ATOM_PPLIB_THERMALCONTROLLER
31 UCHAR ucType; // one of ATOM_PP_THERMALCONTROLLER_*
32 UCHAR ucI2cLine; // as interpreted by DAL I2C
34 UCHAR ucFanParameters; // Fan Control Parameters.
35 UCHAR ucFanMinRPM; // Fan Minimum RPM (hundreds) -- for display purposes only.
36 UCHAR ucFanMaxRPM; // Fan Maximum RPM (hundreds) -- for display purposes only.
37 UCHAR ucReserved; // ----
38 UCHAR ucFlags; // to be defined
39 } ATOM_PPLIB_THERMALCONTROLLER;
41 #define ATOM_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK 0x0f
42 #define ATOM_PP_FANPARAMETERS_NOFAN 0x80 // No fan is connected to this controller.
44 #define ATOM_PP_THERMALCONTROLLER_NONE 0
45 #define ATOM_PP_THERMALCONTROLLER_LM63 1 // Not used by PPLib
46 #define ATOM_PP_THERMALCONTROLLER_ADM1032 2 // Not used by PPLib
47 #define ATOM_PP_THERMALCONTROLLER_ADM1030 3 // Not used by PPLib
48 #define ATOM_PP_THERMALCONTROLLER_MUA6649 4 // Not used by PPLib
49 #define ATOM_PP_THERMALCONTROLLER_LM64 5
50 #define ATOM_PP_THERMALCONTROLLER_F75375 6 // Not used by PPLib
51 #define ATOM_PP_THERMALCONTROLLER_RV6xx 7
52 #define ATOM_PP_THERMALCONTROLLER_RV770 8
53 #define ATOM_PP_THERMALCONTROLLER_ADT7473 9
54 #define ATOM_PP_THERMALCONTROLLER_KONG 10
55 #define ATOM_PP_THERMALCONTROLLER_EXTERNAL_GPIO 11
56 #define ATOM_PP_THERMALCONTROLLER_EVERGREEN 12
57 #define ATOM_PP_THERMALCONTROLLER_EMC2103 13 /* 0x0D */ // Only fan control will be implemented, do NOT show this in PPGen.
58 #define ATOM_PP_THERMALCONTROLLER_SUMO 14 /* 0x0E */ // Sumo type, used internally
59 #define ATOM_PP_THERMALCONTROLLER_NISLANDS 15
60 #define ATOM_PP_THERMALCONTROLLER_SISLANDS 16
61 #define ATOM_PP_THERMALCONTROLLER_LM96163 17
62 #define ATOM_PP_THERMALCONTROLLER_CISLANDS 18
63 #define ATOM_PP_THERMALCONTROLLER_KAVERI 19
66 // Thermal controller 'combo type' to use an external controller for Fan control and an internal controller for thermal.
67 // We probably should reserve the bit 0x80 for this use.
68 // To keep the number of these types low we should also use the same code for all ASICs (i.e. do not distinguish RV6xx and RV7xx Internal here).
69 // The driver can pick the correct internal controller based on the ASIC.
71 #define ATOM_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL 0x89 // ADT7473 Fan Control + Internal Thermal Controller
72 #define ATOM_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL 0x8D // EMC2103 Fan Control + Internal Thermal Controller
74 typedef struct _ATOM_PPLIB_STATE
76 UCHAR ucNonClockStateIndex;
77 UCHAR ucClockStateIndices[1]; // variable-sized
81 typedef struct _ATOM_PPLIB_FANTABLE
83 UCHAR ucFanTableFormat; // Change this if the table format changes or version changes so that the other fields are not the same.
84 UCHAR ucTHyst; // Temperature hysteresis. Integer.
85 USHORT usTMin; // The temperature, in 0.01 centigrades, below which we just run at a minimal PWM.
86 USHORT usTMed; // The middle temperature where we change slopes.
87 USHORT usTHigh; // The high point above TMed for adjusting the second slope.
88 USHORT usPWMMin; // The minimum PWM value in percent (0.01% increments).
89 USHORT usPWMMed; // The PWM value (in percent) at TMed.
90 USHORT usPWMHigh; // The PWM value at THigh.
91 } ATOM_PPLIB_FANTABLE;
93 typedef struct _ATOM_PPLIB_FANTABLE2
95 ATOM_PPLIB_FANTABLE basicTable;
96 USHORT usTMax; // The max temperature
97 } ATOM_PPLIB_FANTABLE2;
99 typedef struct _ATOM_PPLIB_FANTABLE3
101 ATOM_PPLIB_FANTABLE2 basicTable2;
102 UCHAR ucFanControlMode;
104 USHORT usFanOutputSensitivity;
105 } ATOM_PPLIB_FANTABLE3;
107 typedef struct _ATOM_PPLIB_EXTENDEDHEADER
110 ULONG ulMaxEngineClock; // For Overdrive.
111 ULONG ulMaxMemoryClock; // For Overdrive.
112 // Add extra system parameters here, always adjust size to include all fields.
113 USHORT usVCETableOffset; //points to ATOM_PPLIB_VCE_Table
114 USHORT usUVDTableOffset; //points to ATOM_PPLIB_UVD_Table
115 USHORT usSAMUTableOffset; //points to ATOM_PPLIB_SAMU_Table
116 USHORT usPPMTableOffset; //points to ATOM_PPLIB_PPM_Table
117 USHORT usACPTableOffset; //points to ATOM_PPLIB_ACP_Table
118 /* points to ATOM_PPLIB_POWERTUNE_Table */
119 USHORT usPowerTuneTableOffset;
120 /* points to ATOM_PPLIB_CLOCK_Voltage_Dependency_Table for sclkVddgfxTable */
121 USHORT usSclkVddgfxTableOffset;
122 } ATOM_PPLIB_EXTENDEDHEADER;
124 //// ATOM_PPLIB_POWERPLAYTABLE::ulPlatformCaps
125 #define ATOM_PP_PLATFORM_CAP_BACKBIAS 1
126 #define ATOM_PP_PLATFORM_CAP_POWERPLAY 2
127 #define ATOM_PP_PLATFORM_CAP_SBIOSPOWERSOURCE 4
128 #define ATOM_PP_PLATFORM_CAP_ASPM_L0s 8
129 #define ATOM_PP_PLATFORM_CAP_ASPM_L1 16
130 #define ATOM_PP_PLATFORM_CAP_HARDWAREDC 32
131 #define ATOM_PP_PLATFORM_CAP_GEMINIPRIMARY 64
132 #define ATOM_PP_PLATFORM_CAP_STEPVDDC 128
133 #define ATOM_PP_PLATFORM_CAP_VOLTAGECONTROL 256
134 #define ATOM_PP_PLATFORM_CAP_SIDEPORTCONTROL 512
135 #define ATOM_PP_PLATFORM_CAP_TURNOFFPLL_ASPML1 1024
136 #define ATOM_PP_PLATFORM_CAP_HTLINKCONTROL 2048
137 #define ATOM_PP_PLATFORM_CAP_MVDDCONTROL 4096
138 #define ATOM_PP_PLATFORM_CAP_GOTO_BOOT_ON_ALERT 0x2000 // Go to boot state on alerts, e.g. on an AC->DC transition.
139 #define ATOM_PP_PLATFORM_CAP_DONT_WAIT_FOR_VBLANK_ON_ALERT 0x4000 // Do NOT wait for VBLANK during an alert (e.g. AC->DC transition).
140 #define ATOM_PP_PLATFORM_CAP_VDDCI_CONTROL 0x8000 // Does the driver control VDDCI independently from VDDC.
141 #define ATOM_PP_PLATFORM_CAP_REGULATOR_HOT 0x00010000 // Enable the 'regulator hot' feature.
142 #define ATOM_PP_PLATFORM_CAP_BACO 0x00020000 // Does the driver supports BACO state.
143 #define ATOM_PP_PLATFORM_CAP_NEW_CAC_VOLTAGE 0x00040000 // Does the driver supports new CAC voltage table.
144 #define ATOM_PP_PLATFORM_CAP_REVERT_GPIO5_POLARITY 0x00080000 // Does the driver supports revert GPIO5 polarity.
145 #define ATOM_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17 0x00100000 // Does the driver supports thermal2GPIO17.
146 #define ATOM_PP_PLATFORM_CAP_VRHOT_GPIO_CONFIGURABLE 0x00200000 // Does the driver supports VR HOT GPIO Configurable.
147 #define ATOM_PP_PLATFORM_CAP_TEMP_INVERSION 0x00400000 // Does the driver supports Temp Inversion feature.
148 #define ATOM_PP_PLATFORM_CAP_EVV 0x00800000
150 typedef struct _ATOM_PPLIB_POWERPLAYTABLE
152 ATOM_COMMON_TABLE_HEADER sHeader;
154 UCHAR ucDataRevision;
157 UCHAR ucStateEntrySize;
158 UCHAR ucClockInfoSize;
159 UCHAR ucNonClockSize;
161 // offset from start of this table to array of ucNumStates ATOM_PPLIB_STATE structures
162 USHORT usStateArrayOffset;
164 // offset from start of this table to array of ASIC-specific structures,
165 // currently ATOM_PPLIB_CLOCK_INFO.
166 USHORT usClockInfoArrayOffset;
168 // offset from start of this table to array of ATOM_PPLIB_NONCLOCK_INFO
169 USHORT usNonClockInfoArrayOffset;
171 USHORT usBackbiasTime; // in microseconds
172 USHORT usVoltageTime; // in microseconds
173 USHORT usTableSize; //the size of this structure, or the extended structure
175 ULONG ulPlatformCaps; // See ATOM_PPLIB_CAPS_*
177 ATOM_PPLIB_THERMALCONTROLLER sThermalController;
179 USHORT usBootClockInfoOffset;
180 USHORT usBootNonClockInfoOffset;
182 } ATOM_PPLIB_POWERPLAYTABLE;
184 typedef struct _ATOM_PPLIB_POWERPLAYTABLE2
186 ATOM_PPLIB_POWERPLAYTABLE basicTable;
187 UCHAR ucNumCustomThermalPolicy;
188 USHORT usCustomThermalPolicyArrayOffset;
189 }ATOM_PPLIB_POWERPLAYTABLE2, *LPATOM_PPLIB_POWERPLAYTABLE2;
191 typedef struct _ATOM_PPLIB_POWERPLAYTABLE3
193 ATOM_PPLIB_POWERPLAYTABLE2 basicTable2;
194 USHORT usFormatID; // To be used ONLY by PPGen.
195 USHORT usFanTableOffset;
196 USHORT usExtendendedHeaderOffset;
197 } ATOM_PPLIB_POWERPLAYTABLE3, *LPATOM_PPLIB_POWERPLAYTABLE3;
199 typedef struct _ATOM_PPLIB_POWERPLAYTABLE4
201 ATOM_PPLIB_POWERPLAYTABLE3 basicTable3;
202 ULONG ulGoldenPPID; // PPGen use only
203 ULONG ulGoldenRevision; // PPGen use only
204 USHORT usVddcDependencyOnSCLKOffset;
205 USHORT usVddciDependencyOnMCLKOffset;
206 USHORT usVddcDependencyOnMCLKOffset;
207 USHORT usMaxClockVoltageOnDCOffset;
208 USHORT usVddcPhaseShedLimitsTableOffset; // Points to ATOM_PPLIB_PhaseSheddingLimits_Table
209 USHORT usMvddDependencyOnMCLKOffset;
210 } ATOM_PPLIB_POWERPLAYTABLE4, *LPATOM_PPLIB_POWERPLAYTABLE4;
212 typedef struct _ATOM_PPLIB_POWERPLAYTABLE5
214 ATOM_PPLIB_POWERPLAYTABLE4 basicTable4;
216 ULONG ulNearTDPLimit;
217 ULONG ulSQRampingThreshold;
218 USHORT usCACLeakageTableOffset; // Points to ATOM_PPLIB_CAC_Leakage_Table
219 ULONG ulCACLeakage; // The iLeakage for driver calculated CAC leakage table
221 USHORT usLoadLineSlope; // in milliOhms * 100
222 } ATOM_PPLIB_POWERPLAYTABLE5, *LPATOM_PPLIB_POWERPLAYTABLE5;
224 //// ATOM_PPLIB_NONCLOCK_INFO::usClassification
225 #define ATOM_PPLIB_CLASSIFICATION_UI_MASK 0x0007
226 #define ATOM_PPLIB_CLASSIFICATION_UI_SHIFT 0
227 #define ATOM_PPLIB_CLASSIFICATION_UI_NONE 0
228 #define ATOM_PPLIB_CLASSIFICATION_UI_BATTERY 1
229 #define ATOM_PPLIB_CLASSIFICATION_UI_BALANCED 3
230 #define ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE 5
231 // 2, 4, 6, 7 are reserved
233 #define ATOM_PPLIB_CLASSIFICATION_BOOT 0x0008
234 #define ATOM_PPLIB_CLASSIFICATION_THERMAL 0x0010
235 #define ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE 0x0020
236 #define ATOM_PPLIB_CLASSIFICATION_REST 0x0040
237 #define ATOM_PPLIB_CLASSIFICATION_FORCED 0x0080
238 #define ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE 0x0100
239 #define ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE 0x0200
240 #define ATOM_PPLIB_CLASSIFICATION_UVDSTATE 0x0400
241 #define ATOM_PPLIB_CLASSIFICATION_3DLOW 0x0800
242 #define ATOM_PPLIB_CLASSIFICATION_ACPI 0x1000
243 #define ATOM_PPLIB_CLASSIFICATION_HD2STATE 0x2000
244 #define ATOM_PPLIB_CLASSIFICATION_HDSTATE 0x4000
245 #define ATOM_PPLIB_CLASSIFICATION_SDSTATE 0x8000
247 //// ATOM_PPLIB_NONCLOCK_INFO::usClassification2
248 #define ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 0x0001
249 #define ATOM_PPLIB_CLASSIFICATION2_ULV 0x0002
250 #define ATOM_PPLIB_CLASSIFICATION2_MVC 0x0004 //Multi-View Codec (BD-3D)
252 //// ATOM_PPLIB_NONCLOCK_INFO::ulCapsAndSettings
253 #define ATOM_PPLIB_SINGLE_DISPLAY_ONLY 0x00000001
254 #define ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK 0x00000002
256 // 0 is 2.5Gb/s, 1 is 5Gb/s
257 #define ATOM_PPLIB_PCIE_LINK_SPEED_MASK 0x00000004
258 #define ATOM_PPLIB_PCIE_LINK_SPEED_SHIFT 2
260 // lanes - 1: 1, 2, 4, 8, 12, 16 permitted by PCIE spec
261 #define ATOM_PPLIB_PCIE_LINK_WIDTH_MASK 0x000000F8
262 #define ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT 3
264 // lookup into reduced refresh-rate table
265 #define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_MASK 0x00000F00
266 #define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_SHIFT 8
268 #define ATOM_PPLIB_LIMITED_REFRESHRATE_UNLIMITED 0
269 #define ATOM_PPLIB_LIMITED_REFRESHRATE_50HZ 1
270 // 2-15 TBD as needed.
272 #define ATOM_PPLIB_SOFTWARE_DISABLE_LOADBALANCING 0x00001000
273 #define ATOM_PPLIB_SOFTWARE_ENABLE_SLEEP_FOR_TIMESTAMPS 0x00002000
275 #define ATOM_PPLIB_DISALLOW_ON_DC 0x00004000
277 #define ATOM_PPLIB_ENABLE_VARIBRIGHT 0x00008000
279 //memory related flags
280 #define ATOM_PPLIB_SWSTATE_MEMORY_DLL_OFF 0x000010000
282 //M3 Arb //2bits, current 3 sets of parameters in total
283 #define ATOM_PPLIB_M3ARB_MASK 0x00060000
284 #define ATOM_PPLIB_M3ARB_SHIFT 17
286 #define ATOM_PPLIB_ENABLE_DRR 0x00080000
288 // remaining 16 bits are reserved
289 typedef struct _ATOM_PPLIB_THERMAL_STATE
291 UCHAR ucMinTemperature;
292 UCHAR ucMaxTemperature;
293 UCHAR ucThermalAction;
294 }ATOM_PPLIB_THERMAL_STATE, *LPATOM_PPLIB_THERMAL_STATE;
296 // Contained in an array starting at the offset
297 // in ATOM_PPLIB_POWERPLAYTABLE::usNonClockInfoArrayOffset.
298 // referenced from ATOM_PPLIB_STATE_INFO::ucNonClockStateIndex
299 #define ATOM_PPLIB_NONCLOCKINFO_VER1 12
300 #define ATOM_PPLIB_NONCLOCKINFO_VER2 24
301 typedef struct _ATOM_PPLIB_NONCLOCK_INFO
303 USHORT usClassification;
304 UCHAR ucMinTemperature;
305 UCHAR ucMaxTemperature;
306 ULONG ulCapsAndSettings;
307 UCHAR ucRequiredPower;
308 USHORT usClassification2;
312 } ATOM_PPLIB_NONCLOCK_INFO;
314 // Contained in an array starting at the offset
315 // in ATOM_PPLIB_POWERPLAYTABLE::usClockInfoArrayOffset.
316 // referenced from ATOM_PPLIB_STATE::ucClockStateIndices
317 typedef struct _ATOM_PPLIB_R600_CLOCK_INFO
319 USHORT usEngineClockLow;
320 UCHAR ucEngineClockHigh;
322 USHORT usMemoryClockLow;
323 UCHAR ucMemoryClockHigh;
329 ULONG ulFlags; // ATOM_PPLIB_R600_FLAGS_*
331 } ATOM_PPLIB_R600_CLOCK_INFO;
333 // ulFlags in ATOM_PPLIB_R600_CLOCK_INFO
334 #define ATOM_PPLIB_R600_FLAGS_PCIEGEN2 1
335 #define ATOM_PPLIB_R600_FLAGS_UVDSAFE 2
336 #define ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE 4
337 #define ATOM_PPLIB_R600_FLAGS_MEMORY_ODT_OFF 8
338 #define ATOM_PPLIB_R600_FLAGS_MEMORY_DLL_OFF 16
339 #define ATOM_PPLIB_R600_FLAGS_LOWPOWER 32 // On the RV770 use 'low power' setting (sequencer S0).
341 typedef struct _ATOM_PPLIB_RS780_CLOCK_INFO
344 USHORT usLowEngineClockLow; // Low Engine clock in MHz (the same way as on the R600).
345 UCHAR ucLowEngineClockHigh;
346 USHORT usHighEngineClockLow; // High Engine clock in MHz.
347 UCHAR ucHighEngineClockHigh;
348 USHORT usMemoryClockLow; // For now one of the ATOM_PPLIB_RS780_SPMCLK_XXXX constants.
349 UCHAR ucMemoryClockHigh; // Currentyl unused.
350 UCHAR ucPadding; // For proper alignment and size.
351 USHORT usVDDC; // For the 780, use: None, Low, High, Variable
352 UCHAR ucMaxHTLinkWidth; // From SBIOS - {2, 4, 8, 16}
353 UCHAR ucMinHTLinkWidth; // From SBIOS - {2, 4, 8, 16}. Effective only if CDLW enabled. Minimum down stream width could
354 USHORT usHTLinkFreq; // See definition ATOM_PPLIB_RS780_HTLINKFREQ_xxx or in MHz(>=200).
356 } ATOM_PPLIB_RS780_CLOCK_INFO;
358 #define ATOM_PPLIB_RS780_VOLTAGE_NONE 0
359 #define ATOM_PPLIB_RS780_VOLTAGE_LOW 1
360 #define ATOM_PPLIB_RS780_VOLTAGE_HIGH 2
361 #define ATOM_PPLIB_RS780_VOLTAGE_VARIABLE 3
363 #define ATOM_PPLIB_RS780_SPMCLK_NONE 0 // We cannot change the side port memory clock, leave it as it is.
364 #define ATOM_PPLIB_RS780_SPMCLK_LOW 1
365 #define ATOM_PPLIB_RS780_SPMCLK_HIGH 2
367 #define ATOM_PPLIB_RS780_HTLINKFREQ_NONE 0
368 #define ATOM_PPLIB_RS780_HTLINKFREQ_LOW 1
369 #define ATOM_PPLIB_RS780_HTLINKFREQ_HIGH 2
371 typedef struct _ATOM_PPLIB_EVERGREEN_CLOCK_INFO
373 USHORT usEngineClockLow;
374 UCHAR ucEngineClockHigh;
376 USHORT usMemoryClockLow;
377 UCHAR ucMemoryClockHigh;
383 ULONG ulFlags; // ATOM_PPLIB_R600_FLAGS_*
385 } ATOM_PPLIB_EVERGREEN_CLOCK_INFO;
387 typedef struct _ATOM_PPLIB_SI_CLOCK_INFO
389 USHORT usEngineClockLow;
390 UCHAR ucEngineClockHigh;
392 USHORT usMemoryClockLow;
393 UCHAR ucMemoryClockHigh;
400 ULONG ulFlags; // ATOM_PPLIB_SI_FLAGS_*, no flag is necessary for now
402 } ATOM_PPLIB_SI_CLOCK_INFO;
404 typedef struct _ATOM_PPLIB_CI_CLOCK_INFO
406 USHORT usEngineClockLow;
407 UCHAR ucEngineClockHigh;
409 USHORT usMemoryClockLow;
410 UCHAR ucMemoryClockHigh;
414 } ATOM_PPLIB_CI_CLOCK_INFO;
416 typedef struct _ATOM_PPLIB_SUMO_CLOCK_INFO{
417 USHORT usEngineClockLow; //clockfrequency & 0xFFFF. The unit is in 10khz
418 UCHAR ucEngineClockHigh; //clockfrequency >> 16.
419 UCHAR vddcIndex; //2-bit vddc index;
421 //please initalize to 0
423 //please initialize to 0s
425 }ATOM_PPLIB_SUMO_CLOCK_INFO;
427 typedef struct _ATOM_PPLIB_CZ_CLOCK_INFO {
430 } ATOM_PPLIB_CZ_CLOCK_INFO;
432 typedef struct _ATOM_PPLIB_STATE_V2
434 //number of valid dpm levels in this state; Driver uses it to calculate the whole
435 //size of the state: sizeof(ATOM_PPLIB_STATE_V2) + (ucNumDPMLevels - 1) * sizeof(UCHAR)
436 UCHAR ucNumDPMLevels;
438 //a index to the array of nonClockInfos
439 UCHAR nonClockInfoIndex;
441 * Driver will read the first ucNumDPMLevels in this array
443 UCHAR clockInfoIndex[1];
444 } ATOM_PPLIB_STATE_V2;
446 typedef struct _StateArray{
447 //how many states we have
450 ATOM_PPLIB_STATE_V2 states[1];
454 typedef struct _ClockInfoArray{
455 //how many clock levels we have
458 //sizeof(ATOM_PPLIB_CLOCK_INFO)
464 typedef struct _NonClockInfoArray{
466 //how many non-clock levels we have. normally should be same as number of states
468 //sizeof(ATOM_PPLIB_NONCLOCK_INFO)
471 ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[1];
474 typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Record
479 }ATOM_PPLIB_Clock_Voltage_Dependency_Record;
481 typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Table
483 UCHAR ucNumEntries; // Number of entries.
484 ATOM_PPLIB_Clock_Voltage_Dependency_Record entries[1]; // Dynamically allocate entries.
485 }ATOM_PPLIB_Clock_Voltage_Dependency_Table;
487 typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Record
495 }ATOM_PPLIB_Clock_Voltage_Limit_Record;
497 typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Table
499 UCHAR ucNumEntries; // Number of entries.
500 ATOM_PPLIB_Clock_Voltage_Limit_Record entries[1]; // Dynamically allocate entries.
501 }ATOM_PPLIB_Clock_Voltage_Limit_Table;
503 union _ATOM_PPLIB_CAC_Leakage_Record
507 USHORT usVddc; // We use this field for the "fake" standardized VDDC for power calculations; For CI and newer, we use this as the real VDDC value. in CI we read it as StdVoltageHiSidd
508 ULONG ulLeakageValue; // For CI and newer we use this as the "fake" standar VDDC value. in CI we read it as StdVoltageLoSidd
519 typedef union _ATOM_PPLIB_CAC_Leakage_Record ATOM_PPLIB_CAC_Leakage_Record;
521 typedef struct _ATOM_PPLIB_CAC_Leakage_Table
523 UCHAR ucNumEntries; // Number of entries.
524 ATOM_PPLIB_CAC_Leakage_Record entries[1]; // Dynamically allocate entries.
525 }ATOM_PPLIB_CAC_Leakage_Table;
527 typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Record
534 }ATOM_PPLIB_PhaseSheddingLimits_Record;
536 typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Table
538 UCHAR ucNumEntries; // Number of entries.
539 ATOM_PPLIB_PhaseSheddingLimits_Record entries[1]; // Dynamically allocate entries.
540 }ATOM_PPLIB_PhaseSheddingLimits_Table;
542 typedef struct _VCEClockInfo{
549 typedef struct _VCEClockInfoArray{
551 VCEClockInfo entries[1];
554 typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record
557 UCHAR ucVCEClockInfoIndex;
558 }ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record;
560 typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table
563 ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record entries[1];
564 }ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table;
566 typedef struct _ATOM_PPLIB_VCE_State_Record
568 UCHAR ucVCEClockInfoIndex;
569 UCHAR ucClockInfoIndex; //highest 2 bits indicates memory p-states, lower 6bits indicates index to ClockInfoArrary
570 }ATOM_PPLIB_VCE_State_Record;
572 typedef struct _ATOM_PPLIB_VCE_State_Table
575 ATOM_PPLIB_VCE_State_Record entries[1];
576 }ATOM_PPLIB_VCE_State_Table;
579 typedef struct _ATOM_PPLIB_VCE_Table
582 // VCEClockInfoArray array;
583 // ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table limits;
584 // ATOM_PPLIB_VCE_State_Table states;
585 }ATOM_PPLIB_VCE_Table;
588 typedef struct _UVDClockInfo{
595 typedef struct _UVDClockInfoArray{
597 UVDClockInfo entries[1];
600 typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record
603 UCHAR ucUVDClockInfoIndex;
604 }ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record;
606 typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table
609 ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record entries[1];
610 }ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table;
612 typedef struct _ATOM_PPLIB_UVD_Table
615 // UVDClockInfoArray array;
616 // ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table limits;
617 }ATOM_PPLIB_UVD_Table;
619 typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Record
622 USHORT usSAMClockLow;
623 UCHAR ucSAMClockHigh;
624 }ATOM_PPLIB_SAMClk_Voltage_Limit_Record;
626 typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Table{
628 ATOM_PPLIB_SAMClk_Voltage_Limit_Record entries[1];
629 }ATOM_PPLIB_SAMClk_Voltage_Limit_Table;
631 typedef struct _ATOM_PPLIB_SAMU_Table
634 ATOM_PPLIB_SAMClk_Voltage_Limit_Table limits;
635 }ATOM_PPLIB_SAMU_Table;
637 typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Record
640 USHORT usACPClockLow;
641 UCHAR ucACPClockHigh;
642 }ATOM_PPLIB_ACPClk_Voltage_Limit_Record;
644 typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Table{
646 ATOM_PPLIB_ACPClk_Voltage_Limit_Record entries[1];
647 }ATOM_PPLIB_ACPClk_Voltage_Limit_Table;
649 typedef struct _ATOM_PPLIB_ACP_Table
652 ATOM_PPLIB_ACPClk_Voltage_Limit_Table limits;
653 }ATOM_PPLIB_ACP_Table;
655 typedef struct _ATOM_PowerTune_Table{
657 USHORT usConfigurableTDP;
659 USHORT usBatteryPowerLimit;
660 USHORT usSmallPowerLimit;
661 USHORT usLowCACLeakage;
662 USHORT usHighCACLeakage;
663 }ATOM_PowerTune_Table;
665 typedef struct _ATOM_PPLIB_POWERTUNE_Table
668 ATOM_PowerTune_Table power_tune_table;
669 }ATOM_PPLIB_POWERTUNE_Table;
671 typedef struct _ATOM_PPLIB_POWERTUNE_Table_V1
674 ATOM_PowerTune_Table power_tune_table;
675 USHORT usMaximumPowerDeliveryLimit;
677 } ATOM_PPLIB_POWERTUNE_Table_V1;
679 #define ATOM_PPM_A_A 1
680 #define ATOM_PPM_A_I 2
681 typedef struct _ATOM_PPLIB_PPM_Table
684 UCHAR ucPpmDesign; //A+I or A+A
685 USHORT usCpuCoreNumber;
687 ULONG ulSmallACPlatformTDP;
689 ULONG ulSmallACPlatformTDC;
692 ULONG ulDGpuUlvPower;
694 } ATOM_PPLIB_PPM_Table;