drivers/gpu/drm/i915/i915_gpu_error.c

   1 /*
   2  * Copyright (c) 2008 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *    Keith Packard <keithp@keithp.com>
  26  *    Mika Kuoppala <mika.kuoppala@intel.com>
  27  *
  28  */
  29
  30 #include <generated/utsrelease.h>
  31 #include "i915_drv.h"
  32
  33 static const char *yesno(int v)
  34 {
  35         return v ? "yes" : "no";
  36 }
  37
  38 static const char *ring_str(int ring)
  39 {
  40         switch (ring) {
  41         case RCS: return "render";
  42         case VCS: return "bsd";
  43         case BCS: return "blt";
  44         case VECS: return "vebox";
  45         case VCS2: return "bsd2";
  46         default: return "";
  47         }
  48 }
  49
  50 static const char *pin_flag(int pinned)
  51 {
  52         if (pinned > 0)
  53                 return " P";
  54         else if (pinned < 0)
  55                 return " p";
  56         else
  57                 return "";
  58 }
  59
  60 static const char *tiling_flag(int tiling)
  61 {
  62         switch (tiling) {
  63         default:
  64         case I915_TILING_NONE: return "";
  65         case I915_TILING_X: return " X";
  66         case I915_TILING_Y: return " Y";
  67         }
  68 }
  69
  70 static const char *dirty_flag(int dirty)
  71 {
  72         return dirty ? " dirty" : "";
  73 }
  74
  75 static const char *purgeable_flag(int purgeable)
  76 {
  77         return purgeable ? " purgeable" : "";
  78 }
  79
  80 static bool __i915_error_ok(struct drm_i915_error_state_buf *e)
  81 {
  82
  83         if (!e->err && WARN(e->bytes > (e->size - 1), "overflow")) {
  84                 e->err = -ENOSPC;
  85                 return false;
  86         }
  87
  88         if (e->bytes == e->size - 1 || e->err)
  89                 return false;
  90
  91         return true;
  92 }
  93
  94 static bool __i915_error_seek(struct drm_i915_error_state_buf *e,
  95                               unsigned len)
  96 {
  97         if (e->pos + len <= e->start) {
  98                 e->pos += len;
  99                 return false;
 100         }
 101
 102         /* First vsnprintf needs to fit in its entirety for memmove */
 103         if (len >= e->size) {
 104                 e->err = -EIO;
 105                 return false;
 106         }
 107
 108         return true;
 109 }
 110
 111 static void __i915_error_advance(struct drm_i915_error_state_buf *e,
 112                                  unsigned len)
 113 {
 114         /* If this is first printf in this window, adjust it so that
 115          * start position matches start of the buffer
 116          */
 117
 118         if (e->pos < e->start) {
 119                 const size_t off = e->start - e->pos;
 120
 121                 /* Should not happen but be paranoid */
 122                 if (off > len || e->bytes) {
 123                         e->err = -EIO;
 124                         return;
 125                 }
 126
 127                 memmove(e->buf, e->buf + off, len - off);
 128                 e->bytes = len - off;
 129                 e->pos = e->start;
 130                 return;
 131         }
 132
 133         e->bytes += len;
 134         e->pos += len;
 135 }
 136
 137 static void i915_error_vprintf(struct drm_i915_error_state_buf *e,
 138                                const char *f, va_list args)
 139 {
 140         unsigned len;
 141
 142         if (!__i915_error_ok(e))
 143                 return;
 144
 145         /* Seek the first printf which is hits start position */
 146         if (e->pos < e->start) {
 147                 va_list tmp;
 148
 149                 va_copy(tmp, args);
 150                 len = vsnprintf(NULL, 0, f, tmp);
 151                 va_end(tmp);
 152
 153                 if (!__i915_error_seek(e, len))
 154                         return;
 155         }
 156
 157         len = vsnprintf(e->buf + e->bytes, e->size - e->bytes, f, args);
 158         if (len >= e->size - e->bytes)
 159                 len = e->size - e->bytes - 1;
 160
 161         __i915_error_advance(e, len);
 162 }
 163
 164 static void i915_error_puts(struct drm_i915_error_state_buf *e,
 165                             const char *str)
 166 {
 167         unsigned len;
 168
 169         if (!__i915_error_ok(e))
 170                 return;
 171
 172         len = strlen(str);
 173
 174         /* Seek the first printf which is hits start position */
 175         if (e->pos < e->start) {
 176                 if (!__i915_error_seek(e, len))
 177                         return;
 178         }
 179
 180         if (len >= e->size - e->bytes)
 181                 len = e->size - e->bytes - 1;
 182         memcpy(e->buf + e->bytes, str, len);
 183
 184         __i915_error_advance(e, len);
 185 }
 186
 187 #define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__)
 188 #define err_puts(e, s) i915_error_puts(e, s)
 189
 190 static void print_error_buffers(struct drm_i915_error_state_buf *m,
 191                                 const char *name,
 192                                 struct drm_i915_error_buffer *err,
 193                                 int count)
 194 {
 195         err_printf(m, "  %s [%d]:\n", name, count);
 196
 197         while (count--) {
 198                 err_printf(m, "    %08x %8u %02x %02x %x %x",
 199                            err->gtt_offset,
 200                            err->size,
 201                            err->read_domains,
 202                            err->write_domain,
 203                            err->rseqno, err->wseqno);
 204                 err_puts(m, pin_flag(err->pinned));
 205                 err_puts(m, tiling_flag(err->tiling));
 206                 err_puts(m, dirty_flag(err->dirty));
 207                 err_puts(m, purgeable_flag(err->purgeable));
 208                 err_puts(m, err->userptr ? " userptr" : "");
 209                 err_puts(m, err->ring != -1 ? " " : "");
 210                 err_puts(m, ring_str(err->ring));
 211                 err_puts(m, i915_cache_level_str(m->i915, err->cache_level));
 212
 213                 if (err->name)
 214                         err_printf(m, " (name: %d)", err->name);
 215                 if (err->fence_reg != I915_FENCE_REG_NONE)
 216                         err_printf(m, " (fence: %d)", err->fence_reg);
 217
 218                 err_puts(m, "\n");
 219                 err++;
 220         }
 221 }
 222
 223 static const char *hangcheck_action_to_str(enum intel_ring_hangcheck_action a)
 224 {
 225         switch (a) {
 226         case HANGCHECK_IDLE:
 227                 return "idle";
 228         case HANGCHECK_WAIT:
 229                 return "wait";
 230         case HANGCHECK_ACTIVE:
 231                 return "active";
 232         case HANGCHECK_ACTIVE_LOOP:
 233                 return "active (loop)";
 234         case HANGCHECK_KICK:
 235                 return "kick";
 236         case HANGCHECK_HUNG:
 237                 return "hung";
 238         }
 239
 240         return "unknown";
 241 }
 242
 243 static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
 244                                   struct drm_device *dev,
 245                                   struct drm_i915_error_ring *ring)
 246 {
 247         if (!ring->valid)
 248                 return;
 249
 250         err_printf(m, "  HEAD: 0x%08x\n", ring->head);
 251         err_printf(m, "  TAIL: 0x%08x\n", ring->tail);
 252         err_printf(m, "  CTL: 0x%08x\n", ring->ctl);
 253         err_printf(m, "  HWS: 0x%08x\n", ring->hws);
 254         err_printf(m, "  ACTHD: 0x%08x %08x\n", (u32)(ring->acthd>>32), (u32)ring->acthd);
 255         err_printf(m, "  IPEIR: 0x%08x\n", ring->ipeir);
 256         err_printf(m, "  IPEHR: 0x%08x\n", ring->ipehr);
 257         err_printf(m, "  INSTDONE: 0x%08x\n", ring->instdone);
 258         if (INTEL_INFO(dev)->gen >= 4) {
 259                 err_printf(m, "  BBADDR: 0x%08x %08x\n", (u32)(ring->bbaddr>>32), (u32)ring->bbaddr);
 260                 err_printf(m, "  BB_STATE: 0x%08x\n", ring->bbstate);
 261                 err_printf(m, "  INSTPS: 0x%08x\n", ring->instps);
 262         }
 263         err_printf(m, "  INSTPM: 0x%08x\n", ring->instpm);
 264         err_printf(m, "  FADDR: 0x%08x %08x\n", upper_32_bits(ring->faddr),
 265                    lower_32_bits(ring->faddr));
 266         if (INTEL_INFO(dev)->gen >= 6) {
 267                 err_printf(m, "  RC PSMI: 0x%08x\n", ring->rc_psmi);
 268                 err_printf(m, "  FAULT_REG: 0x%08x\n", ring->fault_reg);
 269                 err_printf(m, "  SYNC_0: 0x%08x [last synced 0x%08x]\n",
 270                            ring->semaphore_mboxes[0],
 271                            ring->semaphore_seqno[0]);
 272                 err_printf(m, "  SYNC_1: 0x%08x [last synced 0x%08x]\n",
 273                            ring->semaphore_mboxes[1],
 274                            ring->semaphore_seqno[1]);
 275                 if (HAS_VEBOX(dev)) {
 276                         err_printf(m, "  SYNC_2: 0x%08x [last synced 0x%08x]\n",
 277                                    ring->semaphore_mboxes[2],
 278                                    ring->semaphore_seqno[2]);
 279                 }
 280         }
 281         if (USES_PPGTT(dev)) {
 282                 err_printf(m, "  GFX_MODE: 0x%08x\n", ring->vm_info.gfx_mode);
 283
 284                 if (INTEL_INFO(dev)->gen >= 8) {
 285                         int i;
 286                         for (i = 0; i < 4; i++)
 287                                 err_printf(m, "  PDP%d: 0x%016llx\n",
 288                                            i, ring->vm_info.pdp[i]);
 289                 } else {
 290                         err_printf(m, "  PP_DIR_BASE: 0x%08x\n",
 291                                    ring->vm_info.pp_dir_base);
 292                 }
 293         }
 294         err_printf(m, "  seqno: 0x%08x\n", ring->seqno);
 295         err_printf(m, "  waiting: %s\n", yesno(ring->waiting));
 296         err_printf(m, "  ring->head: 0x%08x\n", ring->cpu_ring_head);
 297         err_printf(m, "  ring->tail: 0x%08x\n", ring->cpu_ring_tail);
 298         err_printf(m, "  hangcheck: %s [%d]\n",
 299                    hangcheck_action_to_str(ring->hangcheck_action),
 300                    ring->hangcheck_score);
 301 }
 302
 303 void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...)
 304 {
 305         va_list args;
 306
 307         va_start(args, f);
 308         i915_error_vprintf(e, f, args);
 309         va_end(args);
 310 }
 311
 312 static void print_error_obj(struct drm_i915_error_state_buf *m,
 313                             struct drm_i915_error_object *obj)
 314 {
 315         int page, offset, elt;
 316
 317         for (page = offset = 0; page < obj->page_count; page++) {
 318                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 319                         err_printf(m, "%08x :  %08x\n", offset,
 320                                    obj->pages[page][elt]);
 321                         offset += 4;
 322                 }
 323         }
 324 }
 325
 326 int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
 327                             const struct i915_error_state_file_priv *error_priv)
 328 {
 329         struct drm_device *dev = error_priv->dev;
 330         struct drm_i915_private *dev_priv = dev->dev_private;
 331         struct drm_i915_error_state *error = error_priv->error;
 332         struct drm_i915_error_object *obj;
 333         int i, j, offset, elt;
 334         int max_hangcheck_score;
 335
 336         if (!error) {
 337                 err_printf(m, "no error state collected\n");
 338                 goto out;
 339         }
 340
 341         err_printf(m, "%s\n", error->error_msg);
 342         err_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
 343                    error->time.tv_usec);
 344         err_printf(m, "Kernel: " UTS_RELEASE "\n");
 345         max_hangcheck_score = 0;
 346         for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
 347                 if (error->ring[i].hangcheck_score > max_hangcheck_score)
 348                         max_hangcheck_score = error->ring[i].hangcheck_score;
 349         }
 350         for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
 351                 if (error->ring[i].hangcheck_score == max_hangcheck_score &&
 352                     error->ring[i].pid != -1) {
 353                         err_printf(m, "Active process (on ring %s): %s [%d]\n",
 354                                    ring_str(i),
 355                                    error->ring[i].comm,
 356                                    error->ring[i].pid);
 357                 }
 358         }
 359         err_printf(m, "Reset count: %u\n", error->reset_count);
 360         err_printf(m, "Suspend count: %u\n", error->suspend_count);
 361         err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device);
 362         err_printf(m, "EIR: 0x%08x\n", error->eir);
 363         err_printf(m, "IER: 0x%08x\n", error->ier);
 364         if (INTEL_INFO(dev)->gen >= 8) {
 365                 for (i = 0; i < 4; i++)
 366                         err_printf(m, "GTIER gt %d: 0x%08x\n", i,
 367                                    error->gtier[i]);
 368         } else if (HAS_PCH_SPLIT(dev) || IS_VALLEYVIEW(dev))
 369                 err_printf(m, "GTIER: 0x%08x\n", error->gtier[0]);
 370         err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
 371         err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
 372         err_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
 373         err_printf(m, "CCID: 0x%08x\n", error->ccid);
 374         err_printf(m, "Missed interrupts: 0x%08lx\n", dev_priv->gpu_error.missed_irq_rings);
 375
 376         for (i = 0; i < dev_priv->num_fence_regs; i++)
 377                 err_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);
 378
 379         for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++)
 380                 err_printf(m, "  INSTDONE_%d: 0x%08x\n", i,
 381                            error->extra_instdone[i]);
 382
 383         if (INTEL_INFO(dev)->gen >= 6) {
 384                 err_printf(m, "ERROR: 0x%08x\n", error->error);
 385                 err_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
 386         }
 387
 388         if (INTEL_INFO(dev)->gen == 7)
 389                 err_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
 390
 391         for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
 392                 err_printf(m, "%s command stream:\n", ring_str(i));
 393                 i915_ring_error_state(m, dev, &error->ring[i]);
 394         }
 395
 396         for (i = 0; i < error->vm_count; i++) {
 397                 err_printf(m, "vm[%d]\n", i);
 398
 399                 print_error_buffers(m, "Active",
 400                                     error->active_bo[i],
 401                                     error->active_bo_count[i]);
 402
 403                 print_error_buffers(m, "Pinned",
 404                                     error->pinned_bo[i],
 405                                     error->pinned_bo_count[i]);
 406         }
 407
 408         for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
 409                 obj = error->ring[i].batchbuffer;
 410                 if (obj) {
 411                         err_puts(m, dev_priv->ring[i].name);
 412                         if (error->ring[i].pid != -1)
 413                                 err_printf(m, " (submitted by %s [%d])",
 414                                            error->ring[i].comm,
 415                                            error->ring[i].pid);
 416                         err_printf(m, " --- gtt_offset = 0x%08x\n",
 417                                    obj->gtt_offset);
 418                         print_error_obj(m, obj);
 419                 }
 420
 421                 obj = error->ring[i].wa_batchbuffer;
 422                 if (obj) {
 423                         err_printf(m, "%s (w/a) --- gtt_offset = 0x%08x\n",
 424                                    dev_priv->ring[i].name, obj->gtt_offset);
 425                         print_error_obj(m, obj);
 426                 }
 427
 428                 if (error->ring[i].num_requests) {
 429                         err_printf(m, "%s --- %d requests\n",
 430                                    dev_priv->ring[i].name,
 431                                    error->ring[i].num_requests);
 432                         for (j = 0; j < error->ring[i].num_requests; j++) {
 433                                 err_printf(m, "  seqno 0x%08x, emitted %ld, tail 0x%08x\n",
 434                                            error->ring[i].requests[j].seqno,
 435                                            error->ring[i].requests[j].jiffies,
 436                                            error->ring[i].requests[j].tail);
 437                         }
 438                 }
 439
 440                 if ((obj = error->ring[i].ringbuffer)) {
 441                         err_printf(m, "%s --- ringbuffer = 0x%08x\n",
 442                                    dev_priv->ring[i].name,
 443                                    obj->gtt_offset);
 444                         print_error_obj(m, obj);
 445                 }
 446
 447                 if ((obj = error->ring[i].hws_page)) {
 448                         err_printf(m, "%s --- HW Status = 0x%08x\n",
 449                                    dev_priv->ring[i].name,
 450                                    obj->gtt_offset);
 451                         offset = 0;
 452                         for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
 453                                 err_printf(m, "[%04x] %08x %08x %08x %08x\n",
 454                                            offset,
 455                                            obj->pages[0][elt],
 456                                            obj->pages[0][elt+1],
 457                                            obj->pages[0][elt+2],
 458                                            obj->pages[0][elt+3]);
 459                                         offset += 16;
 460                         }
 461                 }
 462
 463                 if ((obj = error->ring[i].ctx)) {
 464                         err_printf(m, "%s --- HW Context = 0x%08x\n",
 465                                    dev_priv->ring[i].name,
 466                                    obj->gtt_offset);
 467                         print_error_obj(m, obj);
 468                 }
 469         }
 470
 471         if ((obj = error->semaphore_obj)) {
 472                 err_printf(m, "Semaphore page = 0x%08x\n", obj->gtt_offset);
 473                 for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
 474                         err_printf(m, "[%04x] %08x %08x %08x %08x\n",
 475                                    elt * 4,
 476                                    obj->pages[0][elt],
 477                                    obj->pages[0][elt+1],
 478                                    obj->pages[0][elt+2],
 479                                    obj->pages[0][elt+3]);
 480                 }
 481         }
 482
 483         if (error->overlay)
 484                 intel_overlay_print_error_state(m, error->overlay);
 485
 486         if (error->display)
 487                 intel_display_print_error_state(m, dev, error->display);
 488
 489 out:
 490         if (m->bytes == 0 && m->err)
 491                 return m->err;
 492
 493         return 0;
 494 }
 495
 496 int i915_error_state_buf_init(struct drm_i915_error_state_buf *ebuf,
 497                               struct drm_i915_private *i915,
 498                               size_t count, loff_t pos)
 499 {
 500         memset(ebuf, 0, sizeof(*ebuf));
 501         ebuf->i915 = i915;
 502
 503         /* We need to have enough room to store any i915_error_state printf
 504          * so that we can move it to start position.
 505          */
 506         ebuf->size = count + 1 > PAGE_SIZE ? count + 1 : PAGE_SIZE;
 507         ebuf->buf = kmalloc(ebuf->size,
 508                                 GFP_TEMPORARY | __GFP_NORETRY | __GFP_NOWARN);
 509
 510         if (ebuf->buf == NULL) {
 511                 ebuf->size = PAGE_SIZE;
 512                 ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY);
 513         }
 514
 515         if (ebuf->buf == NULL) {
 516                 ebuf->size = 128;
 517                 ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY);
 518         }
 519
 520         if (ebuf->buf == NULL)
 521                 return -ENOMEM;
 522
 523         ebuf->start = pos;
 524
 525         return 0;
 526 }
 527
 528 static void i915_error_object_free(struct drm_i915_error_object *obj)
 529 {
 530         int page;
 531
 532         if (obj == NULL)
 533                 return;
 534
 535         for (page = 0; page < obj->page_count; page++)
 536                 kfree(obj->pages[page]);
 537
 538         kfree(obj);
 539 }
 540
 541 static void i915_error_state_free(struct kref *error_ref)
 542 {
 543         struct drm_i915_error_state *error = container_of(error_ref,
 544                                                           typeof(*error), ref);
 545         int i;
 546
 547         for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
 548                 i915_error_object_free(error->ring[i].batchbuffer);
 549                 i915_error_object_free(error->ring[i].ringbuffer);
 550                 i915_error_object_free(error->ring[i].hws_page);
 551                 i915_error_object_free(error->ring[i].ctx);
 552                 kfree(error->ring[i].requests);
 553         }
 554
 555         i915_error_object_free(error->semaphore_obj);
 556         kfree(error->active_bo);
 557         kfree(error->overlay);
 558         kfree(error->display);
 559         kfree(error);
 560 }
 561
 562 static struct drm_i915_error_object *
 563 i915_error_object_create(struct drm_i915_private *dev_priv,
 564                          struct drm_i915_gem_object *src,
 565                          struct i915_address_space *vm)
 566 {
 567         struct drm_i915_error_object *dst;
 568         int num_pages;
 569         bool use_ggtt;
 570         int i = 0;
 571         u32 reloc_offset;
 572
 573         if (src == NULL || src->pages == NULL)
 574                 return NULL;
 575
 576         num_pages = src->base.size >> PAGE_SHIFT;
 577
 578         dst = kmalloc(sizeof(*dst) + num_pages * sizeof(u32 *), GFP_ATOMIC);
 579         if (dst == NULL)
 580                 return NULL;
 581
 582         if (i915_gem_obj_bound(src, vm))
 583                 dst->gtt_offset = i915_gem_obj_offset(src, vm);
 584         else
 585                 dst->gtt_offset = -1;
 586
 587         reloc_offset = dst->gtt_offset;
 588         use_ggtt = (src->cache_level == I915_CACHE_NONE &&
 589                     i915_is_ggtt(vm) &&
 590                     src->has_global_gtt_mapping &&
 591                     reloc_offset + num_pages * PAGE_SIZE <= dev_priv->gtt.mappable_end);
 592
 593         /* Cannot access stolen address directly, try to use the aperture */
 594         if (src->stolen) {
 595                 use_ggtt = true;
 596
 597                 if (!src->has_global_gtt_mapping)
 598                         goto unwind;
 599
 600                 reloc_offset = i915_gem_obj_ggtt_offset(src);
 601                 if (reloc_offset + num_pages * PAGE_SIZE > dev_priv->gtt.mappable_end)
 602                         goto unwind;
 603         }
 604
 605         /* Cannot access snooped pages through the aperture */
 606         if (use_ggtt && src->cache_level != I915_CACHE_NONE && !HAS_LLC(dev_priv->dev))
 607                 goto unwind;
 608
 609         dst->page_count = num_pages;
 610         while (num_pages--) {
 611                 unsigned long flags;
 612                 void *d;
 613
 614                 d = kmalloc(PAGE_SIZE, GFP_ATOMIC);
 615                 if (d == NULL)
 616                         goto unwind;
 617
 618                 local_irq_save(flags);
 619                 if (use_ggtt) {
 620                         void __iomem *s;
 621
 622                         /* Simply ignore tiling or any overlapping fence.
 623                          * It's part of the error state, and this hopefully
 624                          * captures what the GPU read.
 625                          */
 626
 627                         s = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
 628                                                      reloc_offset);
 629                         memcpy_fromio(d, s, PAGE_SIZE);
 630                         io_mapping_unmap_atomic(s);
 631                 } else {
 632                         struct page *page;
 633                         void *s;
 634
 635                         page = i915_gem_object_get_page(src, i);
 636
 637                         drm_clflush_pages(&page, 1);
 638
 639                         s = kmap_atomic(page);
 640                         memcpy(d, s, PAGE_SIZE);
 641                         kunmap_atomic(s);
 642
 643                         drm_clflush_pages(&page, 1);
 644                 }
 645                 local_irq_restore(flags);
 646
 647                 dst->pages[i++] = d;
 648                 reloc_offset += PAGE_SIZE;
 649         }
 650
 651         return dst;
 652
 653 unwind:
 654         while (i--)
 655                 kfree(dst->pages[i]);
 656         kfree(dst);
 657         return NULL;
 658 }
 659 #define i915_error_ggtt_object_create(dev_priv, src) \
 660         i915_error_object_create((dev_priv), (src), &(dev_priv)->gtt.base)
 661
 662 static void capture_bo(struct drm_i915_error_buffer *err,
 663                        struct i915_vma *vma)
 664 {
 665         struct drm_i915_gem_object *obj = vma->obj;
 666
 667         err->size = obj->base.size;
 668         err->name = obj->base.name;
 669         err->rseqno = obj->last_read_seqno;
 670         err->wseqno = obj->last_write_seqno;
 671         err->gtt_offset = vma->node.start;
 672         err->read_domains = obj->base.read_domains;
 673         err->write_domain = obj->base.write_domain;
 674         err->fence_reg = obj->fence_reg;
 675         err->pinned = 0;
 676         if (i915_gem_obj_is_pinned(obj))
 677                 err->pinned = 1;
 678         if (obj->user_pin_count > 0)
 679                 err->pinned = -1;
 680         err->tiling = obj->tiling_mode;
 681         err->dirty = obj->dirty;
 682         err->purgeable = obj->madv != I915_MADV_WILLNEED;
 683         err->userptr = obj->userptr.mm != NULL;
 684         err->ring = obj->ring ? obj->ring->id : -1;
 685         err->cache_level = obj->cache_level;
 686 }
 687
 688 static u32 capture_active_bo(struct drm_i915_error_buffer *err,
 689                              int count, struct list_head *head)
 690 {
 691         struct i915_vma *vma;
 692         int i = 0;
 693
 694         list_for_each_entry(vma, head, mm_list) {
 695                 capture_bo(err++, vma);
 696                 if (++i == count)
 697                         break;
 698         }
 699
 700         return i;
 701 }
 702
 703 static u32 capture_pinned_bo(struct drm_i915_error_buffer *err,
 704                              int count, struct list_head *head,
 705                              struct i915_address_space *vm)
 706 {
 707         struct drm_i915_gem_object *obj;
 708         struct drm_i915_error_buffer * const first = err;
 709         struct drm_i915_error_buffer * const last = err + count;
 710
 711         list_for_each_entry(obj, head, global_list) {
 712                 struct i915_vma *vma;
 713
 714                 if (err == last)
 715                         break;
 716
 717                 list_for_each_entry(vma, &obj->vma_list, vma_link)
 718                         if (vma->vm == vm && vma->pin_count > 0) {
 719                                 capture_bo(err++, vma);
 720                                 break;
 721                         }
 722         }
 723
 724         return err - first;
 725 }
 726
 727 /* Generate a semi-unique error code. The code is not meant to have meaning, The
 728  * code's only purpose is to try to prevent false duplicated bug reports by
 729  * grossly estimating a GPU error state.
 730  *
 731  * TODO Ideally, hashing the batchbuffer would be a very nice way to determine
 732  * the hang if we could strip the GTT offset information from it.
 733  *
 734  * It's only a small step better than a random number in its current form.
 735  */
 736 static uint32_t i915_error_generate_code(struct drm_i915_private *dev_priv,
 737                                          struct drm_i915_error_state *error,
 738                                          int *ring_id)
 739 {
 740         uint32_t error_code = 0;
 741         int i;
 742
 743         /* IPEHR would be an ideal way to detect errors, as it's the gross
 744          * measure of "the command that hung." However, has some very common
 745          * synchronization commands which almost always appear in the case
 746          * strictly a client bug. Use instdone to differentiate those some.
 747          */
 748         for (i = 0; i < I915_NUM_RINGS; i++) {
 749                 if (error->ring[i].hangcheck_action == HANGCHECK_HUNG) {
 750                         if (ring_id)
 751                                 *ring_id = i;
 752
 753                         return error->ring[i].ipehr ^ error->ring[i].instdone;
 754                 }
 755         }
 756
 757         return error_code;
 758 }
 759
 760 static void i915_gem_record_fences(struct drm_device *dev,
 761                                    struct drm_i915_error_state *error)
 762 {
 763         struct drm_i915_private *dev_priv = dev->dev_private;
 764         int i;
 765
 766         /* Fences */
 767         switch (INTEL_INFO(dev)->gen) {
 768         case 8:
 769         case 7:
 770         case 6:
 771                 for (i = 0; i < dev_priv->num_fence_regs; i++)
 772                         error->fence[i] = I915_READ64(FENCE_REG_SANDYBRIDGE_0 + (i * 8));
 773                 break;
 774         case 5:
 775         case 4:
 776                 for (i = 0; i < 16; i++)
 777                         error->fence[i] = I915_READ64(FENCE_REG_965_0 + (i * 8));
 778                 break;
 779         case 3:
 780                 if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
 781                         for (i = 0; i < 8; i++)
 782                                 error->fence[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4));
 783         case 2:
 784                 for (i = 0; i < 8; i++)
 785                         error->fence[i] = I915_READ(FENCE_REG_830_0 + (i * 4));
 786                 break;
 787
 788         default:
 789                 BUG();
 790         }
 791 }
 792
 793
 794 static void gen8_record_semaphore_state(struct drm_i915_private *dev_priv,
 795                                         struct drm_i915_error_state *error,
 796                                         struct intel_engine_cs *ring,
 797                                         struct drm_i915_error_ring *ering)
 798 {
 799         struct intel_engine_cs *to;
 800         int i;
 801
 802         if (!i915_semaphore_is_enabled(dev_priv->dev))
 803                 return;
 804
 805         if (!error->semaphore_obj)
 806                 error->semaphore_obj =
 807                         i915_error_object_create(dev_priv,
 808                                                  dev_priv->semaphore_obj,
 809                                                  &dev_priv->gtt.base);
 810
 811         for_each_ring(to, dev_priv, i) {
 812                 int idx;
 813                 u16 signal_offset;
 814                 u32 *tmp;
 815
 816                 if (ring == to)
 817                         continue;
 818
 819                 signal_offset = (GEN8_SIGNAL_OFFSET(ring, i) & (PAGE_SIZE - 1))
 820                                 / 4;
 821                 tmp = error->semaphore_obj->pages[0];
 822                 idx = intel_ring_sync_index(ring, to);
 823
 824                 ering->semaphore_mboxes[idx] = tmp[signal_offset];
 825                 ering->semaphore_seqno[idx] = ring->semaphore.sync_seqno[idx];
 826         }
 827 }
 828
 829 static void gen6_record_semaphore_state(struct drm_i915_private *dev_priv,
 830                                         struct intel_engine_cs *ring,
 831                                         struct drm_i915_error_ring *ering)
 832 {
 833         ering->semaphore_mboxes[0] = I915_READ(RING_SYNC_0(ring->mmio_base));
 834         ering->semaphore_mboxes[1] = I915_READ(RING_SYNC_1(ring->mmio_base));
 835         ering->semaphore_seqno[0] = ring->semaphore.sync_seqno[0];
 836         ering->semaphore_seqno[1] = ring->semaphore.sync_seqno[1];
 837
 838         if (HAS_VEBOX(dev_priv->dev)) {
 839                 ering->semaphore_mboxes[2] =
 840                         I915_READ(RING_SYNC_2(ring->mmio_base));
 841                 ering->semaphore_seqno[2] = ring->semaphore.sync_seqno[2];
 842         }
 843 }
 844
 845 static void i915_record_ring_state(struct drm_device *dev,
 846                                    struct drm_i915_error_state *error,
 847                                    struct intel_engine_cs *ring,
 848                                    struct drm_i915_error_ring *ering)
 849 {
 850         struct drm_i915_private *dev_priv = dev->dev_private;
 851
 852         if (INTEL_INFO(dev)->gen >= 6) {
 853                 ering->rc_psmi = I915_READ(ring->mmio_base + 0x50);
 854                 ering->fault_reg = I915_READ(RING_FAULT_REG(ring));
 855                 if (INTEL_INFO(dev)->gen >= 8)
 856                         gen8_record_semaphore_state(dev_priv, error, ring, ering);
 857                 else
 858                         gen6_record_semaphore_state(dev_priv, ring, ering);
 859         }
 860
 861         if (INTEL_INFO(dev)->gen >= 4) {
 862                 ering->faddr = I915_READ(RING_DMA_FADD(ring->mmio_base));
 863                 ering->ipeir = I915_READ(RING_IPEIR(ring->mmio_base));
 864                 ering->ipehr = I915_READ(RING_IPEHR(ring->mmio_base));
 865                 ering->instdone = I915_READ(RING_INSTDONE(ring->mmio_base));
 866                 ering->instps = I915_READ(RING_INSTPS(ring->mmio_base));
 867                 ering->bbaddr = I915_READ(RING_BBADDR(ring->mmio_base));
 868                 if (INTEL_INFO(dev)->gen >= 8) {
 869                         ering->faddr |= (u64) I915_READ(RING_DMA_FADD_UDW(ring->mmio_base)) << 32;
 870                         ering->bbaddr |= (u64) I915_READ(RING_BBADDR_UDW(ring->mmio_base)) << 32;
 871                 }
 872                 ering->bbstate = I915_READ(RING_BBSTATE(ring->mmio_base));
 873         } else {
 874                 ering->faddr = I915_READ(DMA_FADD_I8XX);
 875                 ering->ipeir = I915_READ(IPEIR);
 876                 ering->ipehr = I915_READ(IPEHR);
 877                 ering->instdone = I915_READ(INSTDONE);
 878         }
 879
 880         ering->waiting = waitqueue_active(&ring->irq_queue);
 881         ering->instpm = I915_READ(RING_INSTPM(ring->mmio_base));
 882         ering->seqno = ring->get_seqno(ring, false);
 883         ering->acthd = intel_ring_get_active_head(ring);
 884         ering->head = I915_READ_HEAD(ring);
 885         ering->tail = I915_READ_TAIL(ring);
 886         ering->ctl = I915_READ_CTL(ring);
 887
 888         if (I915_NEED_GFX_HWS(dev)) {
 889                 int mmio;
 890
 891                 if (IS_GEN7(dev)) {
 892                         switch (ring->id) {
 893                         default:
 894                         case RCS:
 895                                 mmio = RENDER_HWS_PGA_GEN7;
 896                                 break;
 897                         case BCS:
 898                                 mmio = BLT_HWS_PGA_GEN7;
 899                                 break;
 900                         case VCS:
 901                                 mmio = BSD_HWS_PGA_GEN7;
 902                                 break;
 903                         case VECS:
 904                                 mmio = VEBOX_HWS_PGA_GEN7;
 905                                 break;
 906                         }
 907                 } else if (IS_GEN6(ring->dev)) {
 908                         mmio = RING_HWS_PGA_GEN6(ring->mmio_base);
 909                 } else {
 910                         /* XXX: gen8 returns to sanity */
 911                         mmio = RING_HWS_PGA(ring->mmio_base);
 912                 }
 913
 914                 ering->hws = I915_READ(mmio);
 915         }
 916
 917         ering->hangcheck_score = ring->hangcheck.score;
 918         ering->hangcheck_action = ring->hangcheck.action;
 919
 920         if (USES_PPGTT(dev)) {
 921                 int i;
 922
 923                 ering->vm_info.gfx_mode = I915_READ(RING_MODE_GEN7(ring));
 924
 925                 switch (INTEL_INFO(dev)->gen) {
 926                 case 8:
 927                         for (i = 0; i < 4; i++) {
 928                                 ering->vm_info.pdp[i] =
 929                                         I915_READ(GEN8_RING_PDP_UDW(ring, i));
 930                                 ering->vm_info.pdp[i] <<= 32;
 931                                 ering->vm_info.pdp[i] |=
 932                                         I915_READ(GEN8_RING_PDP_LDW(ring, i));
 933                         }
 934                         break;
 935                 case 7:
 936                         ering->vm_info.pp_dir_base =
 937                                 I915_READ(RING_PP_DIR_BASE(ring));
 938                         break;
 939                 case 6:
 940                         ering->vm_info.pp_dir_base =
 941                                 I915_READ(RING_PP_DIR_BASE_READ(ring));
 942                         break;
 943                 }
 944         }
 945 }
 946
 947
 948 static void i915_gem_record_active_context(struct intel_engine_cs *ring,
 949                                            struct drm_i915_error_state *error,
 950                                            struct drm_i915_error_ring *ering)
 951 {
 952         struct drm_i915_private *dev_priv = ring->dev->dev_private;
 953         struct drm_i915_gem_object *obj;
 954
 955         /* Currently render ring is the only HW context user */
 956         if (ring->id != RCS || !error->ccid)
 957                 return;
 958
 959         list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
 960                 if (!i915_gem_obj_ggtt_bound(obj))
 961                         continue;
 962
 963                 if ((error->ccid & PAGE_MASK) == i915_gem_obj_ggtt_offset(obj)) {
 964                         ering->ctx = i915_error_ggtt_object_create(dev_priv, obj);
 965                         break;
 966                 }
 967         }
 968 }
 969
 970 static void i915_gem_record_rings(struct drm_device *dev,
 971                                   struct drm_i915_error_state *error)
 972 {
 973         struct drm_i915_private *dev_priv = dev->dev_private;
 974         struct drm_i915_gem_request *request;
 975         int i, count;
 976
 977         for (i = 0; i < I915_NUM_RINGS; i++) {
 978                 struct intel_engine_cs *ring = &dev_priv->ring[i];
 979                 struct intel_ringbuffer *rbuf;
 980
 981                 error->ring[i].pid = -1;
 982
 983                 if (ring->dev == NULL)
 984                         continue;
 985
 986                 error->ring[i].valid = true;
 987
 988                 i915_record_ring_state(dev, error, ring, &error->ring[i]);
 989
 990                 request = i915_gem_find_active_request(ring);
 991                 if (request) {
 992                         struct i915_address_space *vm;
 993
 994                         vm = request->ctx && request->ctx->ppgtt ?
 995                                 &request->ctx->ppgtt->base :
 996                                 &dev_priv->gtt.base;
 997
 998                         /* We need to copy these to an anonymous buffer
 999                          * as the simplest method to avoid being overwritten
1000                          * by userspace.
1001                          */
1002                         error->ring[i].batchbuffer =
1003                                 i915_error_object_create(dev_priv,
1004                                                          request->batch_obj,
1005                                                          vm);
1006
1007                         if (HAS_BROKEN_CS_TLB(dev_priv->dev))
1008                                 error->ring[i].wa_batchbuffer =
1009                                         i915_error_ggtt_object_create(dev_priv,
1010                                                              ring->scratch.obj);
1011
1012                         if (request->file_priv) {
1013                                 struct task_struct *task;
1014
1015                                 rcu_read_lock();
1016                                 task = pid_task(request->file_priv->file->pid,
1017                                                 PIDTYPE_PID);
1018                                 if (task) {
1019                                         strcpy(error->ring[i].comm, task->comm);
1020                                         error->ring[i].pid = task->pid;
1021                                 }
1022                                 rcu_read_unlock();
1023                         }
1024                 }
1025
1026                 if (i915.enable_execlists) {
1027                         /* TODO: This is only a small fix to keep basic error
1028                          * capture working, but we need to add more information
1029                          * for it to be useful (e.g. dump the context being
1030                          * executed).
1031                          */
1032                         if (request)
1033                                 rbuf = request->ctx->engine[ring->id].ringbuf;
1034                         else
1035                                 rbuf = ring->default_context->engine[ring->id].ringbuf;
1036                 } else
1037                         rbuf = ring->buffer;
1038
1039                 error->ring[i].cpu_ring_head = rbuf->head;
1040                 error->ring[i].cpu_ring_tail = rbuf->tail;
1041
1042                 error->ring[i].ringbuffer =
1043                         i915_error_ggtt_object_create(dev_priv, rbuf->obj);
1044
1045                 error->ring[i].hws_page =
1046                         i915_error_ggtt_object_create(dev_priv, ring->status_page.obj);
1047
1048                 i915_gem_record_active_context(ring, error, &error->ring[i]);
1049
1050                 count = 0;
1051                 list_for_each_entry(request, &ring->request_list, list)
1052                         count++;
1053
1054                 error->ring[i].num_requests = count;
1055                 error->ring[i].requests =
1056                         kcalloc(count, sizeof(*error->ring[i].requests),
1057                                 GFP_ATOMIC);
1058                 if (error->ring[i].requests == NULL) {
1059                         error->ring[i].num_requests = 0;
1060                         continue;
1061                 }
1062
1063                 count = 0;
1064                 list_for_each_entry(request, &ring->request_list, list) {
1065                         struct drm_i915_error_request *erq;
1066
1067                         erq = &error->ring[i].requests[count++];
1068                         erq->seqno = request->seqno;
1069                         erq->jiffies = request->emitted_jiffies;
1070                         erq->tail = request->tail;
1071                 }
1072         }
1073 }
1074
1075 /* FIXME: Since pin count/bound list is global, we duplicate what we capture per
1076  * VM.
1077  */
1078 static void i915_gem_capture_vm(struct drm_i915_private *dev_priv,
1079                                 struct drm_i915_error_state *error,
1080                                 struct i915_address_space *vm,
1081                                 const int ndx)
1082 {
1083         struct drm_i915_error_buffer *active_bo = NULL, *pinned_bo = NULL;
1084         struct drm_i915_gem_object *obj;
1085         struct i915_vma *vma;
1086         int i;
1087
1088         i = 0;
1089         list_for_each_entry(vma, &vm->active_list, mm_list)
1090                 i++;
1091         error->active_bo_count[ndx] = i;
1092
1093         list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
1094                 list_for_each_entry(vma, &obj->vma_list, vma_link)
1095                         if (vma->vm == vm && vma->pin_count > 0) {
1096                                 i++;
1097                                 break;
1098                         }
1099         }
1100         error->pinned_bo_count[ndx] = i - error->active_bo_count[ndx];
1101
1102         if (i) {
1103                 active_bo = kcalloc(i, sizeof(*active_bo), GFP_ATOMIC);
1104                 if (active_bo)
1105                         pinned_bo = active_bo + error->active_bo_count[ndx];
1106         }
1107
1108         if (active_bo)
1109                 error->active_bo_count[ndx] =
1110                         capture_active_bo(active_bo,
1111                                           error->active_bo_count[ndx],
1112                                           &vm->active_list);
1113
1114         if (pinned_bo)
1115                 error->pinned_bo_count[ndx] =
1116                         capture_pinned_bo(pinned_bo,
1117                                           error->pinned_bo_count[ndx],
1118                                           &dev_priv->mm.bound_list, vm);
1119         error->active_bo[ndx] = active_bo;
1120         error->pinned_bo[ndx] = pinned_bo;
1121 }
1122
1123 static void i915_gem_capture_buffers(struct drm_i915_private *dev_priv,
1124                                      struct drm_i915_error_state *error)
1125 {
1126         struct i915_address_space *vm;
1127         int cnt = 0, i = 0;
1128
1129         list_for_each_entry(vm, &dev_priv->vm_list, global_link)
1130                 cnt++;
1131
1132         error->active_bo = kcalloc(cnt, sizeof(*error->active_bo), GFP_ATOMIC);
1133         error->pinned_bo = kcalloc(cnt, sizeof(*error->pinned_bo), GFP_ATOMIC);
1134         error->active_bo_count = kcalloc(cnt, sizeof(*error->active_bo_count),
1135                                          GFP_ATOMIC);
1136         error->pinned_bo_count = kcalloc(cnt, sizeof(*error->pinned_bo_count),
1137                                          GFP_ATOMIC);
1138
1139         if (error->active_bo == NULL ||
1140             error->pinned_bo == NULL ||
1141             error->active_bo_count == NULL ||
1142             error->pinned_bo_count == NULL) {
1143                 kfree(error->active_bo);
1144                 kfree(error->active_bo_count);
1145                 kfree(error->pinned_bo);
1146                 kfree(error->pinned_bo_count);
1147
1148                 error->active_bo = NULL;
1149                 error->active_bo_count = NULL;
1150                 error->pinned_bo = NULL;
1151                 error->pinned_bo_count = NULL;
1152         } else {
1153                 list_for_each_entry(vm, &dev_priv->vm_list, global_link)
1154                         i915_gem_capture_vm(dev_priv, error, vm, i++);
1155
1156                 error->vm_count = cnt;
1157         }
1158 }
1159
1160 /* Capture all registers which don't fit into another category. */
1161 static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
1162                                    struct drm_i915_error_state *error)
1163 {
1164         struct drm_device *dev = dev_priv->dev;
1165         int i;
1166
1167         /* General organization
1168          * 1. Registers specific to a single generation
1169          * 2. Registers which belong to multiple generations
1170          * 3. Feature specific registers.
1171          * 4. Everything else
1172          * Please try to follow the order.
1173          */
1174
1175         /* 1: Registers specific to a single generation */
1176         if (IS_VALLEYVIEW(dev)) {
1177                 error->gtier[0] = I915_READ(GTIER);
1178                 error->ier = I915_READ(VLV_IER);
1179                 error->forcewake = I915_READ(FORCEWAKE_VLV);
1180         }
1181
1182         if (IS_GEN7(dev))
1183                 error->err_int = I915_READ(GEN7_ERR_INT);
1184
1185         if (IS_GEN6(dev)) {
1186                 error->forcewake = I915_READ(FORCEWAKE);
1187                 error->gab_ctl = I915_READ(GAB_CTL);
1188                 error->gfx_mode = I915_READ(GFX_MODE);
1189         }
1190
1191         /* 2: Registers which belong to multiple generations */
1192         if (INTEL_INFO(dev)->gen >= 7)
1193                 error->forcewake = I915_READ(FORCEWAKE_MT);
1194
1195         if (INTEL_INFO(dev)->gen >= 6) {
1196                 error->derrmr = I915_READ(DERRMR);
1197                 error->error = I915_READ(ERROR_GEN6);
1198                 error->done_reg = I915_READ(DONE_REG);
1199         }
1200
1201         /* 3: Feature specific registers */
1202         if (IS_GEN6(dev) || IS_GEN7(dev)) {
1203                 error->gam_ecochk = I915_READ(GAM_ECOCHK);
1204                 error->gac_eco = I915_READ(GAC_ECO_BITS);
1205         }
1206
1207         /* 4: Everything else */
1208         if (HAS_HW_CONTEXTS(dev))
1209                 error->ccid = I915_READ(CCID);
1210
1211         if (INTEL_INFO(dev)->gen >= 8) {
1212                 error->ier = I915_READ(GEN8_DE_MISC_IER);
1213                 for (i = 0; i < 4; i++)
1214                         error->gtier[i] = I915_READ(GEN8_GT_IER(i));
1215         } else if (HAS_PCH_SPLIT(dev)) {
1216                 error->ier = I915_READ(DEIER);
1217                 error->gtier[0] = I915_READ(GTIER);
1218         } else if (IS_GEN2(dev)) {
1219                 error->ier = I915_READ16(IER);
1220         } else if (!IS_VALLEYVIEW(dev)) {
1221                 error->ier = I915_READ(IER);
1222         }
1223         error->eir = I915_READ(EIR);
1224         error->pgtbl_er = I915_READ(PGTBL_ER);
1225
1226         i915_get_extra_instdone(dev, error->extra_instdone);
1227 }
1228
1229 static void i915_error_capture_msg(struct drm_device *dev,
1230                                    struct drm_i915_error_state *error,
1231                                    bool wedged,
1232                                    const char *error_msg)
1233 {
1234         struct drm_i915_private *dev_priv = dev->dev_private;
1235         u32 ecode;
1236         int ring_id = -1, len;
1237
1238         ecode = i915_error_generate_code(dev_priv, error, &ring_id);
1239
1240         len = scnprintf(error->error_msg, sizeof(error->error_msg),
1241                         "GPU HANG: ecode %d:0x%08x", ring_id, ecode);
1242
1243         if (ring_id != -1 && error->ring[ring_id].pid != -1)
1244                 len += scnprintf(error->error_msg + len,
1245                                  sizeof(error->error_msg) - len,
1246                                  ", in %s [%d]",
1247                                  error->ring[ring_id].comm,
1248                                  error->ring[ring_id].pid);
1249
1250         scnprintf(error->error_msg + len, sizeof(error->error_msg) - len,
1251                   ", reason: %s, action: %s",
1252                   error_msg,
1253                   wedged ? "reset" : "continue");
1254 }
1255
1256 static void i915_capture_gen_state(struct drm_i915_private *dev_priv,
1257                                    struct drm_i915_error_state *error)
1258 {
1259         error->reset_count = i915_reset_count(&dev_priv->gpu_error);
1260         error->suspend_count = dev_priv->suspend_count;
1261 }
1262
1263 /**
1264  * i915_capture_error_state - capture an error record for later analysis
1265  * @dev: drm device
1266  *
1267  * Should be called when an error is detected (either a hang or an error
1268  * interrupt) to capture error state from the time of the error.  Fills
1269  * out a structure which becomes available in debugfs for user level tools
1270  * to pick up.
1271  */
1272 void i915_capture_error_state(struct drm_device *dev, bool wedged,
1273                               const char *error_msg)
1274 {
1275         static bool warned;
1276         struct drm_i915_private *dev_priv = dev->dev_private;
1277         struct drm_i915_error_state *error;
1278         unsigned long flags;
1279
1280         /* Account for pipe specific data like PIPE*STAT */
1281         error = kzalloc(sizeof(*error), GFP_ATOMIC);
1282         if (!error) {
1283                 DRM_DEBUG_DRIVER("out of memory, not capturing error state\n");
1284                 return;
1285         }
1286
1287         kref_init(&error->ref);
1288
1289         i915_capture_gen_state(dev_priv, error);
1290         i915_capture_reg_state(dev_priv, error);
1291         i915_gem_capture_buffers(dev_priv, error);
1292         i915_gem_record_fences(dev, error);
1293         i915_gem_record_rings(dev, error);
1294
1295         do_gettimeofday(&error->time);
1296
1297         error->overlay = intel_overlay_capture_error_state(dev);
1298         error->display = intel_display_capture_error_state(dev);
1299
1300         i915_error_capture_msg(dev, error, wedged, error_msg);
1301         DRM_INFO("%s\n", error->error_msg);
1302
1303         spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
1304         if (dev_priv->gpu_error.first_error == NULL) {
1305                 dev_priv->gpu_error.first_error = error;
1306                 error = NULL;
1307         }
1308         spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
1309
1310         if (error) {
1311                 i915_error_state_free(&error->ref);
1312                 return;
1313         }
1314
1315         if (!warned) {
1316                 DRM_INFO("GPU hangs can indicate a bug anywhere in the entire gfx stack, including userspace.\n");
1317                 DRM_INFO("Please file a _new_ bug report on bugs.freedesktop.org against DRI -> DRM/Intel\n");
1318                 DRM_INFO("drm/i915 developers can then reassign to the right component if it's not a kernel issue.\n");
1319                 DRM_INFO("The gpu crash dump is required to analyze gpu hangs, so please always attach it.\n");
1320                 DRM_INFO("GPU crash dump saved to /sys/class/drm/card%d/error\n", dev->primary->index);
1321                 warned = true;
1322         }
1323 }
1324
1325 void i915_error_state_get(struct drm_device *dev,
1326                           struct i915_error_state_file_priv *error_priv)
1327 {
1328         struct drm_i915_private *dev_priv = dev->dev_private;
1329         unsigned long flags;
1330
1331         spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
1332         error_priv->error = dev_priv->gpu_error.first_error;
1333         if (error_priv->error)
1334                 kref_get(&error_priv->error->ref);
1335         spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
1336
1337 }
1338
1339 void i915_error_state_put(struct i915_error_state_file_priv *error_priv)
1340 {
1341         if (error_priv->error)
1342                 kref_put(&error_priv->error->ref, i915_error_state_free);
1343 }
1344
1345 void i915_destroy_error_state(struct drm_device *dev)
1346 {
1347         struct drm_i915_private *dev_priv = dev->dev_private;
1348         struct drm_i915_error_state *error;
1349         unsigned long flags;
1350
1351         spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
1352         error = dev_priv->gpu_error.first_error;
1353         dev_priv->gpu_error.first_error = NULL;
1354         spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
1355
1356         if (error)
1357                 kref_put(&error->ref, i915_error_state_free);
1358 }
1359
1360 const char *i915_cache_level_str(struct drm_i915_private *i915, int type)
1361 {
1362         switch (type) {
1363         case I915_CACHE_NONE: return " uncached";
1364         case I915_CACHE_LLC: return HAS_LLC(i915) ? " LLC" : " snooped";
1365         case I915_CACHE_L3_LLC: return " L3+LLC";
1366         case I915_CACHE_WT: return " WT";
1367         default: return "";
1368         }
1369 }
1370
1371 /* NB: please notice the memset */
1372 void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone)
1373 {
1374         struct drm_i915_private *dev_priv = dev->dev_private;
1375         memset(instdone, 0, sizeof(*instdone) * I915_NUM_INSTDONE_REG);
1376
1377         switch (INTEL_INFO(dev)->gen) {
1378         case 2:
1379         case 3:
1380                 instdone[0] = I915_READ(INSTDONE);
1381                 break;
1382         case 4:
1383         case 5:
1384         case 6:
1385                 instdone[0] = I915_READ(INSTDONE_I965);
1386                 instdone[1] = I915_READ(INSTDONE1);
1387                 break;
1388         default:
1389                 WARN_ONCE(1, "Unsupported platform\n");
1390         case 7:
1391         case 8:
1392                 instdone[0] = I915_READ(GEN7_INSTDONE_1);
1393                 instdone[1] = I915_READ(GEN7_SC_INSTDONE);
1394                 instdone[2] = I915_READ(GEN7_SAMPLER_INSTDONE);
1395                 instdone[3] = I915_READ(GEN7_ROW_INSTDONE);
1396                 break;
1397         }
1398 }