drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/dmi.h>
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include "drmP.h"
  31 #include "drm.h"
  32 #include "drm_crtc.h"
  33 #include "drm_crtc_helper.h"
  34 #include "drm_edid.h"
  35 #include "intel_drv.h"
  36 #include "i915_drm.h"
  37 #include "i915_drv.h"
  38
  39 /* Here's the desired hotplug mode */
  40 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  41                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  42                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  43                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  44                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  45                            ADPA_CRT_HOTPLUG_ENABLE)
  46
  47 struct intel_crt {
  48         struct intel_encoder base;
  49         bool force_hotplug_required;
  50 };
  51
  52 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  53 {
  54         return container_of(intel_attached_encoder(connector),
  55                             struct intel_crt, base);
  56 }
  57
  58 static void pch_crt_dpms(struct drm_encoder *encoder, int mode)
  59 {
  60         struct drm_device *dev = encoder->dev;
  61         struct drm_i915_private *dev_priv = dev->dev_private;
  62         u32 temp;
  63
  64         temp = I915_READ(PCH_ADPA);
  65         temp &= ~ADPA_DAC_ENABLE;
  66
  67         switch (mode) {
  68         case DRM_MODE_DPMS_ON:
  69                 temp |= ADPA_DAC_ENABLE;
  70                 break;
  71         case DRM_MODE_DPMS_STANDBY:
  72         case DRM_MODE_DPMS_SUSPEND:
  73         case DRM_MODE_DPMS_OFF:
  74                 /* Just leave port enable cleared */
  75                 break;
  76         }
  77
  78         I915_WRITE(PCH_ADPA, temp);
  79 }
  80
  81 static void gmch_crt_dpms(struct drm_encoder *encoder, int mode)
  82 {
  83         struct drm_device *dev = encoder->dev;
  84         struct drm_i915_private *dev_priv = dev->dev_private;
  85         u32 temp;
  86
  87         temp = I915_READ(ADPA);
  88         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  89         temp &= ~ADPA_DAC_ENABLE;
  90
  91         if (IS_VALLEYVIEW(dev) && mode != DRM_MODE_DPMS_ON)
  92                 mode = DRM_MODE_DPMS_OFF;
  93
  94         switch (mode) {
  95         case DRM_MODE_DPMS_ON:
  96                 temp |= ADPA_DAC_ENABLE;
  97                 break;
  98         case DRM_MODE_DPMS_STANDBY:
  99                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 100                 break;
 101         case DRM_MODE_DPMS_SUSPEND:
 102                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 103                 break;
 104         case DRM_MODE_DPMS_OFF:
 105                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 106                 break;
 107         }
 108
 109         I915_WRITE(ADPA, temp);
 110 }
 111
 112 static int intel_crt_mode_valid(struct drm_connector *connector,
 113                                 struct drm_display_mode *mode)
 114 {
 115         struct drm_device *dev = connector->dev;
 116
 117         int max_clock = 0;
 118         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 119                 return MODE_NO_DBLESCAN;
 120
 121         if (mode->clock < 25000)
 122                 return MODE_CLOCK_LOW;
 123
 124         if (IS_GEN2(dev))
 125                 max_clock = 350000;
 126         else
 127                 max_clock = 400000;
 128         if (mode->clock > max_clock)
 129                 return MODE_CLOCK_HIGH;
 130
 131         return MODE_OK;
 132 }
 133
 134 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
 135                                  const struct drm_display_mode *mode,
 136                                  struct drm_display_mode *adjusted_mode)
 137 {
 138         return true;
 139 }
 140
 141 static void intel_crt_mode_set(struct drm_encoder *encoder,
 142                                struct drm_display_mode *mode,
 143                                struct drm_display_mode *adjusted_mode)
 144 {
 145
 146         struct drm_device *dev = encoder->dev;
 147         struct drm_crtc *crtc = encoder->crtc;
 148         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 149         struct drm_i915_private *dev_priv = dev->dev_private;
 150         int dpll_md_reg;
 151         u32 adpa, dpll_md;
 152         u32 adpa_reg;
 153
 154         dpll_md_reg = DPLL_MD(intel_crtc->pipe);
 155
 156         if (HAS_PCH_SPLIT(dev))
 157                 adpa_reg = PCH_ADPA;
 158         else
 159                 adpa_reg = ADPA;
 160
 161         /*
 162          * Disable separate mode multiplier used when cloning SDVO to CRT
 163          * XXX this needs to be adjusted when we really are cloning
 164          */
 165         if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
 166                 dpll_md = I915_READ(dpll_md_reg);
 167                 I915_WRITE(dpll_md_reg,
 168                            dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
 169         }
 170
 171         adpa = ADPA_HOTPLUG_BITS;
 172         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 173                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 174         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 175                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 176
 177         /* For CPT allow 3 pipe config, for others just use A or B */
 178         if (HAS_PCH_CPT(dev))
 179                 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
 180         else if (intel_crtc->pipe == 0)
 181                 adpa |= ADPA_PIPE_A_SELECT;
 182         else
 183                 adpa |= ADPA_PIPE_B_SELECT;
 184
 185         if (!HAS_PCH_SPLIT(dev))
 186                 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
 187
 188         I915_WRITE(adpa_reg, adpa);
 189 }
 190
 191 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 192 {
 193         struct drm_device *dev = connector->dev;
 194         struct intel_crt *crt = intel_attached_crt(connector);
 195         struct drm_i915_private *dev_priv = dev->dev_private;
 196         u32 adpa;
 197         bool ret;
 198
 199         /* The first time through, trigger an explicit detection cycle */
 200         if (crt->force_hotplug_required) {
 201                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 202                 u32 save_adpa;
 203
 204                 crt->force_hotplug_required = 0;
 205
 206                 save_adpa = adpa = I915_READ(PCH_ADPA);
 207                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 208
 209                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 210                 if (turn_off_dac)
 211                         adpa &= ~ADPA_DAC_ENABLE;
 212
 213                 I915_WRITE(PCH_ADPA, adpa);
 214
 215                 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 216                              1000))
 217                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 218
 219                 if (turn_off_dac) {
 220                         I915_WRITE(PCH_ADPA, save_adpa);
 221                         POSTING_READ(PCH_ADPA);
 222                 }
 223         }
 224
 225         /* Check the status to see if both blue and green are on now */
 226         adpa = I915_READ(PCH_ADPA);
 227         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 228                 ret = true;
 229         else
 230                 ret = false;
 231         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 232
 233         return ret;
 234 }
 235
 236 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 237 {
 238         struct drm_device *dev = connector->dev;
 239         struct drm_i915_private *dev_priv = dev->dev_private;
 240         u32 adpa;
 241         bool ret;
 242         u32 save_adpa;
 243
 244         save_adpa = adpa = I915_READ(ADPA);
 245         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 246
 247         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 248
 249         I915_WRITE(ADPA, adpa);
 250
 251         if (wait_for((I915_READ(ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 252                      1000)) {
 253                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 254                 I915_WRITE(ADPA, save_adpa);
 255         }
 256
 257         /* Check the status to see if both blue and green are on now */
 258         adpa = I915_READ(ADPA);
 259         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 260                 ret = true;
 261         else
 262                 ret = false;
 263
 264         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 265
 266         /* FIXME: debug force function and remove */
 267         ret = true;
 268
 269         return ret;
 270 }
 271
 272 /**
 273  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 274  *
 275  * Not for i915G/i915GM
 276  *
 277  * \return true if CRT is connected.
 278  * \return false if CRT is disconnected.
 279  */
 280 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 281 {
 282         struct drm_device *dev = connector->dev;
 283         struct drm_i915_private *dev_priv = dev->dev_private;
 284         u32 hotplug_en, orig, stat;
 285         bool ret = false;
 286         int i, tries = 0;
 287
 288         if (HAS_PCH_SPLIT(dev))
 289                 return intel_ironlake_crt_detect_hotplug(connector);
 290
 291         if (IS_VALLEYVIEW(dev))
 292                 return valleyview_crt_detect_hotplug(connector);
 293
 294         /*
 295          * On 4 series desktop, CRT detect sequence need to be done twice
 296          * to get a reliable result.
 297          */
 298
 299         if (IS_G4X(dev) && !IS_GM45(dev))
 300                 tries = 2;
 301         else
 302                 tries = 1;
 303         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 304         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 305
 306         for (i = 0; i < tries ; i++) {
 307                 /* turn on the FORCE_DETECT */
 308                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 309                 /* wait for FORCE_DETECT to go off */
 310                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 311                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 312                              1000))
 313                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 314         }
 315
 316         stat = I915_READ(PORT_HOTPLUG_STAT);
 317         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 318                 ret = true;
 319
 320         /* clear the interrupt we just generated, if any */
 321         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 322
 323         /* and put the bits back */
 324         I915_WRITE(PORT_HOTPLUG_EN, orig);
 325
 326         return ret;
 327 }
 328
 329 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 330 {
 331         struct intel_crt *crt = intel_attached_crt(connector);
 332         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 333         struct edid *edid;
 334         struct i2c_adapter *i2c;
 335
 336         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 337
 338         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
 339         edid = drm_get_edid(connector, i2c);
 340
 341         if (edid) {
 342                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 343
 344                 /*
 345                  * This may be a DVI-I connector with a shared DDC
 346                  * link between analog and digital outputs, so we
 347                  * have to check the EDID input spec of the attached device.
 348                  */
 349                 if (!is_digital) {
 350                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 351                         return true;
 352                 }
 353
 354                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 355         } else {
 356                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 357         }
 358
 359         kfree(edid);
 360
 361         return false;
 362 }
 363
 364 static enum drm_connector_status
 365 intel_crt_load_detect(struct intel_crt *crt)
 366 {
 367         struct drm_device *dev = crt->base.base.dev;
 368         struct drm_i915_private *dev_priv = dev->dev_private;
 369         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 370         uint32_t save_bclrpat;
 371         uint32_t save_vtotal;
 372         uint32_t vtotal, vactive;
 373         uint32_t vsample;
 374         uint32_t vblank, vblank_start, vblank_end;
 375         uint32_t dsl;
 376         uint32_t bclrpat_reg;
 377         uint32_t vtotal_reg;
 378         uint32_t vblank_reg;
 379         uint32_t vsync_reg;
 380         uint32_t pipeconf_reg;
 381         uint32_t pipe_dsl_reg;
 382         uint8_t st00;
 383         enum drm_connector_status status;
 384
 385         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 386
 387         bclrpat_reg = BCLRPAT(pipe);
 388         vtotal_reg = VTOTAL(pipe);
 389         vblank_reg = VBLANK(pipe);
 390         vsync_reg = VSYNC(pipe);
 391         pipeconf_reg = PIPECONF(pipe);
 392         pipe_dsl_reg = PIPEDSL(pipe);
 393
 394         save_bclrpat = I915_READ(bclrpat_reg);
 395         save_vtotal = I915_READ(vtotal_reg);
 396         vblank = I915_READ(vblank_reg);
 397
 398         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 399         vactive = (save_vtotal & 0x7ff) + 1;
 400
 401         vblank_start = (vblank & 0xfff) + 1;
 402         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 403
 404         /* Set the border color to purple. */
 405         I915_WRITE(bclrpat_reg, 0x500050);
 406
 407         if (!IS_GEN2(dev)) {
 408                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 409                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 410                 POSTING_READ(pipeconf_reg);
 411                 /* Wait for next Vblank to substitue
 412                  * border color for Color info */
 413                 intel_wait_for_vblank(dev, pipe);
 414                 st00 = I915_READ8(VGA_MSR_WRITE);
 415                 status = ((st00 & (1 << 4)) != 0) ?
 416                         connector_status_connected :
 417                         connector_status_disconnected;
 418
 419                 I915_WRITE(pipeconf_reg, pipeconf);
 420         } else {
 421                 bool restore_vblank = false;
 422                 int count, detect;
 423
 424                 /*
 425                 * If there isn't any border, add some.
 426                 * Yes, this will flicker
 427                 */
 428                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 429                         uint32_t vsync = I915_READ(vsync_reg);
 430                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 431
 432                         vblank_start = vsync_start;
 433                         I915_WRITE(vblank_reg,
 434                                    (vblank_start - 1) |
 435                                    ((vblank_end - 1) << 16));
 436                         restore_vblank = true;
 437                 }
 438                 /* sample in the vertical border, selecting the larger one */
 439                 if (vblank_start - vactive >= vtotal - vblank_end)
 440                         vsample = (vblank_start + vactive) >> 1;
 441                 else
 442                         vsample = (vtotal + vblank_end) >> 1;
 443
 444                 /*
 445                  * Wait for the border to be displayed
 446                  */
 447                 while (I915_READ(pipe_dsl_reg) >= vactive)
 448                         ;
 449                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 450                         ;
 451                 /*
 452                  * Watch ST00 for an entire scanline
 453                  */
 454                 detect = 0;
 455                 count = 0;
 456                 do {
 457                         count++;
 458                         /* Read the ST00 VGA status register */
 459                         st00 = I915_READ8(VGA_MSR_WRITE);
 460                         if (st00 & (1 << 4))
 461                                 detect++;
 462                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 463
 464                 /* restore vblank if necessary */
 465                 if (restore_vblank)
 466                         I915_WRITE(vblank_reg, vblank);
 467                 /*
 468                  * If more than 3/4 of the scanline detected a monitor,
 469                  * then it is assumed to be present. This works even on i830,
 470                  * where there isn't any way to force the border color across
 471                  * the screen
 472                  */
 473                 status = detect * 4 > count * 3 ?
 474                          connector_status_connected :
 475                          connector_status_disconnected;
 476         }
 477
 478         /* Restore previous settings */
 479         I915_WRITE(bclrpat_reg, save_bclrpat);
 480
 481         return status;
 482 }
 483
 484 static enum drm_connector_status
 485 intel_crt_detect(struct drm_connector *connector, bool force)
 486 {
 487         struct drm_device *dev = connector->dev;
 488         struct intel_crt *crt = intel_attached_crt(connector);
 489         enum drm_connector_status status;
 490         struct intel_load_detect_pipe tmp;
 491
 492         if (I915_HAS_HOTPLUG(dev)) {
 493                 /* We can not rely on the HPD pin always being correctly wired
 494                  * up, for example many KVM do not pass it through, and so
 495                  * only trust an assertion that the monitor is connected.
 496                  */
 497                 if (intel_crt_detect_hotplug(connector)) {
 498                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 499                         return connector_status_connected;
 500                 } else
 501                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 502         }
 503
 504         if (intel_crt_detect_ddc(connector))
 505                 return connector_status_connected;
 506
 507         /* Load detection is broken on HPD capable machines. Whoever wants a
 508          * broken monitor (without edid) to work behind a broken kvm (that fails
 509          * to have the right resistors for HP detection) needs to fix this up.
 510          * For now just bail out. */
 511         if (I915_HAS_HOTPLUG(dev))
 512                 return connector_status_disconnected;
 513
 514         if (!force)
 515                 return connector->status;
 516
 517         /* for pre-945g platforms use load detect */
 518         if (intel_get_load_detect_pipe(&crt->base, connector, NULL,
 519                                        &tmp)) {
 520                 if (intel_crt_detect_ddc(connector))
 521                         status = connector_status_connected;
 522                 else
 523                         status = intel_crt_load_detect(crt);
 524                 intel_release_load_detect_pipe(&crt->base, connector,
 525                                                &tmp);
 526         } else
 527                 status = connector_status_unknown;
 528
 529         return status;
 530 }
 531
 532 static void intel_crt_destroy(struct drm_connector *connector)
 533 {
 534         drm_sysfs_connector_remove(connector);
 535         drm_connector_cleanup(connector);
 536         kfree(connector);
 537 }
 538
 539 static int intel_crt_get_modes(struct drm_connector *connector)
 540 {
 541         struct drm_device *dev = connector->dev;
 542         struct drm_i915_private *dev_priv = dev->dev_private;
 543         int ret;
 544         struct i2c_adapter *i2c;
 545
 546         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
 547         ret = intel_ddc_get_modes(connector, i2c);
 548         if (ret || !IS_G4X(dev))
 549                 return ret;
 550
 551         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 552         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
 553         return intel_ddc_get_modes(connector, i2c);
 554 }
 555
 556 static int intel_crt_set_property(struct drm_connector *connector,
 557                                   struct drm_property *property,
 558                                   uint64_t value)
 559 {
 560         return 0;
 561 }
 562
 563 static void intel_crt_reset(struct drm_connector *connector)
 564 {
 565         struct drm_device *dev = connector->dev;
 566         struct intel_crt *crt = intel_attached_crt(connector);
 567
 568         if (HAS_PCH_SPLIT(dev))
 569                 crt->force_hotplug_required = 1;
 570 }
 571
 572 /*
 573  * Routines for controlling stuff on the analog port
 574  */
 575
 576 static const struct drm_encoder_helper_funcs pch_encoder_funcs = {
 577         .mode_fixup = intel_crt_mode_fixup,
 578         .prepare = intel_encoder_prepare,
 579         .commit = intel_encoder_commit,
 580         .mode_set = intel_crt_mode_set,
 581         .dpms = pch_crt_dpms,
 582 };
 583
 584 static const struct drm_encoder_helper_funcs gmch_encoder_funcs = {
 585         .mode_fixup = intel_crt_mode_fixup,
 586         .prepare = intel_encoder_prepare,
 587         .commit = intel_encoder_commit,
 588         .mode_set = intel_crt_mode_set,
 589         .dpms = gmch_crt_dpms,
 590 };
 591
 592 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 593         .reset = intel_crt_reset,
 594         .dpms = drm_helper_connector_dpms,
 595         .detect = intel_crt_detect,
 596         .fill_modes = drm_helper_probe_single_connector_modes,
 597         .destroy = intel_crt_destroy,
 598         .set_property = intel_crt_set_property,
 599 };
 600
 601 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 602         .mode_valid = intel_crt_mode_valid,
 603         .get_modes = intel_crt_get_modes,
 604         .best_encoder = intel_best_encoder,
 605 };
 606
 607 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 608         .destroy = intel_encoder_destroy,
 609 };
 610
 611 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 612 {
 613         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 614         return 1;
 615 }
 616
 617 static const struct dmi_system_id intel_no_crt[] = {
 618         {
 619                 .callback = intel_no_crt_dmi_callback,
 620                 .ident = "ACER ZGB",
 621                 .matches = {
 622                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 623                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 624                 },
 625         },
 626         { }
 627 };
 628
 629 void intel_crt_init(struct drm_device *dev)
 630 {
 631         struct drm_connector *connector;
 632         struct intel_crt *crt;
 633         struct intel_connector *intel_connector;
 634         struct drm_i915_private *dev_priv = dev->dev_private;
 635         const struct drm_encoder_helper_funcs *encoder_helper_funcs;
 636
 637         /* Skip machines without VGA that falsely report hotplug events */
 638         if (dmi_check_system(intel_no_crt))
 639                 return;
 640
 641         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 642         if (!crt)
 643                 return;
 644
 645         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 646         if (!intel_connector) {
 647                 kfree(crt);
 648                 return;
 649         }
 650
 651         connector = &intel_connector->base;
 652         drm_connector_init(dev, &intel_connector->base,
 653                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 654
 655         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 656                          DRM_MODE_ENCODER_DAC);
 657
 658         intel_connector_attach_encoder(intel_connector, &crt->base);
 659
 660         crt->base.type = INTEL_OUTPUT_ANALOG;
 661         crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT |
 662                                 1 << INTEL_ANALOG_CLONE_BIT |
 663                                 1 << INTEL_SDVO_LVDS_CLONE_BIT);
 664         if (IS_HASWELL(dev))
 665                 crt->base.crtc_mask = (1 << 0);
 666         else
 667                 crt->base.crtc_mask = (1 << 0) | (1 << 1);
 668
 669         if (IS_GEN2(dev))
 670                 connector->interlace_allowed = 0;
 671         else
 672                 connector->interlace_allowed = 1;
 673         connector->doublescan_allowed = 0;
 674
 675         if (HAS_PCH_SPLIT(dev))
 676                 encoder_helper_funcs = &pch_encoder_funcs;
 677         else
 678                 encoder_helper_funcs = &gmch_encoder_funcs;
 679
 680         drm_encoder_helper_add(&crt->base.base, encoder_helper_funcs);
 681         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 682
 683         drm_sysfs_connector_add(connector);
 684
 685         if (I915_HAS_HOTPLUG(dev))
 686                 connector->polled = DRM_CONNECTOR_POLL_HPD;
 687         else
 688                 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 689
 690         /*
 691          * Configure the automatic hotplug detection stuff
 692          */
 693         crt->force_hotplug_required = 0;
 694         if (HAS_PCH_SPLIT(dev)) {
 695                 u32 adpa;
 696
 697                 adpa = I915_READ(PCH_ADPA);
 698                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 699                 adpa |= ADPA_HOTPLUG_BITS;
 700                 I915_WRITE(PCH_ADPA, adpa);
 701                 POSTING_READ(PCH_ADPA);
 702
 703                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
 704                 crt->force_hotplug_required = 1;
 705         }
 706
 707         dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
 708 }