2 * Copyright © 2013 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
28 #include <drm/drm_crtc.h>
29 #include <drm/drm_mipi_dsi.h>
30 #include "intel_drv.h"
32 /* Dual Link support */
33 #define DSI_DUAL_LINK_NONE 0
34 #define DSI_DUAL_LINK_FRONT_BACK 1
35 #define DSI_DUAL_LINK_PIXEL_ALT 2
37 int dsi_pixel_format_bpp(int pixel_format);
39 struct intel_dsi_host;
42 struct intel_encoder base;
44 struct drm_panel *panel;
45 struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS];
47 /* GPIO Desc for CRC based Panel control */
48 struct gpio_desc *gpio_panel;
50 struct intel_connector *attached_connector;
52 /* bit mask of ports being driven */
55 /* if true, use HS mode, otherwise LP */
61 /* Video mode or command mode */
64 /* number of DSI lanes */
65 unsigned int lane_count;
67 /* video mode pixel format for MIPI_DSI_FUNC_PRG register */
70 /* video mode format for MIPI_VIDEO_MODE_FORMAT register */
71 u32 video_mode_format;
73 /* eot for MIPI_EOT_DISABLE register */
83 u32 video_frmt_cfg_bits;
86 /* timeouts in byte clocks */
91 u16 clk_lp_to_hs_count;
92 u16 clk_hs_to_lp_count;
98 /* all delays in ms */
99 u16 backlight_off_delay;
100 u16 backlight_on_delay;
103 u16 panel_pwr_cycle_delay;
106 struct intel_dsi_host {
107 struct mipi_dsi_host base;
108 struct intel_dsi *intel_dsi;
111 /* our little hack */
112 struct mipi_dsi_device *device;
115 static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h)
117 return container_of(h, struct intel_dsi_host, base);
120 #define for_each_dsi_port(__port, __ports_mask) \
121 for ((__port) = PORT_A; (__port) < I915_MAX_PORTS; (__port)++) \
122 for_each_if ((__ports_mask) & (1 << (__port)))
124 static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
126 return container_of(encoder, struct intel_dsi, base.base);
129 extern void intel_enable_dsi_pll(struct intel_encoder *encoder);
130 extern void intel_disable_dsi_pll(struct intel_encoder *encoder);
131 extern u32 intel_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp);
132 extern void intel_dsi_reset_clocks(struct intel_encoder *encoder,
135 struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id);
137 #endif /* _INTEL_DSI_H */