drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include <linux/vga_switcheroo.h>
  35 #include <drm/drmP.h>
  36 #include <drm/drm_atomic_helper.h>
  37 #include <drm/drm_crtc.h>
  38 #include <drm/drm_edid.h>
  39 #include "intel_drv.h"
  40 #include <drm/i915_drm.h>
  41 #include "i915_drv.h"
  42 #include <linux/acpi.h>
  43
  44 /* Private structure for the integrated LVDS support */
  45 struct intel_lvds_connector {
  46         struct intel_connector base;
  47
  48         struct notifier_block lid_notifier;
  49 };
  50
  51 struct intel_lvds_encoder {
  52         struct intel_encoder base;
  53
  54         bool is_dual_link;
  55         i915_reg_t reg;
  56         u32 a3_power;
  57
  58         struct intel_lvds_connector *attached_connector;
  59 };
  60
  61 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  62 {
  63         return container_of(encoder, struct intel_lvds_encoder, base.base);
  64 }
  65
  66 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  67 {
  68         return container_of(connector, struct intel_lvds_connector, base.base);
  69 }
  70
  71 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  72                                     enum pipe *pipe)
  73 {
  74         struct drm_device *dev = encoder->base.dev;
  75         struct drm_i915_private *dev_priv = dev->dev_private;
  76         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  77         enum intel_display_power_domain power_domain;
  78         u32 tmp;
  79         bool ret;
  80
  81         power_domain = intel_display_port_power_domain(encoder);
  82         if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
  83                 return false;
  84
  85         ret = false;
  86
  87         tmp = I915_READ(lvds_encoder->reg);
  88
  89         if (!(tmp & LVDS_PORT_EN))
  90                 goto out;
  91
  92         if (HAS_PCH_CPT(dev))
  93                 *pipe = PORT_TO_PIPE_CPT(tmp);
  94         else
  95                 *pipe = PORT_TO_PIPE(tmp);
  96
  97         ret = true;
  98
  99 out:
 100         intel_display_power_put(dev_priv, power_domain);
 101
 102         return ret;
 103 }
 104
 105 static void intel_lvds_get_config(struct intel_encoder *encoder,
 106                                   struct intel_crtc_state *pipe_config)
 107 {
 108         struct drm_device *dev = encoder->base.dev;
 109         struct drm_i915_private *dev_priv = dev->dev_private;
 110         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 111         u32 tmp, flags = 0;
 112         int dotclock;
 113
 114         tmp = I915_READ(lvds_encoder->reg);
 115         if (tmp & LVDS_HSYNC_POLARITY)
 116                 flags |= DRM_MODE_FLAG_NHSYNC;
 117         else
 118                 flags |= DRM_MODE_FLAG_PHSYNC;
 119         if (tmp & LVDS_VSYNC_POLARITY)
 120                 flags |= DRM_MODE_FLAG_NVSYNC;
 121         else
 122                 flags |= DRM_MODE_FLAG_PVSYNC;
 123
 124         pipe_config->base.adjusted_mode.flags |= flags;
 125
 126         /* gen2/3 store dither state in pfit control, needs to match */
 127         if (INTEL_INFO(dev)->gen < 4) {
 128                 tmp = I915_READ(PFIT_CONTROL);
 129
 130                 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
 131         }
 132
 133         dotclock = pipe_config->port_clock;
 134
 135         if (HAS_PCH_SPLIT(dev_priv->dev))
 136                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
 137
 138         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
 139 }
 140
 141 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
 142 {
 143         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 144         struct drm_device *dev = encoder->base.dev;
 145         struct drm_i915_private *dev_priv = dev->dev_private;
 146         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 147         const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
 148         int pipe = crtc->pipe;
 149         u32 temp;
 150
 151         if (HAS_PCH_SPLIT(dev)) {
 152                 assert_fdi_rx_pll_disabled(dev_priv, pipe);
 153                 assert_shared_dpll_disabled(dev_priv,
 154                                             intel_crtc_to_shared_dpll(crtc));
 155         } else {
 156                 assert_pll_disabled(dev_priv, pipe);
 157         }
 158
 159         temp = I915_READ(lvds_encoder->reg);
 160         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
 161
 162         if (HAS_PCH_CPT(dev)) {
 163                 temp &= ~PORT_TRANS_SEL_MASK;
 164                 temp |= PORT_TRANS_SEL_CPT(pipe);
 165         } else {
 166                 if (pipe == 1) {
 167                         temp |= LVDS_PIPEB_SELECT;
 168                 } else {
 169                         temp &= ~LVDS_PIPEB_SELECT;
 170                 }
 171         }
 172
 173         /* set the corresponsding LVDS_BORDER bit */
 174         temp &= ~LVDS_BORDER_ENABLE;
 175         temp |= crtc->config->gmch_pfit.lvds_border_bits;
 176         /* Set the B0-B3 data pairs corresponding to whether we're going to
 177          * set the DPLLs for dual-channel mode or not.
 178          */
 179         if (lvds_encoder->is_dual_link)
 180                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
 181         else
 182                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
 183
 184         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
 185          * appropriately here, but we need to look more thoroughly into how
 186          * panels behave in the two modes. For now, let's just maintain the
 187          * value we got from the BIOS.
 188          */
 189          temp &= ~LVDS_A3_POWER_MASK;
 190          temp |= lvds_encoder->a3_power;
 191
 192         /* Set the dithering flag on LVDS as needed, note that there is no
 193          * special lvds dither control bit on pch-split platforms, dithering is
 194          * only controlled through the PIPECONF reg. */
 195         if (INTEL_INFO(dev)->gen == 4) {
 196                 /* Bspec wording suggests that LVDS port dithering only exists
 197                  * for 18bpp panels. */
 198                 if (crtc->config->dither && crtc->config->pipe_bpp == 18)
 199                         temp |= LVDS_ENABLE_DITHER;
 200                 else
 201                         temp &= ~LVDS_ENABLE_DITHER;
 202         }
 203         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
 204         if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
 205                 temp |= LVDS_HSYNC_POLARITY;
 206         if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
 207                 temp |= LVDS_VSYNC_POLARITY;
 208
 209         I915_WRITE(lvds_encoder->reg, temp);
 210 }
 211
 212 /**
 213  * Sets the power state for the panel.
 214  */
 215 static void intel_enable_lvds(struct intel_encoder *encoder)
 216 {
 217         struct drm_device *dev = encoder->base.dev;
 218         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 219         struct intel_connector *intel_connector =
 220                 &lvds_encoder->attached_connector->base;
 221         struct drm_i915_private *dev_priv = dev->dev_private;
 222         i915_reg_t ctl_reg, stat_reg;
 223
 224         if (HAS_PCH_SPLIT(dev)) {
 225                 ctl_reg = PCH_PP_CONTROL;
 226                 stat_reg = PCH_PP_STATUS;
 227         } else {
 228                 ctl_reg = PP_CONTROL;
 229                 stat_reg = PP_STATUS;
 230         }
 231
 232         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
 233
 234         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 235         POSTING_READ(lvds_encoder->reg);
 236         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
 237                 DRM_ERROR("timed out waiting for panel to power on\n");
 238
 239         intel_panel_enable_backlight(intel_connector);
 240 }
 241
 242 static void intel_disable_lvds(struct intel_encoder *encoder)
 243 {
 244         struct drm_device *dev = encoder->base.dev;
 245         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 246         struct drm_i915_private *dev_priv = dev->dev_private;
 247         i915_reg_t ctl_reg, stat_reg;
 248
 249         if (HAS_PCH_SPLIT(dev)) {
 250                 ctl_reg = PCH_PP_CONTROL;
 251                 stat_reg = PCH_PP_STATUS;
 252         } else {
 253                 ctl_reg = PP_CONTROL;
 254                 stat_reg = PP_STATUS;
 255         }
 256
 257         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 258         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
 259                 DRM_ERROR("timed out waiting for panel to power off\n");
 260
 261         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
 262         POSTING_READ(lvds_encoder->reg);
 263 }
 264
 265 static void gmch_disable_lvds(struct intel_encoder *encoder)
 266 {
 267         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 268         struct intel_connector *intel_connector =
 269                 &lvds_encoder->attached_connector->base;
 270
 271         intel_panel_disable_backlight(intel_connector);
 272
 273         intel_disable_lvds(encoder);
 274 }
 275
 276 static void pch_disable_lvds(struct intel_encoder *encoder)
 277 {
 278         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 279         struct intel_connector *intel_connector =
 280                 &lvds_encoder->attached_connector->base;
 281
 282         intel_panel_disable_backlight(intel_connector);
 283 }
 284
 285 static void pch_post_disable_lvds(struct intel_encoder *encoder)
 286 {
 287         intel_disable_lvds(encoder);
 288 }
 289
 290 static enum drm_mode_status
 291 intel_lvds_mode_valid(struct drm_connector *connector,
 292                       struct drm_display_mode *mode)
 293 {
 294         struct intel_connector *intel_connector = to_intel_connector(connector);
 295         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
 296         int max_pixclk = to_i915(connector->dev)->max_dotclk_freq;
 297
 298         if (mode->hdisplay > fixed_mode->hdisplay)
 299                 return MODE_PANEL;
 300         if (mode->vdisplay > fixed_mode->vdisplay)
 301                 return MODE_PANEL;
 302         if (fixed_mode->clock > max_pixclk)
 303                 return MODE_CLOCK_HIGH;
 304
 305         return MODE_OK;
 306 }
 307
 308 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
 309                                       struct intel_crtc_state *pipe_config)
 310 {
 311         struct drm_device *dev = intel_encoder->base.dev;
 312         struct intel_lvds_encoder *lvds_encoder =
 313                 to_lvds_encoder(&intel_encoder->base);
 314         struct intel_connector *intel_connector =
 315                 &lvds_encoder->attached_connector->base;
 316         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 317         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
 318         unsigned int lvds_bpp;
 319
 320         /* Should never happen!! */
 321         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 322                 DRM_ERROR("Can't support LVDS on pipe A\n");
 323                 return false;
 324         }
 325
 326         if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
 327                 lvds_bpp = 8*3;
 328         else
 329                 lvds_bpp = 6*3;
 330
 331         if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
 332                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
 333                               pipe_config->pipe_bpp, lvds_bpp);
 334                 pipe_config->pipe_bpp = lvds_bpp;
 335         }
 336
 337         /*
 338          * We have timings from the BIOS for the panel, put them in
 339          * to the adjusted mode.  The CRTC will be set up for this mode,
 340          * with the panel scaling set up to source from the H/VDisplay
 341          * of the original mode.
 342          */
 343         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
 344                                adjusted_mode);
 345
 346         if (HAS_PCH_SPLIT(dev)) {
 347                 pipe_config->has_pch_encoder = true;
 348
 349                 intel_pch_panel_fitting(intel_crtc, pipe_config,
 350                                         intel_connector->panel.fitting_mode);
 351         } else {
 352                 intel_gmch_panel_fitting(intel_crtc, pipe_config,
 353                                          intel_connector->panel.fitting_mode);
 354
 355         }
 356
 357         /*
 358          * XXX: It would be nice to support lower refresh rates on the
 359          * panels to reduce power consumption, and perhaps match the
 360          * user's requested refresh rate.
 361          */
 362
 363         return true;
 364 }
 365
 366 /**
 367  * Detect the LVDS connection.
 368  *
 369  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 370  * connected and closed means disconnected.  We also send hotplug events as
 371  * needed, using lid status notification from the input layer.
 372  */
 373 static enum drm_connector_status
 374 intel_lvds_detect(struct drm_connector *connector, bool force)
 375 {
 376         struct drm_device *dev = connector->dev;
 377         enum drm_connector_status status;
 378
 379         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 380                       connector->base.id, connector->name);
 381
 382         status = intel_panel_detect(dev);
 383         if (status != connector_status_unknown)
 384                 return status;
 385
 386         return connector_status_connected;
 387 }
 388
 389 /**
 390  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 391  */
 392 static int intel_lvds_get_modes(struct drm_connector *connector)
 393 {
 394         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
 395         struct drm_device *dev = connector->dev;
 396         struct drm_display_mode *mode;
 397
 398         /* use cached edid if we have one */
 399         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 400                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
 401
 402         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
 403         if (mode == NULL)
 404                 return 0;
 405
 406         drm_mode_probed_add(connector, mode);
 407         return 1;
 408 }
 409
 410 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 411 {
 412         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
 413         return 1;
 414 }
 415
 416 /* The GPU hangs up on these systems if modeset is performed on LID open */
 417 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 418         {
 419                 .callback = intel_no_modeset_on_lid_dmi_callback,
 420                 .ident = "Toshiba Tecra A11",
 421                 .matches = {
 422                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 423                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 424                 },
 425         },
 426
 427         { }     /* terminating entry */
 428 };
 429
 430 /*
 431  * Lid events. Note the use of 'modeset':
 432  *  - we set it to MODESET_ON_LID_OPEN on lid close,
 433  *    and set it to MODESET_DONE on open
 434  *  - we use it as a "only once" bit (ie we ignore
 435  *    duplicate events where it was already properly set)
 436  *  - the suspend/resume paths will set it to
 437  *    MODESET_SUSPENDED and ignore the lid open event,
 438  *    because they restore the mode ("lid open").
 439  */
 440 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 441                             void *unused)
 442 {
 443         struct intel_lvds_connector *lvds_connector =
 444                 container_of(nb, struct intel_lvds_connector, lid_notifier);
 445         struct drm_connector *connector = &lvds_connector->base.base;
 446         struct drm_device *dev = connector->dev;
 447         struct drm_i915_private *dev_priv = dev->dev_private;
 448
 449         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 450                 return NOTIFY_OK;
 451
 452         mutex_lock(&dev_priv->modeset_restore_lock);
 453         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
 454                 goto exit;
 455         /*
 456          * check and update the status of LVDS connector after receiving
 457          * the LID nofication event.
 458          */
 459         connector->status = connector->funcs->detect(connector, false);
 460
 461         /* Don't force modeset on machines where it causes a GPU lockup */
 462         if (dmi_check_system(intel_no_modeset_on_lid))
 463                 goto exit;
 464         if (!acpi_lid_open()) {
 465                 /* do modeset on next lid open event */
 466                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
 467                 goto exit;
 468         }
 469
 470         if (dev_priv->modeset_restore == MODESET_DONE)
 471                 goto exit;
 472
 473         /*
 474          * Some old platform's BIOS love to wreak havoc while the lid is closed.
 475          * We try to detect this here and undo any damage. The split for PCH
 476          * platforms is rather conservative and a bit arbitrary expect that on
 477          * those platforms VGA disabling requires actual legacy VGA I/O access,
 478          * and as part of the cleanup in the hw state restore we also redisable
 479          * the vga plane.
 480          */
 481         if (!HAS_PCH_SPLIT(dev)) {
 482                 drm_modeset_lock_all(dev);
 483                 intel_display_resume(dev);
 484                 drm_modeset_unlock_all(dev);
 485         }
 486
 487         dev_priv->modeset_restore = MODESET_DONE;
 488
 489 exit:
 490         mutex_unlock(&dev_priv->modeset_restore_lock);
 491         return NOTIFY_OK;
 492 }
 493
 494 /**
 495  * intel_lvds_destroy - unregister and free LVDS structures
 496  * @connector: connector to free
 497  *
 498  * Unregister the DDC bus for this connector then free the driver private
 499  * structure.
 500  */
 501 static void intel_lvds_destroy(struct drm_connector *connector)
 502 {
 503         struct intel_lvds_connector *lvds_connector =
 504                 to_lvds_connector(connector);
 505
 506         if (lvds_connector->lid_notifier.notifier_call)
 507                 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
 508
 509         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 510                 kfree(lvds_connector->base.edid);
 511
 512         intel_panel_fini(&lvds_connector->base.panel);
 513
 514         drm_connector_cleanup(connector);
 515         kfree(connector);
 516 }
 517
 518 static int intel_lvds_set_property(struct drm_connector *connector,
 519                                    struct drm_property *property,
 520                                    uint64_t value)
 521 {
 522         struct intel_connector *intel_connector = to_intel_connector(connector);
 523         struct drm_device *dev = connector->dev;
 524
 525         if (property == dev->mode_config.scaling_mode_property) {
 526                 struct drm_crtc *crtc;
 527
 528                 if (value == DRM_MODE_SCALE_NONE) {
 529                         DRM_DEBUG_KMS("no scaling not supported\n");
 530                         return -EINVAL;
 531                 }
 532
 533                 if (intel_connector->panel.fitting_mode == value) {
 534                         /* the LVDS scaling property is not changed */
 535                         return 0;
 536                 }
 537                 intel_connector->panel.fitting_mode = value;
 538
 539                 crtc = intel_attached_encoder(connector)->base.crtc;
 540                 if (crtc && crtc->state->enable) {
 541                         /*
 542                          * If the CRTC is enabled, the display will be changed
 543                          * according to the new panel fitting mode.
 544                          */
 545                         intel_crtc_restore_mode(crtc);
 546                 }
 547         }
 548
 549         return 0;
 550 }
 551
 552 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 553         .get_modes = intel_lvds_get_modes,
 554         .mode_valid = intel_lvds_mode_valid,
 555         .best_encoder = intel_best_encoder,
 556 };
 557
 558 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 559         .dpms = drm_atomic_helper_connector_dpms,
 560         .detect = intel_lvds_detect,
 561         .fill_modes = drm_helper_probe_single_connector_modes,
 562         .set_property = intel_lvds_set_property,
 563         .atomic_get_property = intel_connector_atomic_get_property,
 564         .destroy = intel_lvds_destroy,
 565         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 566         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 567 };
 568
 569 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 570         .destroy = intel_encoder_destroy,
 571 };
 572
 573 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 574 {
 575         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
 576         return 1;
 577 }
 578
 579 /* These systems claim to have LVDS, but really don't */
 580 static const struct dmi_system_id intel_no_lvds[] = {
 581         {
 582                 .callback = intel_no_lvds_dmi_callback,
 583                 .ident = "Apple Mac Mini (Core series)",
 584                 .matches = {
 585                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 586                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 587                 },
 588         },
 589         {
 590                 .callback = intel_no_lvds_dmi_callback,
 591                 .ident = "Apple Mac Mini (Core 2 series)",
 592                 .matches = {
 593                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 594                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 595                 },
 596         },
 597         {
 598                 .callback = intel_no_lvds_dmi_callback,
 599                 .ident = "MSI IM-945GSE-A",
 600                 .matches = {
 601                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 602                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 603                 },
 604         },
 605         {
 606                 .callback = intel_no_lvds_dmi_callback,
 607                 .ident = "Dell Studio Hybrid",
 608                 .matches = {
 609                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 610                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 611                 },
 612         },
 613         {
 614                 .callback = intel_no_lvds_dmi_callback,
 615                 .ident = "Dell OptiPlex FX170",
 616                 .matches = {
 617                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 618                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 619                 },
 620         },
 621         {
 622                 .callback = intel_no_lvds_dmi_callback,
 623                 .ident = "AOpen Mini PC",
 624                 .matches = {
 625                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 626                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 627                 },
 628         },
 629         {
 630                 .callback = intel_no_lvds_dmi_callback,
 631                 .ident = "AOpen Mini PC MP915",
 632                 .matches = {
 633                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 634                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 635                 },
 636         },
 637         {
 638                 .callback = intel_no_lvds_dmi_callback,
 639                 .ident = "AOpen i915GMm-HFS",
 640                 .matches = {
 641                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 642                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 643                 },
 644         },
 645         {
 646                 .callback = intel_no_lvds_dmi_callback,
 647                 .ident = "AOpen i45GMx-I",
 648                 .matches = {
 649                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 650                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
 651                 },
 652         },
 653         {
 654                 .callback = intel_no_lvds_dmi_callback,
 655                 .ident = "Aopen i945GTt-VFA",
 656                 .matches = {
 657                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 658                 },
 659         },
 660         {
 661                 .callback = intel_no_lvds_dmi_callback,
 662                 .ident = "Clientron U800",
 663                 .matches = {
 664                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 665                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 666                 },
 667         },
 668         {
 669                 .callback = intel_no_lvds_dmi_callback,
 670                 .ident = "Clientron E830",
 671                 .matches = {
 672                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 673                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
 674                 },
 675         },
 676         {
 677                 .callback = intel_no_lvds_dmi_callback,
 678                 .ident = "Asus EeeBox PC EB1007",
 679                 .matches = {
 680                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 681                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 682                 },
 683         },
 684         {
 685                 .callback = intel_no_lvds_dmi_callback,
 686                 .ident = "Asus AT5NM10T-I",
 687                 .matches = {
 688                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 689                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
 690                 },
 691         },
 692         {
 693                 .callback = intel_no_lvds_dmi_callback,
 694                 .ident = "Hewlett-Packard HP t5740",
 695                 .matches = {
 696                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 697                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
 698                 },
 699         },
 700         {
 701                 .callback = intel_no_lvds_dmi_callback,
 702                 .ident = "Hewlett-Packard t5745",
 703                 .matches = {
 704                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 705                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
 706                 },
 707         },
 708         {
 709                 .callback = intel_no_lvds_dmi_callback,
 710                 .ident = "Hewlett-Packard st5747",
 711                 .matches = {
 712                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 713                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
 714                 },
 715         },
 716         {
 717                 .callback = intel_no_lvds_dmi_callback,
 718                 .ident = "MSI Wind Box DC500",
 719                 .matches = {
 720                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 721                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
 722                 },
 723         },
 724         {
 725                 .callback = intel_no_lvds_dmi_callback,
 726                 .ident = "Gigabyte GA-D525TUD",
 727                 .matches = {
 728                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
 729                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
 730                 },
 731         },
 732         {
 733                 .callback = intel_no_lvds_dmi_callback,
 734                 .ident = "Supermicro X7SPA-H",
 735                 .matches = {
 736                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
 737                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
 738                 },
 739         },
 740         {
 741                 .callback = intel_no_lvds_dmi_callback,
 742                 .ident = "Fujitsu Esprimo Q900",
 743                 .matches = {
 744                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 745                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
 746                 },
 747         },
 748         {
 749                 .callback = intel_no_lvds_dmi_callback,
 750                 .ident = "Intel D410PT",
 751                 .matches = {
 752                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 753                         DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
 754                 },
 755         },
 756         {
 757                 .callback = intel_no_lvds_dmi_callback,
 758                 .ident = "Intel D425KT",
 759                 .matches = {
 760                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 761                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
 762                 },
 763         },
 764         {
 765                 .callback = intel_no_lvds_dmi_callback,
 766                 .ident = "Intel D510MO",
 767                 .matches = {
 768                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 769                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
 770                 },
 771         },
 772         {
 773                 .callback = intel_no_lvds_dmi_callback,
 774                 .ident = "Intel D525MW",
 775                 .matches = {
 776                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 777                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
 778                 },
 779         },
 780
 781         { }     /* terminating entry */
 782 };
 783
 784 /*
 785  * Enumerate the child dev array parsed from VBT to check whether
 786  * the LVDS is present.
 787  * If it is present, return 1.
 788  * If it is not present, return false.
 789  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 790  */
 791 static bool lvds_is_present_in_vbt(struct drm_device *dev,
 792                                    u8 *i2c_pin)
 793 {
 794         struct drm_i915_private *dev_priv = dev->dev_private;
 795         int i;
 796
 797         if (!dev_priv->vbt.child_dev_num)
 798                 return true;
 799
 800         for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
 801                 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
 802                 struct old_child_dev_config *child = &uchild->old;
 803
 804                 /* If the device type is not LFP, continue.
 805                  * We have to check both the new identifiers as well as the
 806                  * old for compatibility with some BIOSes.
 807                  */
 808                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
 809                     child->device_type != DEVICE_TYPE_LFP)
 810                         continue;
 811
 812                 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
 813                         *i2c_pin = child->i2c_pin;
 814
 815                 /* However, we cannot trust the BIOS writers to populate
 816                  * the VBT correctly.  Since LVDS requires additional
 817                  * information from AIM blocks, a non-zero addin offset is
 818                  * a good indicator that the LVDS is actually present.
 819                  */
 820                 if (child->addin_offset)
 821                         return true;
 822
 823                 /* But even then some BIOS writers perform some black magic
 824                  * and instantiate the device without reference to any
 825                  * additional data.  Trust that if the VBT was written into
 826                  * the OpRegion then they have validated the LVDS's existence.
 827                  */
 828                 if (dev_priv->opregion.vbt)
 829                         return true;
 830         }
 831
 832         return false;
 833 }
 834
 835 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
 836 {
 837         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
 838         return 1;
 839 }
 840
 841 static const struct dmi_system_id intel_dual_link_lvds[] = {
 842         {
 843                 .callback = intel_dual_link_lvds_callback,
 844                 .ident = "Apple MacBook Pro 15\" (2010)",
 845                 .matches = {
 846                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 847                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"),
 848                 },
 849         },
 850         {
 851                 .callback = intel_dual_link_lvds_callback,
 852                 .ident = "Apple MacBook Pro 15\" (2011)",
 853                 .matches = {
 854                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 855                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
 856                 },
 857         },
 858         {
 859                 .callback = intel_dual_link_lvds_callback,
 860                 .ident = "Apple MacBook Pro 15\" (2012)",
 861                 .matches = {
 862                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 863                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"),
 864                 },
 865         },
 866         { }     /* terminating entry */
 867 };
 868
 869 bool intel_is_dual_link_lvds(struct drm_device *dev)
 870 {
 871         struct intel_encoder *encoder;
 872         struct intel_lvds_encoder *lvds_encoder;
 873
 874         for_each_intel_encoder(dev, encoder) {
 875                 if (encoder->type == INTEL_OUTPUT_LVDS) {
 876                         lvds_encoder = to_lvds_encoder(&encoder->base);
 877
 878                         return lvds_encoder->is_dual_link;
 879                 }
 880         }
 881
 882         return false;
 883 }
 884
 885 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
 886 {
 887         struct drm_device *dev = lvds_encoder->base.base.dev;
 888         unsigned int val;
 889         struct drm_i915_private *dev_priv = dev->dev_private;
 890
 891         /* use the module option value if specified */
 892         if (i915.lvds_channel_mode > 0)
 893                 return i915.lvds_channel_mode == 2;
 894
 895         /* single channel LVDS is limited to 112 MHz */
 896         if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock
 897             > 112999)
 898                 return true;
 899
 900         if (dmi_check_system(intel_dual_link_lvds))
 901                 return true;
 902
 903         /* BIOS should set the proper LVDS register value at boot, but
 904          * in reality, it doesn't set the value when the lid is closed;
 905          * we need to check "the value to be set" in VBT when LVDS
 906          * register is uninitialized.
 907          */
 908         val = I915_READ(lvds_encoder->reg);
 909         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
 910                 val = dev_priv->vbt.bios_lvds_val;
 911
 912         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
 913 }
 914
 915 static bool intel_lvds_supported(struct drm_device *dev)
 916 {
 917         /* With the introduction of the PCH we gained a dedicated
 918          * LVDS presence pin, use it. */
 919         if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
 920                 return true;
 921
 922         /* Otherwise LVDS was only attached to mobile products,
 923          * except for the inglorious 830gm */
 924         if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
 925                 return true;
 926
 927         return false;
 928 }
 929
 930 /**
 931  * intel_lvds_init - setup LVDS connectors on this device
 932  * @dev: drm device
 933  *
 934  * Create the connector, register the LVDS DDC bus, and try to figure out what
 935  * modes we can display on the LVDS panel (if present).
 936  */
 937 void intel_lvds_init(struct drm_device *dev)
 938 {
 939         struct drm_i915_private *dev_priv = dev->dev_private;
 940         struct intel_lvds_encoder *lvds_encoder;
 941         struct intel_encoder *intel_encoder;
 942         struct intel_lvds_connector *lvds_connector;
 943         struct intel_connector *intel_connector;
 944         struct drm_connector *connector;
 945         struct drm_encoder *encoder;
 946         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 947         struct drm_display_mode *fixed_mode = NULL;
 948         struct drm_display_mode *downclock_mode = NULL;
 949         struct edid *edid;
 950         struct drm_crtc *crtc;
 951         i915_reg_t lvds_reg;
 952         u32 lvds;
 953         int pipe;
 954         u8 pin;
 955
 956         /*
 957          * Unlock registers and just leave them unlocked. Do this before
 958          * checking quirk lists to avoid bogus WARNINGs.
 959          */
 960         if (HAS_PCH_SPLIT(dev)) {
 961                 I915_WRITE(PCH_PP_CONTROL,
 962                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
 963         } else if (INTEL_INFO(dev_priv)->gen < 5) {
 964                 I915_WRITE(PP_CONTROL,
 965                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
 966         }
 967         if (!intel_lvds_supported(dev))
 968                 return;
 969
 970         /* Skip init on machines we know falsely report LVDS */
 971         if (dmi_check_system(intel_no_lvds))
 972                 return;
 973
 974         if (HAS_PCH_SPLIT(dev))
 975                 lvds_reg = PCH_LVDS;
 976         else
 977                 lvds_reg = LVDS;
 978
 979         lvds = I915_READ(lvds_reg);
 980
 981         if (HAS_PCH_SPLIT(dev)) {
 982                 if ((lvds & LVDS_DETECTED) == 0)
 983                         return;
 984                 if (dev_priv->vbt.edp_support) {
 985                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 986                         return;
 987                 }
 988         }
 989
 990         pin = GMBUS_PIN_PANEL;
 991         if (!lvds_is_present_in_vbt(dev, &pin)) {
 992                 if ((lvds & LVDS_PORT_EN) == 0) {
 993                         DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 994                         return;
 995                 }
 996                 DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n");
 997         }
 998
 999          /* Set the Panel Power On/Off timings if uninitialized. */
1000         if (INTEL_INFO(dev_priv)->gen < 5 &&
1001             I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
1002                 /* Set T2 to 40ms and T5 to 200ms */
1003                 I915_WRITE(PP_ON_DELAYS, 0x019007d0);
1004
1005                 /* Set T3 to 35ms and Tx to 200ms */
1006                 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
1007
1008                 DRM_DEBUG_KMS("Panel power timings uninitialized, setting defaults\n");
1009         }
1010
1011         lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
1012         if (!lvds_encoder)
1013                 return;
1014
1015         lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
1016         if (!lvds_connector) {
1017                 kfree(lvds_encoder);
1018                 return;
1019         }
1020
1021         if (intel_connector_init(&lvds_connector->base) < 0) {
1022                 kfree(lvds_connector);
1023                 kfree(lvds_encoder);
1024                 return;
1025         }
1026
1027         lvds_encoder->attached_connector = lvds_connector;
1028
1029         intel_encoder = &lvds_encoder->base;
1030         encoder = &intel_encoder->base;
1031         intel_connector = &lvds_connector->base;
1032         connector = &intel_connector->base;
1033         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
1034                            DRM_MODE_CONNECTOR_LVDS);
1035
1036         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
1037                          DRM_MODE_ENCODER_LVDS, NULL);
1038
1039         intel_encoder->enable = intel_enable_lvds;
1040         intel_encoder->pre_enable = intel_pre_enable_lvds;
1041         intel_encoder->compute_config = intel_lvds_compute_config;
1042         if (HAS_PCH_SPLIT(dev_priv)) {
1043                 intel_encoder->disable = pch_disable_lvds;
1044                 intel_encoder->post_disable = pch_post_disable_lvds;
1045         } else {
1046                 intel_encoder->disable = gmch_disable_lvds;
1047         }
1048         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
1049         intel_encoder->get_config = intel_lvds_get_config;
1050         intel_connector->get_hw_state = intel_connector_get_hw_state;
1051         intel_connector->unregister = intel_connector_unregister;
1052
1053         intel_connector_attach_encoder(intel_connector, intel_encoder);
1054         intel_encoder->type = INTEL_OUTPUT_LVDS;
1055
1056         intel_encoder->cloneable = 0;
1057         if (HAS_PCH_SPLIT(dev))
1058                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1059         else if (IS_GEN4(dev))
1060                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1061         else
1062                 intel_encoder->crtc_mask = (1 << 1);
1063
1064         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1065         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1066         connector->interlace_allowed = false;
1067         connector->doublescan_allowed = false;
1068
1069         lvds_encoder->reg = lvds_reg;
1070
1071         /* create the scaling mode property */
1072         drm_mode_create_scaling_mode_property(dev);
1073         drm_object_attach_property(&connector->base,
1074                                       dev->mode_config.scaling_mode_property,
1075                                       DRM_MODE_SCALE_ASPECT);
1076         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1077         /*
1078          * LVDS discovery:
1079          * 1) check for EDID on DDC
1080          * 2) check for VBT data
1081          * 3) check to see if LVDS is already on
1082          *    if none of the above, no panel
1083          * 4) make sure lid is open
1084          *    if closed, act like it's not there for now
1085          */
1086
1087         /*
1088          * Attempt to get the fixed panel mode from DDC.  Assume that the
1089          * preferred mode is the right one.
1090          */
1091         mutex_lock(&dev->mode_config.mutex);
1092         if (vga_switcheroo_handler_flags() & VGA_SWITCHEROO_CAN_SWITCH_DDC)
1093                 edid = drm_get_edid_switcheroo(connector,
1094                                     intel_gmbus_get_adapter(dev_priv, pin));
1095         else
1096                 edid = drm_get_edid(connector,
1097                                     intel_gmbus_get_adapter(dev_priv, pin));
1098         if (edid) {
1099                 if (drm_add_edid_modes(connector, edid)) {
1100                         drm_mode_connector_update_edid_property(connector,
1101                                                                 edid);
1102                 } else {
1103                         kfree(edid);
1104                         edid = ERR_PTR(-EINVAL);
1105                 }
1106         } else {
1107                 edid = ERR_PTR(-ENOENT);
1108         }
1109         lvds_connector->base.edid = edid;
1110
1111         if (IS_ERR_OR_NULL(edid)) {
1112                 /* Didn't get an EDID, so
1113                  * Set wide sync ranges so we get all modes
1114                  * handed to valid_mode for checking
1115                  */
1116                 connector->display_info.min_vfreq = 0;
1117                 connector->display_info.max_vfreq = 200;
1118                 connector->display_info.min_hfreq = 0;
1119                 connector->display_info.max_hfreq = 200;
1120         }
1121
1122         list_for_each_entry(scan, &connector->probed_modes, head) {
1123                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1124                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
1125                         drm_mode_debug_printmodeline(scan);
1126
1127                         fixed_mode = drm_mode_duplicate(dev, scan);
1128                         if (fixed_mode)
1129                                 goto out;
1130                 }
1131         }
1132
1133         /* Failed to get EDID, what about VBT? */
1134         if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1135                 DRM_DEBUG_KMS("using mode from VBT: ");
1136                 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1137
1138                 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1139                 if (fixed_mode) {
1140                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1141                         goto out;
1142                 }
1143         }
1144
1145         /*
1146          * If we didn't get EDID, try checking if the panel is already turned
1147          * on.  If so, assume that whatever is currently programmed is the
1148          * correct mode.
1149          */
1150
1151         /* Ironlake: FIXME if still fail, not try pipe mode now */
1152         if (HAS_PCH_SPLIT(dev))
1153                 goto failed;
1154
1155         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1156         crtc = intel_get_crtc_for_pipe(dev, pipe);
1157
1158         if (crtc && (lvds & LVDS_PORT_EN)) {
1159                 fixed_mode = intel_crtc_mode_get(dev, crtc);
1160                 if (fixed_mode) {
1161                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
1162                         drm_mode_debug_printmodeline(fixed_mode);
1163                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1164                         goto out;
1165                 }
1166         }
1167
1168         /* If we still don't have a mode after all that, give up. */
1169         if (!fixed_mode)
1170                 goto failed;
1171
1172 out:
1173         mutex_unlock(&dev->mode_config.mutex);
1174
1175         intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
1176
1177         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1178         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1179                       lvds_encoder->is_dual_link ? "dual" : "single");
1180
1181         lvds_encoder->a3_power = lvds & LVDS_A3_POWER_MASK;
1182
1183         lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1184         if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1185                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1186                 lvds_connector->lid_notifier.notifier_call = NULL;
1187         }
1188         drm_connector_register(connector);
1189
1190         intel_panel_setup_backlight(connector, INVALID_PIPE);
1191
1192         return;
1193
1194 failed:
1195         mutex_unlock(&dev->mode_config.mutex);
1196
1197         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1198         drm_connector_cleanup(connector);
1199         drm_encoder_cleanup(encoder);
1200         kfree(lvds_encoder);
1201         kfree(lvds_connector);
1202         return;
1203 }