drivers/gpu/drm/imx/dw_hdmi-imx.c

   1 /* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
   2  *
   3  * derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now)
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  */
   9 #include <linux/module.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/component.h>
  12 #include <linux/mfd/syscon.h>
  13 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  14 #include <drm/bridge/dw_hdmi.h>
  15 #include <video/imx-ipu-v3.h>
  16 #include <linux/regmap.h>
  17 #include <drm/drm_of.h>
  18 #include <drm/drmP.h>
  19 #include <drm/drm_crtc_helper.h>
  20 #include <drm/drm_edid.h>
  21 #include <drm/drm_encoder_slave.h>
  22
  23 #include "imx-drm.h"
  24
  25 struct imx_hdmi {
  26         struct device *dev;
  27         struct drm_encoder encoder;
  28         struct regmap *regmap;
  29 };
  30
  31 static const struct dw_hdmi_mpll_config imx_mpll_cfg[] = {
  32         {
  33                 45250000, {
  34                         { 0x01e0, 0x0000 },
  35                         { 0x21e1, 0x0000 },
  36                         { 0x41e2, 0x0000 }
  37                 },
  38         }, {
  39                 92500000, {
  40                         { 0x0140, 0x0005 },
  41                         { 0x2141, 0x0005 },
  42                         { 0x4142, 0x0005 },
  43         },
  44         }, {
  45                 148500000, {
  46                         { 0x00a0, 0x000a },
  47                         { 0x20a1, 0x000a },
  48                         { 0x40a2, 0x000a },
  49                 },
  50         }, {
  51                 216000000, {
  52                         { 0x00a0, 0x000a },
  53                         { 0x2001, 0x000f },
  54                         { 0x4002, 0x000f },
  55                 },
  56         }, {
  57                 ~0UL, {
  58                         { 0x0000, 0x0000 },
  59                         { 0x0000, 0x0000 },
  60                         { 0x0000, 0x0000 },
  61                 },
  62         }
  63 };
  64
  65 static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = {
  66         /*      pixelclk     bpp8    bpp10   bpp12 */
  67         {
  68                 54000000, { 0x091c, 0x091c, 0x06dc },
  69         }, {
  70                 58400000, { 0x091c, 0x06dc, 0x06dc },
  71         }, {
  72                 72000000, { 0x06dc, 0x06dc, 0x091c },
  73         }, {
  74                 74250000, { 0x06dc, 0x0b5c, 0x091c },
  75         }, {
  76                 118800000, { 0x091c, 0x091c, 0x06dc },
  77         }, {
  78                 216000000, { 0x06dc, 0x0b5c, 0x091c },
  79         }, {
  80                 ~0UL, { 0x0000, 0x0000, 0x0000 },
  81         },
  82 };
  83
  84 /*
  85  * Resistance term 133Ohm Cfg
  86  * PREEMP config 0.00
  87  * TX/CK level 10
  88  */
  89 static const struct dw_hdmi_phy_config imx_phy_config[] = {
  90         /*pixelclk   symbol   term   vlev */
  91         { 216000000, 0x800d, 0x0005, 0x01ad},
  92         { ~0UL,      0x0000, 0x0000, 0x0000}
  93 };
  94
  95 static int dw_hdmi_imx_parse_dt(struct imx_hdmi *hdmi)
  96 {
  97         struct device_node *np = hdmi->dev->of_node;
  98
  99         hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 100         if (IS_ERR(hdmi->regmap)) {
 101                 dev_err(hdmi->dev, "Unable to get gpr\n");
 102                 return PTR_ERR(hdmi->regmap);
 103         }
 104
 105         return 0;
 106 }
 107
 108 static void dw_hdmi_imx_encoder_disable(struct drm_encoder *encoder)
 109 {
 110 }
 111
 112 static void dw_hdmi_imx_encoder_mode_set(struct drm_encoder *encoder,
 113                                          struct drm_display_mode *mode,
 114                                          struct drm_display_mode *adj_mode)
 115 {
 116 }
 117
 118 static void dw_hdmi_imx_encoder_commit(struct drm_encoder *encoder)
 119 {
 120         struct imx_hdmi *hdmi = container_of(encoder, struct imx_hdmi, encoder);
 121         int mux = drm_of_encoder_active_port_id(hdmi->dev->of_node, encoder);
 122
 123         regmap_update_bits(hdmi->regmap, IOMUXC_GPR3,
 124                            IMX6Q_GPR3_HDMI_MUX_CTL_MASK,
 125                            mux << IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT);
 126 }
 127
 128 static void dw_hdmi_imx_encoder_prepare(struct drm_encoder *encoder)
 129 {
 130         imx_drm_set_bus_format(encoder, MEDIA_BUS_FMT_RGB888_1X24);
 131 }
 132
 133 static const struct drm_encoder_helper_funcs dw_hdmi_imx_encoder_helper_funcs = {
 134         .mode_set   = dw_hdmi_imx_encoder_mode_set,
 135         .prepare    = dw_hdmi_imx_encoder_prepare,
 136         .commit     = dw_hdmi_imx_encoder_commit,
 137         .disable    = dw_hdmi_imx_encoder_disable,
 138 };
 139
 140 static const struct drm_encoder_funcs dw_hdmi_imx_encoder_funcs = {
 141         .destroy = drm_encoder_cleanup,
 142 };
 143
 144 static enum drm_mode_status imx6q_hdmi_mode_valid(struct drm_connector *con,
 145                                                   struct drm_display_mode *mode)
 146 {
 147         if (mode->clock < 13500)
 148                 return MODE_CLOCK_LOW;
 149         /* FIXME: Hardware is capable of 266MHz, but setup data is missing. */
 150         if (mode->clock > 216000)
 151                 return MODE_CLOCK_HIGH;
 152
 153         return MODE_OK;
 154 }
 155
 156 static enum drm_mode_status imx6dl_hdmi_mode_valid(struct drm_connector *con,
 157                                                    struct drm_display_mode *mode)
 158 {
 159         if (mode->clock < 13500)
 160                 return MODE_CLOCK_LOW;
 161         /* FIXME: Hardware is capable of 270MHz, but setup data is missing. */
 162         if (mode->clock > 216000)
 163                 return MODE_CLOCK_HIGH;
 164
 165         return MODE_OK;
 166 }
 167
 168 static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = {
 169         .mpll_cfg   = imx_mpll_cfg,
 170         .cur_ctr    = imx_cur_ctr,
 171         .phy_config = imx_phy_config,
 172         .dev_type   = IMX6Q_HDMI,
 173         .mode_valid = imx6q_hdmi_mode_valid,
 174 };
 175
 176 static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = {
 177         .mpll_cfg = imx_mpll_cfg,
 178         .cur_ctr  = imx_cur_ctr,
 179         .phy_config = imx_phy_config,
 180         .dev_type = IMX6DL_HDMI,
 181         .mode_valid = imx6dl_hdmi_mode_valid,
 182 };
 183
 184 static const struct of_device_id dw_hdmi_imx_dt_ids[] = {
 185         { .compatible = "fsl,imx6q-hdmi",
 186           .data = &imx6q_hdmi_drv_data
 187         }, {
 188           .compatible = "fsl,imx6dl-hdmi",
 189           .data = &imx6dl_hdmi_drv_data
 190         },
 191         {},
 192 };
 193 MODULE_DEVICE_TABLE(of, dw_hdmi_imx_dt_ids);
 194
 195 static int dw_hdmi_imx_bind(struct device *dev, struct device *master,
 196                             void *data)
 197 {
 198         struct platform_device *pdev = to_platform_device(dev);
 199         const struct dw_hdmi_plat_data *plat_data;
 200         const struct of_device_id *match;
 201         struct drm_device *drm = data;
 202         struct drm_encoder *encoder;
 203         struct imx_hdmi *hdmi;
 204         struct resource *iores;
 205         int irq;
 206         int ret;
 207
 208         if (!pdev->dev.of_node)
 209                 return -ENODEV;
 210
 211         hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
 212         if (!hdmi)
 213                 return -ENOMEM;
 214
 215         match = of_match_node(dw_hdmi_imx_dt_ids, pdev->dev.of_node);
 216         plat_data = match->data;
 217         hdmi->dev = &pdev->dev;
 218         encoder = &hdmi->encoder;
 219
 220         irq = platform_get_irq(pdev, 0);
 221         if (irq < 0)
 222                 return irq;
 223
 224         iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 225         if (!iores)
 226                 return -ENXIO;
 227
 228         encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
 229         /*
 230          * If we failed to find the CRTC(s) which this encoder is
 231          * supposed to be connected to, it's because the CRTC has
 232          * not been registered yet.  Defer probing, and hope that
 233          * the required CRTC is added later.
 234          */
 235         if (encoder->possible_crtcs == 0)
 236                 return -EPROBE_DEFER;
 237
 238         ret = dw_hdmi_imx_parse_dt(hdmi);
 239         if (ret < 0)
 240                 return ret;
 241
 242         drm_encoder_helper_add(encoder, &dw_hdmi_imx_encoder_helper_funcs);
 243         drm_encoder_init(drm, encoder, &dw_hdmi_imx_encoder_funcs,
 244                          DRM_MODE_ENCODER_TMDS, NULL);
 245
 246         ret = dw_hdmi_bind(dev, master, data, encoder, iores, irq, plat_data);
 247
 248         /*
 249          * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(),
 250          * which would have called the encoder cleanup.  Do it manually.
 251          */
 252         if (ret)
 253                 drm_encoder_cleanup(encoder);
 254
 255         return ret;
 256 }
 257
 258 static void dw_hdmi_imx_unbind(struct device *dev, struct device *master,
 259                                void *data)
 260 {
 261         return dw_hdmi_unbind(dev, master, data);
 262 }
 263
 264 static const struct component_ops dw_hdmi_imx_ops = {
 265         .bind   = dw_hdmi_imx_bind,
 266         .unbind = dw_hdmi_imx_unbind,
 267 };
 268
 269 static int dw_hdmi_imx_probe(struct platform_device *pdev)
 270 {
 271         return component_add(&pdev->dev, &dw_hdmi_imx_ops);
 272 }
 273
 274 static int dw_hdmi_imx_remove(struct platform_device *pdev)
 275 {
 276         component_del(&pdev->dev, &dw_hdmi_imx_ops);
 277
 278         return 0;
 279 }
 280
 281 static struct platform_driver dw_hdmi_imx_platform_driver = {
 282         .probe  = dw_hdmi_imx_probe,
 283         .remove = dw_hdmi_imx_remove,
 284         .driver = {
 285                 .name = "dwhdmi-imx",
 286                 .of_match_table = dw_hdmi_imx_dt_ids,
 287         },
 288 };
 289
 290 module_platform_driver(dw_hdmi_imx_platform_driver);
 291
 292 MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
 293 MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
 294 MODULE_DESCRIPTION("IMX6 Specific DW-HDMI Driver Extension");
 295 MODULE_LICENSE("GPL");
 296 MODULE_ALIAS("platform:dwhdmi-imx");