2 * Copyright (c) 2015, The Linux Foundation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
17 #include <linux/regulator/consumer.h>
21 #define dsi_phy_read(offset) msm_readl((offset))
22 #define dsi_phy_write(offset, data) msm_writel((data), (offset))
24 struct msm_dsi_phy_ops {
25 int (*enable)(struct msm_dsi_phy *phy, int src_pll_id,
26 const unsigned long bit_rate, const unsigned long esc_rate);
27 void (*disable)(struct msm_dsi_phy *phy);
30 struct msm_dsi_phy_cfg {
31 enum msm_dsi_phy_type type;
32 struct dsi_reg_config reg_cfg;
33 struct msm_dsi_phy_ops ops;
36 * Each cell {phy_id, pll_id} of the truth table indicates
37 * if the source PLL selection bit should be set for each PHY.
38 * Fill default H/W values in illegal cells, eg. cell {0, 1}.
40 bool src_pll_truthtable[DSI_MAX][DSI_MAX];
43 extern const struct msm_dsi_phy_cfg dsi_phy_28nm_hpm_cfgs;
44 extern const struct msm_dsi_phy_cfg dsi_phy_28nm_lp_cfgs;
45 extern const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs;
46 extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8960_cfgs;
48 struct msm_dsi_dphy_timing {
65 struct platform_device *pdev;
67 void __iomem *reg_base;
71 struct regulator_bulk_data supplies[DSI_DEV_REGULATOR_MAX];
73 struct msm_dsi_dphy_timing timing;
74 const struct msm_dsi_phy_cfg *cfg;
76 bool regulator_ldo_mode;
78 struct msm_dsi_pll *pll;
82 * PHY internal functions
84 int msm_dsi_dphy_timing_calc(struct msm_dsi_dphy_timing *timing,
85 const unsigned long bit_rate, const unsigned long esc_rate);
86 void msm_dsi_phy_set_src_pll(struct msm_dsi_phy *phy, int pll_id, u32 reg,
89 #endif /* __DSI_PHY_H__ */