2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
23 static const char *iommu_ports[] = {
27 static struct mdp5_platform_config *mdp5_get_config(struct platform_device *dev);
29 static int mdp5_hw_init(struct msm_kms *kms)
31 struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
32 struct drm_device *dev = mdp5_kms->dev;
33 uint32_t version, major, minor;
36 pm_runtime_get_sync(dev->dev);
38 mdp5_enable(mdp5_kms);
39 version = mdp5_read(mdp5_kms, REG_MDP5_MDP_VERSION);
40 mdp5_disable(mdp5_kms);
42 major = FIELD(version, MDP5_MDP_VERSION_MAJOR);
43 minor = FIELD(version, MDP5_MDP_VERSION_MINOR);
45 DBG("found MDP5 version v%d.%d", major, minor);
47 if ((major != 1) || ((minor != 0) && (minor != 2))) {
48 dev_err(dev->dev, "unexpected MDP version: v%d.%d\n",
54 mdp5_kms->rev = minor;
56 /* Magic unknown register writes:
58 * W VBIF:0x004 00000001 (mdss_mdp.c:839)
59 * W MDP5:0x2e0 0xe9 (mdss_mdp.c:839)
60 * W MDP5:0x2e4 0x55 (mdss_mdp.c:839)
61 * W MDP5:0x3ac 0xc0000ccc (mdss_mdp.c:839)
62 * W MDP5:0x3b4 0xc0000ccc (mdss_mdp.c:839)
63 * W MDP5:0x3bc 0xcccccc (mdss_mdp.c:839)
64 * W MDP5:0x4a8 0xcccc0c0 (mdss_mdp.c:839)
65 * W MDP5:0x4b0 0xccccc0c0 (mdss_mdp.c:839)
66 * W MDP5:0x4b8 0xccccc000 (mdss_mdp.c:839)
68 * Downstream fbdev driver gets these register offsets/values
69 * from DT.. not really sure what these registers are or if
70 * different values for different boards/SoC's, etc. I guess
71 * they are the golden registers.
73 * Not setting these does not seem to cause any problem. But
74 * we may be getting lucky with the bootloader initializing
75 * them for us. OTOH, if we can always count on the bootloader
76 * setting the golden registers, then perhaps we don't need to
80 mdp5_write(mdp5_kms, REG_MDP5_DISP_INTF_SEL, 0);
81 mdp5_write(mdp5_kms, REG_MDP5_CTL_OP(0), 0);
82 mdp5_write(mdp5_kms, REG_MDP5_CTL_OP(1), 0);
83 mdp5_write(mdp5_kms, REG_MDP5_CTL_OP(2), 0);
84 mdp5_write(mdp5_kms, REG_MDP5_CTL_OP(3), 0);
87 pm_runtime_put_sync(dev->dev);
92 static long mdp5_round_pixclk(struct msm_kms *kms, unsigned long rate,
93 struct drm_encoder *encoder)
98 static void mdp5_preclose(struct msm_kms *kms, struct drm_file *file)
100 struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
101 struct msm_drm_private *priv = mdp5_kms->dev->dev_private;
104 for (i = 0; i < priv->num_crtcs; i++)
105 mdp5_crtc_cancel_pending_flip(priv->crtcs[i], file);
108 static void mdp5_destroy(struct msm_kms *kms)
110 struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
111 struct msm_mmu *mmu = mdp5_kms->mmu;
114 mmu->funcs->detach(mmu, iommu_ports, ARRAY_SIZE(iommu_ports));
115 mmu->funcs->destroy(mmu);
120 static const struct mdp_kms_funcs kms_funcs = {
122 .hw_init = mdp5_hw_init,
123 .irq_preinstall = mdp5_irq_preinstall,
124 .irq_postinstall = mdp5_irq_postinstall,
125 .irq_uninstall = mdp5_irq_uninstall,
127 .enable_vblank = mdp5_enable_vblank,
128 .disable_vblank = mdp5_disable_vblank,
129 .get_format = mdp_get_format,
130 .round_pixclk = mdp5_round_pixclk,
131 .preclose = mdp5_preclose,
132 .destroy = mdp5_destroy,
134 .set_irqmask = mdp5_set_irqmask,
137 int mdp5_disable(struct mdp5_kms *mdp5_kms)
141 clk_disable_unprepare(mdp5_kms->ahb_clk);
142 clk_disable_unprepare(mdp5_kms->axi_clk);
143 clk_disable_unprepare(mdp5_kms->core_clk);
144 clk_disable_unprepare(mdp5_kms->lut_clk);
149 int mdp5_enable(struct mdp5_kms *mdp5_kms)
153 clk_prepare_enable(mdp5_kms->ahb_clk);
154 clk_prepare_enable(mdp5_kms->axi_clk);
155 clk_prepare_enable(mdp5_kms->core_clk);
156 clk_prepare_enable(mdp5_kms->lut_clk);
161 static int modeset_init(struct mdp5_kms *mdp5_kms)
163 static const enum mdp5_pipe crtcs[] = {
164 SSPP_RGB0, SSPP_RGB1, SSPP_RGB2,
166 struct drm_device *dev = mdp5_kms->dev;
167 struct msm_drm_private *priv = dev->dev_private;
168 struct drm_encoder *encoder;
171 /* construct CRTCs: */
172 for (i = 0; i < ARRAY_SIZE(crtcs); i++) {
173 struct drm_plane *plane;
174 struct drm_crtc *crtc;
176 plane = mdp5_plane_init(dev, crtcs[i], true);
178 ret = PTR_ERR(plane);
179 dev_err(dev->dev, "failed to construct plane for %s (%d)\n",
180 pipe2name(crtcs[i]), ret);
184 crtc = mdp5_crtc_init(dev, plane, i);
187 dev_err(dev->dev, "failed to construct crtc for %s (%d)\n",
188 pipe2name(crtcs[i]), ret);
191 priv->crtcs[priv->num_crtcs++] = crtc;
194 /* Construct encoder for HDMI: */
195 encoder = mdp5_encoder_init(dev, 3, INTF_HDMI);
196 if (IS_ERR(encoder)) {
197 dev_err(dev->dev, "failed to construct encoder\n");
198 ret = PTR_ERR(encoder);
202 /* NOTE: the vsync and error irq's are actually associated with
203 * the INTF/encoder.. the easiest way to deal with this (ie. what
204 * we do now) is assume a fixed relationship between crtc's and
205 * encoders. I'm not sure if there is ever a need to more freely
206 * assign crtcs to encoders, but if there is then we need to take
207 * care of error and vblank irq's that the crtc has registered,
208 * and also update user-requested vblank_mask.
210 encoder->possible_crtcs = BIT(0);
211 mdp5_crtc_set_intf(priv->crtcs[0], 3, INTF_HDMI);
213 priv->encoders[priv->num_encoders++] = encoder;
215 /* Construct bridge/connector for HDMI: */
216 mdp5_kms->hdmi = hdmi_init(dev, encoder);
217 if (IS_ERR(mdp5_kms->hdmi)) {
218 ret = PTR_ERR(mdp5_kms->hdmi);
219 dev_err(dev->dev, "failed to initialize HDMI: %d\n", ret);
229 static int get_clk(struct platform_device *pdev, struct clk **clkp,
232 struct device *dev = &pdev->dev;
233 struct clk *clk = devm_clk_get(dev, name);
235 dev_err(dev, "failed to get %s (%ld)\n", name, PTR_ERR(clk));
242 struct msm_kms *mdp5_kms_init(struct drm_device *dev)
244 struct platform_device *pdev = dev->platformdev;
245 struct mdp5_platform_config *config = mdp5_get_config(pdev);
246 struct mdp5_kms *mdp5_kms;
247 struct msm_kms *kms = NULL;
251 mdp5_kms = kzalloc(sizeof(*mdp5_kms), GFP_KERNEL);
253 dev_err(dev->dev, "failed to allocate kms\n");
258 mdp_kms_init(&mdp5_kms->base, &kms_funcs);
260 kms = &mdp5_kms->base.base;
263 mdp5_kms->smp_blk_cnt = config->smp_blk_cnt;
265 mdp5_kms->mmio = msm_ioremap(pdev, "mdp_phys", "MDP5");
266 if (IS_ERR(mdp5_kms->mmio)) {
267 ret = PTR_ERR(mdp5_kms->mmio);
271 mdp5_kms->vbif = msm_ioremap(pdev, "vbif_phys", "VBIF");
272 if (IS_ERR(mdp5_kms->vbif)) {
273 ret = PTR_ERR(mdp5_kms->vbif);
277 mdp5_kms->vdd = devm_regulator_get(&pdev->dev, "vdd");
278 if (IS_ERR(mdp5_kms->vdd)) {
279 ret = PTR_ERR(mdp5_kms->vdd);
283 ret = regulator_enable(mdp5_kms->vdd);
285 dev_err(dev->dev, "failed to enable regulator vdd: %d\n", ret);
289 ret = get_clk(pdev, &mdp5_kms->axi_clk, "bus_clk");
292 ret = get_clk(pdev, &mdp5_kms->ahb_clk, "iface_clk");
295 ret = get_clk(pdev, &mdp5_kms->src_clk, "core_clk_src");
298 ret = get_clk(pdev, &mdp5_kms->core_clk, "core_clk");
301 ret = get_clk(pdev, &mdp5_kms->lut_clk, "lut_clk");
304 ret = get_clk(pdev, &mdp5_kms->vsync_clk, "vsync_clk");
308 ret = clk_set_rate(mdp5_kms->src_clk, config->max_clk);
310 /* make sure things are off before attaching iommu (bootloader could
311 * have left things on, in which case we'll start getting faults if
314 mdp5_enable(mdp5_kms);
315 mdp5_write(mdp5_kms, REG_MDP5_INTF_TIMING_ENGINE_EN(0), 0);
316 mdp5_write(mdp5_kms, REG_MDP5_INTF_TIMING_ENGINE_EN(1), 0);
317 mdp5_write(mdp5_kms, REG_MDP5_INTF_TIMING_ENGINE_EN(2), 0);
318 mdp5_write(mdp5_kms, REG_MDP5_INTF_TIMING_ENGINE_EN(3), 0);
319 mdp5_disable(mdp5_kms);
323 mmu = msm_iommu_new(dev, config->iommu);
326 dev_err(dev->dev, "failed to init iommu: %d\n", ret);
330 ret = mmu->funcs->attach(mmu, iommu_ports,
331 ARRAY_SIZE(iommu_ports));
333 dev_err(dev->dev, "failed to attach iommu: %d\n", ret);
334 mmu->funcs->destroy(mmu);
338 dev_info(dev->dev, "no iommu, fallback to phys "
339 "contig buffers for scanout\n");
344 mdp5_kms->id = msm_register_mmu(dev, mmu);
345 if (mdp5_kms->id < 0) {
347 dev_err(dev->dev, "failed to register mdp5 iommu: %d\n", ret);
351 ret = modeset_init(mdp5_kms);
353 dev_err(dev->dev, "modeset_init failed: %d\n", ret);
365 static struct mdp5_platform_config *mdp5_get_config(struct platform_device *dev)
367 static struct mdp5_platform_config config = {};