2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <engine/software.h>
26 #include <engine/disp.h>
28 #include <core/class.h>
32 /*******************************************************************************
33 * EVO master channel object
34 ******************************************************************************/
36 const struct nv50_disp_mthd_list
37 nv94_disp_mast_mthd_sor = {
46 const struct nv50_disp_mthd_chan
47 nv94_disp_mast_mthd_chan = {
51 { "Global", 1, &nv50_disp_mast_mthd_base },
52 { "DAC", 3, &nv84_disp_mast_mthd_dac },
53 { "SOR", 4, &nv94_disp_mast_mthd_sor },
54 { "PIOR", 3, &nv50_disp_mast_mthd_pior },
55 { "HEAD", 2, &nv84_disp_mast_mthd_head },
60 /*******************************************************************************
62 ******************************************************************************/
64 static struct nouveau_oclass
65 nv94_disp_sclass[] = {
66 { NV94_DISP_MAST_CLASS, &nv50_disp_mast_ofuncs.base },
67 { NV94_DISP_SYNC_CLASS, &nv50_disp_sync_ofuncs.base },
68 { NV94_DISP_OVLY_CLASS, &nv50_disp_ovly_ofuncs.base },
69 { NV94_DISP_OIMM_CLASS, &nv50_disp_oimm_ofuncs.base },
70 { NV94_DISP_CURS_CLASS, &nv50_disp_curs_ofuncs.base },
74 static struct nouveau_omthds
75 nv94_disp_base_omthds[] = {
76 { HEAD_MTHD(NV50_DISP_SCANOUTPOS) , nv50_disp_base_scanoutpos },
80 static struct nouveau_oclass
81 nv94_disp_base_oclass[] = {
82 { NV94_DISP_CLASS, &nv50_disp_base_ofuncs, nv94_disp_base_omthds },
86 /*******************************************************************************
87 * Display engine implementation
88 ******************************************************************************/
91 nv94_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
92 struct nouveau_oclass *oclass, void *data, u32 size,
93 struct nouveau_object **pobject)
95 struct nv50_disp_priv *priv;
98 ret = nouveau_disp_create(parent, engine, oclass, 2, "PDISP",
100 *pobject = nv_object(priv);
104 nv_engine(priv)->sclass = nv94_disp_base_oclass;
105 nv_engine(priv)->cclass = &nv50_disp_cclass;
106 nv_subdev(priv)->intr = nv50_disp_intr;
107 INIT_WORK(&priv->supervisor, nv50_disp_intr_supervisor);
108 priv->sclass = nv94_disp_sclass;
113 priv->dac.power = nv50_dac_power;
114 priv->dac.sense = nv50_dac_sense;
115 priv->sor.power = nv50_sor_power;
116 priv->sor.hdmi = nv84_hdmi_ctrl;
117 priv->pior.power = nv50_pior_power;
121 struct nouveau_oclass *
122 nv94_disp_outp_sclass[] = {
123 &nv50_pior_dp_impl.base.base,
124 &nv94_sor_dp_impl.base.base,
128 struct nouveau_oclass *
129 nv94_disp_oclass = &(struct nv50_disp_impl) {
130 .base.base.handle = NV_ENGINE(DISP, 0x88),
131 .base.base.ofuncs = &(struct nouveau_ofuncs) {
132 .ctor = nv94_disp_ctor,
133 .dtor = _nouveau_disp_dtor,
134 .init = _nouveau_disp_init,
135 .fini = _nouveau_disp_fini,
137 .base.vblank = &nv50_disp_vblank_func,
138 .base.outp = nv94_disp_outp_sclass,
139 .mthd.core = &nv94_disp_mast_mthd_chan,
140 .mthd.base = &nv84_disp_sync_mthd_chan,
141 .mthd.ovly = &nv84_disp_ovly_mthd_chan,
142 .mthd.prev = 0x000004,