Merge tag 'drm-intel-fixes-2014-01-28' of git://people.freedesktop.org/~danvet/drm...
[cascardo/linux.git] / drivers / gpu / drm / nouveau / core / subdev / clock / base.c
1 /*
2  * Copyright 2013 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24
25 #include <core/option.h>
26
27 #include <subdev/clock.h>
28 #include <subdev/therm.h>
29 #include <subdev/volt.h>
30 #include <subdev/fb.h>
31
32 #include <subdev/bios.h>
33 #include <subdev/bios/boost.h>
34 #include <subdev/bios/cstep.h>
35 #include <subdev/bios/perf.h>
36
37 /******************************************************************************
38  * misc
39  *****************************************************************************/
40 static u32
41 nouveau_clock_adjust(struct nouveau_clock *clk, bool adjust,
42                      u8 pstate, u8 domain, u32 input)
43 {
44         struct nouveau_bios *bios = nouveau_bios(clk);
45         struct nvbios_boostE boostE;
46         u8  ver, hdr, cnt, len;
47         u16 data;
48
49         data = nvbios_boostEm(bios, pstate, &ver, &hdr, &cnt, &len, &boostE);
50         if (data) {
51                 struct nvbios_boostS boostS;
52                 u8  idx = 0, sver, shdr;
53                 u16 subd;
54
55                 input = max(boostE.min, input);
56                 input = min(boostE.max, input);
57                 do {
58                         sver = ver;
59                         shdr = hdr;
60                         subd = nvbios_boostSp(bios, idx++, data, &sver, &shdr,
61                                               cnt, len, &boostS);
62                         if (subd && boostS.domain == domain) {
63                                 if (adjust)
64                                         input = input * boostS.percent / 100;
65                                 input = max(boostS.min, input);
66                                 input = min(boostS.max, input);
67                                 break;
68                         }
69                 } while (subd);
70         }
71
72         return input;
73 }
74
75 /******************************************************************************
76  * C-States
77  *****************************************************************************/
78 static int
79 nouveau_cstate_prog(struct nouveau_clock *clk,
80                     struct nouveau_pstate *pstate, int cstatei)
81 {
82         struct nouveau_therm *ptherm = nouveau_therm(clk);
83         struct nouveau_volt *volt = nouveau_volt(clk);
84         struct nouveau_cstate *cstate;
85         int ret;
86
87         if (!list_empty(&pstate->list)) {
88                 cstate = list_entry(pstate->list.prev, typeof(*cstate), head);
89         } else {
90                 cstate = &pstate->base;
91         }
92
93         ret = nouveau_therm_cstate(ptherm, pstate->fanspeed, +1);
94         if (ret && ret != -ENODEV) {
95                 nv_error(clk, "failed to raise fan speed: %d\n", ret);
96                 return ret;
97         }
98
99         ret = volt->set_id(volt, cstate->voltage, +1);
100         if (ret && ret != -ENODEV) {
101                 nv_error(clk, "failed to raise voltage: %d\n", ret);
102                 return ret;
103         }
104
105         ret = clk->calc(clk, cstate);
106         if (ret == 0) {
107                 ret = clk->prog(clk);
108                 clk->tidy(clk);
109         }
110
111         ret = volt->set_id(volt, cstate->voltage, -1);
112         if (ret && ret != -ENODEV)
113                 nv_error(clk, "failed to lower voltage: %d\n", ret);
114
115         ret = nouveau_therm_cstate(ptherm, pstate->fanspeed, -1);
116         if (ret && ret != -ENODEV)
117                 nv_error(clk, "failed to lower fan speed: %d\n", ret);
118
119         return 0;
120 }
121
122 static void
123 nouveau_cstate_del(struct nouveau_cstate *cstate)
124 {
125         list_del(&cstate->head);
126         kfree(cstate);
127 }
128
129 static int
130 nouveau_cstate_new(struct nouveau_clock *clk, int idx,
131                    struct nouveau_pstate *pstate)
132 {
133         struct nouveau_bios *bios = nouveau_bios(clk);
134         struct nouveau_clocks *domain = clk->domains;
135         struct nouveau_cstate *cstate = NULL;
136         struct nvbios_cstepX cstepX;
137         u8  ver, hdr;
138         u16 data;
139
140         data = nvbios_cstepXp(bios, idx, &ver, &hdr, &cstepX);
141         if (!data)
142                 return -ENOENT;
143
144         cstate = kzalloc(sizeof(*cstate), GFP_KERNEL);
145         if (!cstate)
146                 return -ENOMEM;
147
148         *cstate = pstate->base;
149         cstate->voltage = cstepX.voltage;
150
151         while (domain && domain->name != nv_clk_src_max) {
152                 if (domain->flags & NVKM_CLK_DOM_FLAG_CORE) {
153                         u32 freq = nouveau_clock_adjust(clk, true,
154                                                         pstate->pstate,
155                                                         domain->bios,
156                                                         cstepX.freq);
157                         cstate->domain[domain->name] = freq;
158                 }
159                 domain++;
160         }
161
162         list_add(&cstate->head, &pstate->list);
163         return 0;
164 }
165
166 /******************************************************************************
167  * P-States
168  *****************************************************************************/
169 static int
170 nouveau_pstate_prog(struct nouveau_clock *clk, int pstatei)
171 {
172         struct nouveau_fb *pfb = nouveau_fb(clk);
173         struct nouveau_pstate *pstate;
174         int ret, idx = 0;
175
176         list_for_each_entry(pstate, &clk->states, head) {
177                 if (idx++ == pstatei)
178                         break;
179         }
180
181         nv_debug(clk, "setting performance state %d\n", pstatei);
182         clk->pstate = pstatei;
183
184         if (pfb->ram->calc) {
185                 int khz = pstate->base.domain[nv_clk_src_mem];
186                 do {
187                         ret = pfb->ram->calc(pfb, khz);
188                         if (ret == 0)
189                                 ret = pfb->ram->prog(pfb);
190                 } while (ret > 0);
191                 pfb->ram->tidy(pfb);
192         }
193
194         return nouveau_cstate_prog(clk, pstate, 0);
195 }
196
197 static int
198 nouveau_pstate_calc(struct nouveau_clock *clk)
199 {
200         int pstate, ret = 0;
201
202         nv_trace(clk, "P %d U %d A %d T %d D %d\n", clk->pstate,
203                  clk->ustate, clk->astate, clk->tstate, clk->dstate);
204
205         if (clk->state_nr && clk->ustate != -1) {
206                 pstate = (clk->ustate < 0) ? clk->astate : clk->ustate;
207                 pstate = min(pstate, clk->state_nr - 1 - clk->tstate);
208                 pstate = max(pstate, clk->dstate);
209         } else {
210                 pstate = clk->pstate = -1;
211         }
212
213         nv_trace(clk, "-> %d\n", pstate);
214         if (pstate != clk->pstate)
215                 ret = nouveau_pstate_prog(clk, pstate);
216         return ret;
217 }
218
219 static void
220 nouveau_pstate_info(struct nouveau_clock *clk, struct nouveau_pstate *pstate)
221 {
222         struct nouveau_clocks *clock = clk->domains - 1;
223         struct nouveau_cstate *cstate;
224         char info[3][32] = { "", "", "" };
225         char name[4] = "--";
226         int i = -1;
227
228         if (pstate->pstate != 0xff)
229                 snprintf(name, sizeof(name), "%02x", pstate->pstate);
230
231         while ((++clock)->name != nv_clk_src_max) {
232                 u32 lo = pstate->base.domain[clock->name];
233                 u32 hi = lo;
234                 if (hi == 0)
235                         continue;
236
237                 nv_debug(clk, "%02x: %10d KHz\n", clock->name, lo);
238                 list_for_each_entry(cstate, &pstate->list, head) {
239                         u32 freq = cstate->domain[clock->name];
240                         lo = min(lo, freq);
241                         hi = max(hi, freq);
242                         nv_debug(clk, "%10d KHz\n", freq);
243                 }
244
245                 if (clock->mname && ++i < ARRAY_SIZE(info)) {
246                         lo /= clock->mdiv;
247                         hi /= clock->mdiv;
248                         if (lo == hi) {
249                                 snprintf(info[i], sizeof(info[i]), "%s %d MHz",
250                                          clock->mname, lo);
251                         } else {
252                                 snprintf(info[i], sizeof(info[i]),
253                                          "%s %d-%d MHz", clock->mname, lo, hi);
254                         }
255                 }
256         }
257
258         nv_info(clk, "%s: %s %s %s\n", name, info[0], info[1], info[2]);
259 }
260
261 static void
262 nouveau_pstate_del(struct nouveau_pstate *pstate)
263 {
264         struct nouveau_cstate *cstate, *temp;
265
266         list_for_each_entry_safe(cstate, temp, &pstate->list, head) {
267                 nouveau_cstate_del(cstate);
268         }
269
270         list_del(&pstate->head);
271         kfree(pstate);
272 }
273
274 static int
275 nouveau_pstate_new(struct nouveau_clock *clk, int idx)
276 {
277         struct nouveau_bios *bios = nouveau_bios(clk);
278         struct nouveau_clocks *domain = clk->domains - 1;
279         struct nouveau_pstate *pstate;
280         struct nouveau_cstate *cstate;
281         struct nvbios_cstepE cstepE;
282         struct nvbios_perfE perfE;
283         u8  ver, hdr, cnt, len;
284         u16 data;
285
286         data = nvbios_perfEp(bios, idx, &ver, &hdr, &cnt, &len, &perfE);
287         if (!data)
288                 return -EINVAL;
289         if (perfE.pstate == 0xff)
290                 return 0;
291
292         pstate = kzalloc(sizeof(*pstate), GFP_KERNEL);
293         cstate = &pstate->base;
294         if (!pstate)
295                 return -ENOMEM;
296
297         INIT_LIST_HEAD(&pstate->list);
298
299         pstate->pstate = perfE.pstate;
300         pstate->fanspeed = perfE.fanspeed;
301         cstate->voltage = perfE.voltage;
302         cstate->domain[nv_clk_src_core] = perfE.core;
303         cstate->domain[nv_clk_src_shader] = perfE.shader;
304         cstate->domain[nv_clk_src_mem] = perfE.memory;
305         cstate->domain[nv_clk_src_vdec] = perfE.vdec;
306         cstate->domain[nv_clk_src_dom6] = perfE.disp;
307
308         while (ver >= 0x40 && (++domain)->name != nv_clk_src_max) {
309                 struct nvbios_perfS perfS;
310                 u8  sver = ver, shdr = hdr;
311                 u32 perfSe = nvbios_perfSp(bios, data, domain->bios,
312                                           &sver, &shdr, cnt, len, &perfS);
313                 if (perfSe == 0 || sver != 0x40)
314                         continue;
315
316                 if (domain->flags & NVKM_CLK_DOM_FLAG_CORE) {
317                         perfS.v40.freq = nouveau_clock_adjust(clk, false,
318                                                               pstate->pstate,
319                                                               domain->bios,
320                                                               perfS.v40.freq);
321                 }
322
323                 cstate->domain[domain->name] = perfS.v40.freq;
324         }
325
326         data = nvbios_cstepEm(bios, pstate->pstate, &ver, &hdr, &cstepE);
327         if (data) {
328                 int idx = cstepE.index;
329                 do {
330                         nouveau_cstate_new(clk, idx, pstate);
331                 } while(idx--);
332         }
333
334         nouveau_pstate_info(clk, pstate);
335         list_add_tail(&pstate->head, &clk->states);
336         clk->state_nr++;
337         return 0;
338 }
339
340 /******************************************************************************
341  * Adjustment triggers
342  *****************************************************************************/
343 static int
344 nouveau_clock_ustate_update(struct nouveau_clock *clk, int req)
345 {
346         struct nouveau_pstate *pstate;
347         int i = 0;
348
349         /* YKW repellant */
350         return -ENOSYS;
351
352         if (req != -1 && req != -2) {
353                 list_for_each_entry(pstate, &clk->states, head) {
354                         if (pstate->pstate == req)
355                                 break;
356                         i++;
357                 }
358
359                 if (pstate->pstate != req)
360                         return -EINVAL;
361                 req = i;
362         }
363
364         clk->ustate = req;
365         return 0;
366 }
367
368 int
369 nouveau_clock_ustate(struct nouveau_clock *clk, int req)
370 {
371         int ret = nouveau_clock_ustate_update(clk, req);
372         if (ret)
373                 return ret;
374         return nouveau_pstate_calc(clk);
375 }
376
377 int
378 nouveau_clock_astate(struct nouveau_clock *clk, int req, int rel)
379 {
380         if (!rel) clk->astate  = req;
381         if ( rel) clk->astate += rel;
382         clk->astate = min(clk->astate, clk->state_nr - 1);
383         clk->astate = max(clk->astate, 0);
384         return nouveau_pstate_calc(clk);
385 }
386
387 int
388 nouveau_clock_tstate(struct nouveau_clock *clk, int req, int rel)
389 {
390         if (!rel) clk->tstate  = req;
391         if ( rel) clk->tstate += rel;
392         clk->tstate = min(clk->tstate, 0);
393         clk->tstate = max(clk->tstate, -(clk->state_nr - 1));
394         return nouveau_pstate_calc(clk);
395 }
396
397 int
398 nouveau_clock_dstate(struct nouveau_clock *clk, int req, int rel)
399 {
400         if (!rel) clk->dstate  = req;
401         if ( rel) clk->dstate += rel;
402         clk->dstate = min(clk->dstate, clk->state_nr - 1);
403         clk->dstate = max(clk->dstate, 0);
404         return nouveau_pstate_calc(clk);
405 }
406
407 /******************************************************************************
408  * subdev base class implementation
409  *****************************************************************************/
410 int
411 _nouveau_clock_init(struct nouveau_object *object)
412 {
413         struct nouveau_clock *clk = (void *)object;
414         struct nouveau_clocks *clock = clk->domains;
415         int ret;
416
417         memset(&clk->bstate, 0x00, sizeof(clk->bstate));
418         INIT_LIST_HEAD(&clk->bstate.list);
419         clk->bstate.pstate = 0xff;
420
421         while (clock->name != nv_clk_src_max) {
422                 ret = clk->read(clk, clock->name);
423                 if (ret < 0) {
424                         nv_error(clk, "%02x freq unknown\n", clock->name);
425                         return ret;
426                 }
427                 clk->bstate.base.domain[clock->name] = ret;
428                 clock++;
429         }
430
431         nouveau_pstate_info(clk, &clk->bstate);
432
433         clk->astate = clk->state_nr - 1;
434         clk->tstate = 0;
435         clk->dstate = 0;
436         clk->pstate = -1;
437         nouveau_pstate_calc(clk);
438         return 0;
439 }
440
441 void
442 _nouveau_clock_dtor(struct nouveau_object *object)
443 {
444         struct nouveau_clock *clk = (void *)object;
445         struct nouveau_pstate *pstate, *temp;
446
447         list_for_each_entry_safe(pstate, temp, &clk->states, head) {
448                 nouveau_pstate_del(pstate);
449         }
450
451         nouveau_subdev_destroy(&clk->base);
452 }
453
454 int
455 nouveau_clock_create_(struct nouveau_object *parent,
456                       struct nouveau_object *engine,
457                       struct nouveau_oclass *oclass,
458                       struct nouveau_clocks *clocks,
459                       int length, void **object)
460 {
461         struct nouveau_device *device = nv_device(parent);
462         struct nouveau_clock *clk;
463         int ret, idx, arglen;
464         const char *mode;
465
466         ret = nouveau_subdev_create_(parent, engine, oclass, 0, "CLK",
467                                      "clock", length, object);
468         clk = *object;
469         if (ret)
470                 return ret;
471
472         INIT_LIST_HEAD(&clk->states);
473         clk->domains = clocks;
474         clk->ustate = -1;
475
476         idx = 0;
477         do {
478                 ret = nouveau_pstate_new(clk, idx++);
479         } while (ret == 0);
480
481         mode = nouveau_stropt(device->cfgopt, "NvClkMode", &arglen);
482         if (mode) {
483                 if (!strncasecmpz(mode, "disabled", arglen)) {
484                         clk->ustate = -1;
485                 } else {
486                         char save = mode[arglen];
487                         long v;
488
489                         ((char *)mode)[arglen] = '\0';
490                         if (!kstrtol(mode, 0, &v))
491                                 nouveau_clock_ustate_update(clk, v);
492                         ((char *)mode)[arglen] = save;
493                 }
494         }
495
496         return 0;
497 }