2 * Copyright 2012 Red Hat Inc.
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5 * copy of this software and associated documentation files (the "Software"),
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
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15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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25 #include <subdev/mc.h>
26 #include <core/option.h>
29 nouveau_mc_intr(int irq, void *arg)
31 struct nouveau_mc *pmc = arg;
32 const struct nouveau_mc_intr *map = pmc->intr_map;
33 struct nouveau_subdev *unit;
36 nv_wr32(pmc, 0x000140, 0x00000000);
37 nv_rd32(pmc, 0x000140);
39 intr = nv_rd32(pmc, 0x000100);
40 if (intr == 0xffffffff) /* likely fallen off the bus */
44 nv_wr08(pmc, 0x088068, 0xff);
47 u32 stat = nv_rd32(pmc, 0x000100);
49 if (intr & map->stat) {
50 unit = nouveau_subdev(pmc, map->unit);
51 if (unit && unit->intr)
59 nv_error(pmc, "unknown intr 0x%08x\n", stat);
62 nv_wr32(pmc, 0x000140, 0x00000001);
63 return intr ? IRQ_HANDLED : IRQ_NONE;
67 _nouveau_mc_fini(struct nouveau_object *object, bool suspend)
69 struct nouveau_mc *pmc = (void *)object;
70 nv_wr32(pmc, 0x000140, 0x00000000);
71 return nouveau_subdev_fini(&pmc->base, suspend);
75 _nouveau_mc_init(struct nouveau_object *object)
77 struct nouveau_mc *pmc = (void *)object;
78 int ret = nouveau_subdev_init(&pmc->base);
81 nv_wr32(pmc, 0x000140, 0x00000001);
86 _nouveau_mc_dtor(struct nouveau_object *object)
88 struct nouveau_device *device = nv_device(object);
89 struct nouveau_mc *pmc = (void *)object;
90 free_irq(device->pdev->irq, pmc);
92 pci_disable_msi(device->pdev);
93 nouveau_subdev_destroy(&pmc->base);
97 nouveau_mc_create_(struct nouveau_object *parent, struct nouveau_object *engine,
98 struct nouveau_oclass *oclass,
99 const struct nouveau_mc_intr *intr_map,
100 int length, void **pobject)
102 struct nouveau_device *device = nv_device(parent);
103 struct nouveau_mc *pmc;
106 ret = nouveau_subdev_create_(parent, engine, oclass, 0, "PMC",
107 "master", length, pobject);
112 pmc->intr_map = intr_map;
114 switch (device->pdev->device & 0x0ff0) {
115 case 0x00f0: /* BR02? */
116 case 0x02e0: /* BR02? */
117 pmc->use_msi = false;
120 pmc->use_msi = nouveau_boolopt(device->cfgopt, "NvMSI", true);
122 pmc->use_msi = pci_enable_msi(device->pdev) == 0;
124 nv_info(pmc, "MSI interrupts enabled\n");
125 nv_wr08(pmc, 0x088068, 0xff);
131 ret = request_irq(device->pdev->irq, nouveau_mc_intr,
132 IRQF_SHARED, "nouveau", pmc);