2 #include "nouveau_drv.h"
3 #include "nouveau_dma.h"
4 #include "nouveau_ramht.h"
5 #include "nouveau_fbcon.h"
8 nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
10 struct nouveau_fbdev *nfbdev = info->par;
11 struct drm_device *dev = nfbdev->dev;
12 struct drm_nouveau_private *dev_priv = dev->dev_private;
13 struct nouveau_channel *chan = dev_priv->channel;
15 if (info->state != FBINFO_STATE_RUNNING)
18 if (!(info->flags & FBINFO_HWACCEL_DISABLED) &&
19 RING_SPACE(chan, rect->rop == ROP_COPY ? 7 : 11)) {
20 nouveau_fbcon_gpu_lockup(info);
23 if (info->flags & FBINFO_HWACCEL_DISABLED) {
24 cfb_fillrect(info, rect);
28 if (rect->rop != ROP_COPY) {
29 BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
32 BEGIN_RING(chan, NvSub2D, 0x0588, 1);
33 if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
34 info->fix.visual == FB_VISUAL_DIRECTCOLOR)
35 OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
37 OUT_RING(chan, rect->color);
38 BEGIN_RING(chan, NvSub2D, 0x0600, 4);
39 OUT_RING(chan, rect->dx);
40 OUT_RING(chan, rect->dy);
41 OUT_RING(chan, rect->dx + rect->width);
42 OUT_RING(chan, rect->dy + rect->height);
43 if (rect->rop != ROP_COPY) {
44 BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
51 nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
53 struct nouveau_fbdev *nfbdev = info->par;
54 struct drm_device *dev = nfbdev->dev;
55 struct drm_nouveau_private *dev_priv = dev->dev_private;
56 struct nouveau_channel *chan = dev_priv->channel;
58 if (info->state != FBINFO_STATE_RUNNING)
61 if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 12)) {
62 nouveau_fbcon_gpu_lockup(info);
65 if (info->flags & FBINFO_HWACCEL_DISABLED) {
66 cfb_copyarea(info, region);
70 BEGIN_RING(chan, NvSub2D, 0x0110, 1);
72 BEGIN_RING(chan, NvSub2D, 0x08b0, 4);
73 OUT_RING(chan, region->dx);
74 OUT_RING(chan, region->dy);
75 OUT_RING(chan, region->width);
76 OUT_RING(chan, region->height);
77 BEGIN_RING(chan, NvSub2D, 0x08d0, 4);
79 OUT_RING(chan, region->sx);
81 OUT_RING(chan, region->sy);
86 nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
88 struct nouveau_fbdev *nfbdev = info->par;
89 struct drm_device *dev = nfbdev->dev;
90 struct drm_nouveau_private *dev_priv = dev->dev_private;
91 struct nouveau_channel *chan = dev_priv->channel;
92 uint32_t width, dwords, *data = (uint32_t *)image->data;
93 uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
94 uint32_t *palette = info->pseudo_palette;
96 if (info->state != FBINFO_STATE_RUNNING)
99 if (image->depth != 1) {
100 cfb_imageblit(info, image);
104 if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 11)) {
105 nouveau_fbcon_gpu_lockup(info);
108 if (info->flags & FBINFO_HWACCEL_DISABLED) {
109 cfb_imageblit(info, image);
113 width = ALIGN(image->width, 32);
114 dwords = (width * image->height) >> 5;
116 BEGIN_RING(chan, NvSub2D, 0x0814, 2);
117 if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
118 info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
119 OUT_RING(chan, palette[image->bg_color] | mask);
120 OUT_RING(chan, palette[image->fg_color] | mask);
122 OUT_RING(chan, image->bg_color);
123 OUT_RING(chan, image->fg_color);
125 BEGIN_RING(chan, NvSub2D, 0x0838, 2);
126 OUT_RING(chan, image->width);
127 OUT_RING(chan, image->height);
128 BEGIN_RING(chan, NvSub2D, 0x0850, 4);
130 OUT_RING(chan, image->dx);
132 OUT_RING(chan, image->dy);
135 int push = dwords > 2047 ? 2047 : dwords;
137 if (RING_SPACE(chan, push + 1)) {
138 nouveau_fbcon_gpu_lockup(info);
139 cfb_imageblit(info, image);
145 BEGIN_RING(chan, NvSub2D, 0x40000860, push);
146 OUT_RINGp(chan, data, push);
154 nv50_fbcon_accel_init(struct fb_info *info)
156 struct nouveau_fbdev *nfbdev = info->par;
157 struct drm_device *dev = nfbdev->dev;
158 struct drm_nouveau_private *dev_priv = dev->dev_private;
159 struct nouveau_channel *chan = dev_priv->channel;
160 struct nouveau_gpuobj *eng2d = NULL;
164 fb = info->fix.smem_start - dev_priv->fb_phys + dev_priv->vm_vram_base;
166 switch (info->var.bits_per_pixel) {
177 switch (info->var.transp.length) {
178 case 0: /* depth 24 */
179 case 8: /* depth 32, just use 24.. */
182 case 2: /* depth 30 */
193 ret = nouveau_gpuobj_gr_new(dev_priv->channel, 0x502d, &eng2d);
197 ret = nouveau_ramht_insert(dev_priv->channel, Nv2D, eng2d);
198 nouveau_gpuobj_ref(NULL, &eng2d);
202 ret = RING_SPACE(chan, 59);
204 nouveau_fbcon_gpu_lockup(info);
208 BEGIN_RING(chan, NvSub2D, 0x0000, 1);
209 OUT_RING(chan, Nv2D);
210 BEGIN_RING(chan, NvSub2D, 0x0180, 4);
211 OUT_RING(chan, NvNotify0);
212 OUT_RING(chan, chan->vram_handle);
213 OUT_RING(chan, chan->vram_handle);
214 OUT_RING(chan, chan->vram_handle);
215 BEGIN_RING(chan, NvSub2D, 0x0290, 1);
217 BEGIN_RING(chan, NvSub2D, 0x0888, 1);
219 BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
221 BEGIN_RING(chan, NvSub2D, 0x02a0, 1);
222 OUT_RING(chan, 0x55);
223 BEGIN_RING(chan, NvSub2D, 0x08c0, 4);
228 BEGIN_RING(chan, NvSub2D, 0x0580, 2);
230 OUT_RING(chan, format);
231 BEGIN_RING(chan, NvSub2D, 0x02e8, 2);
234 BEGIN_RING(chan, NvSub2D, 0x0804, 1);
235 OUT_RING(chan, format);
236 BEGIN_RING(chan, NvSub2D, 0x0800, 1);
238 BEGIN_RING(chan, NvSub2D, 0x0808, 3);
242 BEGIN_RING(chan, NvSub2D, 0x081c, 1);
244 BEGIN_RING(chan, NvSub2D, 0x0840, 4);
249 BEGIN_RING(chan, NvSub2D, 0x0200, 2);
250 OUT_RING(chan, format);
252 BEGIN_RING(chan, NvSub2D, 0x0214, 5);
253 OUT_RING(chan, info->fix.line_length);
254 OUT_RING(chan, info->var.xres_virtual);
255 OUT_RING(chan, info->var.yres_virtual);
256 OUT_RING(chan, upper_32_bits(fb));
257 OUT_RING(chan, lower_32_bits(fb));
258 BEGIN_RING(chan, NvSub2D, 0x0230, 2);
259 OUT_RING(chan, format);
261 BEGIN_RING(chan, NvSub2D, 0x0244, 5);
262 OUT_RING(chan, info->fix.line_length);
263 OUT_RING(chan, info->var.xres_virtual);
264 OUT_RING(chan, info->var.yres_virtual);
265 OUT_RING(chan, upper_32_bits(fb));
266 OUT_RING(chan, lower_32_bits(fb));