drivers/gpu/drm/nouveau/nvkm/engine/disp/nv04.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "priv.h"
  25
  26 #include <core/client.h>
  27
  28 #include <nvif/class.h>
  29 #include <nvif/unpack.h>
  30
  31 static int
  32 nv04_disp_scanoutpos(struct nvkm_object *object, struct nvkm_disp *disp,
  33                      void *data, u32 size, int head)
  34 {
  35         struct nvkm_device *device = disp->engine.subdev.device;
  36         const u32 hoff = head * 0x2000;
  37         union {
  38                 struct nv04_disp_scanoutpos_v0 v0;
  39         } *args = data;
  40         u32 line;
  41         int ret;
  42
  43         nv_ioctl(object, "disp scanoutpos size %d\n", size);
  44         if (nvif_unpack(args->v0, 0, 0, false)) {
  45                 nv_ioctl(object, "disp scanoutpos vers %d\n", args->v0.version);
  46                 args->v0.vblanks = nvkm_rd32(device, 0x680800 + hoff) & 0xffff;
  47                 args->v0.vtotal  = nvkm_rd32(device, 0x680804 + hoff) & 0xffff;
  48                 args->v0.vblanke = args->v0.vtotal - 1;
  49
  50                 args->v0.hblanks = nvkm_rd32(device, 0x680820 + hoff) & 0xffff;
  51                 args->v0.htotal  = nvkm_rd32(device, 0x680824 + hoff) & 0xffff;
  52                 args->v0.hblanke = args->v0.htotal - 1;
  53
  54                 /*
  55                  * If output is vga instead of digital then vtotal/htotal is
  56                  * invalid so we have to give up and trigger the timestamping
  57                  * fallback in the drm core.
  58                  */
  59                 if (!args->v0.vtotal || !args->v0.htotal)
  60                         return -ENOTSUPP;
  61
  62                 args->v0.time[0] = ktime_to_ns(ktime_get());
  63                 line = nvkm_rd32(device, 0x600868 + hoff);
  64                 args->v0.time[1] = ktime_to_ns(ktime_get());
  65                 args->v0.hline = (line & 0xffff0000) >> 16;
  66                 args->v0.vline = (line & 0x0000ffff);
  67         } else
  68                 return ret;
  69
  70         return 0;
  71 }
  72
  73 static int
  74 nv04_disp_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size)
  75 {
  76         union {
  77                 struct nv04_disp_mthd_v0 v0;
  78         } *args = data;
  79         struct nvkm_disp *disp = (void *)object->engine;
  80         int head, ret;
  81
  82         nv_ioctl(object, "disp mthd size %d\n", size);
  83         if (nvif_unpack(args->v0, 0, 0, true)) {
  84                 nv_ioctl(object, "disp mthd vers %d mthd %02x head %d\n",
  85                          args->v0.version, args->v0.method, args->v0.head);
  86                 mthd = args->v0.method;
  87                 head = args->v0.head;
  88         } else
  89                 return ret;
  90
  91         if (head < 0 || head >= 2)
  92                 return -ENXIO;
  93
  94         switch (mthd) {
  95         case NV04_DISP_SCANOUTPOS:
  96                 return nv04_disp_scanoutpos(object, disp, data, size, head);
  97         default:
  98                 break;
  99         }
 100
 101         return -EINVAL;
 102 }
 103
 104 static struct nvkm_ofuncs
 105 nv04_disp_ofuncs = {
 106         .ctor = _nvkm_object_ctor,
 107         .dtor = nvkm_object_destroy,
 108         .init = nvkm_object_init,
 109         .fini = nvkm_object_fini,
 110         .mthd = nv04_disp_mthd,
 111         .ntfy = nvkm_disp_ntfy,
 112 };
 113
 114 static struct nvkm_oclass
 115 nv04_disp_sclass[] = {
 116         { NV04_DISP, &nv04_disp_ofuncs },
 117         {},
 118 };
 119
 120 /*******************************************************************************
 121  * Display engine implementation
 122  ******************************************************************************/
 123
 124 static void
 125 nv04_disp_vblank_init(struct nvkm_event *event, int type, int head)
 126 {
 127         struct nvkm_disp *disp = container_of(event, typeof(*disp), vblank);
 128         struct nvkm_device *device = disp->engine.subdev.device;
 129         nvkm_wr32(device, 0x600140 + (head * 0x2000) , 0x00000001);
 130 }
 131
 132 static void
 133 nv04_disp_vblank_fini(struct nvkm_event *event, int type, int head)
 134 {
 135         struct nvkm_disp *disp = container_of(event, typeof(*disp), vblank);
 136         struct nvkm_device *device = disp->engine.subdev.device;
 137         nvkm_wr32(device, 0x600140 + (head * 0x2000) , 0x00000000);
 138 }
 139
 140 static const struct nvkm_event_func
 141 nv04_disp_vblank_func = {
 142         .ctor = nvkm_disp_vblank_ctor,
 143         .init = nv04_disp_vblank_init,
 144         .fini = nv04_disp_vblank_fini,
 145 };
 146
 147 static void
 148 nv04_disp_intr(struct nvkm_subdev *subdev)
 149 {
 150         struct nvkm_disp *disp = (void *)subdev;
 151         struct nvkm_device *device = disp->engine.subdev.device;
 152         u32 crtc0 = nvkm_rd32(device, 0x600100);
 153         u32 crtc1 = nvkm_rd32(device, 0x602100);
 154         u32 pvideo;
 155
 156         if (crtc0 & 0x00000001) {
 157                 nvkm_disp_vblank(disp, 0);
 158                 nvkm_wr32(device, 0x600100, 0x00000001);
 159         }
 160
 161         if (crtc1 & 0x00000001) {
 162                 nvkm_disp_vblank(disp, 1);
 163                 nvkm_wr32(device, 0x602100, 0x00000001);
 164         }
 165
 166         if (nv_device(disp)->chipset >= 0x10 &&
 167             nv_device(disp)->chipset <= 0x40) {
 168                 pvideo = nvkm_rd32(device, 0x8100);
 169                 if (pvideo & ~0x11)
 170                         nv_info(disp, "PVIDEO intr: %08x\n", pvideo);
 171                 nvkm_wr32(device, 0x8100, pvideo);
 172         }
 173 }
 174
 175 static int
 176 nv04_disp_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
 177                struct nvkm_oclass *oclass, void *data, u32 size,
 178                struct nvkm_object **pobject)
 179 {
 180         struct nvkm_disp *disp;
 181         int ret;
 182
 183         ret = nvkm_disp_create(parent, engine, oclass, 2, "DISPLAY",
 184                                "display", &disp);
 185         *pobject = nv_object(disp);
 186         if (ret)
 187                 return ret;
 188
 189         nv_engine(disp)->sclass = nv04_disp_sclass;
 190         nv_subdev(disp)->intr = nv04_disp_intr;
 191         return 0;
 192 }
 193
 194 struct nvkm_oclass *
 195 nv04_disp_oclass = &(struct nvkm_disp_impl) {
 196         .base.handle = NV_ENGINE(DISP, 0x04),
 197         .base.ofuncs = &(struct nvkm_ofuncs) {
 198                 .ctor = nv04_disp_ctor,
 199                 .dtor = _nvkm_disp_dtor,
 200                 .init = _nvkm_disp_init,
 201                 .fini = _nvkm_disp_fini,
 202         },
 203         .vblank = &nv04_disp_vblank_func,
 204 }.base;