drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c

   1 /*
   2  * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  19  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  20  * DEALINGS IN THE SOFTWARE.
  21  */
  22
  23 /*
  24  * GK20A does not have dedicated video memory, and to accurately represent this
  25  * fact Nouveau will not create a RAM device for it. Therefore its instmem
  26  * implementation must be done directly on top of system memory, while
  27  * preserving coherency for read and write operations.
  28  *
  29  * Instmem can be allocated through two means:
  30  * 1) If an IOMMU unit has been probed, the IOMMU API is used to make memory
  31  *    pages contiguous to the GPU. This is the preferred way.
  32  * 2) If no IOMMU unit is probed, the DMA API is used to allocate physically
  33  *    contiguous memory.
  34  *
  35  * In both cases CPU read and writes are performed by creating a write-combined
  36  * mapping. The GPU L2 cache must thus be flushed/invalidated when required. To
  37  * be conservative we do this every time we acquire or release an instobj, but
  38  * ideally L2 management should be handled at a higher level.
  39  *
  40  * To improve performance, CPU mappings are not removed upon instobj release.
  41  * Instead they are placed into a LRU list to be recycled when the mapped space
  42  * goes beyond a certain threshold. At the moment this limit is 1MB.
  43  */
  44 #include "priv.h"
  45
  46 #include <core/memory.h>
  47 #include <core/mm.h>
  48 #include <core/tegra.h>
  49 #include <subdev/fb.h>
  50 #include <subdev/ltc.h>
  51
  52 struct gk20a_instobj {
  53         struct nvkm_memory memory;
  54         struct nvkm_mem mem;
  55         struct gk20a_instmem *imem;
  56
  57         /* CPU mapping */
  58         u32 *vaddr;
  59         struct list_head vaddr_node;
  60 };
  61 #define gk20a_instobj(p) container_of((p), struct gk20a_instobj, memory)
  62
  63 /*
  64  * Used for objects allocated using the DMA API
  65  */
  66 struct gk20a_instobj_dma {
  67         struct gk20a_instobj base;
  68
  69         u32 *cpuaddr;
  70         dma_addr_t handle;
  71         struct nvkm_mm_node r;
  72 };
  73 #define gk20a_instobj_dma(p) \
  74         container_of(gk20a_instobj(p), struct gk20a_instobj_dma, base)
  75
  76 /*
  77  * Used for objects flattened using the IOMMU API
  78  */
  79 struct gk20a_instobj_iommu {
  80         struct gk20a_instobj base;
  81
  82         /* will point to the higher half of pages */
  83         dma_addr_t *dma_addrs;
  84         /* array of base.mem->size pages (+ dma_addr_ts) */
  85         struct page *pages[];
  86 };
  87 #define gk20a_instobj_iommu(p) \
  88         container_of(gk20a_instobj(p), struct gk20a_instobj_iommu, base)
  89
  90 struct gk20a_instmem {
  91         struct nvkm_instmem base;
  92
  93         /* protects vaddr_* and gk20a_instobj::vaddr* */
  94         spinlock_t lock;
  95
  96         /* CPU mappings LRU */
  97         unsigned int vaddr_use;
  98         unsigned int vaddr_max;
  99         struct list_head vaddr_lru;
 100
 101         /* Only used if IOMMU if present */
 102         struct mutex *mm_mutex;
 103         struct nvkm_mm *mm;
 104         struct iommu_domain *domain;
 105         unsigned long iommu_pgshift;
 106         u16 iommu_bit;
 107
 108         /* Only used by DMA API */
 109         struct dma_attrs attrs;
 110
 111         void __iomem * (*cpu_map)(struct nvkm_memory *);
 112 };
 113 #define gk20a_instmem(p) container_of((p), struct gk20a_instmem, base)
 114
 115 static enum nvkm_memory_target
 116 gk20a_instobj_target(struct nvkm_memory *memory)
 117 {
 118         return NVKM_MEM_TARGET_HOST;
 119 }
 120
 121 static u64
 122 gk20a_instobj_addr(struct nvkm_memory *memory)
 123 {
 124         return gk20a_instobj(memory)->mem.offset;
 125 }
 126
 127 static u64
 128 gk20a_instobj_size(struct nvkm_memory *memory)
 129 {
 130         return (u64)gk20a_instobj(memory)->mem.size << 12;
 131 }
 132
 133 static void __iomem *
 134 gk20a_instobj_cpu_map_dma(struct nvkm_memory *memory)
 135 {
 136         struct gk20a_instobj_dma *node = gk20a_instobj_dma(memory);
 137         struct device *dev = node->base.imem->base.subdev.device->dev;
 138         int npages = nvkm_memory_size(memory) >> 12;
 139         struct page *pages[npages];
 140         int i;
 141
 142         /* phys_to_page does not exist on all platforms... */
 143         pages[0] = pfn_to_page(dma_to_phys(dev, node->handle) >> PAGE_SHIFT);
 144         for (i = 1; i < npages; i++)
 145                 pages[i] = pages[0] + i;
 146
 147         return vmap(pages, npages, VM_MAP, pgprot_writecombine(PAGE_KERNEL));
 148 }
 149
 150 static void __iomem *
 151 gk20a_instobj_cpu_map_iommu(struct nvkm_memory *memory)
 152 {
 153         struct gk20a_instobj_iommu *node = gk20a_instobj_iommu(memory);
 154         int npages = nvkm_memory_size(memory) >> 12;
 155
 156         return vmap(node->pages, npages, VM_MAP,
 157                     pgprot_writecombine(PAGE_KERNEL));
 158 }
 159
 160 /*
 161  * Must be called while holding gk20a_instmem_lock
 162  */
 163 static void
 164 gk20a_instmem_vaddr_gc(struct gk20a_instmem *imem, const u64 size)
 165 {
 166         while (imem->vaddr_use + size > imem->vaddr_max) {
 167                 struct gk20a_instobj *obj;
 168
 169                 /* no candidate that can be unmapped, abort... */
 170                 if (list_empty(&imem->vaddr_lru))
 171                         break;
 172
 173                 obj = list_first_entry(&imem->vaddr_lru, struct gk20a_instobj,
 174                                        vaddr_node);
 175                 list_del(&obj->vaddr_node);
 176                 vunmap(obj->vaddr);
 177                 obj->vaddr = NULL;
 178                 imem->vaddr_use -= nvkm_memory_size(&obj->memory);
 179                 nvkm_debug(&imem->base.subdev, "(GC) vaddr used: %x/%x\n",
 180                            imem->vaddr_use, imem->vaddr_max);
 181
 182         }
 183 }
 184
 185 static void __iomem *
 186 gk20a_instobj_acquire(struct nvkm_memory *memory)
 187 {
 188         struct gk20a_instobj *node = gk20a_instobj(memory);
 189         struct gk20a_instmem *imem = node->imem;
 190         struct nvkm_ltc *ltc = imem->base.subdev.device->ltc;
 191         const u64 size = nvkm_memory_size(memory);
 192         unsigned long flags;
 193
 194         nvkm_ltc_flush(ltc);
 195
 196         spin_lock_irqsave(&imem->lock, flags);
 197
 198         if (node->vaddr) {
 199                 /* remove us from the LRU list since we cannot be unmapped */
 200                 list_del(&node->vaddr_node);
 201
 202                 goto out;
 203         }
 204
 205         /* try to free some address space if we reached the limit */
 206         gk20a_instmem_vaddr_gc(imem, size);
 207
 208         node->vaddr = imem->cpu_map(memory);
 209
 210         if (!node->vaddr) {
 211                 nvkm_error(&imem->base.subdev, "cannot map instobj - "
 212                            "this is not going to end well...\n");
 213                 goto out;
 214         }
 215
 216         imem->vaddr_use += size;
 217         nvkm_debug(&imem->base.subdev, "vaddr used: %x/%x\n",
 218                    imem->vaddr_use, imem->vaddr_max);
 219
 220 out:
 221         spin_unlock_irqrestore(&imem->lock, flags);
 222
 223         return node->vaddr;
 224 }
 225
 226 static void
 227 gk20a_instobj_release(struct nvkm_memory *memory)
 228 {
 229         struct gk20a_instobj *node = gk20a_instobj(memory);
 230         struct gk20a_instmem *imem = node->imem;
 231         struct nvkm_ltc *ltc = imem->base.subdev.device->ltc;
 232         unsigned long flags;
 233
 234         spin_lock_irqsave(&imem->lock, flags);
 235
 236         /* add ourselves to the LRU list so our CPU mapping can be freed */
 237         list_add_tail(&node->vaddr_node, &imem->vaddr_lru);
 238
 239         spin_unlock_irqrestore(&imem->lock, flags);
 240
 241         wmb();
 242         nvkm_ltc_invalidate(ltc);
 243 }
 244
 245 static u32
 246 gk20a_instobj_rd32(struct nvkm_memory *memory, u64 offset)
 247 {
 248         struct gk20a_instobj *node = gk20a_instobj(memory);
 249
 250         return node->vaddr[offset / 4];
 251 }
 252
 253 static void
 254 gk20a_instobj_wr32(struct nvkm_memory *memory, u64 offset, u32 data)
 255 {
 256         struct gk20a_instobj *node = gk20a_instobj(memory);
 257
 258         node->vaddr[offset / 4] = data;
 259 }
 260
 261 static void
 262 gk20a_instobj_map(struct nvkm_memory *memory, struct nvkm_vma *vma, u64 offset)
 263 {
 264         struct gk20a_instobj *node = gk20a_instobj(memory);
 265
 266         nvkm_vm_map_at(vma, offset, &node->mem);
 267 }
 268
 269 /*
 270  * Clear the CPU mapping of an instobj if it exists
 271  */
 272 static void
 273 gk20a_instobj_dtor(struct gk20a_instobj *node)
 274 {
 275         struct gk20a_instmem *imem = node->imem;
 276         struct gk20a_instobj *obj;
 277         unsigned long flags;
 278
 279         spin_lock_irqsave(&imem->lock, flags);
 280
 281         if (!node->vaddr)
 282                 goto out;
 283
 284         list_for_each_entry(obj, &imem->vaddr_lru, vaddr_node) {
 285                 if (obj == node) {
 286                         list_del(&obj->vaddr_node);
 287                         break;
 288                 }
 289         }
 290         vunmap(node->vaddr);
 291         node->vaddr = NULL;
 292         imem->vaddr_use -= nvkm_memory_size(&node->memory);
 293         nvkm_debug(&imem->base.subdev, "vaddr used: %x/%x\n",
 294                    imem->vaddr_use, imem->vaddr_max);
 295
 296 out:
 297         spin_unlock_irqrestore(&imem->lock, flags);
 298 }
 299
 300 static void *
 301 gk20a_instobj_dtor_dma(struct nvkm_memory *memory)
 302 {
 303         struct gk20a_instobj_dma *node = gk20a_instobj_dma(memory);
 304         struct gk20a_instmem *imem = node->base.imem;
 305         struct device *dev = imem->base.subdev.device->dev;
 306
 307         gk20a_instobj_dtor(&node->base);
 308
 309         if (unlikely(!node->cpuaddr))
 310                 goto out;
 311
 312         dma_free_attrs(dev, node->base.mem.size << PAGE_SHIFT, node->cpuaddr,
 313                        node->handle, &imem->attrs);
 314
 315 out:
 316         return node;
 317 }
 318
 319 static void *
 320 gk20a_instobj_dtor_iommu(struct nvkm_memory *memory)
 321 {
 322         struct gk20a_instobj_iommu *node = gk20a_instobj_iommu(memory);
 323         struct gk20a_instmem *imem = node->base.imem;
 324         struct device *dev = imem->base.subdev.device->dev;
 325         struct nvkm_mm_node *r;
 326         int i;
 327
 328         gk20a_instobj_dtor(&node->base);
 329
 330         if (unlikely(list_empty(&node->base.mem.regions)))
 331                 goto out;
 332
 333         r = list_first_entry(&node->base.mem.regions, struct nvkm_mm_node,
 334                              rl_entry);
 335
 336         /* clear IOMMU bit to unmap pages */
 337         r->offset &= ~BIT(imem->iommu_bit - imem->iommu_pgshift);
 338
 339         /* Unmap pages from GPU address space and free them */
 340         for (i = 0; i < node->base.mem.size; i++) {
 341                 iommu_unmap(imem->domain,
 342                             (r->offset + i) << imem->iommu_pgshift, PAGE_SIZE);
 343                 dma_unmap_page(dev, node->dma_addrs[i], PAGE_SIZE,
 344                                DMA_BIDIRECTIONAL);
 345                 __free_page(node->pages[i]);
 346         }
 347
 348         /* Release area from GPU address space */
 349         mutex_lock(imem->mm_mutex);
 350         nvkm_mm_free(imem->mm, &r);
 351         mutex_unlock(imem->mm_mutex);
 352
 353 out:
 354         return node;
 355 }
 356
 357 static const struct nvkm_memory_func
 358 gk20a_instobj_func_dma = {
 359         .dtor = gk20a_instobj_dtor_dma,
 360         .target = gk20a_instobj_target,
 361         .addr = gk20a_instobj_addr,
 362         .size = gk20a_instobj_size,
 363         .acquire = gk20a_instobj_acquire,
 364         .release = gk20a_instobj_release,
 365         .rd32 = gk20a_instobj_rd32,
 366         .wr32 = gk20a_instobj_wr32,
 367         .map = gk20a_instobj_map,
 368 };
 369
 370 static const struct nvkm_memory_func
 371 gk20a_instobj_func_iommu = {
 372         .dtor = gk20a_instobj_dtor_iommu,
 373         .target = gk20a_instobj_target,
 374         .addr = gk20a_instobj_addr,
 375         .size = gk20a_instobj_size,
 376         .acquire = gk20a_instobj_acquire,
 377         .release = gk20a_instobj_release,
 378         .rd32 = gk20a_instobj_rd32,
 379         .wr32 = gk20a_instobj_wr32,
 380         .map = gk20a_instobj_map,
 381 };
 382
 383 static int
 384 gk20a_instobj_ctor_dma(struct gk20a_instmem *imem, u32 npages, u32 align,
 385                        struct gk20a_instobj **_node)
 386 {
 387         struct gk20a_instobj_dma *node;
 388         struct nvkm_subdev *subdev = &imem->base.subdev;
 389         struct device *dev = subdev->device->dev;
 390
 391         if (!(node = kzalloc(sizeof(*node), GFP_KERNEL)))
 392                 return -ENOMEM;
 393         *_node = &node->base;
 394
 395         nvkm_memory_ctor(&gk20a_instobj_func_dma, &node->base.memory);
 396
 397         node->cpuaddr = dma_alloc_attrs(dev, npages << PAGE_SHIFT,
 398                                         &node->handle, GFP_KERNEL,
 399                                         &imem->attrs);
 400         if (!node->cpuaddr) {
 401                 nvkm_error(subdev, "cannot allocate DMA memory\n");
 402                 return -ENOMEM;
 403         }
 404
 405         /* alignment check */
 406         if (unlikely(node->handle & (align - 1)))
 407                 nvkm_warn(subdev,
 408                           "memory not aligned as requested: %pad (0x%x)\n",
 409                           &node->handle, align);
 410
 411         /* present memory for being mapped using small pages */
 412         node->r.type = 12;
 413         node->r.offset = node->handle >> 12;
 414         node->r.length = (npages << PAGE_SHIFT) >> 12;
 415
 416         node->base.mem.offset = node->handle;
 417
 418         INIT_LIST_HEAD(&node->base.mem.regions);
 419         list_add_tail(&node->r.rl_entry, &node->base.mem.regions);
 420
 421         return 0;
 422 }
 423
 424 static int
 425 gk20a_instobj_ctor_iommu(struct gk20a_instmem *imem, u32 npages, u32 align,
 426                          struct gk20a_instobj **_node)
 427 {
 428         struct gk20a_instobj_iommu *node;
 429         struct nvkm_subdev *subdev = &imem->base.subdev;
 430         struct device *dev = subdev->device->dev;
 431         struct nvkm_mm_node *r;
 432         int ret;
 433         int i;
 434
 435         /*
 436          * despite their variable size, instmem allocations are small enough
 437          * (< 1 page) to be handled by kzalloc
 438          */
 439         if (!(node = kzalloc(sizeof(*node) + ((sizeof(node->pages[0]) +
 440                              sizeof(*node->dma_addrs)) * npages), GFP_KERNEL)))
 441                 return -ENOMEM;
 442         *_node = &node->base;
 443         node->dma_addrs = (void *)(node->pages + npages);
 444
 445         nvkm_memory_ctor(&gk20a_instobj_func_iommu, &node->base.memory);
 446
 447         /* Allocate backing memory */
 448         for (i = 0; i < npages; i++) {
 449                 struct page *p = alloc_page(GFP_KERNEL);
 450                 dma_addr_t dma_adr;
 451
 452                 if (p == NULL) {
 453                         ret = -ENOMEM;
 454                         goto free_pages;
 455                 }
 456                 node->pages[i] = p;
 457                 dma_adr = dma_map_page(dev, p, 0, PAGE_SIZE, DMA_BIDIRECTIONAL);
 458                 if (dma_mapping_error(dev, dma_adr)) {
 459                         nvkm_error(subdev, "DMA mapping error!\n");
 460                         ret = -ENOMEM;
 461                         goto free_pages;
 462                 }
 463                 node->dma_addrs[i] = dma_adr;
 464         }
 465
 466         mutex_lock(imem->mm_mutex);
 467         /* Reserve area from GPU address space */
 468         ret = nvkm_mm_head(imem->mm, 0, 1, npages, npages,
 469                            align >> imem->iommu_pgshift, &r);
 470         mutex_unlock(imem->mm_mutex);
 471         if (ret) {
 472                 nvkm_error(subdev, "IOMMU space is full!\n");
 473                 goto free_pages;
 474         }
 475
 476         /* Map into GPU address space */
 477         for (i = 0; i < npages; i++) {
 478                 u32 offset = (r->offset + i) << imem->iommu_pgshift;
 479
 480                 ret = iommu_map(imem->domain, offset, node->dma_addrs[i],
 481                                 PAGE_SIZE, IOMMU_READ | IOMMU_WRITE);
 482                 if (ret < 0) {
 483                         nvkm_error(subdev, "IOMMU mapping failure: %d\n", ret);
 484
 485                         while (i-- > 0) {
 486                                 offset -= PAGE_SIZE;
 487                                 iommu_unmap(imem->domain, offset, PAGE_SIZE);
 488                         }
 489                         goto release_area;
 490                 }
 491         }
 492
 493         /* IOMMU bit tells that an address is to be resolved through the IOMMU */
 494         r->offset |= BIT(imem->iommu_bit - imem->iommu_pgshift);
 495
 496         node->base.mem.offset = ((u64)r->offset) << imem->iommu_pgshift;
 497
 498         INIT_LIST_HEAD(&node->base.mem.regions);
 499         list_add_tail(&r->rl_entry, &node->base.mem.regions);
 500
 501         return 0;
 502
 503 release_area:
 504         mutex_lock(imem->mm_mutex);
 505         nvkm_mm_free(imem->mm, &r);
 506         mutex_unlock(imem->mm_mutex);
 507
 508 free_pages:
 509         for (i = 0; i < npages && node->pages[i] != NULL; i++) {
 510                 dma_addr_t dma_addr = node->dma_addrs[i];
 511                 if (dma_addr)
 512                         dma_unmap_page(dev, dma_addr, PAGE_SIZE,
 513                                        DMA_BIDIRECTIONAL);
 514                 __free_page(node->pages[i]);
 515         }
 516
 517         return ret;
 518 }
 519
 520 static int
 521 gk20a_instobj_new(struct nvkm_instmem *base, u32 size, u32 align, bool zero,
 522                   struct nvkm_memory **pmemory)
 523 {
 524         struct gk20a_instmem *imem = gk20a_instmem(base);
 525         struct nvkm_subdev *subdev = &imem->base.subdev;
 526         struct gk20a_instobj *node = NULL;
 527         int ret;
 528
 529         nvkm_debug(subdev, "%s (%s): size: %x align: %x\n", __func__,
 530                    imem->domain ? "IOMMU" : "DMA", size, align);
 531
 532         /* Round size and align to page bounds */
 533         size = max(roundup(size, PAGE_SIZE), PAGE_SIZE);
 534         align = max(roundup(align, PAGE_SIZE), PAGE_SIZE);
 535
 536         if (imem->domain)
 537                 ret = gk20a_instobj_ctor_iommu(imem, size >> PAGE_SHIFT,
 538                                                align, &node);
 539         else
 540                 ret = gk20a_instobj_ctor_dma(imem, size >> PAGE_SHIFT,
 541                                              align, &node);
 542         *pmemory = node ? &node->memory : NULL;
 543         if (ret)
 544                 return ret;
 545
 546         node->imem = imem;
 547
 548         /* present memory for being mapped using small pages */
 549         node->mem.size = size >> 12;
 550         node->mem.memtype = 0;
 551         node->mem.page_shift = 12;
 552
 553         nvkm_debug(subdev, "alloc size: 0x%x, align: 0x%x, gaddr: 0x%llx\n",
 554                    size, align, node->mem.offset);
 555
 556         return 0;
 557 }
 558
 559 static void *
 560 gk20a_instmem_dtor(struct nvkm_instmem *base)
 561 {
 562         struct gk20a_instmem *imem = gk20a_instmem(base);
 563
 564         /* perform some sanity checks... */
 565         if (!list_empty(&imem->vaddr_lru))
 566                 nvkm_warn(&base->subdev, "instobj LRU not empty!\n");
 567
 568         if (imem->vaddr_use != 0)
 569                 nvkm_warn(&base->subdev, "instobj vmap area not empty! "
 570                           "0x%x bytes still mapped\n", imem->vaddr_use);
 571
 572         return imem;
 573 }
 574
 575 static const struct nvkm_instmem_func
 576 gk20a_instmem = {
 577         .dtor = gk20a_instmem_dtor,
 578         .memory_new = gk20a_instobj_new,
 579         .persistent = true,
 580         .zero = false,
 581 };
 582
 583 int
 584 gk20a_instmem_new(struct nvkm_device *device, int index,
 585                   struct nvkm_instmem **pimem)
 586 {
 587         struct nvkm_device_tegra *tdev = device->func->tegra(device);
 588         struct gk20a_instmem *imem;
 589
 590         if (!(imem = kzalloc(sizeof(*imem), GFP_KERNEL)))
 591                 return -ENOMEM;
 592         nvkm_instmem_ctor(&gk20a_instmem, device, index, &imem->base);
 593         spin_lock_init(&imem->lock);
 594         *pimem = &imem->base;
 595
 596         /* do not allow more than 1MB of CPU-mapped instmem */
 597         imem->vaddr_use = 0;
 598         imem->vaddr_max = 0x100000;
 599         INIT_LIST_HEAD(&imem->vaddr_lru);
 600
 601         if (tdev->iommu.domain) {
 602                 imem->mm_mutex = &tdev->iommu.mutex;
 603                 imem->mm = &tdev->iommu.mm;
 604                 imem->domain = tdev->iommu.domain;
 605                 imem->iommu_pgshift = tdev->iommu.pgshift;
 606                 imem->cpu_map = gk20a_instobj_cpu_map_iommu;
 607                 imem->iommu_bit = tdev->func->iommu_bit;
 608
 609                 nvkm_info(&imem->base.subdev, "using IOMMU\n");
 610         } else {
 611                 init_dma_attrs(&imem->attrs);
 612                 /* We will access the memory through our own mapping */
 613                 dma_set_attr(DMA_ATTR_NON_CONSISTENT, &imem->attrs);
 614                 dma_set_attr(DMA_ATTR_WEAK_ORDERING, &imem->attrs);
 615                 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &imem->attrs);
 616                 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &imem->attrs);
 617                 imem->cpu_map = gk20a_instobj_cpu_map_dma;
 618
 619                 nvkm_info(&imem->base.subdev, "using DMA API\n");
 620         }
 621
 622         return 0;
 623 }