drivers/gpu/drm/omapdrm/omap_drv.c

   1 /*
   2  * drivers/gpu/drm/omapdrm/omap_drv.c
   3  *
   4  * Copyright (C) 2011 Texas Instruments
   5  * Author: Rob Clark <rob@ti.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published by
   9  * the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/wait.h>
  21
  22 #include <drm/drm_atomic.h>
  23 #include <drm/drm_atomic_helper.h>
  24 #include <drm/drm_crtc_helper.h>
  25 #include <drm/drm_fb_helper.h>
  26
  27 #include "omap_dmm_tiler.h"
  28 #include "omap_drv.h"
  29
  30 #define DRIVER_NAME             MODULE_NAME
  31 #define DRIVER_DESC             "OMAP DRM"
  32 #define DRIVER_DATE             "20110917"
  33 #define DRIVER_MAJOR            1
  34 #define DRIVER_MINOR            0
  35 #define DRIVER_PATCHLEVEL       0
  36
  37 static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
  38
  39 MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
  40 module_param(num_crtc, int, 0600);
  41
  42 /*
  43  * mode config funcs
  44  */
  45
  46 /* Notes about mapping DSS and DRM entities:
  47  *    CRTC:        overlay
  48  *    encoder:     manager.. with some extension to allow one primary CRTC
  49  *                 and zero or more video CRTC's to be mapped to one encoder?
  50  *    connector:   dssdev.. manager can be attached/detached from different
  51  *                 devices
  52  */
  53
  54 static void omap_fb_output_poll_changed(struct drm_device *dev)
  55 {
  56         struct omap_drm_private *priv = dev->dev_private;
  57         DBG("dev=%p", dev);
  58         if (priv->fbdev)
  59                 drm_fb_helper_hotplug_event(priv->fbdev);
  60 }
  61
  62 struct omap_atomic_state_commit {
  63         struct work_struct work;
  64         struct drm_device *dev;
  65         struct drm_atomic_state *state;
  66         u32 crtcs;
  67 };
  68
  69 static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
  70 {
  71         struct drm_device *dev = commit->dev;
  72         struct omap_drm_private *priv = dev->dev_private;
  73         struct drm_atomic_state *old_state = commit->state;
  74
  75         /* Apply the atomic update. */
  76         drm_atomic_helper_commit_modeset_disables(dev, old_state);
  77         drm_atomic_helper_commit_planes(dev, old_state);
  78         drm_atomic_helper_commit_modeset_enables(dev, old_state);
  79
  80         drm_atomic_helper_wait_for_vblanks(dev, old_state);
  81
  82         drm_atomic_helper_cleanup_planes(dev, old_state);
  83
  84         drm_atomic_state_free(old_state);
  85
  86         /* Complete the commit, wake up any waiter. */
  87         spin_lock(&priv->commit.lock);
  88         priv->commit.pending &= ~commit->crtcs;
  89         spin_unlock(&priv->commit.lock);
  90
  91         wake_up_all(&priv->commit.wait);
  92
  93         kfree(commit);
  94 }
  95
  96 static void omap_atomic_work(struct work_struct *work)
  97 {
  98         struct omap_atomic_state_commit *commit =
  99                 container_of(work, struct omap_atomic_state_commit, work);
 100
 101         omap_atomic_complete(commit);
 102 }
 103
 104 static bool omap_atomic_is_pending(struct omap_drm_private *priv,
 105                                    struct omap_atomic_state_commit *commit)
 106 {
 107         bool pending;
 108
 109         spin_lock(&priv->commit.lock);
 110         pending = priv->commit.pending & commit->crtcs;
 111         spin_unlock(&priv->commit.lock);
 112
 113         return pending;
 114 }
 115
 116 static int omap_atomic_commit(struct drm_device *dev,
 117                               struct drm_atomic_state *state, bool async)
 118 {
 119         struct omap_drm_private *priv = dev->dev_private;
 120         struct omap_atomic_state_commit *commit;
 121         unsigned int i;
 122         int ret;
 123
 124         ret = drm_atomic_helper_prepare_planes(dev, state);
 125         if (ret)
 126                 return ret;
 127
 128         /* Allocate the commit object. */
 129         commit = kzalloc(sizeof(*commit), GFP_KERNEL);
 130         if (commit == NULL) {
 131                 ret = -ENOMEM;
 132                 goto error;
 133         }
 134
 135         INIT_WORK(&commit->work, omap_atomic_work);
 136         commit->dev = dev;
 137         commit->state = state;
 138
 139         /* Wait until all affected CRTCs have completed previous commits and
 140          * mark them as pending.
 141          */
 142         for (i = 0; i < dev->mode_config.num_crtc; ++i) {
 143                 if (state->crtcs[i])
 144                         commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]);
 145         }
 146
 147         wait_event(priv->commit.wait, !omap_atomic_is_pending(priv, commit));
 148
 149         spin_lock(&priv->commit.lock);
 150         priv->commit.pending |= commit->crtcs;
 151         spin_unlock(&priv->commit.lock);
 152
 153         /* Swap the state, this is the point of no return. */
 154         drm_atomic_helper_swap_state(dev, state);
 155
 156         if (async)
 157                 schedule_work(&commit->work);
 158         else
 159                 omap_atomic_complete(commit);
 160
 161         return 0;
 162
 163 error:
 164         drm_atomic_helper_cleanup_planes(dev, state);
 165         return ret;
 166 }
 167
 168 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
 169         .fb_create = omap_framebuffer_create,
 170         .output_poll_changed = omap_fb_output_poll_changed,
 171         .atomic_check = drm_atomic_helper_check,
 172         .atomic_commit = omap_atomic_commit,
 173 };
 174
 175 static int get_connector_type(struct omap_dss_device *dssdev)
 176 {
 177         switch (dssdev->type) {
 178         case OMAP_DISPLAY_TYPE_HDMI:
 179                 return DRM_MODE_CONNECTOR_HDMIA;
 180         case OMAP_DISPLAY_TYPE_DVI:
 181                 return DRM_MODE_CONNECTOR_DVID;
 182         default:
 183                 return DRM_MODE_CONNECTOR_Unknown;
 184         }
 185 }
 186
 187 static bool channel_used(struct drm_device *dev, enum omap_channel channel)
 188 {
 189         struct omap_drm_private *priv = dev->dev_private;
 190         int i;
 191
 192         for (i = 0; i < priv->num_crtcs; i++) {
 193                 struct drm_crtc *crtc = priv->crtcs[i];
 194
 195                 if (omap_crtc_channel(crtc) == channel)
 196                         return true;
 197         }
 198
 199         return false;
 200 }
 201 static void omap_disconnect_dssdevs(void)
 202 {
 203         struct omap_dss_device *dssdev = NULL;
 204
 205         for_each_dss_dev(dssdev)
 206                 dssdev->driver->disconnect(dssdev);
 207 }
 208
 209 static int omap_connect_dssdevs(void)
 210 {
 211         int r;
 212         struct omap_dss_device *dssdev = NULL;
 213         bool no_displays = true;
 214
 215         for_each_dss_dev(dssdev) {
 216                 r = dssdev->driver->connect(dssdev);
 217                 if (r == -EPROBE_DEFER) {
 218                         omap_dss_put_device(dssdev);
 219                         goto cleanup;
 220                 } else if (r) {
 221                         dev_warn(dssdev->dev, "could not connect display: %s\n",
 222                                 dssdev->name);
 223                 } else {
 224                         no_displays = false;
 225                 }
 226         }
 227
 228         if (no_displays)
 229                 return -EPROBE_DEFER;
 230
 231         return 0;
 232
 233 cleanup:
 234         /*
 235          * if we are deferring probe, we disconnect the devices we previously
 236          * connected
 237          */
 238         omap_disconnect_dssdevs();
 239
 240         return r;
 241 }
 242
 243 static int omap_modeset_create_crtc(struct drm_device *dev, int id,
 244                                     enum omap_channel channel)
 245 {
 246         struct omap_drm_private *priv = dev->dev_private;
 247         struct drm_plane *plane;
 248         struct drm_crtc *crtc;
 249
 250         plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY);
 251         if (IS_ERR(plane))
 252                 return PTR_ERR(plane);
 253
 254         crtc = omap_crtc_init(dev, plane, channel, id);
 255
 256         BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
 257         priv->crtcs[id] = crtc;
 258         priv->num_crtcs++;
 259
 260         priv->planes[id] = plane;
 261         priv->num_planes++;
 262
 263         return 0;
 264 }
 265
 266 static int omap_modeset_init_properties(struct drm_device *dev)
 267 {
 268         struct omap_drm_private *priv = dev->dev_private;
 269
 270         if (priv->has_dmm) {
 271                 dev->mode_config.rotation_property =
 272                         drm_mode_create_rotation_property(dev,
 273                                 BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_90) |
 274                                 BIT(DRM_ROTATE_180) | BIT(DRM_ROTATE_270) |
 275                                 BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y));
 276                 if (!dev->mode_config.rotation_property)
 277                         return -ENOMEM;
 278         }
 279
 280         priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
 281         if (!priv->zorder_prop)
 282                 return -ENOMEM;
 283
 284         return 0;
 285 }
 286
 287 static int omap_modeset_init(struct drm_device *dev)
 288 {
 289         struct omap_drm_private *priv = dev->dev_private;
 290         struct omap_dss_device *dssdev = NULL;
 291         int num_ovls = dss_feat_get_num_ovls();
 292         int num_mgrs = dss_feat_get_num_mgrs();
 293         int num_crtcs;
 294         int i, id = 0;
 295         int ret;
 296
 297         drm_mode_config_init(dev);
 298
 299         omap_drm_irq_install(dev);
 300
 301         ret = omap_modeset_init_properties(dev);
 302         if (ret < 0)
 303                 return ret;
 304
 305         /*
 306          * We usually don't want to create a CRTC for each manager, at least
 307          * not until we have a way to expose private planes to userspace.
 308          * Otherwise there would not be enough video pipes left for drm planes.
 309          * We use the num_crtc argument to limit the number of crtcs we create.
 310          */
 311         num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
 312
 313         dssdev = NULL;
 314
 315         for_each_dss_dev(dssdev) {
 316                 struct drm_connector *connector;
 317                 struct drm_encoder *encoder;
 318                 enum omap_channel channel;
 319                 struct omap_overlay_manager *mgr;
 320
 321                 if (!omapdss_device_is_connected(dssdev))
 322                         continue;
 323
 324                 encoder = omap_encoder_init(dev, dssdev);
 325
 326                 if (!encoder) {
 327                         dev_err(dev->dev, "could not create encoder: %s\n",
 328                                         dssdev->name);
 329                         return -ENOMEM;
 330                 }
 331
 332                 connector = omap_connector_init(dev,
 333                                 get_connector_type(dssdev), dssdev, encoder);
 334
 335                 if (!connector) {
 336                         dev_err(dev->dev, "could not create connector: %s\n",
 337                                         dssdev->name);
 338                         return -ENOMEM;
 339                 }
 340
 341                 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
 342                 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
 343
 344                 priv->encoders[priv->num_encoders++] = encoder;
 345                 priv->connectors[priv->num_connectors++] = connector;
 346
 347                 drm_mode_connector_attach_encoder(connector, encoder);
 348
 349                 /*
 350                  * if we have reached the limit of the crtcs we are allowed to
 351                  * create, let's not try to look for a crtc for this
 352                  * panel/encoder and onwards, we will, of course, populate the
 353                  * the possible_crtcs field for all the encoders with the final
 354                  * set of crtcs we create
 355                  */
 356                 if (id == num_crtcs)
 357                         continue;
 358
 359                 /*
 360                  * get the recommended DISPC channel for this encoder. For now,
 361                  * we only try to get create a crtc out of the recommended, the
 362                  * other possible channels to which the encoder can connect are
 363                  * not considered.
 364                  */
 365
 366                 mgr = omapdss_find_mgr_from_display(dssdev);
 367                 channel = mgr->id;
 368                 /*
 369                  * if this channel hasn't already been taken by a previously
 370                  * allocated crtc, we create a new crtc for it
 371                  */
 372                 if (!channel_used(dev, channel)) {
 373                         ret = omap_modeset_create_crtc(dev, id, channel);
 374                         if (ret < 0) {
 375                                 dev_err(dev->dev,
 376                                         "could not create CRTC (channel %u)\n",
 377                                         channel);
 378                                 return ret;
 379                         }
 380
 381                         id++;
 382                 }
 383         }
 384
 385         /*
 386          * we have allocated crtcs according to the need of the panels/encoders,
 387          * adding more crtcs here if needed
 388          */
 389         for (; id < num_crtcs; id++) {
 390
 391                 /* find a free manager for this crtc */
 392                 for (i = 0; i < num_mgrs; i++) {
 393                         if (!channel_used(dev, i))
 394                                 break;
 395                 }
 396
 397                 if (i == num_mgrs) {
 398                         /* this shouldn't really happen */
 399                         dev_err(dev->dev, "no managers left for crtc\n");
 400                         return -ENOMEM;
 401                 }
 402
 403                 ret = omap_modeset_create_crtc(dev, id, i);
 404                 if (ret < 0) {
 405                         dev_err(dev->dev,
 406                                 "could not create CRTC (channel %u)\n", i);
 407                         return ret;
 408                 }
 409         }
 410
 411         /*
 412          * Create normal planes for the remaining overlays:
 413          */
 414         for (; id < num_ovls; id++) {
 415                 struct drm_plane *plane;
 416
 417                 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY);
 418                 if (IS_ERR(plane))
 419                         return PTR_ERR(plane);
 420
 421                 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
 422                 priv->planes[priv->num_planes++] = plane;
 423         }
 424
 425         for (i = 0; i < priv->num_encoders; i++) {
 426                 struct drm_encoder *encoder = priv->encoders[i];
 427                 struct omap_dss_device *dssdev =
 428                                         omap_encoder_get_dssdev(encoder);
 429                 struct omap_dss_device *output;
 430
 431                 output = omapdss_find_output_from_display(dssdev);
 432
 433                 /* figure out which crtc's we can connect the encoder to: */
 434                 encoder->possible_crtcs = 0;
 435                 for (id = 0; id < priv->num_crtcs; id++) {
 436                         struct drm_crtc *crtc = priv->crtcs[id];
 437                         enum omap_channel crtc_channel;
 438
 439                         crtc_channel = omap_crtc_channel(crtc);
 440
 441                         if (output->dispc_channel == crtc_channel) {
 442                                 encoder->possible_crtcs |= (1 << id);
 443                                 break;
 444                         }
 445                 }
 446
 447                 omap_dss_put_device(output);
 448         }
 449
 450         DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
 451                 priv->num_planes, priv->num_crtcs, priv->num_encoders,
 452                 priv->num_connectors);
 453
 454         dev->mode_config.min_width = 32;
 455         dev->mode_config.min_height = 32;
 456
 457         /* note: eventually will need some cpu_is_omapXYZ() type stuff here
 458          * to fill in these limits properly on different OMAP generations..
 459          */
 460         dev->mode_config.max_width = 2048;
 461         dev->mode_config.max_height = 2048;
 462
 463         dev->mode_config.funcs = &omap_mode_config_funcs;
 464
 465         drm_mode_config_reset(dev);
 466
 467         return 0;
 468 }
 469
 470 static void omap_modeset_free(struct drm_device *dev)
 471 {
 472         drm_mode_config_cleanup(dev);
 473 }
 474
 475 /*
 476  * drm ioctl funcs
 477  */
 478
 479
 480 static int ioctl_get_param(struct drm_device *dev, void *data,
 481                 struct drm_file *file_priv)
 482 {
 483         struct omap_drm_private *priv = dev->dev_private;
 484         struct drm_omap_param *args = data;
 485
 486         DBG("%p: param=%llu", dev, args->param);
 487
 488         switch (args->param) {
 489         case OMAP_PARAM_CHIPSET_ID:
 490                 args->value = priv->omaprev;
 491                 break;
 492         default:
 493                 DBG("unknown parameter %lld", args->param);
 494                 return -EINVAL;
 495         }
 496
 497         return 0;
 498 }
 499
 500 static int ioctl_set_param(struct drm_device *dev, void *data,
 501                 struct drm_file *file_priv)
 502 {
 503         struct drm_omap_param *args = data;
 504
 505         switch (args->param) {
 506         default:
 507                 DBG("unknown parameter %lld", args->param);
 508                 return -EINVAL;
 509         }
 510
 511         return 0;
 512 }
 513
 514 static int ioctl_gem_new(struct drm_device *dev, void *data,
 515                 struct drm_file *file_priv)
 516 {
 517         struct drm_omap_gem_new *args = data;
 518         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
 519                         args->size.bytes, args->flags);
 520         return omap_gem_new_handle(dev, file_priv, args->size,
 521                         args->flags, &args->handle);
 522 }
 523
 524 static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
 525                 struct drm_file *file_priv)
 526 {
 527         struct drm_omap_gem_cpu_prep *args = data;
 528         struct drm_gem_object *obj;
 529         int ret;
 530
 531         VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
 532
 533         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
 534         if (!obj)
 535                 return -ENOENT;
 536
 537         ret = omap_gem_op_sync(obj, args->op);
 538
 539         if (!ret)
 540                 ret = omap_gem_op_start(obj, args->op);
 541
 542         drm_gem_object_unreference_unlocked(obj);
 543
 544         return ret;
 545 }
 546
 547 static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
 548                 struct drm_file *file_priv)
 549 {
 550         struct drm_omap_gem_cpu_fini *args = data;
 551         struct drm_gem_object *obj;
 552         int ret;
 553
 554         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 555
 556         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
 557         if (!obj)
 558                 return -ENOENT;
 559
 560         /* XXX flushy, flushy */
 561         ret = 0;
 562
 563         if (!ret)
 564                 ret = omap_gem_op_finish(obj, args->op);
 565
 566         drm_gem_object_unreference_unlocked(obj);
 567
 568         return ret;
 569 }
 570
 571 static int ioctl_gem_info(struct drm_device *dev, void *data,
 572                 struct drm_file *file_priv)
 573 {
 574         struct drm_omap_gem_info *args = data;
 575         struct drm_gem_object *obj;
 576         int ret = 0;
 577
 578         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 579
 580         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
 581         if (!obj)
 582                 return -ENOENT;
 583
 584         args->size = omap_gem_mmap_size(obj);
 585         args->offset = omap_gem_mmap_offset(obj);
 586
 587         drm_gem_object_unreference_unlocked(obj);
 588
 589         return ret;
 590 }
 591
 592 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
 593         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
 594         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 595         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
 596         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
 597         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
 598         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
 599 };
 600
 601 /*
 602  * drm driver funcs
 603  */
 604
 605 /**
 606  * load - setup chip and create an initial config
 607  * @dev: DRM device
 608  * @flags: startup flags
 609  *
 610  * The driver load routine has to do several things:
 611  *   - initialize the memory manager
 612  *   - allocate initial config memory
 613  *   - setup the DRM framebuffer with the allocated memory
 614  */
 615 static int dev_load(struct drm_device *dev, unsigned long flags)
 616 {
 617         struct omap_drm_platform_data *pdata = dev->dev->platform_data;
 618         struct omap_drm_private *priv;
 619         unsigned int i;
 620         int ret;
 621
 622         DBG("load: dev=%p", dev);
 623
 624         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 625         if (!priv)
 626                 return -ENOMEM;
 627
 628         priv->omaprev = pdata->omaprev;
 629
 630         dev->dev_private = priv;
 631
 632         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
 633         init_waitqueue_head(&priv->commit.wait);
 634         spin_lock_init(&priv->commit.lock);
 635
 636         spin_lock_init(&priv->list_lock);
 637         INIT_LIST_HEAD(&priv->obj_list);
 638
 639         omap_gem_init(dev);
 640
 641         ret = omap_modeset_init(dev);
 642         if (ret) {
 643                 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
 644                 dev->dev_private = NULL;
 645                 kfree(priv);
 646                 return ret;
 647         }
 648
 649         /* Initialize vblank handling, start with all CRTCs disabled. */
 650         ret = drm_vblank_init(dev, priv->num_crtcs);
 651         if (ret)
 652                 dev_warn(dev->dev, "could not init vblank\n");
 653
 654         for (i = 0; i < priv->num_crtcs; i++)
 655                 drm_crtc_vblank_off(priv->crtcs[i]);
 656
 657         priv->fbdev = omap_fbdev_init(dev);
 658         if (!priv->fbdev) {
 659                 dev_warn(dev->dev, "omap_fbdev_init failed\n");
 660                 /* well, limp along without an fbdev.. maybe X11 will work? */
 661         }
 662
 663         /* store off drm_device for use in pm ops */
 664         dev_set_drvdata(dev->dev, dev);
 665
 666         drm_kms_helper_poll_init(dev);
 667
 668         return 0;
 669 }
 670
 671 static int dev_unload(struct drm_device *dev)
 672 {
 673         struct omap_drm_private *priv = dev->dev_private;
 674
 675         DBG("unload: dev=%p", dev);
 676
 677         drm_kms_helper_poll_fini(dev);
 678
 679         if (priv->fbdev)
 680                 omap_fbdev_free(dev);
 681
 682         omap_modeset_free(dev);
 683         omap_gem_deinit(dev);
 684
 685         destroy_workqueue(priv->wq);
 686
 687         drm_vblank_cleanup(dev);
 688         omap_drm_irq_uninstall(dev);
 689
 690         kfree(dev->dev_private);
 691         dev->dev_private = NULL;
 692
 693         dev_set_drvdata(dev->dev, NULL);
 694
 695         return 0;
 696 }
 697
 698 static int dev_open(struct drm_device *dev, struct drm_file *file)
 699 {
 700         file->driver_priv = NULL;
 701
 702         DBG("open: dev=%p, file=%p", dev, file);
 703
 704         return 0;
 705 }
 706
 707 /**
 708  * lastclose - clean up after all DRM clients have exited
 709  * @dev: DRM device
 710  *
 711  * Take care of cleaning up after all DRM clients have exited.  In the
 712  * mode setting case, we want to restore the kernel's initial mode (just
 713  * in case the last client left us in a bad state).
 714  */
 715 static void dev_lastclose(struct drm_device *dev)
 716 {
 717         int i;
 718
 719         /* we don't support vga-switcheroo.. so just make sure the fbdev
 720          * mode is active
 721          */
 722         struct omap_drm_private *priv = dev->dev_private;
 723         int ret;
 724
 725         DBG("lastclose: dev=%p", dev);
 726
 727         if (dev->mode_config.rotation_property) {
 728                 /* need to restore default rotation state.. not sure
 729                  * if there is a cleaner way to restore properties to
 730                  * default state?  Maybe a flag that properties should
 731                  * automatically be restored to default state on
 732                  * lastclose?
 733                  */
 734                 for (i = 0; i < priv->num_crtcs; i++) {
 735                         drm_object_property_set_value(&priv->crtcs[i]->base,
 736                                         dev->mode_config.rotation_property, 0);
 737                 }
 738
 739                 for (i = 0; i < priv->num_planes; i++) {
 740                         drm_object_property_set_value(&priv->planes[i]->base,
 741                                         dev->mode_config.rotation_property, 0);
 742                 }
 743         }
 744
 745         if (priv->fbdev) {
 746                 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
 747                 if (ret)
 748                         DBG("failed to restore crtc mode");
 749         }
 750 }
 751
 752 static void dev_preclose(struct drm_device *dev, struct drm_file *file)
 753 {
 754         struct omap_drm_private *priv = dev->dev_private;
 755         unsigned int i;
 756
 757         DBG("preclose: dev=%p", dev);
 758
 759         for (i = 0; i < priv->num_crtcs; ++i)
 760                 omap_crtc_cancel_page_flip(priv->crtcs[i], file);
 761 }
 762
 763 static void dev_postclose(struct drm_device *dev, struct drm_file *file)
 764 {
 765         DBG("postclose: dev=%p, file=%p", dev, file);
 766 }
 767
 768 static const struct vm_operations_struct omap_gem_vm_ops = {
 769         .fault = omap_gem_fault,
 770         .open = drm_gem_vm_open,
 771         .close = drm_gem_vm_close,
 772 };
 773
 774 static const struct file_operations omapdriver_fops = {
 775         .owner = THIS_MODULE,
 776         .open = drm_open,
 777         .unlocked_ioctl = drm_ioctl,
 778         .release = drm_release,
 779         .mmap = omap_gem_mmap,
 780         .poll = drm_poll,
 781         .read = drm_read,
 782         .llseek = noop_llseek,
 783 };
 784
 785 static struct drm_driver omap_drm_driver = {
 786         .driver_features = DRIVER_MODESET | DRIVER_GEM  | DRIVER_PRIME,
 787         .load = dev_load,
 788         .unload = dev_unload,
 789         .open = dev_open,
 790         .lastclose = dev_lastclose,
 791         .preclose = dev_preclose,
 792         .postclose = dev_postclose,
 793         .set_busid = drm_platform_set_busid,
 794         .get_vblank_counter = drm_vblank_count,
 795         .enable_vblank = omap_irq_enable_vblank,
 796         .disable_vblank = omap_irq_disable_vblank,
 797 #ifdef CONFIG_DEBUG_FS
 798         .debugfs_init = omap_debugfs_init,
 799         .debugfs_cleanup = omap_debugfs_cleanup,
 800 #endif
 801         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 802         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 803         .gem_prime_export = omap_gem_prime_export,
 804         .gem_prime_import = omap_gem_prime_import,
 805         .gem_free_object = omap_gem_free_object,
 806         .gem_vm_ops = &omap_gem_vm_ops,
 807         .dumb_create = omap_gem_dumb_create,
 808         .dumb_map_offset = omap_gem_dumb_map_offset,
 809         .dumb_destroy = drm_gem_dumb_destroy,
 810         .ioctls = ioctls,
 811         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
 812         .fops = &omapdriver_fops,
 813         .name = DRIVER_NAME,
 814         .desc = DRIVER_DESC,
 815         .date = DRIVER_DATE,
 816         .major = DRIVER_MAJOR,
 817         .minor = DRIVER_MINOR,
 818         .patchlevel = DRIVER_PATCHLEVEL,
 819 };
 820
 821 static int pdev_probe(struct platform_device *device)
 822 {
 823         int r;
 824
 825         if (omapdss_is_initialized() == false)
 826                 return -EPROBE_DEFER;
 827
 828         omap_crtc_pre_init();
 829
 830         r = omap_connect_dssdevs();
 831         if (r) {
 832                 omap_crtc_pre_uninit();
 833                 return r;
 834         }
 835
 836         DBG("%s", device->name);
 837         return drm_platform_init(&omap_drm_driver, device);
 838 }
 839
 840 static int pdev_remove(struct platform_device *device)
 841 {
 842         DBG("");
 843
 844         drm_put_dev(platform_get_drvdata(device));
 845
 846         omap_disconnect_dssdevs();
 847         omap_crtc_pre_uninit();
 848
 849         return 0;
 850 }
 851
 852 #ifdef CONFIG_PM_SLEEP
 853 static int omap_drm_suspend(struct device *dev)
 854 {
 855         struct drm_device *drm_dev = dev_get_drvdata(dev);
 856
 857         drm_kms_helper_poll_disable(drm_dev);
 858
 859         return 0;
 860 }
 861
 862 static int omap_drm_resume(struct device *dev)
 863 {
 864         struct drm_device *drm_dev = dev_get_drvdata(dev);
 865
 866         drm_kms_helper_poll_enable(drm_dev);
 867
 868         return omap_gem_resume(dev);
 869 }
 870 #endif
 871
 872 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
 873
 874 static struct platform_driver pdev = {
 875         .driver = {
 876                 .name = DRIVER_NAME,
 877                 .pm = &omapdrm_pm_ops,
 878         },
 879         .probe = pdev_probe,
 880         .remove = pdev_remove,
 881 };
 882
 883 static int __init omap_drm_init(void)
 884 {
 885         int r;
 886
 887         DBG("init");
 888
 889         r = platform_driver_register(&omap_dmm_driver);
 890         if (r) {
 891                 pr_err("DMM driver registration failed\n");
 892                 return r;
 893         }
 894
 895         r = platform_driver_register(&pdev);
 896         if (r) {
 897                 pr_err("omapdrm driver registration failed\n");
 898                 platform_driver_unregister(&omap_dmm_driver);
 899                 return r;
 900         }
 901
 902         return 0;
 903 }
 904
 905 static void __exit omap_drm_fini(void)
 906 {
 907         DBG("fini");
 908
 909         platform_driver_unregister(&pdev);
 910
 911         platform_driver_unregister(&omap_dmm_driver);
 912 }
 913
 914 /* need late_initcall() so we load after dss_driver's are loaded */
 915 late_initcall(omap_drm_init);
 916 module_exit(omap_drm_fini);
 917
 918 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
 919 MODULE_DESCRIPTION("OMAP DRM Display Driver");
 920 MODULE_ALIAS("platform:" DRIVER_NAME);
 921 MODULE_LICENSE("GPL v2");