2 * Tegra host1x Syncpoints
4 * Copyright (c) 2010-2013, NVIDIA Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #include "../syncpt.h"
25 * Write the current syncpoint value back to hw.
27 static void syncpt_restore(struct host1x_syncpt *sp)
29 u32 min = host1x_syncpt_read_min(sp);
30 struct host1x *host = sp->host;
32 host1x_sync_writel(host, min, HOST1X_SYNC_SYNCPT(sp->id));
36 * Write the current waitbase value back to hw.
38 static void syncpt_restore_wait_base(struct host1x_syncpt *sp)
40 struct host1x *host = sp->host;
41 host1x_sync_writel(host, sp->base_val,
42 HOST1X_SYNC_SYNCPT_BASE(sp->id));
46 * Read waitbase value from hw.
48 static void syncpt_read_wait_base(struct host1x_syncpt *sp)
50 struct host1x *host = sp->host;
52 host1x_sync_readl(host, HOST1X_SYNC_SYNCPT_BASE(sp->id));
56 * Updates the last value read from hardware.
58 static u32 syncpt_load(struct host1x_syncpt *sp)
60 struct host1x *host = sp->host;
63 /* Loop in case there's a race writing to min_val */
65 old = host1x_syncpt_read_min(sp);
66 live = host1x_sync_readl(host, HOST1X_SYNC_SYNCPT(sp->id));
67 } while ((u32)atomic_cmpxchg(&sp->min_val, old, live) != old);
69 if (!host1x_syncpt_check_max(sp, live))
70 dev_err(host->dev, "%s failed: id=%u, min=%d, max=%d\n",
71 __func__, sp->id, host1x_syncpt_read_min(sp),
72 host1x_syncpt_read_max(sp));
78 * Write a cpu syncpoint increment to the hardware, without touching
81 static int syncpt_cpu_incr(struct host1x_syncpt *sp)
83 struct host1x *host = sp->host;
84 u32 reg_offset = sp->id / 32;
86 if (!host1x_syncpt_client_managed(sp) &&
87 host1x_syncpt_idle(sp))
89 host1x_sync_writel(host, BIT_MASK(sp->id),
90 HOST1X_SYNC_SYNCPT_CPU_INCR(reg_offset));
96 /* remove a wait pointed to by patch_addr */
97 static int syncpt_patch_wait(struct host1x_syncpt *sp, void *patch_addr)
99 u32 override = host1x_class_host_wait_syncpt(
100 HOST1X_SYNCPT_RESERVED, 0);
102 *((u32 *)patch_addr) = override;
106 static const struct host1x_syncpt_ops host1x_syncpt_ops = {
107 .restore = syncpt_restore,
108 .restore_wait_base = syncpt_restore_wait_base,
109 .load_wait_base = syncpt_read_wait_base,
111 .cpu_incr = syncpt_cpu_incr,
112 .patch_wait = syncpt_patch_wait,