2 * SL82C105/Winbond 553 IDE driver
6 * Drive tuning added from Rebel.com's kernel sources
7 * -- Russell King (15/11/98) linux@arm.linux.org.uk
9 * Merge in Russell's HW workarounds, fix various problems
10 * with the timing registers setup.
11 * -- Benjamin Herrenschmidt (01/11/03) benh@kernel.crashing.org
13 * Copyright (C) 2006-2007,2009 MontaVista Software, Inc. <source@mvista.com>
14 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
17 #include <linux/types.h>
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/pci.h>
21 #include <linux/ide.h>
25 #define DRV_NAME "sl82c105"
28 * SL82C105 PCI config register 0x40 bits.
30 #define CTRL_IDE_IRQB (1 << 30)
31 #define CTRL_IDE_IRQA (1 << 28)
32 #define CTRL_LEGIRQ (1 << 11)
33 #define CTRL_P1F16 (1 << 5)
34 #define CTRL_P1EN (1 << 4)
35 #define CTRL_P0F16 (1 << 1)
36 #define CTRL_P0EN (1 << 0)
39 * Convert a PIO mode and cycle time to the required on/off times
40 * for the interface. This has protection against runaway timings.
42 static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio)
44 struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
45 unsigned int cmd_on, cmd_off;
48 cmd_on = (t->active + 29) / 30;
49 cmd_off = (ide_pio_cycle_time(drive, pio) - 30 * cmd_on + 29) / 30;
57 if (ide_pio_need_iordy(drive, pio))
60 return (cmd_on - 1) << 8 | (cmd_off - 1) | iordy;
64 * Configure the chipset for PIO mode.
66 static void sl82c105_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
68 struct pci_dev *dev = to_pci_dev(hwif->dev);
69 unsigned long timings = (unsigned long)ide_get_drivedata(drive);
70 int reg = 0x44 + drive->dn * 4;
72 const u8 pio = drive->pio_mode - XFER_PIO_0;
74 drv_ctrl = get_pio_timings(drive, pio);
77 * Store the PIO timings so that we can restore them
78 * in case DMA will be turned off...
80 timings &= 0xffff0000;
82 ide_set_drivedata(drive, (void *)timings);
84 pci_write_config_word(dev, reg, drv_ctrl);
85 pci_read_config_word (dev, reg, &drv_ctrl);
87 printk(KERN_DEBUG "%s: selected %s (%dns) (%04X)\n", drive->name,
88 ide_xfer_verbose(pio + XFER_PIO_0),
89 ide_pio_cycle_time(drive, pio), drv_ctrl);
93 * Configure the chipset for DMA mode.
95 static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed)
97 static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200};
98 unsigned long timings = (unsigned long)ide_get_drivedata(drive);
101 drv_ctrl = mwdma_timings[speed - XFER_MW_DMA_0];
104 * Store the DMA timings so that we can actually program
105 * them when DMA will be turned on...
107 timings &= 0x0000ffff;
108 timings |= (unsigned long)drv_ctrl << 16;
109 ide_set_drivedata(drive, (void *)timings);
112 static int sl82c105_test_irq(ide_hwif_t *hwif)
114 struct pci_dev *dev = to_pci_dev(hwif->dev);
115 u32 val, mask = hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;
117 pci_read_config_dword(dev, 0x40, &val);
119 return (val & mask) ? 1 : 0;
123 * The SL82C105 holds off all IDE interrupts while in DMA mode until
124 * all DMA activity is completed. Sometimes this causes problems (eg,
125 * when the drive wants to report an error condition).
127 * 0x7e is a "chip testing" register. Bit 2 resets the DMA controller
128 * state machine. We need to kick this to work around various bugs.
130 static inline void sl82c105_reset_host(struct pci_dev *dev)
134 pci_read_config_word(dev, 0x7e, &val);
135 pci_write_config_word(dev, 0x7e, val | (1 << 2));
136 pci_write_config_word(dev, 0x7e, val & ~(1 << 2));
140 * If we get an IRQ timeout, it might be that the DMA state machine
141 * got confused. Fix from Todd Inglett. Details from Winbond.
143 * This function is called when the IDE timer expires, the drive
144 * indicates that it is READY, and we were waiting for DMA to complete.
146 static void sl82c105_dma_lost_irq(ide_drive_t *drive)
148 ide_hwif_t *hwif = drive->hwif;
149 struct pci_dev *dev = to_pci_dev(hwif->dev);
150 u32 val, mask = hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;
153 printk(KERN_WARNING "sl82c105: lost IRQ, resetting host\n");
156 * Check the raw interrupt from the drive.
158 pci_read_config_dword(dev, 0x40, &val);
160 printk(KERN_INFO "sl82c105: drive was requesting IRQ, "
161 "but host lost it\n");
164 * Was DMA enabled? If so, disable it - we're resetting the
165 * host. The IDE layer will be handling the drive for us.
167 dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
169 outb(dma_cmd & ~1, hwif->dma_base + ATA_DMA_CMD);
170 printk(KERN_INFO "sl82c105: DMA was enabled\n");
173 sl82c105_reset_host(dev);
177 * ATAPI devices can cause the SL82C105 DMA state machine to go gaga.
178 * Winbond recommend that the DMA state machine is reset prior to
179 * setting the bus master DMA enable bit.
181 * The generic IDE core will have disabled the BMEN bit before this
182 * function is called.
184 static void sl82c105_dma_start(ide_drive_t *drive)
186 ide_hwif_t *hwif = drive->hwif;
187 struct pci_dev *dev = to_pci_dev(hwif->dev);
188 int reg = 0x44 + drive->dn * 4;
190 pci_write_config_word(dev, reg,
191 (unsigned long)ide_get_drivedata(drive) >> 16);
193 sl82c105_reset_host(dev);
194 ide_dma_start(drive);
197 static void sl82c105_dma_clear(ide_drive_t *drive)
199 struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
201 sl82c105_reset_host(dev);
204 static int sl82c105_dma_end(ide_drive_t *drive)
206 struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
207 int reg = 0x44 + drive->dn * 4;
208 int ret = ide_dma_end(drive);
210 pci_write_config_word(dev, reg,
211 (unsigned long)ide_get_drivedata(drive));
217 * ATA reset will clear the 16 bits mode in the control
218 * register, we need to reprogram it
220 static void sl82c105_resetproc(ide_drive_t *drive)
222 struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
225 pci_read_config_dword(dev, 0x40, &val);
226 val |= (CTRL_P1F16 | CTRL_P0F16);
227 pci_write_config_dword(dev, 0x40, val);
231 * Return the revision of the Winbond bridge
232 * which this function is part of.
234 static u8 sl82c105_bridge_revision(struct pci_dev *dev)
236 struct pci_dev *bridge;
239 * The bridge should be part of the same device, but function 0.
241 bridge = pci_get_bus_and_slot(dev->bus->number,
242 PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
247 * Make sure it is a Winbond 553 and is an ISA bridge.
249 if (bridge->vendor != PCI_VENDOR_ID_WINBOND ||
250 bridge->device != PCI_DEVICE_ID_WINBOND_83C553 ||
251 bridge->class >> 8 != PCI_CLASS_BRIDGE_ISA) {
256 * We need to find function 0's revision, not function 1
260 return bridge->revision;
264 * Enable the PCI device
266 * --BenH: It's arch fixup code that should enable channels that
267 * have not been enabled by firmware. I decided we can still enable
268 * channel 0 here at least, but channel 1 has to be enabled by
269 * firmware or arch code. We still set both to 16 bits mode.
271 static int init_chipset_sl82c105(struct pci_dev *dev)
275 pci_read_config_dword(dev, 0x40, &val);
276 val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
277 pci_write_config_dword(dev, 0x40, val);
282 static const struct ide_port_ops sl82c105_port_ops = {
283 .set_pio_mode = sl82c105_set_pio_mode,
284 .set_dma_mode = sl82c105_set_dma_mode,
285 .resetproc = sl82c105_resetproc,
286 .test_irq = sl82c105_test_irq,
289 static const struct ide_dma_ops sl82c105_dma_ops = {
290 .dma_host_set = ide_dma_host_set,
291 .dma_setup = ide_dma_setup,
292 .dma_start = sl82c105_dma_start,
293 .dma_end = sl82c105_dma_end,
294 .dma_test_irq = ide_dma_test_irq,
295 .dma_lost_irq = sl82c105_dma_lost_irq,
296 .dma_timer_expiry = ide_dma_sff_timer_expiry,
297 .dma_clear = sl82c105_dma_clear,
298 .dma_sff_read_status = ide_dma_sff_read_status,
301 static const struct ide_port_info sl82c105_chipset __devinitdata = {
303 .init_chipset = init_chipset_sl82c105,
304 .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}},
305 .port_ops = &sl82c105_port_ops,
306 .dma_ops = &sl82c105_dma_ops,
307 .host_flags = IDE_HFLAG_IO_32BIT |
308 IDE_HFLAG_UNMASK_IRQS |
309 IDE_HFLAG_SERIALIZE_DMA |
310 IDE_HFLAG_NO_AUTODMA,
311 .pio_mask = ATA_PIO5,
312 .mwdma_mask = ATA_MWDMA2,
315 static int __devinit sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id)
317 struct ide_port_info d = sl82c105_chipset;
318 u8 rev = sl82c105_bridge_revision(dev);
322 * Never ever EVER under any circumstances enable
323 * DMA when the bridge is this old.
325 printk(KERN_INFO DRV_NAME ": Winbond W83C553 bridge "
326 "revision %d, BM-DMA disabled\n", rev);
329 d.host_flags &= ~IDE_HFLAG_SERIALIZE_DMA;
332 return ide_pci_init_one(dev, &d, NULL);
335 static const struct pci_device_id sl82c105_pci_tbl[] = {
336 { PCI_VDEVICE(WINBOND, PCI_DEVICE_ID_WINBOND_82C105), 0 },
339 MODULE_DEVICE_TABLE(pci, sl82c105_pci_tbl);
341 static struct pci_driver sl82c105_pci_driver = {
342 .name = "W82C105_IDE",
343 .id_table = sl82c105_pci_tbl,
344 .probe = sl82c105_init_one,
345 .remove = ide_pci_remove,
346 .suspend = ide_pci_suspend,
347 .resume = ide_pci_resume,
350 static int __init sl82c105_ide_init(void)
352 return ide_pci_register_driver(&sl82c105_pci_driver);
355 static void __exit sl82c105_ide_exit(void)
357 pci_unregister_driver(&sl82c105_pci_driver);
360 module_init(sl82c105_ide_init);
361 module_exit(sl82c105_ide_exit);
363 MODULE_DESCRIPTION("PCI driver module for W82C105 IDE");
364 MODULE_LICENSE("GPL");