drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

   1 /*
   2 * Copyright (C) 2012 Invensense, Inc.
   3 *
   4 * This software is licensed under the terms of the GNU General Public
   5 * License version 2, as published by the Free Software Foundation, and
   6 * may be copied, distributed, and modified under those terms.
   7 *
   8 * This program is distributed in the hope that it will be useful,
   9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11 * GNU General Public License for more details.
  12 */
  13
  14 #include <linux/module.h>
  15 #include <linux/slab.h>
  16 #include <linux/i2c.h>
  17 #include <linux/err.h>
  18 #include <linux/delay.h>
  19 #include <linux/sysfs.h>
  20 #include <linux/jiffies.h>
  21 #include <linux/irq.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/kfifo.h>
  24 #include <linux/spinlock.h>
  25 #include <linux/iio/iio.h>
  26 #include <linux/i2c-mux.h>
  27 #include <linux/acpi.h>
  28 #include "inv_mpu_iio.h"
  29
  30 /*
  31  * this is the gyro scale translated from dynamic range plus/minus
  32  * {250, 500, 1000, 2000} to rad/s
  33  */
  34 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
  35
  36 /*
  37  * this is the accel scale translated from dynamic range plus/minus
  38  * {2, 4, 8, 16} to m/s^2
  39  */
  40 static const int accel_scale[] = {598, 1196, 2392, 4785};
  41
  42 static const struct inv_mpu6050_reg_map reg_set_6050 = {
  43         .sample_rate_div        = INV_MPU6050_REG_SAMPLE_RATE_DIV,
  44         .lpf                    = INV_MPU6050_REG_CONFIG,
  45         .user_ctrl              = INV_MPU6050_REG_USER_CTRL,
  46         .fifo_en                = INV_MPU6050_REG_FIFO_EN,
  47         .gyro_config            = INV_MPU6050_REG_GYRO_CONFIG,
  48         .accl_config            = INV_MPU6050_REG_ACCEL_CONFIG,
  49         .fifo_count_h           = INV_MPU6050_REG_FIFO_COUNT_H,
  50         .fifo_r_w               = INV_MPU6050_REG_FIFO_R_W,
  51         .raw_gyro               = INV_MPU6050_REG_RAW_GYRO,
  52         .raw_accl               = INV_MPU6050_REG_RAW_ACCEL,
  53         .temperature            = INV_MPU6050_REG_TEMPERATURE,
  54         .int_enable             = INV_MPU6050_REG_INT_ENABLE,
  55         .pwr_mgmt_1             = INV_MPU6050_REG_PWR_MGMT_1,
  56         .pwr_mgmt_2             = INV_MPU6050_REG_PWR_MGMT_2,
  57         .int_pin_cfg            = INV_MPU6050_REG_INT_PIN_CFG,
  58 };
  59
  60 static const struct inv_mpu6050_chip_config chip_config_6050 = {
  61         .fsr = INV_MPU6050_FSR_2000DPS,
  62         .lpf = INV_MPU6050_FILTER_20HZ,
  63         .fifo_rate = INV_MPU6050_INIT_FIFO_RATE,
  64         .gyro_fifo_enable = false,
  65         .accl_fifo_enable = false,
  66         .accl_fs = INV_MPU6050_FS_02G,
  67 };
  68
  69 static const struct inv_mpu6050_hw hw_info[INV_NUM_PARTS] = {
  70         {
  71                 .num_reg = 117,
  72                 .name = "MPU6050",
  73                 .reg = &reg_set_6050,
  74                 .config = &chip_config_6050,
  75         },
  76 };
  77
  78 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask)
  79 {
  80         unsigned int d, mgmt_1;
  81         int result;
  82
  83         /* switch clock needs to be careful. Only when gyro is on, can
  84            clock source be switched to gyro. Otherwise, it must be set to
  85            internal clock */
  86         if (INV_MPU6050_BIT_PWR_GYRO_STBY == mask) {
  87                 result = regmap_read(st->map, st->reg->pwr_mgmt_1, &mgmt_1);
  88                 if (result)
  89                         return result;
  90
  91                 mgmt_1 &= ~INV_MPU6050_BIT_CLK_MASK;
  92         }
  93
  94         if ((INV_MPU6050_BIT_PWR_GYRO_STBY == mask) && (!en)) {
  95                 /* turning off gyro requires switch to internal clock first.
  96                    Then turn off gyro engine */
  97                 mgmt_1 |= INV_CLK_INTERNAL;
  98                 result = regmap_write(st->map, st->reg->pwr_mgmt_1, mgmt_1);
  99                 if (result)
 100                         return result;
 101         }
 102
 103         result = regmap_read(st->map, st->reg->pwr_mgmt_2, &d);
 104         if (result)
 105                 return result;
 106         if (en)
 107                 d &= ~mask;
 108         else
 109                 d |= mask;
 110         result = regmap_write(st->map, st->reg->pwr_mgmt_2, d);
 111         if (result)
 112                 return result;
 113
 114         if (en) {
 115                 /* Wait for output stabilize */
 116                 msleep(INV_MPU6050_TEMP_UP_TIME);
 117                 if (INV_MPU6050_BIT_PWR_GYRO_STBY == mask) {
 118                         /* switch internal clock to PLL */
 119                         mgmt_1 |= INV_CLK_PLL;
 120                         result = regmap_write(st->map,
 121                                         st->reg->pwr_mgmt_1, mgmt_1);
 122                         if (result)
 123                                 return result;
 124                 }
 125         }
 126
 127         return 0;
 128 }
 129
 130 int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, bool power_on)
 131 {
 132         int result = 0;
 133
 134         if (power_on) {
 135                 /* Already under indio-dev->mlock mutex */
 136                 if (!st->powerup_count)
 137                         result = regmap_write(st->map, st->reg->pwr_mgmt_1, 0);
 138                 if (!result)
 139                         st->powerup_count++;
 140         } else {
 141                 st->powerup_count--;
 142                 if (!st->powerup_count)
 143                         result = regmap_write(st->map, st->reg->pwr_mgmt_1,
 144                                               INV_MPU6050_BIT_SLEEP);
 145         }
 146
 147         if (result)
 148                 return result;
 149
 150         if (power_on)
 151                 msleep(INV_MPU6050_REG_UP_TIME);
 152
 153         return 0;
 154 }
 155 EXPORT_SYMBOL_GPL(inv_mpu6050_set_power_itg);
 156
 157 /**
 158  *  inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
 159  *
 160  *  Initial configuration:
 161  *  FSR: ± 2000DPS
 162  *  DLPF: 20Hz
 163  *  FIFO rate: 50Hz
 164  *  Clock source: Gyro PLL
 165  */
 166 static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
 167 {
 168         int result;
 169         u8 d;
 170         struct inv_mpu6050_state *st = iio_priv(indio_dev);
 171
 172         result = inv_mpu6050_set_power_itg(st, true);
 173         if (result)
 174                 return result;
 175         d = (INV_MPU6050_FSR_2000DPS << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
 176         result = regmap_write(st->map, st->reg->gyro_config, d);
 177         if (result)
 178                 return result;
 179
 180         d = INV_MPU6050_FILTER_20HZ;
 181         result = regmap_write(st->map, st->reg->lpf, d);
 182         if (result)
 183                 return result;
 184
 185         d = INV_MPU6050_ONE_K_HZ / INV_MPU6050_INIT_FIFO_RATE - 1;
 186         result = regmap_write(st->map, st->reg->sample_rate_div, d);
 187         if (result)
 188                 return result;
 189
 190         d = (INV_MPU6050_FS_02G << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
 191         result = regmap_write(st->map, st->reg->accl_config, d);
 192         if (result)
 193                 return result;
 194
 195         memcpy(&st->chip_config, hw_info[st->chip_type].config,
 196                 sizeof(struct inv_mpu6050_chip_config));
 197         result = inv_mpu6050_set_power_itg(st, false);
 198
 199         return result;
 200 }
 201
 202 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state  *st, int reg,
 203                                 int axis, int *val)
 204 {
 205         int ind, result;
 206         __be16 d;
 207
 208         ind = (axis - IIO_MOD_X) * 2;
 209         result = regmap_bulk_read(st->map, reg + ind, (u8 *)&d, 2);
 210         if (result)
 211                 return -EINVAL;
 212         *val = (short)be16_to_cpup(&d);
 213
 214         return IIO_VAL_INT;
 215 }
 216
 217 static int inv_mpu6050_read_raw(struct iio_dev *indio_dev,
 218                               struct iio_chan_spec const *chan,
 219                               int *val,
 220                               int *val2,
 221                               long mask) {
 222         struct inv_mpu6050_state  *st = iio_priv(indio_dev);
 223
 224         switch (mask) {
 225         case IIO_CHAN_INFO_RAW:
 226         {
 227                 int ret, result;
 228
 229                 ret = IIO_VAL_INT;
 230                 result = 0;
 231                 mutex_lock(&indio_dev->mlock);
 232                 if (!st->chip_config.enable) {
 233                         result = inv_mpu6050_set_power_itg(st, true);
 234                         if (result)
 235                                 goto error_read_raw;
 236                 }
 237                 /* when enable is on, power is already on */
 238                 switch (chan->type) {
 239                 case IIO_ANGL_VEL:
 240                         if (!st->chip_config.gyro_fifo_enable ||
 241                                         !st->chip_config.enable) {
 242                                 result = inv_mpu6050_switch_engine(st, true,
 243                                                 INV_MPU6050_BIT_PWR_GYRO_STBY);
 244                                 if (result)
 245                                         goto error_read_raw;
 246                         }
 247                         ret =  inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
 248                                                 chan->channel2, val);
 249                         if (!st->chip_config.gyro_fifo_enable ||
 250                                         !st->chip_config.enable) {
 251                                 result = inv_mpu6050_switch_engine(st, false,
 252                                                 INV_MPU6050_BIT_PWR_GYRO_STBY);
 253                                 if (result)
 254                                         goto error_read_raw;
 255                         }
 256                         break;
 257                 case IIO_ACCEL:
 258                         if (!st->chip_config.accl_fifo_enable ||
 259                                         !st->chip_config.enable) {
 260                                 result = inv_mpu6050_switch_engine(st, true,
 261                                                 INV_MPU6050_BIT_PWR_ACCL_STBY);
 262                                 if (result)
 263                                         goto error_read_raw;
 264                         }
 265                         ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
 266                                                 chan->channel2, val);
 267                         if (!st->chip_config.accl_fifo_enable ||
 268                                         !st->chip_config.enable) {
 269                                 result = inv_mpu6050_switch_engine(st, false,
 270                                                 INV_MPU6050_BIT_PWR_ACCL_STBY);
 271                                 if (result)
 272                                         goto error_read_raw;
 273                         }
 274                         break;
 275                 case IIO_TEMP:
 276                         /* wait for stablization */
 277                         msleep(INV_MPU6050_SENSOR_UP_TIME);
 278                         inv_mpu6050_sensor_show(st, st->reg->temperature,
 279                                                         IIO_MOD_X, val);
 280                         break;
 281                 default:
 282                         ret = -EINVAL;
 283                         break;
 284                 }
 285 error_read_raw:
 286                 if (!st->chip_config.enable)
 287                         result |= inv_mpu6050_set_power_itg(st, false);
 288                 mutex_unlock(&indio_dev->mlock);
 289                 if (result)
 290                         return result;
 291
 292                 return ret;
 293         }
 294         case IIO_CHAN_INFO_SCALE:
 295                 switch (chan->type) {
 296                 case IIO_ANGL_VEL:
 297                         *val  = 0;
 298                         *val2 = gyro_scale_6050[st->chip_config.fsr];
 299
 300                         return IIO_VAL_INT_PLUS_NANO;
 301                 case IIO_ACCEL:
 302                         *val = 0;
 303                         *val2 = accel_scale[st->chip_config.accl_fs];
 304
 305                         return IIO_VAL_INT_PLUS_MICRO;
 306                 case IIO_TEMP:
 307                         *val = 0;
 308                         *val2 = INV_MPU6050_TEMP_SCALE;
 309
 310                         return IIO_VAL_INT_PLUS_MICRO;
 311                 default:
 312                         return -EINVAL;
 313                 }
 314         case IIO_CHAN_INFO_OFFSET:
 315                 switch (chan->type) {
 316                 case IIO_TEMP:
 317                         *val = INV_MPU6050_TEMP_OFFSET;
 318
 319                         return IIO_VAL_INT;
 320                 default:
 321                         return -EINVAL;
 322                 }
 323         default:
 324                 return -EINVAL;
 325         }
 326 }
 327
 328 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val)
 329 {
 330         int result, i;
 331         u8 d;
 332
 333         for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
 334                 if (gyro_scale_6050[i] == val) {
 335                         d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
 336                         result = regmap_write(st->map, st->reg->gyro_config, d);
 337                         if (result)
 338                                 return result;
 339
 340                         st->chip_config.fsr = i;
 341                         return 0;
 342                 }
 343         }
 344
 345         return -EINVAL;
 346 }
 347
 348 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev,
 349                                  struct iio_chan_spec const *chan, long mask)
 350 {
 351         switch (mask) {
 352         case IIO_CHAN_INFO_SCALE:
 353                 switch (chan->type) {
 354                 case IIO_ANGL_VEL:
 355                         return IIO_VAL_INT_PLUS_NANO;
 356                 default:
 357                         return IIO_VAL_INT_PLUS_MICRO;
 358                 }
 359         default:
 360                 return IIO_VAL_INT_PLUS_MICRO;
 361         }
 362
 363         return -EINVAL;
 364 }
 365 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val)
 366 {
 367         int result, i;
 368         u8 d;
 369
 370         for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
 371                 if (accel_scale[i] == val) {
 372                         d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
 373                         result = regmap_write(st->map, st->reg->accl_config, d);
 374                         if (result)
 375                                 return result;
 376
 377                         st->chip_config.accl_fs = i;
 378                         return 0;
 379                 }
 380         }
 381
 382         return -EINVAL;
 383 }
 384
 385 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
 386                                struct iio_chan_spec const *chan,
 387                                int val,
 388                                int val2,
 389                                long mask) {
 390         struct inv_mpu6050_state  *st = iio_priv(indio_dev);
 391         int result;
 392
 393         mutex_lock(&indio_dev->mlock);
 394         /* we should only update scale when the chip is disabled, i.e.,
 395                 not running */
 396         if (st->chip_config.enable) {
 397                 result = -EBUSY;
 398                 goto error_write_raw;
 399         }
 400         result = inv_mpu6050_set_power_itg(st, true);
 401         if (result)
 402                 goto error_write_raw;
 403
 404         switch (mask) {
 405         case IIO_CHAN_INFO_SCALE:
 406                 switch (chan->type) {
 407                 case IIO_ANGL_VEL:
 408                         result = inv_mpu6050_write_gyro_scale(st, val2);
 409                         break;
 410                 case IIO_ACCEL:
 411                         result = inv_mpu6050_write_accel_scale(st, val2);
 412                         break;
 413                 default:
 414                         result = -EINVAL;
 415                         break;
 416                 }
 417                 break;
 418         default:
 419                 result = -EINVAL;
 420                 break;
 421         }
 422
 423 error_write_raw:
 424         result |= inv_mpu6050_set_power_itg(st, false);
 425         mutex_unlock(&indio_dev->mlock);
 426
 427         return result;
 428 }
 429
 430 /**
 431  *  inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
 432  *
 433  *                  Based on the Nyquist principle, the sampling rate must
 434  *                  exceed twice of the bandwidth of the signal, or there
 435  *                  would be alising. This function basically search for the
 436  *                  correct low pass parameters based on the fifo rate, e.g,
 437  *                  sampling frequency.
 438  */
 439 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
 440 {
 441         const int hz[] = {188, 98, 42, 20, 10, 5};
 442         const int d[] = {INV_MPU6050_FILTER_188HZ, INV_MPU6050_FILTER_98HZ,
 443                         INV_MPU6050_FILTER_42HZ, INV_MPU6050_FILTER_20HZ,
 444                         INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ};
 445         int i, h, result;
 446         u8 data;
 447
 448         h = (rate >> 1);
 449         i = 0;
 450         while ((h < hz[i]) && (i < ARRAY_SIZE(d) - 1))
 451                 i++;
 452         data = d[i];
 453         result = regmap_write(st->map, st->reg->lpf, data);
 454         if (result)
 455                 return result;
 456         st->chip_config.lpf = data;
 457
 458         return 0;
 459 }
 460
 461 /**
 462  * inv_mpu6050_fifo_rate_store() - Set fifo rate.
 463  */
 464 static ssize_t inv_mpu6050_fifo_rate_store(struct device *dev,
 465         struct device_attribute *attr, const char *buf, size_t count)
 466 {
 467         s32 fifo_rate;
 468         u8 d;
 469         int result;
 470         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 471         struct inv_mpu6050_state *st = iio_priv(indio_dev);
 472
 473         if (kstrtoint(buf, 10, &fifo_rate))
 474                 return -EINVAL;
 475         if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
 476                                 fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
 477                 return -EINVAL;
 478         if (fifo_rate == st->chip_config.fifo_rate)
 479                 return count;
 480
 481         mutex_lock(&indio_dev->mlock);
 482         if (st->chip_config.enable) {
 483                 result = -EBUSY;
 484                 goto fifo_rate_fail;
 485         }
 486         result = inv_mpu6050_set_power_itg(st, true);
 487         if (result)
 488                 goto fifo_rate_fail;
 489
 490         d = INV_MPU6050_ONE_K_HZ / fifo_rate - 1;
 491         result = regmap_write(st->map, st->reg->sample_rate_div, d);
 492         if (result)
 493                 goto fifo_rate_fail;
 494         st->chip_config.fifo_rate = fifo_rate;
 495
 496         result = inv_mpu6050_set_lpf(st, fifo_rate);
 497         if (result)
 498                 goto fifo_rate_fail;
 499
 500 fifo_rate_fail:
 501         result |= inv_mpu6050_set_power_itg(st, false);
 502         mutex_unlock(&indio_dev->mlock);
 503         if (result)
 504                 return result;
 505
 506         return count;
 507 }
 508
 509 /**
 510  * inv_fifo_rate_show() - Get the current sampling rate.
 511  */
 512 static ssize_t inv_fifo_rate_show(struct device *dev,
 513         struct device_attribute *attr, char *buf)
 514 {
 515         struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
 516
 517         return sprintf(buf, "%d\n", st->chip_config.fifo_rate);
 518 }
 519
 520 /**
 521  * inv_attr_show() - calling this function will show current
 522  *                    parameters.
 523  */
 524 static ssize_t inv_attr_show(struct device *dev,
 525         struct device_attribute *attr, char *buf)
 526 {
 527         struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
 528         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 529         s8 *m;
 530
 531         switch (this_attr->address) {
 532         /* In MPU6050, the two matrix are the same because gyro and accel
 533            are integrated in one chip */
 534         case ATTR_GYRO_MATRIX:
 535         case ATTR_ACCL_MATRIX:
 536                 m = st->plat_data.orientation;
 537
 538                 return sprintf(buf, "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
 539                         m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
 540         default:
 541                 return -EINVAL;
 542         }
 543 }
 544
 545 /**
 546  * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
 547  *                                  MPU6050 device.
 548  * @indio_dev: The IIO device
 549  * @trig: The new trigger
 550  *
 551  * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
 552  * device, -EINVAL otherwise.
 553  */
 554 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
 555                                         struct iio_trigger *trig)
 556 {
 557         struct inv_mpu6050_state *st = iio_priv(indio_dev);
 558
 559         if (st->trig != trig)
 560                 return -EINVAL;
 561
 562         return 0;
 563 }
 564
 565 #define INV_MPU6050_CHAN(_type, _channel2, _index)                    \
 566         {                                                             \
 567                 .type = _type,                                        \
 568                 .modified = 1,                                        \
 569                 .channel2 = _channel2,                                \
 570                 .info_mask_shared_by_type =  BIT(IIO_CHAN_INFO_SCALE), \
 571                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),         \
 572                 .scan_index = _index,                                 \
 573                 .scan_type = {                                        \
 574                                 .sign = 's',                          \
 575                                 .realbits = 16,                       \
 576                                 .storagebits = 16,                    \
 577                                 .shift = 0 ,                          \
 578                                 .endianness = IIO_BE,                 \
 579                              },                                       \
 580         }
 581
 582 static const struct iio_chan_spec inv_mpu_channels[] = {
 583         IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
 584         /*
 585          * Note that temperature should only be via polled reading only,
 586          * not the final scan elements output.
 587          */
 588         {
 589                 .type = IIO_TEMP,
 590                 .info_mask_separate =  BIT(IIO_CHAN_INFO_RAW)
 591                                 | BIT(IIO_CHAN_INFO_OFFSET)
 592                                 | BIT(IIO_CHAN_INFO_SCALE),
 593                 .scan_index = -1,
 594         },
 595         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
 596         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
 597         INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
 598
 599         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
 600         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
 601         INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
 602 };
 603
 604 /* constant IIO attribute */
 605 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
 606 static IIO_CONST_ATTR(in_anglvel_scale_available,
 607                                           "0.000133090 0.000266181 0.000532362 0.001064724");
 608 static IIO_CONST_ATTR(in_accel_scale_available,
 609                                           "0.000598 0.001196 0.002392 0.004785");
 610 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
 611         inv_mpu6050_fifo_rate_store);
 612 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
 613         ATTR_GYRO_MATRIX);
 614 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
 615         ATTR_ACCL_MATRIX);
 616
 617 static struct attribute *inv_attributes[] = {
 618         &iio_dev_attr_in_gyro_matrix.dev_attr.attr,
 619         &iio_dev_attr_in_accel_matrix.dev_attr.attr,
 620         &iio_dev_attr_sampling_frequency.dev_attr.attr,
 621         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 622         &iio_const_attr_in_accel_scale_available.dev_attr.attr,
 623         &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
 624         NULL,
 625 };
 626
 627 static const struct attribute_group inv_attribute_group = {
 628         .attrs = inv_attributes
 629 };
 630
 631 static const struct iio_info mpu_info = {
 632         .driver_module = THIS_MODULE,
 633         .read_raw = &inv_mpu6050_read_raw,
 634         .write_raw = &inv_mpu6050_write_raw,
 635         .write_raw_get_fmt = &inv_write_raw_get_fmt,
 636         .attrs = &inv_attribute_group,
 637         .validate_trigger = inv_mpu6050_validate_trigger,
 638 };
 639
 640 /**
 641  *  inv_check_and_setup_chip() - check and setup chip.
 642  */
 643 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
 644 {
 645         int result;
 646
 647         st->chip_type = INV_MPU6050;
 648         st->hw  = &hw_info[st->chip_type];
 649         st->reg = hw_info[st->chip_type].reg;
 650
 651         /* reset to make sure previous state are not there */
 652         result = regmap_write(st->map, st->reg->pwr_mgmt_1,
 653                               INV_MPU6050_BIT_H_RESET);
 654         if (result)
 655                 return result;
 656         msleep(INV_MPU6050_POWER_UP_TIME);
 657         /* toggle power state. After reset, the sleep bit could be on
 658                 or off depending on the OTP settings. Toggling power would
 659                 make it in a definite state as well as making the hardware
 660                 state align with the software state */
 661         result = inv_mpu6050_set_power_itg(st, false);
 662         if (result)
 663                 return result;
 664         result = inv_mpu6050_set_power_itg(st, true);
 665         if (result)
 666                 return result;
 667
 668         result = inv_mpu6050_switch_engine(st, false,
 669                                         INV_MPU6050_BIT_PWR_ACCL_STBY);
 670         if (result)
 671                 return result;
 672         result = inv_mpu6050_switch_engine(st, false,
 673                                         INV_MPU6050_BIT_PWR_GYRO_STBY);
 674         if (result)
 675                 return result;
 676
 677         return 0;
 678 }
 679
 680 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
 681                        int (*inv_mpu_bus_setup)(struct iio_dev *))
 682 {
 683         struct inv_mpu6050_state *st;
 684         struct iio_dev *indio_dev;
 685         struct inv_mpu6050_platform_data *pdata;
 686         struct device *dev = regmap_get_device(regmap);
 687         int result;
 688
 689         indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
 690         if (!indio_dev)
 691                 return -ENOMEM;
 692
 693         st = iio_priv(indio_dev);
 694         st->powerup_count = 0;
 695         st->irq = irq;
 696         st->map = regmap;
 697         pdata = dev_get_platdata(dev);
 698         if (pdata)
 699                 st->plat_data = *pdata;
 700         /* power is turned on inside check chip type*/
 701         result = inv_check_and_setup_chip(st);
 702         if (result)
 703                 return result;
 704
 705         if (inv_mpu_bus_setup)
 706                 inv_mpu_bus_setup(indio_dev);
 707
 708         result = inv_mpu6050_init_config(indio_dev);
 709         if (result) {
 710                 dev_err(dev, "Could not initialize device.\n");
 711                 return result;
 712         }
 713
 714         dev_set_drvdata(dev, indio_dev);
 715         indio_dev->dev.parent = dev;
 716         /* name will be NULL when enumerated via ACPI */
 717         if (name)
 718                 indio_dev->name = name;
 719         else
 720                 indio_dev->name = dev_name(dev);
 721         indio_dev->channels = inv_mpu_channels;
 722         indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
 723
 724         indio_dev->info = &mpu_info;
 725         indio_dev->modes = INDIO_BUFFER_TRIGGERED;
 726
 727         result = iio_triggered_buffer_setup(indio_dev,
 728                                             inv_mpu6050_irq_handler,
 729                                             inv_mpu6050_read_fifo,
 730                                             NULL);
 731         if (result) {
 732                 dev_err(dev, "configure buffer fail %d\n", result);
 733                 return result;
 734         }
 735         result = inv_mpu6050_probe_trigger(indio_dev);
 736         if (result) {
 737                 dev_err(dev, "trigger probe fail %d\n", result);
 738                 goto out_unreg_ring;
 739         }
 740
 741         INIT_KFIFO(st->timestamps);
 742         spin_lock_init(&st->time_stamp_lock);
 743         result = iio_device_register(indio_dev);
 744         if (result) {
 745                 dev_err(dev, "IIO register fail %d\n", result);
 746                 goto out_remove_trigger;
 747         }
 748
 749         return 0;
 750
 751 out_remove_trigger:
 752         inv_mpu6050_remove_trigger(st);
 753 out_unreg_ring:
 754         iio_triggered_buffer_cleanup(indio_dev);
 755         return result;
 756 }
 757 EXPORT_SYMBOL_GPL(inv_mpu_core_probe);
 758
 759 int inv_mpu_core_remove(struct device  *dev)
 760 {
 761         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 762
 763         iio_device_unregister(indio_dev);
 764         inv_mpu6050_remove_trigger(iio_priv(indio_dev));
 765         iio_triggered_buffer_cleanup(indio_dev);
 766
 767         return 0;
 768 }
 769 EXPORT_SYMBOL_GPL(inv_mpu_core_remove);
 770
 771 #ifdef CONFIG_PM_SLEEP
 772
 773 static int inv_mpu_resume(struct device *dev)
 774 {
 775         return inv_mpu6050_set_power_itg(iio_priv(dev_get_drvdata(dev)), true);
 776 }
 777
 778 static int inv_mpu_suspend(struct device *dev)
 779 {
 780         return inv_mpu6050_set_power_itg(iio_priv(dev_get_drvdata(dev)), false);
 781 }
 782 #endif /* CONFIG_PM_SLEEP */
 783
 784 SIMPLE_DEV_PM_OPS(inv_mpu_pmops, inv_mpu_suspend, inv_mpu_resume);
 785 EXPORT_SYMBOL_GPL(inv_mpu_pmops);
 786
 787 MODULE_AUTHOR("Invensense Corporation");
 788 MODULE_DESCRIPTION("Invensense device MPU6050 driver");
 789 MODULE_LICENSE("GPL");