2 * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <rdma/ib_mad.h>
34 #include <rdma/ib_smi.h>
35 #include <rdma/ib_sa.h>
36 #include <rdma/ib_cache.h>
38 #include <linux/random.h>
39 #include <linux/mlx4/cmd.h>
40 #include <linux/gfp.h>
41 #include <rdma/ib_pma.h>
43 #include <linux/mlx4/driver.h>
47 MLX4_IB_VENDOR_CLASS1 = 0x9,
48 MLX4_IB_VENDOR_CLASS2 = 0xa
51 #define MLX4_TUN_SEND_WRID_SHIFT 34
52 #define MLX4_TUN_QPN_SHIFT 32
53 #define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
54 #define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
56 #define MLX4_TUN_IS_RECV(a) (((a) >> MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
57 #define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
59 /* Port mgmt change event handling */
61 #define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
62 #define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
63 #define NUM_IDX_IN_PKEY_TBL_BLK 32
64 #define GUID_TBL_ENTRY_SIZE 8 /* size in bytes */
65 #define GUID_TBL_BLK_NUM_ENTRIES 8
66 #define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
68 struct mlx4_mad_rcv_buf {
73 struct mlx4_mad_snd_buf {
77 struct mlx4_tunnel_mad {
79 struct mlx4_ib_tunnel_header hdr;
83 struct mlx4_rcv_tunnel_mad {
84 struct mlx4_rcv_tunnel_hdr hdr;
89 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num);
90 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num);
91 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
92 int block, u32 change_bitmap);
94 __be64 mlx4_ib_gen_node_guid(void)
96 #define NODE_GUID_HI ((u64) (((u64)IB_OPENIB_OUI) << 40))
97 return cpu_to_be64(NODE_GUID_HI | prandom_u32());
100 __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx)
102 return cpu_to_be64(atomic_inc_return(&ctx->tid)) |
103 cpu_to_be64(0xff00000000000000LL);
106 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
107 int port, const struct ib_wc *in_wc,
108 const struct ib_grh *in_grh,
109 const void *in_mad, void *response_mad)
111 struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
114 u32 in_modifier = port;
117 inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
118 if (IS_ERR(inmailbox))
119 return PTR_ERR(inmailbox);
120 inbox = inmailbox->buf;
122 outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
123 if (IS_ERR(outmailbox)) {
124 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
125 return PTR_ERR(outmailbox);
128 memcpy(inbox, in_mad, 256);
131 * Key check traps can't be generated unless we have in_wc to
132 * tell us where to send the trap.
134 if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_MKEY) || !in_wc)
136 if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_BKEY) || !in_wc)
138 if (mlx4_is_mfunc(dev->dev) &&
139 (mad_ifc_flags & MLX4_MAD_IFC_NET_VIEW || in_wc))
155 memset(inbox + 256, 0, 256);
156 ext_info = inbox + 256;
158 ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
159 ext_info->rqpn = cpu_to_be32(in_wc->src_qp);
160 ext_info->sl = in_wc->sl << 4;
161 ext_info->g_path = in_wc->dlid_path_bits |
162 (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
163 ext_info->pkey = cpu_to_be16(in_wc->pkey_index);
166 memcpy(ext_info->grh, in_grh, 40);
170 in_modifier |= in_wc->slid << 16;
173 err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma, in_modifier,
174 mlx4_is_master(dev->dev) ? (op_modifier & ~0x8) : op_modifier,
175 MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
176 (op_modifier & 0x8) ? MLX4_CMD_NATIVE : MLX4_CMD_WRAPPED);
179 memcpy(response_mad, outmailbox->buf, 256);
181 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
182 mlx4_free_cmd_mailbox(dev->dev, outmailbox);
187 static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
189 struct ib_ah *new_ah;
190 struct ib_ah_attr ah_attr;
193 if (!dev->send_agent[port_num - 1][0])
196 memset(&ah_attr, 0, sizeof ah_attr);
199 ah_attr.port_num = port_num;
201 new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
206 spin_lock_irqsave(&dev->sm_lock, flags);
207 if (dev->sm_ah[port_num - 1])
208 ib_destroy_ah(dev->sm_ah[port_num - 1]);
209 dev->sm_ah[port_num - 1] = new_ah;
210 spin_unlock_irqrestore(&dev->sm_lock, flags);
214 * Snoop SM MADs for port info, GUID info, and P_Key table sets, so we can
215 * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
217 static void smp_snoop(struct ib_device *ibdev, u8 port_num, const struct ib_mad *mad,
220 struct ib_port_info *pinfo;
223 u32 bn, pkey_change_bitmap;
227 struct mlx4_ib_dev *dev = to_mdev(ibdev);
228 if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
229 mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
230 mad->mad_hdr.method == IB_MGMT_METHOD_SET)
231 switch (mad->mad_hdr.attr_id) {
232 case IB_SMP_ATTR_PORT_INFO:
233 pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
234 lid = be16_to_cpu(pinfo->lid);
236 update_sm_ah(dev, port_num,
237 be16_to_cpu(pinfo->sm_lid),
238 pinfo->neighbormtu_mastersmsl & 0xf);
240 if (pinfo->clientrereg_resv_subnetto & 0x80)
241 handle_client_rereg_event(dev, port_num);
244 handle_lid_change_event(dev, port_num);
247 case IB_SMP_ATTR_PKEY_TABLE:
248 if (!mlx4_is_mfunc(dev->dev)) {
249 mlx4_ib_dispatch_event(dev, port_num,
250 IB_EVENT_PKEY_CHANGE);
254 /* at this point, we are running in the master.
255 * Slaves do not receive SMPs.
257 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod) & 0xFFFF;
258 base = (__be16 *) &(((struct ib_smp *)mad)->data[0]);
259 pkey_change_bitmap = 0;
260 for (i = 0; i < 32; i++) {
261 pr_debug("PKEY[%d] = x%x\n",
262 i + bn*32, be16_to_cpu(base[i]));
263 if (be16_to_cpu(base[i]) !=
264 dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32]) {
265 pkey_change_bitmap |= (1 << i);
266 dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32] =
267 be16_to_cpu(base[i]);
270 pr_debug("PKEY Change event: port=%d, "
271 "block=0x%x, change_bitmap=0x%x\n",
272 port_num, bn, pkey_change_bitmap);
274 if (pkey_change_bitmap) {
275 mlx4_ib_dispatch_event(dev, port_num,
276 IB_EVENT_PKEY_CHANGE);
277 if (!dev->sriov.is_going_down)
278 __propagate_pkey_ev(dev, port_num, bn,
283 case IB_SMP_ATTR_GUID_INFO:
284 /* paravirtualized master's guid is guid 0 -- does not change */
285 if (!mlx4_is_master(dev->dev))
286 mlx4_ib_dispatch_event(dev, port_num,
287 IB_EVENT_GID_CHANGE);
288 /*if master, notify relevant slaves*/
289 if (mlx4_is_master(dev->dev) &&
290 !dev->sriov.is_going_down) {
291 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod);
292 mlx4_ib_update_cache_on_guid_change(dev, bn, port_num,
293 (u8 *)(&((struct ib_smp *)mad)->data));
294 mlx4_ib_notify_slaves_on_guid_change(dev, bn, port_num,
295 (u8 *)(&((struct ib_smp *)mad)->data));
304 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
305 int block, u32 change_bitmap)
307 int i, ix, slave, err;
310 for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) {
311 if (slave == mlx4_master_func_num(dev->dev))
313 if (!mlx4_is_slave_active(dev->dev, slave))
317 for (i = 0; i < 32; i++) {
318 if (!(change_bitmap & (1 << i)))
321 ix < dev->dev->caps.pkey_table_len[port_num]; ix++) {
322 if (dev->pkeys.virt2phys_pkey[slave][port_num - 1]
323 [ix] == i + 32 * block) {
324 err = mlx4_gen_pkey_eqe(dev->dev, slave, port_num);
325 pr_debug("propagate_pkey_ev: slave %d,"
326 " port %d, ix %d (%d)\n",
327 slave, port_num, ix, err);
338 static void node_desc_override(struct ib_device *dev,
343 if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
344 mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
345 mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
346 mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
347 spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
348 memcpy(((struct ib_smp *) mad)->data, dev->node_desc, 64);
349 spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
353 static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, const struct ib_mad *mad)
355 int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
356 struct ib_mad_send_buf *send_buf;
357 struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
362 send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
363 IB_MGMT_MAD_DATA, GFP_ATOMIC,
364 IB_MGMT_BASE_VERSION);
365 if (IS_ERR(send_buf))
368 * We rely here on the fact that MLX QPs don't use the
369 * address handle after the send is posted (this is
370 * wrong following the IB spec strictly, but we know
371 * it's OK for our devices).
373 spin_lock_irqsave(&dev->sm_lock, flags);
374 memcpy(send_buf->mad, mad, sizeof *mad);
375 if ((send_buf->ah = dev->sm_ah[port_num - 1]))
376 ret = ib_post_send_mad(send_buf, NULL);
379 spin_unlock_irqrestore(&dev->sm_lock, flags);
382 ib_free_send_mad(send_buf);
386 static int mlx4_ib_demux_sa_handler(struct ib_device *ibdev, int port, int slave,
387 struct ib_sa_mad *sa_mad)
391 /* dispatch to different sa handlers */
392 switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
393 case IB_SA_ATTR_MC_MEMBER_REC:
394 ret = mlx4_ib_mcg_demux_handler(ibdev, port, slave, sa_mad);
402 int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid)
404 struct mlx4_ib_dev *dev = to_mdev(ibdev);
407 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
408 if (dev->sriov.demux[port - 1].guid_cache[i] == guid)
415 static int find_slave_port_pkey_ix(struct mlx4_ib_dev *dev, int slave,
416 u8 port, u16 pkey, u16 *ix)
419 u8 unassigned_pkey_ix, pkey_ix, partial_ix = 0xFF;
422 if (slave == mlx4_master_func_num(dev->dev))
423 return ib_find_cached_pkey(&dev->ib_dev, port, pkey, ix);
425 unassigned_pkey_ix = dev->dev->phys_caps.pkey_phys_table_len[port] - 1;
427 for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) {
428 if (dev->pkeys.virt2phys_pkey[slave][port - 1][i] == unassigned_pkey_ix)
431 pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][i];
433 ret = ib_get_cached_pkey(&dev->ib_dev, port, pkey_ix, &slot_pkey);
436 if ((slot_pkey & 0x7FFF) == (pkey & 0x7FFF)) {
437 if (slot_pkey & 0x8000) {
441 /* take first partial pkey index found */
442 if (partial_ix == 0xFF)
443 partial_ix = pkey_ix;
448 if (partial_ix < 0xFF) {
449 *ix = (u16) partial_ix;
456 int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
457 enum ib_qp_type dest_qpt, struct ib_wc *wc,
458 struct ib_grh *grh, struct ib_mad *mad)
462 struct ib_send_wr *bad_wr;
463 struct mlx4_ib_demux_pv_ctx *tun_ctx;
464 struct mlx4_ib_demux_pv_qp *tun_qp;
465 struct mlx4_rcv_tunnel_mad *tun_mad;
466 struct ib_ah_attr attr;
468 struct ib_qp *src_qp = NULL;
469 unsigned tun_tx_ix = 0;
474 u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
476 if (dest_qpt > IB_QPT_GSI)
479 tun_ctx = dev->sriov.demux[port-1].tun[slave];
481 /* check if proxy qp created */
482 if (!tun_ctx || tun_ctx->state != DEMUX_PV_STATE_ACTIVE)
486 tun_qp = &tun_ctx->qp[0];
488 tun_qp = &tun_ctx->qp[1];
490 /* compute P_Key index to put in tunnel header for slave */
493 ret = ib_get_cached_pkey(&dev->ib_dev, port, wc->pkey_index, &cached_pkey);
497 ret = find_slave_port_pkey_ix(dev, slave, port, cached_pkey, &pkey_ix);
500 tun_pkey_ix = pkey_ix;
502 tun_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
504 dqpn = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave + port + (dest_qpt * 2) - 1;
506 /* get tunnel tx data buf for slave */
509 /* create ah. Just need an empty one with the port num for the post send.
510 * The driver will set the force loopback bit in post_send */
511 memset(&attr, 0, sizeof attr);
512 attr.port_num = port;
514 memcpy(&attr.grh.dgid.raw[0], &grh->dgid.raw[0], 16);
515 attr.ah_flags = IB_AH_GRH;
517 ah = ib_create_ah(tun_ctx->pd, &attr);
521 /* allocate tunnel tx buf after pass failure returns */
522 spin_lock(&tun_qp->tx_lock);
523 if (tun_qp->tx_ix_head - tun_qp->tx_ix_tail >=
524 (MLX4_NUM_TUNNEL_BUFS - 1))
527 tun_tx_ix = (++tun_qp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
528 spin_unlock(&tun_qp->tx_lock);
532 tun_mad = (struct mlx4_rcv_tunnel_mad *) (tun_qp->tx_ring[tun_tx_ix].buf.addr);
533 if (tun_qp->tx_ring[tun_tx_ix].ah)
534 ib_destroy_ah(tun_qp->tx_ring[tun_tx_ix].ah);
535 tun_qp->tx_ring[tun_tx_ix].ah = ah;
536 ib_dma_sync_single_for_cpu(&dev->ib_dev,
537 tun_qp->tx_ring[tun_tx_ix].buf.map,
538 sizeof (struct mlx4_rcv_tunnel_mad),
541 /* copy over to tunnel buffer */
543 memcpy(&tun_mad->grh, grh, sizeof *grh);
544 memcpy(&tun_mad->mad, mad, sizeof *mad);
546 /* adjust tunnel data */
547 tun_mad->hdr.pkey_index = cpu_to_be16(tun_pkey_ix);
548 tun_mad->hdr.flags_src_qp = cpu_to_be32(wc->src_qp & 0xFFFFFF);
549 tun_mad->hdr.g_ml_path = (grh && (wc->wc_flags & IB_WC_GRH)) ? 0x80 : 0;
553 if (mlx4_get_slave_default_vlan(dev->dev, port, slave, &vlan,
556 if (vlan != wc->vlan_id)
557 /* Packet vlan is not the VST-assigned vlan.
562 /* Remove the vlan tag before forwarding
563 * the packet to the VF.
570 tun_mad->hdr.sl_vid = cpu_to_be16(vlan);
571 memcpy((char *)&tun_mad->hdr.mac_31_0, &(wc->smac[0]), 4);
572 memcpy((char *)&tun_mad->hdr.slid_mac_47_32, &(wc->smac[4]), 2);
574 tun_mad->hdr.sl_vid = cpu_to_be16(((u16)(wc->sl)) << 12);
575 tun_mad->hdr.slid_mac_47_32 = cpu_to_be16(wc->slid);
578 ib_dma_sync_single_for_device(&dev->ib_dev,
579 tun_qp->tx_ring[tun_tx_ix].buf.map,
580 sizeof (struct mlx4_rcv_tunnel_mad),
583 list.addr = tun_qp->tx_ring[tun_tx_ix].buf.map;
584 list.length = sizeof (struct mlx4_rcv_tunnel_mad);
585 list.lkey = tun_ctx->pd->local_dma_lkey;
589 wr.remote_qkey = IB_QP_SET_QKEY;
590 wr.remote_qpn = dqpn;
592 wr.wr.wr_id = ((u64) tun_tx_ix) | MLX4_TUN_SET_WRID_QPN(dest_qpt);
593 wr.wr.sg_list = &list;
595 wr.wr.opcode = IB_WR_SEND;
596 wr.wr.send_flags = IB_SEND_SIGNALED;
598 ret = ib_post_send(src_qp, &wr.wr, &bad_wr);
605 static int mlx4_ib_demux_mad(struct ib_device *ibdev, u8 port,
606 struct ib_wc *wc, struct ib_grh *grh,
609 struct mlx4_ib_dev *dev = to_mdev(ibdev);
615 if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
621 if (!(wc->wc_flags & IB_WC_GRH)) {
622 mlx4_ib_warn(ibdev, "RoCE grh not present.\n");
625 if (mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_CM) {
626 mlx4_ib_warn(ibdev, "RoCE mgmt class is not CM\n");
629 err = mlx4_get_slave_from_roce_gid(dev->dev, port, grh->dgid.raw, &slave);
630 if (err && mlx4_is_mf_bonded(dev->dev)) {
631 other_port = (port == 1) ? 2 : 1;
632 err = mlx4_get_slave_from_roce_gid(dev->dev, other_port, grh->dgid.raw, &slave);
635 pr_debug("resolved slave %d from gid %pI6 wire port %d other %d\n",
636 slave, grh->dgid.raw, port, other_port);
640 mlx4_ib_warn(ibdev, "failed matching grh\n");
643 if (slave >= dev->dev->caps.sqp_demux) {
644 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
645 slave, dev->dev->caps.sqp_demux);
649 if (mlx4_ib_demux_cm_handler(ibdev, port, NULL, mad))
652 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
654 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
659 /* Initially assume that this mad is for us */
660 slave = mlx4_master_func_num(dev->dev);
662 /* See if the slave id is encoded in a response mad */
663 if (mad->mad_hdr.method & 0x80) {
664 slave_id = (u8 *) &mad->mad_hdr.tid;
666 if (slave != 255) /*255 indicates the dom0*/
667 *slave_id = 0; /* remap tid */
670 /* If a grh is present, we demux according to it */
671 if (wc->wc_flags & IB_WC_GRH) {
672 slave = mlx4_ib_find_real_gid(ibdev, port, grh->dgid.global.interface_id);
674 mlx4_ib_warn(ibdev, "failed matching grh\n");
678 /* Class-specific handling */
679 switch (mad->mad_hdr.mgmt_class) {
680 case IB_MGMT_CLASS_SUBN_LID_ROUTED:
681 case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
682 /* 255 indicates the dom0 */
683 if (slave != 255 && slave != mlx4_master_func_num(dev->dev)) {
684 if (!mlx4_vf_smi_enabled(dev->dev, slave, port))
686 /* for a VF. drop unsolicited MADs */
687 if (!(mad->mad_hdr.method & IB_MGMT_METHOD_RESP)) {
688 mlx4_ib_warn(ibdev, "demux QP0. rejecting unsolicited mad for slave %d class 0x%x, method 0x%x\n",
689 slave, mad->mad_hdr.mgmt_class,
690 mad->mad_hdr.method);
695 case IB_MGMT_CLASS_SUBN_ADM:
696 if (mlx4_ib_demux_sa_handler(ibdev, port, slave,
697 (struct ib_sa_mad *) mad))
700 case IB_MGMT_CLASS_CM:
701 if (mlx4_ib_demux_cm_handler(ibdev, port, &slave, mad))
704 case IB_MGMT_CLASS_DEVICE_MGMT:
705 if (mad->mad_hdr.method != IB_MGMT_METHOD_GET_RESP)
709 /* Drop unsupported classes for slaves in tunnel mode */
710 if (slave != mlx4_master_func_num(dev->dev)) {
711 pr_debug("dropping unsupported ingress mad from class:%d "
712 "for slave:%d\n", mad->mad_hdr.mgmt_class, slave);
716 /*make sure that no slave==255 was not handled yet.*/
717 if (slave >= dev->dev->caps.sqp_demux) {
718 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
719 slave, dev->dev->caps.sqp_demux);
723 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
725 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
730 static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
731 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
732 const struct ib_mad *in_mad, struct ib_mad *out_mad)
734 u16 slid, prev_lid = 0;
736 struct ib_port_attr pattr;
738 if (in_wc && in_wc->qp->qp_num) {
739 pr_debug("received MAD: slid:%d sqpn:%d "
740 "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
741 in_wc->slid, in_wc->src_qp,
742 in_wc->dlid_path_bits,
745 in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
746 be16_to_cpu(in_mad->mad_hdr.attr_id));
747 if (in_wc->wc_flags & IB_WC_GRH) {
748 pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
749 be64_to_cpu(in_grh->sgid.global.subnet_prefix),
750 be64_to_cpu(in_grh->sgid.global.interface_id));
751 pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
752 be64_to_cpu(in_grh->dgid.global.subnet_prefix),
753 be64_to_cpu(in_grh->dgid.global.interface_id));
757 slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
759 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
760 forward_trap(to_mdev(ibdev), port_num, in_mad);
761 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
764 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
765 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
766 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
767 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET &&
768 in_mad->mad_hdr.method != IB_MGMT_METHOD_TRAP_REPRESS)
769 return IB_MAD_RESULT_SUCCESS;
772 * Don't process SMInfo queries -- the SMA can't handle them.
774 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
775 return IB_MAD_RESULT_SUCCESS;
776 } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
777 in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1 ||
778 in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2 ||
779 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
780 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
781 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET)
782 return IB_MAD_RESULT_SUCCESS;
784 return IB_MAD_RESULT_SUCCESS;
786 if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
787 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
788 in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
789 in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
790 !ib_query_port(ibdev, port_num, &pattr))
791 prev_lid = pattr.lid;
793 err = mlx4_MAD_IFC(to_mdev(ibdev),
794 (mad_flags & IB_MAD_IGNORE_MKEY ? MLX4_MAD_IFC_IGNORE_MKEY : 0) |
795 (mad_flags & IB_MAD_IGNORE_BKEY ? MLX4_MAD_IFC_IGNORE_BKEY : 0) |
796 MLX4_MAD_IFC_NET_VIEW,
797 port_num, in_wc, in_grh, in_mad, out_mad);
799 return IB_MAD_RESULT_FAILURE;
801 if (!out_mad->mad_hdr.status) {
802 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV))
803 smp_snoop(ibdev, port_num, in_mad, prev_lid);
804 /* slaves get node desc from FW */
805 if (!mlx4_is_slave(to_mdev(ibdev)->dev))
806 node_desc_override(ibdev, out_mad);
809 /* set return bit in status of directed route responses */
810 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
811 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
813 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
814 /* no response for trap repress */
815 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
817 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
820 static void edit_counter(struct mlx4_counter *cnt,
821 struct ib_pma_portcounters *pma_cnt)
823 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
824 (be64_to_cpu(cnt->tx_bytes) >> 2));
825 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
826 (be64_to_cpu(cnt->rx_bytes) >> 2));
827 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
828 be64_to_cpu(cnt->tx_frames));
829 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
830 be64_to_cpu(cnt->rx_frames));
833 static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
834 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
835 const struct ib_mad *in_mad, struct ib_mad *out_mad)
837 struct mlx4_counter counter_stats;
838 struct mlx4_ib_dev *dev = to_mdev(ibdev);
839 struct counter_index *tmp_counter;
840 int err = IB_MAD_RESULT_FAILURE, stats_avail = 0;
842 if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
845 memset(&counter_stats, 0, sizeof(counter_stats));
846 mutex_lock(&dev->counters_table[port_num - 1].mutex);
847 list_for_each_entry(tmp_counter,
848 &dev->counters_table[port_num - 1].counters_list,
850 err = mlx4_get_counter_stats(dev->dev,
854 err = IB_MAD_RESULT_FAILURE;
860 mutex_unlock(&dev->counters_table[port_num - 1].mutex);
862 memset(out_mad->data, 0, sizeof out_mad->data);
863 switch (counter_stats.counter_mode & 0xf) {
865 edit_counter(&counter_stats,
866 (void *)(out_mad->data + 40));
867 err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
870 err = IB_MAD_RESULT_FAILURE;
877 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
878 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
879 const struct ib_mad_hdr *in, size_t in_mad_size,
880 struct ib_mad_hdr *out, size_t *out_mad_size,
881 u16 *out_mad_pkey_index)
883 struct mlx4_ib_dev *dev = to_mdev(ibdev);
884 const struct ib_mad *in_mad = (const struct ib_mad *)in;
885 struct ib_mad *out_mad = (struct ib_mad *)out;
886 enum rdma_link_layer link = rdma_port_get_link_layer(ibdev, port_num);
888 if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
889 *out_mad_size != sizeof(*out_mad)))
890 return IB_MAD_RESULT_FAILURE;
892 /* iboe_process_mad() which uses the HCA flow-counters to implement IB PMA
893 * queries, should be called only by VFs and for that specific purpose
895 if (link == IB_LINK_LAYER_INFINIBAND) {
896 if (mlx4_is_slave(dev->dev) &&
897 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
898 in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS)
899 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
900 in_grh, in_mad, out_mad);
902 return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
903 in_grh, in_mad, out_mad);
906 if (link == IB_LINK_LAYER_ETHERNET)
907 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
908 in_grh, in_mad, out_mad);
913 static void send_handler(struct ib_mad_agent *agent,
914 struct ib_mad_send_wc *mad_send_wc)
916 if (mad_send_wc->send_buf->context[0])
917 ib_destroy_ah(mad_send_wc->send_buf->context[0]);
918 ib_free_send_mad(mad_send_wc->send_buf);
921 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
923 struct ib_mad_agent *agent;
926 enum rdma_link_layer ll;
928 for (p = 0; p < dev->num_ports; ++p) {
929 ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
930 for (q = 0; q <= 1; ++q) {
931 if (ll == IB_LINK_LAYER_INFINIBAND) {
932 agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
933 q ? IB_QPT_GSI : IB_QPT_SMI,
934 NULL, 0, send_handler,
937 ret = PTR_ERR(agent);
940 dev->send_agent[p][q] = agent;
942 dev->send_agent[p][q] = NULL;
949 for (p = 0; p < dev->num_ports; ++p)
950 for (q = 0; q <= 1; ++q)
951 if (dev->send_agent[p][q])
952 ib_unregister_mad_agent(dev->send_agent[p][q]);
957 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
959 struct ib_mad_agent *agent;
962 for (p = 0; p < dev->num_ports; ++p) {
963 for (q = 0; q <= 1; ++q) {
964 agent = dev->send_agent[p][q];
966 dev->send_agent[p][q] = NULL;
967 ib_unregister_mad_agent(agent);
972 ib_destroy_ah(dev->sm_ah[p]);
976 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num)
978 mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_LID_CHANGE);
980 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
981 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
982 MLX4_EQ_PORT_INFO_LID_CHANGE_MASK);
985 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num)
987 /* re-configure the alias-guid and mcg's */
988 if (mlx4_is_master(dev->dev)) {
989 mlx4_ib_invalidate_all_guid_record(dev, port_num);
991 if (!dev->sriov.is_going_down) {
992 mlx4_ib_mcg_port_cleanup(&dev->sriov.demux[port_num - 1], 0);
993 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
994 MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK);
997 mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_CLIENT_REREGISTER);
1000 static void propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
1001 struct mlx4_eqe *eqe)
1003 __propagate_pkey_ev(dev, port_num, GET_BLK_PTR_FROM_EQE(eqe),
1004 GET_MASK_FROM_EQE(eqe));
1007 static void handle_slaves_guid_change(struct mlx4_ib_dev *dev, u8 port_num,
1008 u32 guid_tbl_blk_num, u32 change_bitmap)
1010 struct ib_smp *in_mad = NULL;
1011 struct ib_smp *out_mad = NULL;
1014 if (!mlx4_is_mfunc(dev->dev) || !mlx4_is_master(dev->dev))
1017 in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
1018 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1019 if (!in_mad || !out_mad) {
1020 mlx4_ib_warn(&dev->ib_dev, "failed to allocate memory for guid info mads\n");
1024 guid_tbl_blk_num *= 4;
1026 for (i = 0; i < 4; i++) {
1027 if (change_bitmap && (!((change_bitmap >> (8 * i)) & 0xff)))
1029 memset(in_mad, 0, sizeof *in_mad);
1030 memset(out_mad, 0, sizeof *out_mad);
1032 in_mad->base_version = 1;
1033 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
1034 in_mad->class_version = 1;
1035 in_mad->method = IB_MGMT_METHOD_GET;
1036 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
1037 in_mad->attr_mod = cpu_to_be32(guid_tbl_blk_num + i);
1039 if (mlx4_MAD_IFC(dev,
1040 MLX4_MAD_IFC_IGNORE_KEYS | MLX4_MAD_IFC_NET_VIEW,
1041 port_num, NULL, NULL, in_mad, out_mad)) {
1042 mlx4_ib_warn(&dev->ib_dev, "Failed in get GUID INFO MAD_IFC\n");
1046 mlx4_ib_update_cache_on_guid_change(dev, guid_tbl_blk_num + i,
1048 (u8 *)(&((struct ib_smp *)out_mad)->data));
1049 mlx4_ib_notify_slaves_on_guid_change(dev, guid_tbl_blk_num + i,
1051 (u8 *)(&((struct ib_smp *)out_mad)->data));
1060 void handle_port_mgmt_change_event(struct work_struct *work)
1062 struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
1063 struct mlx4_ib_dev *dev = ew->ib_dev;
1064 struct mlx4_eqe *eqe = &(ew->ib_eqe);
1065 u8 port = eqe->event.port_mgmt_change.port;
1070 switch (eqe->subtype) {
1071 case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
1072 changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
1074 /* Update the SM ah - This should be done before handling
1075 the other changed attributes so that MADs can be sent to the SM */
1076 if (changed_attr & MSTR_SM_CHANGE_MASK) {
1077 u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
1078 u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
1079 update_sm_ah(dev, port, lid, sl);
1082 /* Check if it is a lid change event */
1083 if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
1084 handle_lid_change_event(dev, port);
1086 /* Generate GUID changed event */
1087 if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
1088 mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1089 /*if master, notify all slaves*/
1090 if (mlx4_is_master(dev->dev))
1091 mlx4_gen_slaves_port_mgt_ev(dev->dev, port,
1092 MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK);
1095 if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
1096 handle_client_rereg_event(dev, port);
1099 case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
1100 mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
1101 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1102 propagate_pkey_ev(dev, port, eqe);
1104 case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
1105 /* paravirtualized master's guid is guid 0 -- does not change */
1106 if (!mlx4_is_master(dev->dev))
1107 mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1108 /*if master, notify relevant slaves*/
1109 else if (!dev->sriov.is_going_down) {
1110 tbl_block = GET_BLK_PTR_FROM_EQE(eqe);
1111 change_bitmap = GET_MASK_FROM_EQE(eqe);
1112 handle_slaves_guid_change(dev, port, tbl_block, change_bitmap);
1116 pr_warn("Unsupported subtype 0x%x for "
1117 "Port Management Change event\n", eqe->subtype);
1123 void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
1124 enum ib_event_type type)
1126 struct ib_event event;
1128 event.device = &dev->ib_dev;
1129 event.element.port_num = port_num;
1132 ib_dispatch_event(&event);
1135 static void mlx4_ib_tunnel_comp_handler(struct ib_cq *cq, void *arg)
1137 unsigned long flags;
1138 struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1139 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1140 spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1141 if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1142 queue_work(ctx->wq, &ctx->work);
1143 spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1146 static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx *ctx,
1147 struct mlx4_ib_demux_pv_qp *tun_qp,
1150 struct ib_sge sg_list;
1151 struct ib_recv_wr recv_wr, *bad_recv_wr;
1154 size = (tun_qp->qp->qp_type == IB_QPT_UD) ?
1155 sizeof (struct mlx4_tunnel_mad) : sizeof (struct mlx4_mad_rcv_buf);
1157 sg_list.addr = tun_qp->ring[index].map;
1158 sg_list.length = size;
1159 sg_list.lkey = ctx->pd->local_dma_lkey;
1161 recv_wr.next = NULL;
1162 recv_wr.sg_list = &sg_list;
1163 recv_wr.num_sge = 1;
1164 recv_wr.wr_id = (u64) index | MLX4_TUN_WRID_RECV |
1165 MLX4_TUN_SET_WRID_QPN(tun_qp->proxy_qpt);
1166 ib_dma_sync_single_for_device(ctx->ib_dev, tun_qp->ring[index].map,
1167 size, DMA_FROM_DEVICE);
1168 return ib_post_recv(tun_qp->qp, &recv_wr, &bad_recv_wr);
1171 static int mlx4_ib_multiplex_sa_handler(struct ib_device *ibdev, int port,
1172 int slave, struct ib_sa_mad *sa_mad)
1176 /* dispatch to different sa handlers */
1177 switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
1178 case IB_SA_ATTR_MC_MEMBER_REC:
1179 ret = mlx4_ib_mcg_multiplex_handler(ibdev, port, slave, sa_mad);
1187 static int is_proxy_qp0(struct mlx4_ib_dev *dev, int qpn, int slave)
1189 int proxy_start = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave;
1191 return (qpn >= proxy_start && qpn <= proxy_start + 1);
1195 int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
1196 enum ib_qp_type dest_qpt, u16 pkey_index,
1197 u32 remote_qpn, u32 qkey, struct ib_ah_attr *attr,
1198 u8 *s_mac, u16 vlan_id, struct ib_mad *mad)
1202 struct ib_send_wr *bad_wr;
1203 struct mlx4_ib_demux_pv_ctx *sqp_ctx;
1204 struct mlx4_ib_demux_pv_qp *sqp;
1205 struct mlx4_mad_snd_buf *sqp_mad;
1207 struct ib_qp *send_qp = NULL;
1208 unsigned wire_tx_ix = 0;
1215 sqp_ctx = dev->sriov.sqps[port-1];
1217 /* check if proxy qp created */
1218 if (!sqp_ctx || sqp_ctx->state != DEMUX_PV_STATE_ACTIVE)
1221 if (dest_qpt == IB_QPT_SMI) {
1223 sqp = &sqp_ctx->qp[0];
1224 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
1227 sqp = &sqp_ctx->qp[1];
1228 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][pkey_index];
1234 sgid_index = attr->grh.sgid_index;
1235 attr->grh.sgid_index = 0;
1236 ah = ib_create_ah(sqp_ctx->pd, attr);
1239 attr->grh.sgid_index = sgid_index;
1240 to_mah(ah)->av.ib.gid_index = sgid_index;
1241 /* get rid of force-loopback bit */
1242 to_mah(ah)->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
1243 spin_lock(&sqp->tx_lock);
1244 if (sqp->tx_ix_head - sqp->tx_ix_tail >=
1245 (MLX4_NUM_TUNNEL_BUFS - 1))
1248 wire_tx_ix = (++sqp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
1249 spin_unlock(&sqp->tx_lock);
1253 sqp_mad = (struct mlx4_mad_snd_buf *) (sqp->tx_ring[wire_tx_ix].buf.addr);
1254 if (sqp->tx_ring[wire_tx_ix].ah)
1255 ib_destroy_ah(sqp->tx_ring[wire_tx_ix].ah);
1256 sqp->tx_ring[wire_tx_ix].ah = ah;
1257 ib_dma_sync_single_for_cpu(&dev->ib_dev,
1258 sqp->tx_ring[wire_tx_ix].buf.map,
1259 sizeof (struct mlx4_mad_snd_buf),
1262 memcpy(&sqp_mad->payload, mad, sizeof *mad);
1264 ib_dma_sync_single_for_device(&dev->ib_dev,
1265 sqp->tx_ring[wire_tx_ix].buf.map,
1266 sizeof (struct mlx4_mad_snd_buf),
1269 list.addr = sqp->tx_ring[wire_tx_ix].buf.map;
1270 list.length = sizeof (struct mlx4_mad_snd_buf);
1271 list.lkey = sqp_ctx->pd->local_dma_lkey;
1275 wr.pkey_index = wire_pkey_ix;
1276 wr.remote_qkey = qkey;
1277 wr.remote_qpn = remote_qpn;
1279 wr.wr.wr_id = ((u64) wire_tx_ix) | MLX4_TUN_SET_WRID_QPN(src_qpnum);
1280 wr.wr.sg_list = &list;
1282 wr.wr.opcode = IB_WR_SEND;
1283 wr.wr.send_flags = IB_SEND_SIGNALED;
1285 memcpy(to_mah(ah)->av.eth.s_mac, s_mac, 6);
1286 if (vlan_id < 0x1000)
1287 vlan_id |= (attr->sl & 7) << 13;
1288 to_mah(ah)->av.eth.vlan = cpu_to_be16(vlan_id);
1291 ret = ib_post_send(send_qp, &wr.wr, &bad_wr);
1298 static int get_slave_base_gid_ix(struct mlx4_ib_dev *dev, int slave, int port)
1300 if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1302 return mlx4_get_base_gid_ix(dev->dev, slave, port);
1305 static void fill_in_real_sgid_index(struct mlx4_ib_dev *dev, int slave, int port,
1306 struct ib_ah_attr *ah_attr)
1308 if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1309 ah_attr->grh.sgid_index = slave;
1311 ah_attr->grh.sgid_index += get_slave_base_gid_ix(dev, slave, port);
1314 static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc *wc)
1316 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1317 struct mlx4_ib_demux_pv_qp *tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc->wr_id)];
1318 int wr_ix = wc->wr_id & (MLX4_NUM_TUNNEL_BUFS - 1);
1319 struct mlx4_tunnel_mad *tunnel = tun_qp->ring[wr_ix].addr;
1320 struct mlx4_ib_ah ah;
1321 struct ib_ah_attr ah_attr;
1327 /* Get slave that sent this packet */
1328 if (wc->src_qp < dev->dev->phys_caps.base_proxy_sqpn ||
1329 wc->src_qp >= dev->dev->phys_caps.base_proxy_sqpn + 8 * MLX4_MFUNC_MAX ||
1330 (wc->src_qp & 0x1) != ctx->port - 1 ||
1332 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d\n", wc->src_qp);
1335 slave = ((wc->src_qp & ~0x7) - dev->dev->phys_caps.base_proxy_sqpn) / 8;
1336 if (slave != ctx->slave) {
1337 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1338 "belongs to another slave\n", wc->src_qp);
1342 /* Map transaction ID */
1343 ib_dma_sync_single_for_cpu(ctx->ib_dev, tun_qp->ring[wr_ix].map,
1344 sizeof (struct mlx4_tunnel_mad),
1346 switch (tunnel->mad.mad_hdr.method) {
1347 case IB_MGMT_METHOD_SET:
1348 case IB_MGMT_METHOD_GET:
1349 case IB_MGMT_METHOD_REPORT:
1350 case IB_SA_METHOD_GET_TABLE:
1351 case IB_SA_METHOD_DELETE:
1352 case IB_SA_METHOD_GET_MULTI:
1353 case IB_SA_METHOD_GET_TRACE_TBL:
1354 slave_id = (u8 *) &tunnel->mad.mad_hdr.tid;
1356 mlx4_ib_warn(ctx->ib_dev, "egress mad has non-null tid msb:%d "
1357 "class:%d slave:%d\n", *slave_id,
1358 tunnel->mad.mad_hdr.mgmt_class, slave);
1366 /* Class-specific handling */
1367 switch (tunnel->mad.mad_hdr.mgmt_class) {
1368 case IB_MGMT_CLASS_SUBN_LID_ROUTED:
1369 case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
1370 if (slave != mlx4_master_func_num(dev->dev) &&
1371 !mlx4_vf_smi_enabled(dev->dev, slave, ctx->port))
1374 case IB_MGMT_CLASS_SUBN_ADM:
1375 if (mlx4_ib_multiplex_sa_handler(ctx->ib_dev, ctx->port, slave,
1376 (struct ib_sa_mad *) &tunnel->mad))
1379 case IB_MGMT_CLASS_CM:
1380 if (mlx4_ib_multiplex_cm_handler(ctx->ib_dev, ctx->port, slave,
1381 (struct ib_mad *) &tunnel->mad))
1384 case IB_MGMT_CLASS_DEVICE_MGMT:
1385 if (tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_GET &&
1386 tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_SET)
1390 /* Drop unsupported classes for slaves in tunnel mode */
1391 if (slave != mlx4_master_func_num(dev->dev)) {
1392 mlx4_ib_warn(ctx->ib_dev, "dropping unsupported egress mad from class:%d "
1393 "for slave:%d\n", tunnel->mad.mad_hdr.mgmt_class, slave);
1398 /* We are using standard ib_core services to send the mad, so generate a
1399 * stadard address handle by decoding the tunnelled mlx4_ah fields */
1400 memcpy(&ah.av, &tunnel->hdr.av, sizeof (struct mlx4_av));
1401 ah.ibah.device = ctx->ib_dev;
1403 port = be32_to_cpu(ah.av.ib.port_pd) >> 24;
1404 port = mlx4_slave_convert_port(dev->dev, slave, port);
1407 ah.av.ib.port_pd = cpu_to_be32(port << 24 | (be32_to_cpu(ah.av.ib.port_pd) & 0xffffff));
1409 mlx4_ib_query_ah(&ah.ibah, &ah_attr);
1410 if (ah_attr.ah_flags & IB_AH_GRH)
1411 fill_in_real_sgid_index(dev, slave, ctx->port, &ah_attr);
1413 memcpy(ah_attr.dmac, tunnel->hdr.mac, 6);
1414 vlan_id = be16_to_cpu(tunnel->hdr.vlan);
1415 /* if slave have default vlan use it */
1416 mlx4_get_slave_default_vlan(dev->dev, ctx->port, slave,
1417 &vlan_id, &ah_attr.sl);
1419 mlx4_ib_send_to_wire(dev, slave, ctx->port,
1420 is_proxy_qp0(dev, wc->src_qp, slave) ?
1421 IB_QPT_SMI : IB_QPT_GSI,
1422 be16_to_cpu(tunnel->hdr.pkey_index),
1423 be32_to_cpu(tunnel->hdr.remote_qpn),
1424 be32_to_cpu(tunnel->hdr.qkey),
1425 &ah_attr, wc->smac, vlan_id, &tunnel->mad);
1428 static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1429 enum ib_qp_type qp_type, int is_tun)
1432 struct mlx4_ib_demux_pv_qp *tun_qp;
1433 int rx_buf_size, tx_buf_size;
1435 if (qp_type > IB_QPT_GSI)
1438 tun_qp = &ctx->qp[qp_type];
1440 tun_qp->ring = kzalloc(sizeof (struct mlx4_ib_buf) * MLX4_NUM_TUNNEL_BUFS,
1445 tun_qp->tx_ring = kcalloc(MLX4_NUM_TUNNEL_BUFS,
1446 sizeof (struct mlx4_ib_tun_tx_buf),
1448 if (!tun_qp->tx_ring) {
1449 kfree(tun_qp->ring);
1450 tun_qp->ring = NULL;
1455 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1456 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1458 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1459 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1462 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1463 tun_qp->ring[i].addr = kmalloc(rx_buf_size, GFP_KERNEL);
1464 if (!tun_qp->ring[i].addr)
1466 tun_qp->ring[i].map = ib_dma_map_single(ctx->ib_dev,
1467 tun_qp->ring[i].addr,
1470 if (ib_dma_mapping_error(ctx->ib_dev, tun_qp->ring[i].map)) {
1471 kfree(tun_qp->ring[i].addr);
1476 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1477 tun_qp->tx_ring[i].buf.addr =
1478 kmalloc(tx_buf_size, GFP_KERNEL);
1479 if (!tun_qp->tx_ring[i].buf.addr)
1481 tun_qp->tx_ring[i].buf.map =
1482 ib_dma_map_single(ctx->ib_dev,
1483 tun_qp->tx_ring[i].buf.addr,
1486 if (ib_dma_mapping_error(ctx->ib_dev,
1487 tun_qp->tx_ring[i].buf.map)) {
1488 kfree(tun_qp->tx_ring[i].buf.addr);
1491 tun_qp->tx_ring[i].ah = NULL;
1493 spin_lock_init(&tun_qp->tx_lock);
1494 tun_qp->tx_ix_head = 0;
1495 tun_qp->tx_ix_tail = 0;
1496 tun_qp->proxy_qpt = qp_type;
1503 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1504 tx_buf_size, DMA_TO_DEVICE);
1505 kfree(tun_qp->tx_ring[i].buf.addr);
1507 kfree(tun_qp->tx_ring);
1508 tun_qp->tx_ring = NULL;
1509 i = MLX4_NUM_TUNNEL_BUFS;
1513 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1514 rx_buf_size, DMA_FROM_DEVICE);
1515 kfree(tun_qp->ring[i].addr);
1517 kfree(tun_qp->ring);
1518 tun_qp->ring = NULL;
1522 static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1523 enum ib_qp_type qp_type, int is_tun)
1526 struct mlx4_ib_demux_pv_qp *tun_qp;
1527 int rx_buf_size, tx_buf_size;
1529 if (qp_type > IB_QPT_GSI)
1532 tun_qp = &ctx->qp[qp_type];
1534 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1535 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1537 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1538 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1542 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1543 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1544 rx_buf_size, DMA_FROM_DEVICE);
1545 kfree(tun_qp->ring[i].addr);
1548 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1549 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1550 tx_buf_size, DMA_TO_DEVICE);
1551 kfree(tun_qp->tx_ring[i].buf.addr);
1552 if (tun_qp->tx_ring[i].ah)
1553 ib_destroy_ah(tun_qp->tx_ring[i].ah);
1555 kfree(tun_qp->tx_ring);
1556 kfree(tun_qp->ring);
1559 static void mlx4_ib_tunnel_comp_worker(struct work_struct *work)
1561 struct mlx4_ib_demux_pv_ctx *ctx;
1562 struct mlx4_ib_demux_pv_qp *tun_qp;
1565 ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1566 ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1568 while (ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1569 tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1570 if (wc.status == IB_WC_SUCCESS) {
1571 switch (wc.opcode) {
1573 mlx4_ib_multiplex_mad(ctx, &wc);
1574 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp,
1576 (MLX4_NUM_TUNNEL_BUFS - 1));
1578 pr_err("Failed reposting tunnel "
1579 "buf:%lld\n", wc.wr_id);
1582 pr_debug("received tunnel send completion:"
1583 "wrid=0x%llx, status=0x%x\n",
1584 wc.wr_id, wc.status);
1585 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1586 (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1587 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1589 spin_lock(&tun_qp->tx_lock);
1590 tun_qp->tx_ix_tail++;
1591 spin_unlock(&tun_qp->tx_lock);
1598 pr_debug("mlx4_ib: completion error in tunnel: %d."
1599 " status = %d, wrid = 0x%llx\n",
1600 ctx->slave, wc.status, wc.wr_id);
1601 if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1602 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1603 (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1604 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1606 spin_lock(&tun_qp->tx_lock);
1607 tun_qp->tx_ix_tail++;
1608 spin_unlock(&tun_qp->tx_lock);
1614 static void pv_qp_event_handler(struct ib_event *event, void *qp_context)
1616 struct mlx4_ib_demux_pv_ctx *sqp = qp_context;
1618 /* It's worse than that! He's dead, Jim! */
1619 pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1620 event->event, sqp->port);
1623 static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx *ctx,
1624 enum ib_qp_type qp_type, int create_tun)
1627 struct mlx4_ib_demux_pv_qp *tun_qp;
1628 struct mlx4_ib_qp_tunnel_init_attr qp_init_attr;
1629 struct ib_qp_attr attr;
1630 int qp_attr_mask_INIT;
1632 if (qp_type > IB_QPT_GSI)
1635 tun_qp = &ctx->qp[qp_type];
1637 memset(&qp_init_attr, 0, sizeof qp_init_attr);
1638 qp_init_attr.init_attr.send_cq = ctx->cq;
1639 qp_init_attr.init_attr.recv_cq = ctx->cq;
1640 qp_init_attr.init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
1641 qp_init_attr.init_attr.cap.max_send_wr = MLX4_NUM_TUNNEL_BUFS;
1642 qp_init_attr.init_attr.cap.max_recv_wr = MLX4_NUM_TUNNEL_BUFS;
1643 qp_init_attr.init_attr.cap.max_send_sge = 1;
1644 qp_init_attr.init_attr.cap.max_recv_sge = 1;
1646 qp_init_attr.init_attr.qp_type = IB_QPT_UD;
1647 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_TUNNEL_QP;
1648 qp_init_attr.port = ctx->port;
1649 qp_init_attr.slave = ctx->slave;
1650 qp_init_attr.proxy_qp_type = qp_type;
1651 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX |
1652 IB_QP_QKEY | IB_QP_PORT;
1654 qp_init_attr.init_attr.qp_type = qp_type;
1655 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_SQP;
1656 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY;
1658 qp_init_attr.init_attr.port_num = ctx->port;
1659 qp_init_attr.init_attr.qp_context = ctx;
1660 qp_init_attr.init_attr.event_handler = pv_qp_event_handler;
1661 tun_qp->qp = ib_create_qp(ctx->pd, &qp_init_attr.init_attr);
1662 if (IS_ERR(tun_qp->qp)) {
1663 ret = PTR_ERR(tun_qp->qp);
1665 pr_err("Couldn't create %s QP (%d)\n",
1666 create_tun ? "tunnel" : "special", ret);
1670 memset(&attr, 0, sizeof attr);
1671 attr.qp_state = IB_QPS_INIT;
1674 ret = find_slave_port_pkey_ix(to_mdev(ctx->ib_dev), ctx->slave,
1675 ctx->port, IB_DEFAULT_PKEY_FULL,
1677 if (ret || !create_tun)
1679 to_mdev(ctx->ib_dev)->pkeys.virt2phys_pkey[ctx->slave][ctx->port - 1][0];
1680 attr.qkey = IB_QP1_QKEY;
1681 attr.port_num = ctx->port;
1682 ret = ib_modify_qp(tun_qp->qp, &attr, qp_attr_mask_INIT);
1684 pr_err("Couldn't change %s qp state to INIT (%d)\n",
1685 create_tun ? "tunnel" : "special", ret);
1688 attr.qp_state = IB_QPS_RTR;
1689 ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE);
1691 pr_err("Couldn't change %s qp state to RTR (%d)\n",
1692 create_tun ? "tunnel" : "special", ret);
1695 attr.qp_state = IB_QPS_RTS;
1697 ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
1699 pr_err("Couldn't change %s qp state to RTS (%d)\n",
1700 create_tun ? "tunnel" : "special", ret);
1704 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1705 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp, i);
1707 pr_err(" mlx4_ib_post_pv_buf error"
1708 " (err = %d, i = %d)\n", ret, i);
1715 ib_destroy_qp(tun_qp->qp);
1721 * IB MAD completion callback for real SQPs
1723 static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
1725 struct mlx4_ib_demux_pv_ctx *ctx;
1726 struct mlx4_ib_demux_pv_qp *sqp;
1731 ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1732 ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1734 while (mlx4_ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1735 sqp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1736 if (wc.status == IB_WC_SUCCESS) {
1737 switch (wc.opcode) {
1739 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1740 (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1741 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1743 spin_lock(&sqp->tx_lock);
1745 spin_unlock(&sqp->tx_lock);
1748 mad = (struct ib_mad *) &(((struct mlx4_mad_rcv_buf *)
1749 (sqp->ring[wc.wr_id &
1750 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->payload);
1751 grh = &(((struct mlx4_mad_rcv_buf *)
1752 (sqp->ring[wc.wr_id &
1753 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->grh);
1754 mlx4_ib_demux_mad(ctx->ib_dev, ctx->port, &wc, grh, mad);
1755 if (mlx4_ib_post_pv_qp_buf(ctx, sqp, wc.wr_id &
1756 (MLX4_NUM_TUNNEL_BUFS - 1)))
1757 pr_err("Failed reposting SQP "
1758 "buf:%lld\n", wc.wr_id);
1765 pr_debug("mlx4_ib: completion error in tunnel: %d."
1766 " status = %d, wrid = 0x%llx\n",
1767 ctx->slave, wc.status, wc.wr_id);
1768 if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1769 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1770 (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1771 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1773 spin_lock(&sqp->tx_lock);
1775 spin_unlock(&sqp->tx_lock);
1781 static int alloc_pv_object(struct mlx4_ib_dev *dev, int slave, int port,
1782 struct mlx4_ib_demux_pv_ctx **ret_ctx)
1784 struct mlx4_ib_demux_pv_ctx *ctx;
1787 ctx = kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx), GFP_KERNEL);
1789 pr_err("failed allocating pv resource context "
1790 "for port %d, slave %d\n", port, slave);
1794 ctx->ib_dev = &dev->ib_dev;
1801 static void free_pv_object(struct mlx4_ib_dev *dev, int slave, int port)
1803 if (dev->sriov.demux[port - 1].tun[slave]) {
1804 kfree(dev->sriov.demux[port - 1].tun[slave]);
1805 dev->sriov.demux[port - 1].tun[slave] = NULL;
1809 static int create_pv_resources(struct ib_device *ibdev, int slave, int port,
1810 int create_tun, struct mlx4_ib_demux_pv_ctx *ctx)
1813 struct ib_cq_init_attr cq_attr = {};
1815 if (ctx->state != DEMUX_PV_STATE_DOWN)
1818 ctx->state = DEMUX_PV_STATE_STARTING;
1819 /* have QP0 only if link layer is IB */
1820 if (rdma_port_get_link_layer(ibdev, ctx->port) ==
1821 IB_LINK_LAYER_INFINIBAND)
1825 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_SMI, create_tun);
1827 pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret);
1832 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_GSI, create_tun);
1834 pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret);
1838 cq_size = 2 * MLX4_NUM_TUNNEL_BUFS;
1842 cq_attr.cqe = cq_size;
1843 ctx->cq = ib_create_cq(ctx->ib_dev, mlx4_ib_tunnel_comp_handler,
1844 NULL, ctx, &cq_attr);
1845 if (IS_ERR(ctx->cq)) {
1846 ret = PTR_ERR(ctx->cq);
1847 pr_err("Couldn't create tunnel CQ (%d)\n", ret);
1851 ctx->pd = ib_alloc_pd(ctx->ib_dev);
1852 if (IS_ERR(ctx->pd)) {
1853 ret = PTR_ERR(ctx->pd);
1854 pr_err("Couldn't create tunnel PD (%d)\n", ret);
1859 ret = create_pv_sqp(ctx, IB_QPT_SMI, create_tun);
1861 pr_err("Couldn't create %s QP0 (%d)\n",
1862 create_tun ? "tunnel for" : "", ret);
1867 ret = create_pv_sqp(ctx, IB_QPT_GSI, create_tun);
1869 pr_err("Couldn't create %s QP1 (%d)\n",
1870 create_tun ? "tunnel for" : "", ret);
1875 INIT_WORK(&ctx->work, mlx4_ib_tunnel_comp_worker);
1877 INIT_WORK(&ctx->work, mlx4_ib_sqp_comp_worker);
1879 ctx->wq = to_mdev(ibdev)->sriov.demux[port - 1].wq;
1881 ret = ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1883 pr_err("Couldn't arm tunnel cq (%d)\n", ret);
1886 ctx->state = DEMUX_PV_STATE_ACTIVE;
1891 ib_destroy_qp(ctx->qp[1].qp);
1892 ctx->qp[1].qp = NULL;
1897 ib_destroy_qp(ctx->qp[0].qp);
1898 ctx->qp[0].qp = NULL;
1901 ib_dealloc_pd(ctx->pd);
1905 ib_destroy_cq(ctx->cq);
1909 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, create_tun);
1913 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, create_tun);
1915 ctx->state = DEMUX_PV_STATE_DOWN;
1919 static void destroy_pv_resources(struct mlx4_ib_dev *dev, int slave, int port,
1920 struct mlx4_ib_demux_pv_ctx *ctx, int flush)
1924 if (ctx->state > DEMUX_PV_STATE_DOWN) {
1925 ctx->state = DEMUX_PV_STATE_DOWNING;
1927 flush_workqueue(ctx->wq);
1929 ib_destroy_qp(ctx->qp[0].qp);
1930 ctx->qp[0].qp = NULL;
1931 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, 1);
1933 ib_destroy_qp(ctx->qp[1].qp);
1934 ctx->qp[1].qp = NULL;
1935 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, 1);
1936 ib_dealloc_pd(ctx->pd);
1938 ib_destroy_cq(ctx->cq);
1940 ctx->state = DEMUX_PV_STATE_DOWN;
1944 static int mlx4_ib_tunnels_update(struct mlx4_ib_dev *dev, int slave,
1945 int port, int do_init)
1950 clean_vf_mcast(&dev->sriov.demux[port - 1], slave);
1951 /* for master, destroy real sqp resources */
1952 if (slave == mlx4_master_func_num(dev->dev))
1953 destroy_pv_resources(dev, slave, port,
1954 dev->sriov.sqps[port - 1], 1);
1955 /* destroy the tunnel qp resources */
1956 destroy_pv_resources(dev, slave, port,
1957 dev->sriov.demux[port - 1].tun[slave], 1);
1961 /* create the tunnel qp resources */
1962 ret = create_pv_resources(&dev->ib_dev, slave, port, 1,
1963 dev->sriov.demux[port - 1].tun[slave]);
1965 /* for master, create the real sqp resources */
1966 if (!ret && slave == mlx4_master_func_num(dev->dev))
1967 ret = create_pv_resources(&dev->ib_dev, slave, port, 0,
1968 dev->sriov.sqps[port - 1]);
1972 void mlx4_ib_tunnels_update_work(struct work_struct *work)
1974 struct mlx4_ib_demux_work *dmxw;
1976 dmxw = container_of(work, struct mlx4_ib_demux_work, work);
1977 mlx4_ib_tunnels_update(dmxw->dev, dmxw->slave, (int) dmxw->port,
1983 static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev,
1984 struct mlx4_ib_demux_ctx *ctx,
1991 ctx->tun = kcalloc(dev->dev->caps.sqp_demux,
1992 sizeof (struct mlx4_ib_demux_pv_ctx *), GFP_KERNEL);
1998 ctx->ib_dev = &dev->ib_dev;
2001 i < min(dev->dev->caps.sqp_demux,
2002 (u16)(dev->dev->persist->num_vfs + 1));
2004 struct mlx4_active_ports actv_ports =
2005 mlx4_get_active_ports(dev->dev, i);
2007 if (!test_bit(port - 1, actv_ports.ports))
2010 ret = alloc_pv_object(dev, i, port, &ctx->tun[i]);
2017 ret = mlx4_ib_mcg_port_init(ctx);
2019 pr_err("Failed initializing mcg para-virt (%d)\n", ret);
2023 snprintf(name, sizeof name, "mlx4_ibt%d", port);
2024 ctx->wq = create_singlethread_workqueue(name);
2026 pr_err("Failed to create tunnelling WQ for port %d\n", port);
2031 snprintf(name, sizeof name, "mlx4_ibud%d", port);
2032 ctx->ud_wq = create_singlethread_workqueue(name);
2034 pr_err("Failed to create up/down WQ for port %d\n", port);
2042 destroy_workqueue(ctx->wq);
2046 mlx4_ib_mcg_port_cleanup(ctx, 1);
2048 for (i = 0; i < dev->dev->caps.sqp_demux; i++)
2049 free_pv_object(dev, i, port);
2055 static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx *sqp_ctx)
2057 if (sqp_ctx->state > DEMUX_PV_STATE_DOWN) {
2058 sqp_ctx->state = DEMUX_PV_STATE_DOWNING;
2059 flush_workqueue(sqp_ctx->wq);
2060 if (sqp_ctx->has_smi) {
2061 ib_destroy_qp(sqp_ctx->qp[0].qp);
2062 sqp_ctx->qp[0].qp = NULL;
2063 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_SMI, 0);
2065 ib_destroy_qp(sqp_ctx->qp[1].qp);
2066 sqp_ctx->qp[1].qp = NULL;
2067 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_GSI, 0);
2068 ib_dealloc_pd(sqp_ctx->pd);
2070 ib_destroy_cq(sqp_ctx->cq);
2072 sqp_ctx->state = DEMUX_PV_STATE_DOWN;
2076 static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx *ctx)
2080 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
2081 mlx4_ib_mcg_port_cleanup(ctx, 1);
2082 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2085 if (ctx->tun[i]->state > DEMUX_PV_STATE_DOWN)
2086 ctx->tun[i]->state = DEMUX_PV_STATE_DOWNING;
2088 flush_workqueue(ctx->wq);
2089 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2090 destroy_pv_resources(dev, i, ctx->port, ctx->tun[i], 0);
2091 free_pv_object(dev, i, ctx->port);
2094 destroy_workqueue(ctx->ud_wq);
2095 destroy_workqueue(ctx->wq);
2099 static void mlx4_ib_master_tunnels(struct mlx4_ib_dev *dev, int do_init)
2103 if (!mlx4_is_master(dev->dev))
2105 /* initialize or tear down tunnel QPs for the master */
2106 for (i = 0; i < dev->dev->caps.num_ports; i++)
2107 mlx4_ib_tunnels_update(dev, mlx4_master_func_num(dev->dev), i + 1, do_init);
2111 int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
2116 if (!mlx4_is_mfunc(dev->dev))
2119 dev->sriov.is_going_down = 0;
2120 spin_lock_init(&dev->sriov.going_down_lock);
2121 mlx4_ib_cm_paravirt_init(dev);
2123 mlx4_ib_warn(&dev->ib_dev, "multi-function enabled\n");
2125 if (mlx4_is_slave(dev->dev)) {
2126 mlx4_ib_warn(&dev->ib_dev, "operating in qp1 tunnel mode\n");
2130 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2131 if (i == mlx4_master_func_num(dev->dev))
2132 mlx4_put_slave_node_guid(dev->dev, i, dev->ib_dev.node_guid);
2134 mlx4_put_slave_node_guid(dev->dev, i, mlx4_ib_gen_node_guid());
2137 err = mlx4_ib_init_alias_guid_service(dev);
2139 mlx4_ib_warn(&dev->ib_dev, "Failed init alias guid process.\n");
2142 err = mlx4_ib_device_register_sysfs(dev);
2144 mlx4_ib_warn(&dev->ib_dev, "Failed to register sysfs\n");
2148 mlx4_ib_warn(&dev->ib_dev, "initializing demux service for %d qp1 clients\n",
2149 dev->dev->caps.sqp_demux);
2150 for (i = 0; i < dev->num_ports; i++) {
2152 err = __mlx4_ib_query_gid(&dev->ib_dev, i + 1, 0, &gid, 1);
2155 dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
2156 err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
2157 &dev->sriov.sqps[i]);
2160 err = mlx4_ib_alloc_demux_ctx(dev, &dev->sriov.demux[i], i + 1);
2164 mlx4_ib_master_tunnels(dev, 1);
2168 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2171 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2172 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2174 mlx4_ib_device_unregister_sysfs(dev);
2177 mlx4_ib_destroy_alias_guid_service(dev);
2180 mlx4_ib_cm_paravirt_clean(dev, -1);
2185 void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev)
2188 unsigned long flags;
2190 if (!mlx4_is_mfunc(dev->dev))
2193 spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
2194 dev->sriov.is_going_down = 1;
2195 spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
2196 if (mlx4_is_master(dev->dev)) {
2197 for (i = 0; i < dev->num_ports; i++) {
2198 flush_workqueue(dev->sriov.demux[i].ud_wq);
2199 mlx4_ib_free_sqp_ctx(dev->sriov.sqps[i]);
2200 kfree(dev->sriov.sqps[i]);
2201 dev->sriov.sqps[i] = NULL;
2202 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2205 mlx4_ib_cm_paravirt_clean(dev, -1);
2206 mlx4_ib_destroy_alias_guid_service(dev);
2207 mlx4_ib_device_unregister_sysfs(dev);