drivers/isdn/hardware/mISDN/avmfritz.c

   1 /*
   2  * avm_fritz.c    low level stuff for AVM FRITZ!CARD PCI ISDN cards
   3  *                Thanks to AVM, Berlin for informations
   4  *
   5  * Author       Karsten Keil <keil@isdn4linux.de>
   6  *
   7  * Copyright 2009  by Karsten Keil <keil@isdn4linux.de>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  */
  23 #include <linux/interrupt.h>
  24 #include <linux/module.h>
  25 #include <linux/pci.h>
  26 #include <linux/delay.h>
  27 #include <linux/mISDNhw.h>
  28 #include <linux/slab.h>
  29 #include <asm/unaligned.h>
  30 #include "ipac.h"
  31
  32
  33 #define AVMFRITZ_REV    "2.3"
  34
  35 static int AVM_cnt;
  36 static int debug;
  37
  38 enum {
  39         AVM_FRITZ_PCI,
  40         AVM_FRITZ_PCIV2,
  41 };
  42
  43 #define HDLC_FIFO               0x0
  44 #define HDLC_STATUS             0x4
  45 #define CHIP_WINDOW             0x10
  46
  47 #define CHIP_INDEX              0x4
  48 #define AVM_HDLC_1              0x00
  49 #define AVM_HDLC_2              0x01
  50 #define AVM_ISAC_FIFO           0x02
  51 #define AVM_ISAC_REG_LOW        0x04
  52 #define AVM_ISAC_REG_HIGH       0x06
  53
  54 #define AVM_STATUS0_IRQ_ISAC    0x01
  55 #define AVM_STATUS0_IRQ_HDLC    0x02
  56 #define AVM_STATUS0_IRQ_TIMER   0x04
  57 #define AVM_STATUS0_IRQ_MASK    0x07
  58
  59 #define AVM_STATUS0_RESET       0x01
  60 #define AVM_STATUS0_DIS_TIMER   0x02
  61 #define AVM_STATUS0_RES_TIMER   0x04
  62 #define AVM_STATUS0_ENA_IRQ     0x08
  63 #define AVM_STATUS0_TESTBIT     0x10
  64
  65 #define AVM_STATUS1_INT_SEL     0x0f
  66 #define AVM_STATUS1_ENA_IOM     0x80
  67
  68 #define HDLC_MODE_ITF_FLG       0x01
  69 #define HDLC_MODE_TRANS         0x02
  70 #define HDLC_MODE_CCR_7         0x04
  71 #define HDLC_MODE_CCR_16        0x08
  72 #define HDLC_FIFO_SIZE_128      0x20
  73 #define HDLC_MODE_TESTLOOP      0x80
  74
  75 #define HDLC_INT_XPR            0x80
  76 #define HDLC_INT_XDU            0x40
  77 #define HDLC_INT_RPR            0x20
  78 #define HDLC_INT_MASK           0xE0
  79
  80 #define HDLC_STAT_RME           0x01
  81 #define HDLC_STAT_RDO           0x10
  82 #define HDLC_STAT_CRCVFRRAB     0x0E
  83 #define HDLC_STAT_CRCVFR        0x06
  84 #define HDLC_STAT_RML_MASK_V1   0x3f00
  85 #define HDLC_STAT_RML_MASK_V2   0x7f00
  86
  87 #define HDLC_CMD_XRS            0x80
  88 #define HDLC_CMD_XME            0x01
  89 #define HDLC_CMD_RRS            0x20
  90 #define HDLC_CMD_XML_MASK       0x3f00
  91
  92 #define HDLC_FIFO_SIZE_V1       32
  93 #define HDLC_FIFO_SIZE_V2       128
  94
  95 /* Fritz PCI v2.0 */
  96
  97 #define AVM_HDLC_FIFO_1         0x10
  98 #define AVM_HDLC_FIFO_2         0x18
  99
 100 #define AVM_HDLC_STATUS_1       0x14
 101 #define AVM_HDLC_STATUS_2       0x1c
 102
 103 #define AVM_ISACX_INDEX         0x04
 104 #define AVM_ISACX_DATA          0x08
 105
 106 /* data struct */
 107 #define LOG_SIZE                63
 108
 109 struct hdlc_stat_reg {
 110 #ifdef __BIG_ENDIAN
 111         u8 fill;
 112         u8 mode;
 113         u8 xml;
 114         u8 cmd;
 115 #else
 116         u8 cmd;
 117         u8 xml;
 118         u8 mode;
 119         u8 fill;
 120 #endif
 121 } __attribute__((packed));
 122
 123 struct hdlc_hw {
 124         union {
 125                 u32 ctrl;
 126                 struct hdlc_stat_reg sr;
 127         } ctrl;
 128         u32 stat;
 129 };
 130
 131 struct fritzcard {
 132         struct list_head        list;
 133         struct pci_dev          *pdev;
 134         char                    name[MISDN_MAX_IDLEN];
 135         u8                      type;
 136         u8                      ctrlreg;
 137         u16                     irq;
 138         u32                     irqcnt;
 139         u32                     addr;
 140         spinlock_t              lock; /* hw lock */
 141         struct isac_hw          isac;
 142         struct hdlc_hw          hdlc[2];
 143         struct bchannel         bch[2];
 144         char                    log[LOG_SIZE + 1];
 145 };
 146
 147 static LIST_HEAD(Cards);
 148 static DEFINE_RWLOCK(card_lock); /* protect Cards */
 149
 150 static void
 151 _set_debug(struct fritzcard *card)
 152 {
 153         card->isac.dch.debug = debug;
 154         card->bch[0].debug = debug;
 155         card->bch[1].debug = debug;
 156 }
 157
 158 static int
 159 set_debug(const char *val, struct kernel_param *kp)
 160 {
 161         int ret;
 162         struct fritzcard *card;
 163
 164         ret = param_set_uint(val, kp);
 165         if (!ret) {
 166                 read_lock(&card_lock);
 167                 list_for_each_entry(card, &Cards, list)
 168                         _set_debug(card);
 169                 read_unlock(&card_lock);
 170         }
 171         return ret;
 172 }
 173
 174 MODULE_AUTHOR("Karsten Keil");
 175 MODULE_LICENSE("GPL v2");
 176 MODULE_VERSION(AVMFRITZ_REV);
 177 module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR);
 178 MODULE_PARM_DESC(debug, "avmfritz debug mask");
 179
 180 /* Interface functions */
 181
 182 static u8
 183 ReadISAC_V1(void *p, u8 offset)
 184 {
 185         struct fritzcard *fc = p;
 186         u8 idx = (offset > 0x2f) ? AVM_ISAC_REG_HIGH : AVM_ISAC_REG_LOW;
 187
 188         outb(idx, fc->addr + CHIP_INDEX);
 189         return inb(fc->addr + CHIP_WINDOW + (offset & 0xf));
 190 }
 191
 192 static void
 193 WriteISAC_V1(void *p, u8 offset, u8 value)
 194 {
 195         struct fritzcard *fc = p;
 196         u8 idx = (offset > 0x2f) ? AVM_ISAC_REG_HIGH : AVM_ISAC_REG_LOW;
 197
 198         outb(idx, fc->addr + CHIP_INDEX);
 199         outb(value, fc->addr + CHIP_WINDOW + (offset & 0xf));
 200 }
 201
 202 static void
 203 ReadFiFoISAC_V1(void *p, u8 off, u8 *data, int size)
 204 {
 205         struct fritzcard *fc = p;
 206
 207         outb(AVM_ISAC_FIFO, fc->addr + CHIP_INDEX);
 208         insb(fc->addr + CHIP_WINDOW, data, size);
 209 }
 210
 211 static void
 212 WriteFiFoISAC_V1(void *p, u8 off, u8 *data, int size)
 213 {
 214         struct fritzcard *fc = p;
 215
 216         outb(AVM_ISAC_FIFO, fc->addr + CHIP_INDEX);
 217         outsb(fc->addr + CHIP_WINDOW, data, size);
 218 }
 219
 220 static u8
 221 ReadISAC_V2(void *p, u8 offset)
 222 {
 223         struct fritzcard *fc = p;
 224
 225         outl(offset, fc->addr + AVM_ISACX_INDEX);
 226         return 0xff & inl(fc->addr + AVM_ISACX_DATA);
 227 }
 228
 229 static void
 230 WriteISAC_V2(void *p, u8 offset, u8 value)
 231 {
 232         struct fritzcard *fc = p;
 233
 234         outl(offset, fc->addr + AVM_ISACX_INDEX);
 235         outl(value, fc->addr + AVM_ISACX_DATA);
 236 }
 237
 238 static void
 239 ReadFiFoISAC_V2(void *p, u8 off, u8 *data, int size)
 240 {
 241         struct fritzcard *fc = p;
 242         int i;
 243
 244         outl(off, fc->addr + AVM_ISACX_INDEX);
 245         for (i = 0; i < size; i++)
 246                 data[i] = 0xff & inl(fc->addr + AVM_ISACX_DATA);
 247 }
 248
 249 static void
 250 WriteFiFoISAC_V2(void *p, u8 off, u8 *data, int size)
 251 {
 252         struct fritzcard *fc = p;
 253         int i;
 254
 255         outl(off, fc->addr + AVM_ISACX_INDEX);
 256         for (i = 0; i < size; i++)
 257                 outl(data[i], fc->addr + AVM_ISACX_DATA);
 258 }
 259
 260 static struct bchannel *
 261 Sel_BCS(struct fritzcard *fc, u32 channel)
 262 {
 263         if (test_bit(FLG_ACTIVE, &fc->bch[0].Flags) &&
 264             (fc->bch[0].nr & channel))
 265                 return &fc->bch[0];
 266         else if (test_bit(FLG_ACTIVE, &fc->bch[1].Flags) &&
 267                  (fc->bch[1].nr & channel))
 268                 return &fc->bch[1];
 269         else
 270                 return NULL;
 271 }
 272
 273 static inline void
 274 __write_ctrl_pci(struct fritzcard *fc, struct hdlc_hw *hdlc, u32 channel) {
 275         u32 idx = channel == 2 ? AVM_HDLC_2 : AVM_HDLC_1;
 276
 277         outl(idx, fc->addr + CHIP_INDEX);
 278         outl(hdlc->ctrl.ctrl, fc->addr + CHIP_WINDOW + HDLC_STATUS);
 279 }
 280
 281 static inline void
 282 __write_ctrl_pciv2(struct fritzcard *fc, struct hdlc_hw *hdlc, u32 channel) {
 283         outl(hdlc->ctrl.ctrl, fc->addr + (channel == 2 ? AVM_HDLC_STATUS_2 :
 284                                           AVM_HDLC_STATUS_1));
 285 }
 286
 287 void
 288 write_ctrl(struct bchannel *bch, int which) {
 289         struct fritzcard *fc = bch->hw;
 290         struct hdlc_hw *hdlc;
 291
 292         hdlc = &fc->hdlc[(bch->nr - 1) & 1];
 293         pr_debug("%s: hdlc %c wr%x ctrl %x\n", fc->name, '@' + bch->nr,
 294                  which, hdlc->ctrl.ctrl);
 295         switch (fc->type) {
 296         case AVM_FRITZ_PCIV2:
 297                 __write_ctrl_pciv2(fc, hdlc, bch->nr);
 298                 break;
 299         case AVM_FRITZ_PCI:
 300                 __write_ctrl_pci(fc, hdlc, bch->nr);
 301                 break;
 302         }
 303 }
 304
 305
 306 static inline u32
 307 __read_status_pci(u_long addr, u32 channel)
 308 {
 309         outl(channel == 2 ? AVM_HDLC_2 : AVM_HDLC_1, addr + CHIP_INDEX);
 310         return inl(addr + CHIP_WINDOW + HDLC_STATUS);
 311 }
 312
 313 static inline u32
 314 __read_status_pciv2(u_long addr, u32 channel)
 315 {
 316         return inl(addr + (channel == 2 ? AVM_HDLC_STATUS_2 :
 317                            AVM_HDLC_STATUS_1));
 318 }
 319
 320
 321 static u32
 322 read_status(struct fritzcard *fc, u32 channel)
 323 {
 324         switch (fc->type) {
 325         case AVM_FRITZ_PCIV2:
 326                 return __read_status_pciv2(fc->addr, channel);
 327         case AVM_FRITZ_PCI:
 328                 return __read_status_pci(fc->addr, channel);
 329         }
 330         /* dummy */
 331         return 0;
 332 }
 333
 334 static void
 335 enable_hwirq(struct fritzcard *fc)
 336 {
 337         fc->ctrlreg |= AVM_STATUS0_ENA_IRQ;
 338         outb(fc->ctrlreg, fc->addr + 2);
 339 }
 340
 341 static void
 342 disable_hwirq(struct fritzcard *fc)
 343 {
 344         fc->ctrlreg &= ~AVM_STATUS0_ENA_IRQ;
 345         outb(fc->ctrlreg, fc->addr + 2);
 346 }
 347
 348 static int
 349 modehdlc(struct bchannel *bch, int protocol)
 350 {
 351         struct fritzcard *fc = bch->hw;
 352         struct hdlc_hw *hdlc;
 353         u8 mode;
 354
 355         hdlc = &fc->hdlc[(bch->nr - 1) & 1];
 356         pr_debug("%s: hdlc %c protocol %x-->%x ch %d\n", fc->name,
 357                  '@' + bch->nr, bch->state, protocol, bch->nr);
 358         hdlc->ctrl.ctrl = 0;
 359         mode = (fc->type == AVM_FRITZ_PCIV2) ? HDLC_FIFO_SIZE_128 : 0;
 360
 361         switch (protocol) {
 362         case -1: /* used for init */
 363                 bch->state = -1;
 364         case ISDN_P_NONE:
 365                 if (bch->state == ISDN_P_NONE)
 366                         break;
 367                 hdlc->ctrl.sr.cmd  = HDLC_CMD_XRS | HDLC_CMD_RRS;
 368                 hdlc->ctrl.sr.mode = mode | HDLC_MODE_TRANS;
 369                 write_ctrl(bch, 5);
 370                 bch->state = ISDN_P_NONE;
 371                 test_and_clear_bit(FLG_HDLC, &bch->Flags);
 372                 test_and_clear_bit(FLG_TRANSPARENT, &bch->Flags);
 373                 break;
 374         case ISDN_P_B_RAW:
 375                 bch->state = protocol;
 376                 hdlc->ctrl.sr.cmd  = HDLC_CMD_XRS | HDLC_CMD_RRS;
 377                 hdlc->ctrl.sr.mode = mode | HDLC_MODE_TRANS;
 378                 write_ctrl(bch, 5);
 379                 hdlc->ctrl.sr.cmd = HDLC_CMD_XRS;
 380                 write_ctrl(bch, 1);
 381                 hdlc->ctrl.sr.cmd = 0;
 382                 test_and_set_bit(FLG_TRANSPARENT, &bch->Flags);
 383                 break;
 384         case ISDN_P_B_HDLC:
 385                 bch->state = protocol;
 386                 hdlc->ctrl.sr.cmd  = HDLC_CMD_XRS | HDLC_CMD_RRS;
 387                 hdlc->ctrl.sr.mode = mode | HDLC_MODE_ITF_FLG;
 388                 write_ctrl(bch, 5);
 389                 hdlc->ctrl.sr.cmd = HDLC_CMD_XRS;
 390                 write_ctrl(bch, 1);
 391                 hdlc->ctrl.sr.cmd = 0;
 392                 test_and_set_bit(FLG_HDLC, &bch->Flags);
 393                 break;
 394         default:
 395                 pr_info("%s: protocol not known %x\n", fc->name, protocol);
 396                 return -ENOPROTOOPT;
 397         }
 398         return 0;
 399 }
 400
 401 static void
 402 hdlc_empty_fifo(struct bchannel *bch, int count)
 403 {
 404         u32 *ptr;
 405         u8 *p;
 406         u32  val, addr;
 407         int cnt;
 408         struct fritzcard *fc = bch->hw;
 409
 410         pr_debug("%s: %s %d\n", fc->name, __func__, count);
 411         if (test_bit(FLG_RX_OFF, &bch->Flags)) {
 412                 p = NULL;
 413                 bch->dropcnt += count;
 414         } else {
 415                 cnt = bchannel_get_rxbuf(bch, count);
 416                 if (cnt < 0) {
 417                         pr_warning("%s.B%d: No bufferspace for %d bytes\n",
 418                                    fc->name, bch->nr, count);
 419                         return;
 420                 }
 421                 p = skb_put(bch->rx_skb, count);
 422         }
 423         ptr = (u32 *)p;
 424         if (fc->type == AVM_FRITZ_PCIV2)
 425                 addr = fc->addr + (bch->nr == 2 ?
 426                                    AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1);
 427         else {
 428                 addr = fc->addr + CHIP_WINDOW;
 429                 outl(bch->nr == 2 ? AVM_HDLC_2 : AVM_HDLC_1, fc->addr);
 430         }
 431         cnt = 0;
 432         while (cnt < count) {
 433                 val = le32_to_cpu(inl(addr));
 434                 if (p) {
 435                         put_unaligned(val, ptr);
 436                         ptr++;
 437                 }
 438                 cnt += 4;
 439         }
 440         if (p && (debug & DEBUG_HW_BFIFO)) {
 441                 snprintf(fc->log, LOG_SIZE, "B%1d-recv %s %d ",
 442                          bch->nr, fc->name, count);
 443                 print_hex_dump_bytes(fc->log, DUMP_PREFIX_OFFSET, p, count);
 444         }
 445 }
 446
 447 static void
 448 hdlc_fill_fifo(struct bchannel *bch)
 449 {
 450         struct fritzcard *fc = bch->hw;
 451         struct hdlc_hw *hdlc;
 452         int count, fs, cnt = 0, idx, fillempty = 0;
 453         u8 *p;
 454         u32 *ptr, val, addr;
 455
 456         idx = (bch->nr - 1) & 1;
 457         hdlc = &fc->hdlc[idx];
 458         fs = (fc->type == AVM_FRITZ_PCIV2) ?
 459                 HDLC_FIFO_SIZE_V2 : HDLC_FIFO_SIZE_V1;
 460         if (!bch->tx_skb) {
 461                 if (!test_bit(FLG_TX_EMPTY, &bch->Flags))
 462                         return;
 463                 count = fs;
 464                 p = bch->fill;
 465                 fillempty = 1;
 466         } else {
 467                 count = bch->tx_skb->len - bch->tx_idx;
 468                 if (count <= 0)
 469                         return;
 470                 p = bch->tx_skb->data + bch->tx_idx;
 471         }
 472         hdlc->ctrl.sr.cmd &= ~HDLC_CMD_XME;
 473         if (count > fs) {
 474                 count = fs;
 475         } else {
 476                 if (test_bit(FLG_HDLC, &bch->Flags))
 477                         hdlc->ctrl.sr.cmd |= HDLC_CMD_XME;
 478         }
 479         ptr = (u32 *)p;
 480         if (fillempty) {
 481                 pr_debug("%s.B%d: %d/%d/%d", fc->name, bch->nr, count,
 482                          bch->tx_idx, bch->tx_skb->len);
 483                 bch->tx_idx += count;
 484         } else {
 485                 pr_debug("%s.B%d: fillempty %d\n", fc->name, bch->nr, count);
 486         }
 487         hdlc->ctrl.sr.xml = ((count == fs) ? 0 : count);
 488         if (fc->type == AVM_FRITZ_PCIV2) {
 489                 __write_ctrl_pciv2(fc, hdlc, bch->nr);
 490                 addr = fc->addr + (bch->nr == 2 ?
 491                                    AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1);
 492         } else {
 493                 __write_ctrl_pci(fc, hdlc, bch->nr);
 494                 addr = fc->addr + CHIP_WINDOW;
 495         }
 496         if (fillempty) {
 497                 while (cnt < count) {
 498                         /* all bytes the same - no worry about endian */
 499                         outl(*ptr, addr);
 500                         cnt += 4;
 501                 }
 502         } else {
 503                 while (cnt < count) {
 504                         val = get_unaligned(ptr);
 505                         outl(cpu_to_le32(val), addr);
 506                         ptr++;
 507                         cnt += 4;
 508                 }
 509         }
 510         if ((debug & DEBUG_HW_BFIFO) && !fillempty) {
 511                 snprintf(fc->log, LOG_SIZE, "B%1d-send %s %d ",
 512                          bch->nr, fc->name, count);
 513                 print_hex_dump_bytes(fc->log, DUMP_PREFIX_OFFSET, p, count);
 514         }
 515 }
 516
 517 static void
 518 HDLC_irq_xpr(struct bchannel *bch)
 519 {
 520         if (bch->tx_skb && bch->tx_idx < bch->tx_skb->len) {
 521                 hdlc_fill_fifo(bch);
 522         } else {
 523                 if (bch->tx_skb)
 524                         dev_kfree_skb(bch->tx_skb);
 525                 if (get_next_bframe(bch)) {
 526                         hdlc_fill_fifo(bch);
 527                         test_and_clear_bit(FLG_TX_EMPTY, &bch->Flags);
 528                 } else if (test_bit(FLG_TX_EMPTY, &bch->Flags)) {
 529                         hdlc_fill_fifo(bch);
 530                 }
 531         }
 532 }
 533
 534 static void
 535 HDLC_irq(struct bchannel *bch, u32 stat)
 536 {
 537         struct fritzcard *fc = bch->hw;
 538         int             len, fs;
 539         u32             rmlMask;
 540         struct hdlc_hw  *hdlc;
 541
 542         hdlc = &fc->hdlc[(bch->nr - 1) & 1];
 543         pr_debug("%s: ch%d stat %#x\n", fc->name, bch->nr, stat);
 544         if (fc->type == AVM_FRITZ_PCIV2) {
 545                 rmlMask = HDLC_STAT_RML_MASK_V2;
 546                 fs = HDLC_FIFO_SIZE_V2;
 547         } else {
 548                 rmlMask = HDLC_STAT_RML_MASK_V1;
 549                 fs = HDLC_FIFO_SIZE_V1;
 550         }
 551         if (stat & HDLC_INT_RPR) {
 552                 if (stat & HDLC_STAT_RDO) {
 553                         pr_warning("%s: ch%d stat %x RDO\n",
 554                                    fc->name, bch->nr, stat);
 555                         hdlc->ctrl.sr.xml = 0;
 556                         hdlc->ctrl.sr.cmd |= HDLC_CMD_RRS;
 557                         write_ctrl(bch, 1);
 558                         hdlc->ctrl.sr.cmd &= ~HDLC_CMD_RRS;
 559                         write_ctrl(bch, 1);
 560                         if (bch->rx_skb)
 561                                 skb_trim(bch->rx_skb, 0);
 562                 } else {
 563                         len = (stat & rmlMask) >> 8;
 564                         if (!len)
 565                                 len = fs;
 566                         hdlc_empty_fifo(bch, len);
 567                         if (!bch->rx_skb)
 568                                 goto handle_tx;
 569                         if (test_bit(FLG_TRANSPARENT, &bch->Flags)) {
 570                                 recv_Bchannel(bch, 0, false);
 571                         } else if (stat & HDLC_STAT_RME) {
 572                                 if ((stat & HDLC_STAT_CRCVFRRAB) ==
 573                                     HDLC_STAT_CRCVFR) {
 574                                         recv_Bchannel(bch, 0, false);
 575                                 } else {
 576                                         pr_warning("%s: got invalid frame\n",
 577                                                    fc->name);
 578                                         skb_trim(bch->rx_skb, 0);
 579                                 }
 580                         }
 581                 }
 582         }
 583 handle_tx:
 584         if (stat & HDLC_INT_XDU) {
 585                 /* Here we lost an TX interrupt, so
 586                  * restart transmitting the whole frame on HDLC
 587                  * in transparent mode we send the next data
 588                  */
 589                 pr_warning("%s: ch%d stat %x XDU %s\n", fc->name, bch->nr,
 590                            stat, bch->tx_skb ? "tx_skb" : "no tx_skb");
 591                 if (bch->tx_skb && bch->tx_skb->len) {
 592                         if (!test_bit(FLG_TRANSPARENT, &bch->Flags))
 593                                 bch->tx_idx = 0;
 594                 } else if (test_bit(FLG_FILLEMPTY, &bch->Flags)) {
 595                         test_and_set_bit(FLG_TX_EMPTY, &bch->Flags);
 596                 }
 597                 hdlc->ctrl.sr.xml = 0;
 598                 hdlc->ctrl.sr.cmd |= HDLC_CMD_XRS;
 599                 write_ctrl(bch, 1);
 600                 hdlc->ctrl.sr.cmd &= ~HDLC_CMD_XRS;
 601                 HDLC_irq_xpr(bch);
 602                 return;
 603         } else if (stat & HDLC_INT_XPR)
 604                 HDLC_irq_xpr(bch);
 605 }
 606
 607 static inline void
 608 HDLC_irq_main(struct fritzcard *fc)
 609 {
 610         u32 stat;
 611         struct bchannel *bch;
 612
 613         stat = read_status(fc, 1);
 614         if (stat & HDLC_INT_MASK) {
 615                 bch = Sel_BCS(fc, 1);
 616                 if (bch)
 617                         HDLC_irq(bch, stat);
 618                 else
 619                         pr_debug("%s: spurious ch1 IRQ\n", fc->name);
 620         }
 621         stat = read_status(fc, 2);
 622         if (stat & HDLC_INT_MASK) {
 623                 bch = Sel_BCS(fc, 2);
 624                 if (bch)
 625                         HDLC_irq(bch, stat);
 626                 else
 627                         pr_debug("%s: spurious ch2 IRQ\n", fc->name);
 628         }
 629 }
 630
 631 static irqreturn_t
 632 avm_fritz_interrupt(int intno, void *dev_id)
 633 {
 634         struct fritzcard *fc = dev_id;
 635         u8 val;
 636         u8 sval;
 637
 638         spin_lock(&fc->lock);
 639         sval = inb(fc->addr + 2);
 640         pr_debug("%s: irq stat0 %x\n", fc->name, sval);
 641         if ((sval & AVM_STATUS0_IRQ_MASK) == AVM_STATUS0_IRQ_MASK) {
 642                 /* shared  IRQ from other HW */
 643                 spin_unlock(&fc->lock);
 644                 return IRQ_NONE;
 645         }
 646         fc->irqcnt++;
 647
 648         if (!(sval & AVM_STATUS0_IRQ_ISAC)) {
 649                 val = ReadISAC_V1(fc, ISAC_ISTA);
 650                 mISDNisac_irq(&fc->isac, val);
 651         }
 652         if (!(sval & AVM_STATUS0_IRQ_HDLC))
 653                 HDLC_irq_main(fc);
 654         spin_unlock(&fc->lock);
 655         return IRQ_HANDLED;
 656 }
 657
 658 static irqreturn_t
 659 avm_fritzv2_interrupt(int intno, void *dev_id)
 660 {
 661         struct fritzcard *fc = dev_id;
 662         u8 val;
 663         u8 sval;
 664
 665         spin_lock(&fc->lock);
 666         sval = inb(fc->addr + 2);
 667         pr_debug("%s: irq stat0 %x\n", fc->name, sval);
 668         if (!(sval & AVM_STATUS0_IRQ_MASK)) {
 669                 /* shared  IRQ from other HW */
 670                 spin_unlock(&fc->lock);
 671                 return IRQ_NONE;
 672         }
 673         fc->irqcnt++;
 674
 675         if (sval & AVM_STATUS0_IRQ_HDLC)
 676                 HDLC_irq_main(fc);
 677         if (sval & AVM_STATUS0_IRQ_ISAC) {
 678                 val = ReadISAC_V2(fc, ISACX_ISTA);
 679                 mISDNisac_irq(&fc->isac, val);
 680         }
 681         if (sval & AVM_STATUS0_IRQ_TIMER) {
 682                 pr_debug("%s: timer irq\n", fc->name);
 683                 outb(fc->ctrlreg | AVM_STATUS0_RES_TIMER, fc->addr + 2);
 684                 udelay(1);
 685                 outb(fc->ctrlreg, fc->addr + 2);
 686         }
 687         spin_unlock(&fc->lock);
 688         return IRQ_HANDLED;
 689 }
 690
 691 static int
 692 avm_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)
 693 {
 694         struct bchannel *bch = container_of(ch, struct bchannel, ch);
 695         struct fritzcard *fc = bch->hw;
 696         int ret = -EINVAL;
 697         struct mISDNhead *hh = mISDN_HEAD_P(skb);
 698         unsigned long flags;
 699
 700         switch (hh->prim) {
 701         case PH_DATA_REQ:
 702                 spin_lock_irqsave(&fc->lock, flags);
 703                 ret = bchannel_senddata(bch, skb);
 704                 if (ret > 0) { /* direct TX */
 705                         hdlc_fill_fifo(bch);
 706                         ret = 0;
 707                 }
 708                 spin_unlock_irqrestore(&fc->lock, flags);
 709                 return ret;
 710         case PH_ACTIVATE_REQ:
 711                 spin_lock_irqsave(&fc->lock, flags);
 712                 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
 713                         ret = modehdlc(bch, ch->protocol);
 714                 else
 715                         ret = 0;
 716                 spin_unlock_irqrestore(&fc->lock, flags);
 717                 if (!ret)
 718                         _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
 719                                     NULL, GFP_KERNEL);
 720                 break;
 721         case PH_DEACTIVATE_REQ:
 722                 spin_lock_irqsave(&fc->lock, flags);
 723                 mISDN_clear_bchannel(bch);
 724                 modehdlc(bch, ISDN_P_NONE);
 725                 spin_unlock_irqrestore(&fc->lock, flags);
 726                 _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
 727                             NULL, GFP_KERNEL);
 728                 ret = 0;
 729                 break;
 730         }
 731         if (!ret)
 732                 dev_kfree_skb(skb);
 733         return ret;
 734 }
 735
 736 static void
 737 inithdlc(struct fritzcard *fc)
 738 {
 739         modehdlc(&fc->bch[0], -1);
 740         modehdlc(&fc->bch[1], -1);
 741 }
 742
 743 void
 744 clear_pending_hdlc_ints(struct fritzcard *fc)
 745 {
 746         u32 val;
 747
 748         val = read_status(fc, 1);
 749         pr_debug("%s: HDLC 1 STA %x\n", fc->name, val);
 750         val = read_status(fc, 2);
 751         pr_debug("%s: HDLC 2 STA %x\n", fc->name, val);
 752 }
 753
 754 static void
 755 reset_avm(struct fritzcard *fc)
 756 {
 757         switch (fc->type) {
 758         case AVM_FRITZ_PCI:
 759                 fc->ctrlreg = AVM_STATUS0_RESET | AVM_STATUS0_DIS_TIMER;
 760                 break;
 761         case AVM_FRITZ_PCIV2:
 762                 fc->ctrlreg = AVM_STATUS0_RESET;
 763                 break;
 764         }
 765         if (debug & DEBUG_HW)
 766                 pr_notice("%s: reset\n", fc->name);
 767         disable_hwirq(fc);
 768         mdelay(5);
 769         switch (fc->type) {
 770         case AVM_FRITZ_PCI:
 771                 fc->ctrlreg = AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER;
 772                 disable_hwirq(fc);
 773                 outb(AVM_STATUS1_ENA_IOM, fc->addr + 3);
 774                 break;
 775         case AVM_FRITZ_PCIV2:
 776                 fc->ctrlreg = 0;
 777                 disable_hwirq(fc);
 778                 break;
 779         }
 780         mdelay(1);
 781         if (debug & DEBUG_HW)
 782                 pr_notice("%s: S0/S1 %x/%x\n", fc->name,
 783                           inb(fc->addr + 2), inb(fc->addr + 3));
 784 }
 785
 786 static int
 787 init_card(struct fritzcard *fc)
 788 {
 789         int             ret, cnt = 3;
 790         u_long          flags;
 791
 792         reset_avm(fc); /* disable IRQ */
 793         if (fc->type == AVM_FRITZ_PCIV2)
 794                 ret = request_irq(fc->irq, avm_fritzv2_interrupt,
 795                                   IRQF_SHARED, fc->name, fc);
 796         else
 797                 ret = request_irq(fc->irq, avm_fritz_interrupt,
 798                                   IRQF_SHARED, fc->name, fc);
 799         if (ret) {
 800                 pr_info("%s: couldn't get interrupt %d\n",
 801                         fc->name, fc->irq);
 802                 return ret;
 803         }
 804         while (cnt--) {
 805                 spin_lock_irqsave(&fc->lock, flags);
 806                 ret = fc->isac.init(&fc->isac);
 807                 if (ret) {
 808                         spin_unlock_irqrestore(&fc->lock, flags);
 809                         pr_info("%s: ISAC init failed with %d\n",
 810                                 fc->name, ret);
 811                         break;
 812                 }
 813                 clear_pending_hdlc_ints(fc);
 814                 inithdlc(fc);
 815                 enable_hwirq(fc);
 816                 /* RESET Receiver and Transmitter */
 817                 if (fc->type == AVM_FRITZ_PCIV2) {
 818                         WriteISAC_V2(fc, ISACX_MASK, 0);
 819                         WriteISAC_V2(fc, ISACX_CMDRD, 0x41);
 820                 } else {
 821                         WriteISAC_V1(fc, ISAC_MASK, 0);
 822                         WriteISAC_V1(fc, ISAC_CMDR, 0x41);
 823                 }
 824                 spin_unlock_irqrestore(&fc->lock, flags);
 825                 /* Timeout 10ms */
 826                 msleep_interruptible(10);
 827                 if (debug & DEBUG_HW)
 828                         pr_notice("%s: IRQ %d count %d\n", fc->name,
 829                                   fc->irq, fc->irqcnt);
 830                 if (!fc->irqcnt) {
 831                         pr_info("%s: IRQ(%d) getting no IRQs during init %d\n",
 832                                 fc->name, fc->irq, 3 - cnt);
 833                         reset_avm(fc);
 834                 } else
 835                         return 0;
 836         }
 837         free_irq(fc->irq, fc);
 838         return -EIO;
 839 }
 840
 841 static int
 842 channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
 843 {
 844         return mISDN_ctrl_bchannel(bch, cq);
 845 }
 846
 847 static int
 848 avm_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
 849 {
 850         struct bchannel *bch = container_of(ch, struct bchannel, ch);
 851         struct fritzcard *fc = bch->hw;
 852         int ret = -EINVAL;
 853         u_long flags;
 854
 855         pr_debug("%s: %s cmd:%x %p\n", fc->name, __func__, cmd, arg);
 856         switch (cmd) {
 857         case CLOSE_CHANNEL:
 858                 test_and_clear_bit(FLG_OPEN, &bch->Flags);
 859                 spin_lock_irqsave(&fc->lock, flags);
 860                 mISDN_freebchannel(bch);
 861                 modehdlc(bch, ISDN_P_NONE);
 862                 spin_unlock_irqrestore(&fc->lock, flags);
 863                 ch->protocol = ISDN_P_NONE;
 864                 ch->peer = NULL;
 865                 module_put(THIS_MODULE);
 866                 ret = 0;
 867                 break;
 868         case CONTROL_CHANNEL:
 869                 ret = channel_bctrl(bch, arg);
 870                 break;
 871         default:
 872                 pr_info("%s: %s unknown prim(%x)\n", fc->name, __func__, cmd);
 873         }
 874         return ret;
 875 }
 876
 877 static int
 878 channel_ctrl(struct fritzcard  *fc, struct mISDN_ctrl_req *cq)
 879 {
 880         int     ret = 0;
 881
 882         switch (cq->op) {
 883         case MISDN_CTRL_GETOP:
 884                 cq->op = MISDN_CTRL_LOOP | MISDN_CTRL_L1_TIMER3;
 885                 break;
 886         case MISDN_CTRL_LOOP:
 887                 /* cq->channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */
 888                 if (cq->channel < 0 || cq->channel > 3) {
 889                         ret = -EINVAL;
 890                         break;
 891                 }
 892                 ret = fc->isac.ctrl(&fc->isac, HW_TESTLOOP, cq->channel);
 893                 break;
 894         case MISDN_CTRL_L1_TIMER3:
 895                 ret = fc->isac.ctrl(&fc->isac, HW_TIMER3_VALUE, cq->p1);
 896                 break;
 897         default:
 898                 pr_info("%s: %s unknown Op %x\n", fc->name, __func__, cq->op);
 899                 ret = -EINVAL;
 900                 break;
 901         }
 902         return ret;
 903 }
 904
 905 static int
 906 open_bchannel(struct fritzcard *fc, struct channel_req *rq)
 907 {
 908         struct bchannel         *bch;
 909
 910         if (rq->adr.channel == 0 || rq->adr.channel > 2)
 911                 return -EINVAL;
 912         if (rq->protocol == ISDN_P_NONE)
 913                 return -EINVAL;
 914         bch = &fc->bch[rq->adr.channel - 1];
 915         if (test_and_set_bit(FLG_OPEN, &bch->Flags))
 916                 return -EBUSY; /* b-channel can be only open once */
 917         bch->ch.protocol = rq->protocol;
 918         rq->ch = &bch->ch;
 919         return 0;
 920 }
 921
 922 /*
 923  * device control function
 924  */
 925 static int
 926 avm_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
 927 {
 928         struct mISDNdevice      *dev = container_of(ch, struct mISDNdevice, D);
 929         struct dchannel         *dch = container_of(dev, struct dchannel, dev);
 930         struct fritzcard        *fc = dch->hw;
 931         struct channel_req      *rq;
 932         int                     err = 0;
 933
 934         pr_debug("%s: %s cmd:%x %p\n", fc->name, __func__, cmd, arg);
 935         switch (cmd) {
 936         case OPEN_CHANNEL:
 937                 rq = arg;
 938                 if (rq->protocol == ISDN_P_TE_S0)
 939                         err = fc->isac.open(&fc->isac, rq);
 940                 else
 941                         err = open_bchannel(fc, rq);
 942                 if (err)
 943                         break;
 944                 if (!try_module_get(THIS_MODULE))
 945                         pr_info("%s: cannot get module\n", fc->name);
 946                 break;
 947         case CLOSE_CHANNEL:
 948                 pr_debug("%s: dev(%d) close from %p\n", fc->name, dch->dev.id,
 949                          __builtin_return_address(0));
 950                 module_put(THIS_MODULE);
 951                 break;
 952         case CONTROL_CHANNEL:
 953                 err = channel_ctrl(fc, arg);
 954                 break;
 955         default:
 956                 pr_debug("%s: %s unknown command %x\n",
 957                          fc->name, __func__, cmd);
 958                 return -EINVAL;
 959         }
 960         return err;
 961 }
 962
 963 int
 964 setup_fritz(struct fritzcard *fc)
 965 {
 966         u32 val, ver;
 967
 968         if (!request_region(fc->addr, 32, fc->name)) {
 969                 pr_info("%s: AVM config port %x-%x already in use\n",
 970                         fc->name, fc->addr, fc->addr + 31);
 971                 return -EIO;
 972         }
 973         switch (fc->type) {
 974         case AVM_FRITZ_PCI:
 975                 val = inl(fc->addr);
 976                 outl(AVM_HDLC_1, fc->addr + CHIP_INDEX);
 977                 ver = inl(fc->addr + CHIP_WINDOW + HDLC_STATUS) >> 24;
 978                 if (debug & DEBUG_HW) {
 979                         pr_notice("%s: PCI stat %#x\n", fc->name, val);
 980                         pr_notice("%s: PCI Class %X Rev %d\n", fc->name,
 981                                   val & 0xff, (val >> 8) & 0xff);
 982                         pr_notice("%s: HDLC version %x\n", fc->name, ver & 0xf);
 983                 }
 984                 ASSIGN_FUNC(V1, ISAC, fc->isac);
 985                 fc->isac.type = IPAC_TYPE_ISAC;
 986                 break;
 987         case AVM_FRITZ_PCIV2:
 988                 val = inl(fc->addr);
 989                 ver = inl(fc->addr + AVM_HDLC_STATUS_1) >> 24;
 990                 if (debug & DEBUG_HW) {
 991                         pr_notice("%s: PCI V2 stat %#x\n", fc->name, val);
 992                         pr_notice("%s: PCI V2 Class %X Rev %d\n", fc->name,
 993                                   val & 0xff, (val >> 8) & 0xff);
 994                         pr_notice("%s: HDLC version %x\n", fc->name, ver & 0xf);
 995                 }
 996                 ASSIGN_FUNC(V2, ISAC, fc->isac);
 997                 fc->isac.type = IPAC_TYPE_ISACX;
 998                 break;
 999         default:
1000                 release_region(fc->addr, 32);
1001                 pr_info("%s: AVM unknown type %d\n", fc->name, fc->type);
1002                 return -ENODEV;
1003         }
1004         pr_notice("%s: %s config irq:%d base:0x%X\n", fc->name,
1005                   (fc->type == AVM_FRITZ_PCI) ? "AVM Fritz!CARD PCI" :
1006                   "AVM Fritz!CARD PCIv2", fc->irq, fc->addr);
1007         return 0;
1008 }
1009
1010 static void
1011 release_card(struct fritzcard *card)
1012 {
1013         u_long flags;
1014
1015         disable_hwirq(card);
1016         spin_lock_irqsave(&card->lock, flags);
1017         modehdlc(&card->bch[0], ISDN_P_NONE);
1018         modehdlc(&card->bch[1], ISDN_P_NONE);
1019         spin_unlock_irqrestore(&card->lock, flags);
1020         card->isac.release(&card->isac);
1021         free_irq(card->irq, card);
1022         mISDN_freebchannel(&card->bch[1]);
1023         mISDN_freebchannel(&card->bch[0]);
1024         mISDN_unregister_device(&card->isac.dch.dev);
1025         release_region(card->addr, 32);
1026         pci_disable_device(card->pdev);
1027         pci_set_drvdata(card->pdev, NULL);
1028         write_lock_irqsave(&card_lock, flags);
1029         list_del(&card->list);
1030         write_unlock_irqrestore(&card_lock, flags);
1031         kfree(card);
1032         AVM_cnt--;
1033 }
1034
1035 static int __devinit
1036 setup_instance(struct fritzcard *card)
1037 {
1038         int i, err;
1039         unsigned short minsize;
1040         u_long flags;
1041
1042         snprintf(card->name, MISDN_MAX_IDLEN - 1, "AVM.%d", AVM_cnt + 1);
1043         write_lock_irqsave(&card_lock, flags);
1044         list_add_tail(&card->list, &Cards);
1045         write_unlock_irqrestore(&card_lock, flags);
1046
1047         _set_debug(card);
1048         card->isac.name = card->name;
1049         spin_lock_init(&card->lock);
1050         card->isac.hwlock = &card->lock;
1051         mISDNisac_init(&card->isac, card);
1052
1053         card->isac.dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
1054                 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
1055         card->isac.dch.dev.D.ctrl = avm_dctrl;
1056         for (i = 0; i < 2; i++) {
1057                 card->bch[i].nr = i + 1;
1058                 set_channelmap(i + 1, card->isac.dch.dev.channelmap);
1059                 if (AVM_FRITZ_PCIV2 == card->type)
1060                         minsize = HDLC_FIFO_SIZE_V2;
1061                 else
1062                         minsize = HDLC_FIFO_SIZE_V1;
1063                 mISDN_initbchannel(&card->bch[i], MAX_DATA_MEM, minsize);
1064                 card->bch[i].hw = card;
1065                 card->bch[i].ch.send = avm_l2l1B;
1066                 card->bch[i].ch.ctrl = avm_bctrl;
1067                 card->bch[i].ch.nr = i + 1;
1068                 list_add(&card->bch[i].ch.list, &card->isac.dch.dev.bchannels);
1069         }
1070         err = setup_fritz(card);
1071         if (err)
1072                 goto error;
1073         err = mISDN_register_device(&card->isac.dch.dev, &card->pdev->dev,
1074                                     card->name);
1075         if (err)
1076                 goto error_reg;
1077         err = init_card(card);
1078         if (!err)  {
1079                 AVM_cnt++;
1080                 pr_notice("AVM %d cards installed DEBUG\n", AVM_cnt);
1081                 return 0;
1082         }
1083         mISDN_unregister_device(&card->isac.dch.dev);
1084 error_reg:
1085         release_region(card->addr, 32);
1086 error:
1087         card->isac.release(&card->isac);
1088         mISDN_freebchannel(&card->bch[1]);
1089         mISDN_freebchannel(&card->bch[0]);
1090         write_lock_irqsave(&card_lock, flags);
1091         list_del(&card->list);
1092         write_unlock_irqrestore(&card_lock, flags);
1093         kfree(card);
1094         return err;
1095 }
1096
1097 static int __devinit
1098 fritzpci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1099 {
1100         int err = -ENOMEM;
1101         struct fritzcard *card;
1102
1103         card = kzalloc(sizeof(struct fritzcard), GFP_KERNEL);
1104         if (!card) {
1105                 pr_info("No kmem for fritzcard\n");
1106                 return err;
1107         }
1108         if (pdev->device == PCI_DEVICE_ID_AVM_A1_V2)
1109                 card->type = AVM_FRITZ_PCIV2;
1110         else
1111                 card->type = AVM_FRITZ_PCI;
1112         card->pdev = pdev;
1113         err = pci_enable_device(pdev);
1114         if (err) {
1115                 kfree(card);
1116                 return err;
1117         }
1118
1119         pr_notice("mISDN: found adapter %s at %s\n",
1120                   (char *) ent->driver_data, pci_name(pdev));
1121
1122         card->addr = pci_resource_start(pdev, 1);
1123         card->irq = pdev->irq;
1124         pci_set_drvdata(pdev, card);
1125         err = setup_instance(card);
1126         if (err)
1127                 pci_set_drvdata(pdev, NULL);
1128         return err;
1129 }
1130
1131 static void __devexit
1132 fritz_remove_pci(struct pci_dev *pdev)
1133 {
1134         struct fritzcard *card = pci_get_drvdata(pdev);
1135
1136         if (card)
1137                 release_card(card);
1138         else
1139                 if (debug)
1140                         pr_info("%s: drvdata already removed\n", __func__);
1141 }
1142
1143 static struct pci_device_id fcpci_ids[] __devinitdata = {
1144         { PCI_VENDOR_ID_AVM, PCI_DEVICE_ID_AVM_A1, PCI_ANY_ID, PCI_ANY_ID,
1145           0, 0, (unsigned long) "Fritz!Card PCI"},
1146         { PCI_VENDOR_ID_AVM, PCI_DEVICE_ID_AVM_A1_V2, PCI_ANY_ID, PCI_ANY_ID,
1147           0, 0, (unsigned long) "Fritz!Card PCI v2" },
1148         { }
1149 };
1150 MODULE_DEVICE_TABLE(pci, fcpci_ids);
1151
1152 static struct pci_driver fcpci_driver = {
1153         .name = "fcpci",
1154         .probe = fritzpci_probe,
1155         .remove = __devexit_p(fritz_remove_pci),
1156         .id_table = fcpci_ids,
1157 };
1158
1159 static int __init AVM_init(void)
1160 {
1161         int err;
1162
1163         pr_notice("AVM Fritz PCI driver Rev. %s\n", AVMFRITZ_REV);
1164         err = pci_register_driver(&fcpci_driver);
1165         return err;
1166 }
1167
1168 static void __exit AVM_cleanup(void)
1169 {
1170         pci_unregister_driver(&fcpci_driver);
1171 }
1172
1173 module_init(AVM_init);
1174 module_exit(AVM_cleanup);