2 * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
3 * Copyright (C) 2007, Jes Sorensen <jes@sgi.com> SGI.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 * This file contains the x86-specific lguest code. It used to be all
22 * mixed in with drivers/lguest/core.c but several foolhardy code slashers
23 * wrestled most of the dependencies out to here in preparation for porting
24 * lguest to other architectures (see what I mean by foolhardy?).
26 * This also contains a couple of non-obvious setup and teardown pieces which
27 * were implemented after days of debugging pain.
29 #include <linux/kernel.h>
30 #include <linux/start_kernel.h>
31 #include <linux/string.h>
32 #include <linux/console.h>
33 #include <linux/screen_info.h>
34 #include <linux/irq.h>
35 #include <linux/interrupt.h>
36 #include <linux/clocksource.h>
37 #include <linux/clockchips.h>
38 #include <linux/cpu.h>
39 #include <linux/lguest.h>
40 #include <linux/lguest_launcher.h>
41 #include <asm/paravirt.h>
42 #include <asm/param.h>
44 #include <asm/pgtable.h>
46 #include <asm/setup.h>
47 #include <asm/lguest.h>
48 #include <asm/uaccess.h>
50 #include <asm/tlbflush.h>
53 static int cpu_had_pge;
57 unsigned short segment;
60 /* Offset from where switcher.S was compiled to where we've copied it */
61 static unsigned long switcher_offset(void)
63 return switcher_addr - (unsigned long)start_switcher_text;
66 /* This cpu's struct lguest_pages (after the Switcher text page) */
67 static struct lguest_pages *lguest_pages(unsigned int cpu)
69 return &(((struct lguest_pages *)(switcher_addr + PAGE_SIZE))[cpu]);
72 static DEFINE_PER_CPU(struct lg_cpu *, lg_last_cpu);
75 * We approach the Switcher.
77 * Remember that each CPU has two pages which are visible to the Guest when it
78 * runs on that CPU. This has to contain the state for that Guest: we copy the
79 * state in just before we run the Guest.
81 * Each Guest has "changed" flags which indicate what has changed in the Guest
82 * since it last ran. We saw this set in interrupts_and_traps.c and
85 static void copy_in_guest_info(struct lg_cpu *cpu, struct lguest_pages *pages)
88 * Copying all this data can be quite expensive. We usually run the
89 * same Guest we ran last time (and that Guest hasn't run anywhere else
90 * meanwhile). If that's not the case, we pretend everything in the
93 if (__this_cpu_read(lg_last_cpu) != cpu || cpu->last_pages != pages) {
94 __this_cpu_write(lg_last_cpu, cpu);
95 cpu->last_pages = pages;
96 cpu->changed = CHANGED_ALL;
100 * These copies are pretty cheap, so we do them unconditionally: */
101 /* Save the current Host top-level page directory.
103 pages->state.host_cr3 = __pa(current->mm->pgd);
105 * Set up the Guest's page tables to see this CPU's pages (and no
106 * other CPU's pages).
108 map_switcher_in_guest(cpu, pages);
110 * Set up the two "TSS" members which tell the CPU what stack to use
111 * for traps which do directly into the Guest (ie. traps at privilege
114 pages->state.guest_tss.sp1 = cpu->esp1;
115 pages->state.guest_tss.ss1 = cpu->ss1;
117 /* Copy direct-to-Guest trap entries. */
118 if (cpu->changed & CHANGED_IDT)
119 copy_traps(cpu, pages->state.guest_idt, default_idt_entries);
121 /* Copy all GDT entries which the Guest can change. */
122 if (cpu->changed & CHANGED_GDT)
123 copy_gdt(cpu, pages->state.guest_gdt);
124 /* If only the TLS entries have changed, copy them. */
125 else if (cpu->changed & CHANGED_GDT_TLS)
126 copy_gdt_tls(cpu, pages->state.guest_gdt);
128 /* Mark the Guest as unchanged for next time. */
132 /* Finally: the code to actually call into the Switcher to run the Guest. */
133 static void run_guest_once(struct lg_cpu *cpu, struct lguest_pages *pages)
135 /* This is a dummy value we need for GCC's sake. */
136 unsigned int clobber;
139 * Copy the guest-specific information into this CPU's "struct
142 copy_in_guest_info(cpu, pages);
145 * Set the trap number to 256 (impossible value). If we fault while
146 * switching to the Guest (bad segment registers or bug), this will
147 * cause us to abort the Guest.
149 cpu->regs->trapnum = 256;
152 * Now: we push the "eflags" register on the stack, then do an "lcall".
153 * This is how we change from using the kernel code segment to using
154 * the dedicated lguest code segment, as well as jumping into the
157 * The lcall also pushes the old code segment (KERNEL_CS) onto the
158 * stack, then the address of this call. This stack layout happens to
159 * exactly match the stack layout created by an interrupt...
161 asm volatile("pushf; lcall *%4"
163 * This is how we tell GCC that %eax ("a") and %ebx ("b")
164 * are changed by this routine. The "=" means output.
166 : "=a"(clobber), "=b"(clobber)
168 * %eax contains the pages pointer. ("0" refers to the
169 * 0-th argument above, ie "a"). %ebx contains the
170 * physical address of the Guest's top-level page
174 "1"(__pa(cpu->lg->pgdirs[cpu->cpu_pgd].pgdir)),
177 * We tell gcc that all these registers could change,
178 * which means we don't have to save and restore them in
181 : "memory", "%edx", "%ecx", "%edi", "%esi");
186 * There are hooks in the scheduler which we can register to tell when we
187 * get kicked off the CPU (preempt_notifier_register()). This would allow us
188 * to lazily disable SYSENTER which would regain some performance, and should
189 * also simplify copy_in_guest_info(). Note that we'd still need to restore
190 * things when we exit to Launcher userspace, but that's fairly easy.
192 * We could also try using these hooks for PGE, but that might be too expensive.
194 * The hooks were designed for KVM, but we can also put them to good use.
198 * This is the i386-specific code to setup and run the Guest. Interrupts
199 * are disabled: we own the CPU.
201 void lguest_arch_run_guest(struct lg_cpu *cpu)
204 * Remember the awfully-named TS bit? If the Guest has asked to set it
205 * we set it now, so we can trap and pass that trap to the Guest if it
208 if (cpu->ts && user_has_fpu())
212 * SYSENTER is an optimized way of doing system calls. We can't allow
213 * it because it always jumps to privilege level 0. A normal Guest
214 * won't try it because we don't advertise it in CPUID, but a malicious
215 * Guest (or malicious Guest userspace program) could, so we tell the
216 * CPU to disable it before running the Guest.
218 if (boot_cpu_has(X86_FEATURE_SEP))
219 wrmsr(MSR_IA32_SYSENTER_CS, 0, 0);
222 * Now we actually run the Guest. It will return when something
223 * interesting happens, and we can examine its registers to see what it
226 run_guest_once(cpu, lguest_pages(raw_smp_processor_id()));
229 * Note that the "regs" structure contains two extra entries which are
230 * not really registers: a trap number which says what interrupt or
231 * trap made the switcher code come back, and an error code which some
235 /* Restore SYSENTER if it's supposed to be on. */
236 if (boot_cpu_has(X86_FEATURE_SEP))
237 wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
239 /* Clear the host TS bit if it was set above. */
240 if (cpu->ts && user_has_fpu())
244 * If the Guest page faulted, then the cr2 register will tell us the
245 * bad virtual address. We have to grab this now, because once we
246 * re-enable interrupts an interrupt could fault and thus overwrite
247 * cr2, or we could even move off to a different CPU.
249 if (cpu->regs->trapnum == 14)
250 cpu->arch.last_pagefault = read_cr2();
252 * Similarly, if we took a trap because the Guest used the FPU,
253 * we have to restore the FPU it expects to see.
254 * math_state_restore() may sleep and we may even move off to
255 * a different CPU. So all the critical stuff should be done
258 else if (cpu->regs->trapnum == 7 && !user_has_fpu())
259 math_state_restore();
263 * Now we've examined the hypercall code; our Guest can make requests.
264 * Our Guest is usually so well behaved; it never tries to do things it isn't
265 * allowed to, and uses hypercalls instead. Unfortunately, Linux's paravirtual
266 * infrastructure isn't quite complete, because it doesn't contain replacements
267 * for the Intel I/O instructions. As a result, the Guest sometimes fumbles
268 * across one during the boot process as it probes for various things which are
269 * usually attached to a PC.
271 * When the Guest uses one of these instructions, we get a trap (General
272 * Protection Fault) and come here. We see if it's one of those troublesome
273 * instructions and skip over it. We return true if we did.
275 static int emulate_insn(struct lg_cpu *cpu)
278 unsigned int insnlen = 0, in = 0, small_operand = 0;
280 * The eip contains the *virtual* address of the Guest's instruction:
281 * walk the Guest's page tables to find the "physical" address.
283 unsigned long physaddr = guest_pa(cpu, cpu->regs->eip);
286 * This must be the Guest kernel trying to do something, not userspace!
287 * The bottom two bits of the CS segment register are the privilege
290 if ((cpu->regs->cs & 3) != GUEST_PL)
293 /* Decoding x86 instructions is icky. */
294 insn = lgread(cpu, physaddr, u8);
297 * Around 2.6.33, the kernel started using an emulation for the
298 * cmpxchg8b instruction in early boot on many configurations. This
299 * code isn't paravirtualized, and it tries to disable interrupts.
300 * Ignore it, which will Mostly Work.
303 /* "cli", or Clear Interrupt Enable instruction. Skip it. */
309 * 0x66 is an "operand prefix". It means a 16, not 32 bit in/out.
313 /* The instruction is 1 byte so far, read the next byte. */
315 insn = lgread(cpu, physaddr + insnlen, u8);
319 * We can ignore the lower bit for the moment and decode the 4 opcodes
320 * we need to emulate.
322 switch (insn & 0xFE) {
323 case 0xE4: /* in <next byte>,%al */
327 case 0xEC: /* in (%dx),%al */
331 case 0xE6: /* out %al,<next byte> */
334 case 0xEE: /* out %al,(%dx) */
338 /* OK, we don't know what this is, can't emulate. */
343 * If it was an "IN" instruction, they expect the result to be read
344 * into %eax, so we change %eax. We always return all-ones, which
345 * traditionally means "there's nothing there".
348 /* Lower bit tells means it's a 32/16 bit access */
351 cpu->regs->eax |= 0xFFFF;
353 cpu->regs->eax = 0xFFFFFFFF;
355 cpu->regs->eax |= 0xFF;
357 /* Finally, we've "done" the instruction, so move past it. */
358 cpu->regs->eip += insnlen;
363 /*H:050 Once we've re-enabled interrupts, we look at why the Guest exited. */
364 void lguest_arch_handle_trap(struct lg_cpu *cpu)
366 switch (cpu->regs->trapnum) {
367 case 13: /* We've intercepted a General Protection Fault. */
369 * Check if this was one of those annoying IN or OUT
370 * instructions which we need to emulate. If so, we just go
371 * back into the Guest after we've done it.
373 if (cpu->regs->errcode == 0) {
374 if (emulate_insn(cpu))
378 case 14: /* We've intercepted a Page Fault. */
380 * The Guest accessed a virtual address that wasn't mapped.
381 * This happens a lot: we don't actually set up most of the page
382 * tables for the Guest at all when we start: as it runs it asks
383 * for more and more, and we set them up as required. In this
384 * case, we don't even tell the Guest that the fault happened.
386 * The errcode tells whether this was a read or a write, and
387 * whether kernel or userspace code.
389 if (demand_page(cpu, cpu->arch.last_pagefault,
394 * OK, it's really not there (or not OK): the Guest needs to
395 * know. We write out the cr2 value so it knows where the
398 * Note that if the Guest were really messed up, this could
399 * happen before it's done the LHCALL_LGUEST_INIT hypercall, so
400 * lg->lguest_data could be NULL
402 if (cpu->lg->lguest_data &&
403 put_user(cpu->arch.last_pagefault,
404 &cpu->lg->lguest_data->cr2))
405 kill_guest(cpu, "Writing cr2");
407 case 7: /* We've intercepted a Device Not Available fault. */
409 * If the Guest doesn't want to know, we already restored the
410 * Floating Point Unit, so we just continue without telling it.
417 * These values mean a real interrupt occurred, in which case
418 * the Host handler has already been run. We just do a
419 * friendly check if another process should now be run, then
420 * return to run the Guest again.
424 case LGUEST_TRAP_ENTRY:
426 * Our 'struct hcall_args' maps directly over our regs: we set
427 * up the pointer now to indicate a hypercall is pending.
429 cpu->hcall = (struct hcall_args *)cpu->regs;
433 /* We didn't handle the trap, so it needs to go to the Guest. */
434 if (!deliver_trap(cpu, cpu->regs->trapnum))
436 * If the Guest doesn't have a handler (either it hasn't
437 * registered any yet, or it's one of the faults we don't let
438 * it handle), it dies with this cryptic error message.
440 kill_guest(cpu, "unhandled trap %li at %#lx (%#lx)",
441 cpu->regs->trapnum, cpu->regs->eip,
442 cpu->regs->trapnum == 14 ? cpu->arch.last_pagefault
443 : cpu->regs->errcode);
447 * Now we can look at each of the routines this calls, in increasing order of
448 * complexity: do_hypercalls(), emulate_insn(), maybe_do_interrupt(),
449 * deliver_trap() and demand_page(). After all those, we'll be ready to
450 * examine the Switcher, and our philosophical understanding of the Host/Guest
451 * duality will be complete.
453 static void adjust_pge(void *on)
456 cr4_set_bits(X86_CR4_PGE);
458 cr4_clear_bits(X86_CR4_PGE);
462 * Now the Switcher is mapped and every thing else is ready, we need to do
463 * some more i386-specific initialization.
465 void __init lguest_arch_host_init(void)
470 * Most of the x86/switcher_32.S doesn't care that it's been moved; on
471 * Intel, jumps are relative, and it doesn't access any references to
472 * external code or data.
474 * The only exception is the interrupt handlers in switcher.S: their
475 * addresses are placed in a table (default_idt_entries), so we need to
476 * update the table with the new addresses. switcher_offset() is a
477 * convenience function which returns the distance between the
478 * compiled-in switcher code and the high-mapped copy we just made.
480 for (i = 0; i < IDT_ENTRIES; i++)
481 default_idt_entries[i] += switcher_offset();
484 * Set up the Switcher's per-cpu areas.
486 * Each CPU gets two pages of its own within the high-mapped region
487 * (aka. "struct lguest_pages"). Much of this can be initialized now,
488 * but some depends on what Guest we are running (which is set up in
489 * copy_in_guest_info()).
491 for_each_possible_cpu(i) {
492 /* lguest_pages() returns this CPU's two pages. */
493 struct lguest_pages *pages = lguest_pages(i);
494 /* This is a convenience pointer to make the code neater. */
495 struct lguest_ro_state *state = &pages->state;
498 * The Global Descriptor Table: the Host has a different one
499 * for each CPU. We keep a descriptor for the GDT which says
500 * where it is and how big it is (the size is actually the last
501 * byte, not the size, hence the "-1").
503 state->host_gdt_desc.size = GDT_SIZE-1;
504 state->host_gdt_desc.address = (long)get_cpu_gdt_table(i);
507 * All CPUs on the Host use the same Interrupt Descriptor
508 * Table, so we just use store_idt(), which gets this CPU's IDT
511 store_idt(&state->host_idt_desc);
514 * The descriptors for the Guest's GDT and IDT can be filled
515 * out now, too. We copy the GDT & IDT into ->guest_gdt and
516 * ->guest_idt before actually running the Guest.
518 state->guest_idt_desc.size = sizeof(state->guest_idt)-1;
519 state->guest_idt_desc.address = (long)&state->guest_idt;
520 state->guest_gdt_desc.size = sizeof(state->guest_gdt)-1;
521 state->guest_gdt_desc.address = (long)&state->guest_gdt;
524 * We know where we want the stack to be when the Guest enters
525 * the Switcher: in pages->regs. The stack grows upwards, so
526 * we start it at the end of that structure.
528 state->guest_tss.sp0 = (long)(&pages->regs + 1);
530 * And this is the GDT entry to use for the stack: we keep a
531 * couple of special LGUEST entries.
533 state->guest_tss.ss0 = LGUEST_DS;
536 * x86 can have a finegrained bitmap which indicates what I/O
537 * ports the process can use. We set it to the end of our
538 * structure, meaning "none".
540 state->guest_tss.io_bitmap_base = sizeof(state->guest_tss);
543 * Some GDT entries are the same across all Guests, so we can
546 setup_default_gdt_entries(state);
547 /* Most IDT entries are the same for all Guests, too.*/
548 setup_default_idt_entries(state, default_idt_entries);
551 * The Host needs to be able to use the LGUEST segments on this
552 * CPU, too, so put them in the Host GDT.
554 get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT;
555 get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT;
559 * In the Switcher, we want the %cs segment register to use the
560 * LGUEST_CS GDT entry: we've put that in the Host and Guest GDTs, so
561 * it will be undisturbed when we switch. To change %cs and jump we
562 * need this structure to feed to Intel's "lcall" instruction.
564 lguest_entry.offset = (long)switch_to_guest + switcher_offset();
565 lguest_entry.segment = LGUEST_CS;
568 * Finally, we need to turn off "Page Global Enable". PGE is an
569 * optimization where page table entries are specially marked to show
570 * they never change. The Host kernel marks all the kernel pages this
571 * way because it's always present, even when userspace is running.
573 * Lguest breaks this: unbeknownst to the rest of the Host kernel, we
574 * switch to the Guest kernel. If you don't disable this on all CPUs,
575 * you'll get really weird bugs that you'll chase for two days.
577 * I used to turn PGE off every time we switched to the Guest and back
578 * on when we return, but that slowed the Switcher down noticibly.
582 * We don't need the complexity of CPUs coming and going while we're
586 if (cpu_has_pge) { /* We have a broader idea of "global". */
587 /* Remember that this was originally set (for cleanup). */
590 * adjust_pge is a helper function which sets or unsets the PGE
591 * bit on its CPU, depending on the argument (0 == unset).
593 on_each_cpu(adjust_pge, (void *)0, 1);
594 /* Turn off the feature in the global feature set. */
595 clear_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE);
601 void __exit lguest_arch_host_fini(void)
603 /* If we had PGE before we started, turn it back on now. */
606 set_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE);
607 /* adjust_pge's argument "1" means set PGE. */
608 on_each_cpu(adjust_pge, (void *)1, 1);
614 /*H:122 The i386-specific hypercalls simply farm out to the right functions. */
615 int lguest_arch_do_hcall(struct lg_cpu *cpu, struct hcall_args *args)
617 switch (args->arg0) {
618 case LHCALL_LOAD_GDT_ENTRY:
619 load_guest_gdt_entry(cpu, args->arg1, args->arg2, args->arg3);
621 case LHCALL_LOAD_IDT_ENTRY:
622 load_guest_idt_entry(cpu, args->arg1, args->arg2, args->arg3);
624 case LHCALL_LOAD_TLS:
625 guest_load_tls(cpu, args->arg1);
628 /* Bad Guest. Bad! */
634 /*H:126 i386-specific hypercall initialization: */
635 int lguest_arch_init_hypercalls(struct lg_cpu *cpu)
640 * The pointer to the Guest's "struct lguest_data" is the only argument.
641 * We check that address now.
643 if (!lguest_address_ok(cpu->lg, cpu->hcall->arg1,
644 sizeof(*cpu->lg->lguest_data)))
648 * Having checked it, we simply set lg->lguest_data to point straight
649 * into the Launcher's memory at the right place and then use
650 * copy_to_user/from_user from now on, instead of lgread/write. I put
651 * this in to show that I'm not immune to writing stupid
654 cpu->lg->lguest_data = cpu->lg->mem_base + cpu->hcall->arg1;
657 * We insist that the Time Stamp Counter exist and doesn't change with
658 * cpu frequency. Some devious chip manufacturers decided that TSC
659 * changes could be handled in software. I decided that time going
660 * backwards might be good for benchmarks, but it's bad for users.
662 * We also insist that the TSC be stable: the kernel detects unreliable
663 * TSCs for its own purposes, and we use that here.
665 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && !check_tsc_unstable())
669 if (put_user(tsc_speed, &cpu->lg->lguest_data->tsc_khz))
672 /* The interrupt code might not like the system call vector. */
673 if (!check_syscall_vector(cpu->lg))
674 kill_guest(cpu, "bad syscall vector");
681 * Most of the Guest's registers are left alone: we used get_zeroed_page() to
682 * allocate the structure, so they will be 0.
684 void lguest_arch_setup_regs(struct lg_cpu *cpu, unsigned long start)
686 struct lguest_regs *regs = cpu->regs;
689 * There are four "segment" registers which the Guest needs to boot:
690 * The "code segment" register (cs) refers to the kernel code segment
691 * __KERNEL_CS, and the "data", "extra" and "stack" segment registers
692 * refer to the kernel data segment __KERNEL_DS.
694 * The privilege level is packed into the lower bits. The Guest runs
695 * at privilege level 1 (GUEST_PL).
697 regs->ds = regs->es = regs->ss = __KERNEL_DS|GUEST_PL;
698 regs->cs = __KERNEL_CS|GUEST_PL;
701 * The "eflags" register contains miscellaneous flags. Bit 1 (0x002)
702 * is supposed to always be "1". Bit 9 (0x200) controls whether
703 * interrupts are enabled. We always leave interrupts enabled while
706 regs->eflags = X86_EFLAGS_IF | X86_EFLAGS_FIXED;
709 * The "Extended Instruction Pointer" register says where the Guest is
715 * %esi points to our boot information, at physical address 0, so don't
719 /* There are a couple of GDT entries the Guest expects at boot. */
720 setup_guest_gdt(cpu);