drivers/media/dvb-frontends/cxd2820r_core.c

   1 /*
   2  * Sony CXD2820R demodulator driver
   3  *
   4  * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
   5  *
   6  *    This program is free software; you can redistribute it and/or modify
   7  *    it under the terms of the GNU General Public License as published by
   8  *    the Free Software Foundation; either version 2 of the License, or
   9  *    (at your option) any later version.
  10  *
  11  *    This program is distributed in the hope that it will be useful,
  12  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *    GNU General Public License for more details.
  15  *
  16  *    You should have received a copy of the GNU General Public License along
  17  *    with this program; if not, write to the Free Software Foundation, Inc.,
  18  *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19  */
  20
  21
  22 #include "cxd2820r_priv.h"
  23
  24 /* Max transfer size done by I2C transfer functions */
  25 #define MAX_XFER_SIZE  64
  26
  27 /* write multiple registers */
  28 static int cxd2820r_wr_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
  29         u8 *val, int len)
  30 {
  31         int ret;
  32         u8 buf[MAX_XFER_SIZE];
  33         struct i2c_msg msg[1] = {
  34                 {
  35                         .addr = i2c,
  36                         .flags = 0,
  37                         .len = len + 1,
  38                         .buf = buf,
  39                 }
  40         };
  41
  42         if (1 + len > sizeof(buf)) {
  43                 dev_warn(&priv->i2c->dev,
  44                          "%s: i2c wr reg=%04x: len=%d is too big!\n",
  45                          KBUILD_MODNAME, reg, len);
  46                 return -EINVAL;
  47         }
  48
  49         buf[0] = reg;
  50         memcpy(&buf[1], val, len);
  51
  52         ret = i2c_transfer(priv->i2c, msg, 1);
  53         if (ret == 1) {
  54                 ret = 0;
  55         } else {
  56                 dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
  57                                 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
  58                 ret = -EREMOTEIO;
  59         }
  60         return ret;
  61 }
  62
  63 /* read multiple registers */
  64 static int cxd2820r_rd_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
  65         u8 *val, int len)
  66 {
  67         int ret;
  68         u8 buf[MAX_XFER_SIZE];
  69         struct i2c_msg msg[2] = {
  70                 {
  71                         .addr = i2c,
  72                         .flags = 0,
  73                         .len = 1,
  74                         .buf = &reg,
  75                 }, {
  76                         .addr = i2c,
  77                         .flags = I2C_M_RD,
  78                         .len = len,
  79                         .buf = buf,
  80                 }
  81         };
  82
  83         if (len > sizeof(buf)) {
  84                 dev_warn(&priv->i2c->dev,
  85                          "%s: i2c wr reg=%04x: len=%d is too big!\n",
  86                          KBUILD_MODNAME, reg, len);
  87                 return -EINVAL;
  88         }
  89
  90         ret = i2c_transfer(priv->i2c, msg, 2);
  91         if (ret == 2) {
  92                 memcpy(val, buf, len);
  93                 ret = 0;
  94         } else {
  95                 dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
  96                                 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
  97                 ret = -EREMOTEIO;
  98         }
  99
 100         return ret;
 101 }
 102
 103 /* write multiple registers */
 104 int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
 105         int len)
 106 {
 107         int ret;
 108         u8 i2c_addr;
 109         u8 reg = (reginfo >> 0) & 0xff;
 110         u8 bank = (reginfo >> 8) & 0xff;
 111         u8 i2c = (reginfo >> 16) & 0x01;
 112
 113         /* select I2C */
 114         if (i2c)
 115                 i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
 116         else
 117                 i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
 118
 119         /* switch bank if needed */
 120         if (bank != priv->bank[i2c]) {
 121                 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
 122                 if (ret)
 123                         return ret;
 124                 priv->bank[i2c] = bank;
 125         }
 126         return cxd2820r_wr_regs_i2c(priv, i2c_addr, reg, val, len);
 127 }
 128
 129 /* read multiple registers */
 130 int cxd2820r_rd_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
 131         int len)
 132 {
 133         int ret;
 134         u8 i2c_addr;
 135         u8 reg = (reginfo >> 0) & 0xff;
 136         u8 bank = (reginfo >> 8) & 0xff;
 137         u8 i2c = (reginfo >> 16) & 0x01;
 138
 139         /* select I2C */
 140         if (i2c)
 141                 i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
 142         else
 143                 i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
 144
 145         /* switch bank if needed */
 146         if (bank != priv->bank[i2c]) {
 147                 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
 148                 if (ret)
 149                         return ret;
 150                 priv->bank[i2c] = bank;
 151         }
 152         return cxd2820r_rd_regs_i2c(priv, i2c_addr, reg, val, len);
 153 }
 154
 155 /* write single register */
 156 int cxd2820r_wr_reg(struct cxd2820r_priv *priv, u32 reg, u8 val)
 157 {
 158         return cxd2820r_wr_regs(priv, reg, &val, 1);
 159 }
 160
 161 /* read single register */
 162 int cxd2820r_rd_reg(struct cxd2820r_priv *priv, u32 reg, u8 *val)
 163 {
 164         return cxd2820r_rd_regs(priv, reg, val, 1);
 165 }
 166
 167 /* write single register with mask */
 168 int cxd2820r_wr_reg_mask(struct cxd2820r_priv *priv, u32 reg, u8 val,
 169         u8 mask)
 170 {
 171         int ret;
 172         u8 tmp;
 173
 174         /* no need for read if whole reg is written */
 175         if (mask != 0xff) {
 176                 ret = cxd2820r_rd_reg(priv, reg, &tmp);
 177                 if (ret)
 178                         return ret;
 179
 180                 val &= mask;
 181                 tmp &= ~mask;
 182                 val |= tmp;
 183         }
 184
 185         return cxd2820r_wr_reg(priv, reg, val);
 186 }
 187
 188 int cxd2820r_gpio(struct dvb_frontend *fe, u8 *gpio)
 189 {
 190         struct cxd2820r_priv *priv = fe->demodulator_priv;
 191         int ret, i;
 192         u8 tmp0, tmp1;
 193
 194         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 195                         fe->dtv_property_cache.delivery_system);
 196
 197         /* update GPIOs only when needed */
 198         if (!memcmp(gpio, priv->gpio, sizeof(priv->gpio)))
 199                 return 0;
 200
 201         tmp0 = 0x00;
 202         tmp1 = 0x00;
 203         for (i = 0; i < sizeof(priv->gpio); i++) {
 204                 /* enable / disable */
 205                 if (gpio[i] & CXD2820R_GPIO_E)
 206                         tmp0 |= (2 << 6) >> (2 * i);
 207                 else
 208                         tmp0 |= (1 << 6) >> (2 * i);
 209
 210                 /* input / output */
 211                 if (gpio[i] & CXD2820R_GPIO_I)
 212                         tmp1 |= (1 << (3 + i));
 213                 else
 214                         tmp1 |= (0 << (3 + i));
 215
 216                 /* high / low */
 217                 if (gpio[i] & CXD2820R_GPIO_H)
 218                         tmp1 |= (1 << (0 + i));
 219                 else
 220                         tmp1 |= (0 << (0 + i));
 221
 222                 dev_dbg(&priv->i2c->dev, "%s: gpio i=%d %02x %02x\n", __func__,
 223                                 i, tmp0, tmp1);
 224         }
 225
 226         dev_dbg(&priv->i2c->dev, "%s: wr gpio=%02x %02x\n", __func__, tmp0,
 227                         tmp1);
 228
 229         /* write bits [7:2] */
 230         ret = cxd2820r_wr_reg_mask(priv, 0x00089, tmp0, 0xfc);
 231         if (ret)
 232                 goto error;
 233
 234         /* write bits [5:0] */
 235         ret = cxd2820r_wr_reg_mask(priv, 0x0008e, tmp1, 0x3f);
 236         if (ret)
 237                 goto error;
 238
 239         memcpy(priv->gpio, gpio, sizeof(priv->gpio));
 240
 241         return ret;
 242 error:
 243         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
 244         return ret;
 245 }
 246
 247 static int cxd2820r_set_frontend(struct dvb_frontend *fe)
 248 {
 249         struct cxd2820r_priv *priv = fe->demodulator_priv;
 250         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 251         int ret;
 252
 253         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 254                         fe->dtv_property_cache.delivery_system);
 255
 256         switch (c->delivery_system) {
 257         case SYS_DVBT:
 258                 ret = cxd2820r_init_t(fe);
 259                 if (ret < 0)
 260                         goto err;
 261                 ret = cxd2820r_set_frontend_t(fe);
 262                 if (ret < 0)
 263                         goto err;
 264                 break;
 265         case SYS_DVBT2:
 266                 ret = cxd2820r_init_t(fe);
 267                 if (ret < 0)
 268                         goto err;
 269                 ret = cxd2820r_set_frontend_t2(fe);
 270                 if (ret < 0)
 271                         goto err;
 272                 break;
 273         case SYS_DVBC_ANNEX_A:
 274                 ret = cxd2820r_init_c(fe);
 275                 if (ret < 0)
 276                         goto err;
 277                 ret = cxd2820r_set_frontend_c(fe);
 278                 if (ret < 0)
 279                         goto err;
 280                 break;
 281         default:
 282                 dev_dbg(&priv->i2c->dev, "%s: error state=%d\n", __func__,
 283                                 fe->dtv_property_cache.delivery_system);
 284                 ret = -EINVAL;
 285                 break;
 286         }
 287 err:
 288         return ret;
 289 }
 290
 291 static int cxd2820r_read_status(struct dvb_frontend *fe, enum fe_status *status)
 292 {
 293         struct cxd2820r_priv *priv = fe->demodulator_priv;
 294         int ret;
 295
 296         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 297                         fe->dtv_property_cache.delivery_system);
 298
 299         switch (fe->dtv_property_cache.delivery_system) {
 300         case SYS_DVBT:
 301                 ret = cxd2820r_read_status_t(fe, status);
 302                 break;
 303         case SYS_DVBT2:
 304                 ret = cxd2820r_read_status_t2(fe, status);
 305                 break;
 306         case SYS_DVBC_ANNEX_A:
 307                 ret = cxd2820r_read_status_c(fe, status);
 308                 break;
 309         default:
 310                 ret = -EINVAL;
 311                 break;
 312         }
 313         return ret;
 314 }
 315
 316 static int cxd2820r_get_frontend(struct dvb_frontend *fe,
 317                                  struct dtv_frontend_properties *p)
 318 {
 319         struct cxd2820r_priv *priv = fe->demodulator_priv;
 320         int ret;
 321
 322         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 323                         fe->dtv_property_cache.delivery_system);
 324
 325         if (priv->delivery_system == SYS_UNDEFINED)
 326                 return 0;
 327
 328         switch (fe->dtv_property_cache.delivery_system) {
 329         case SYS_DVBT:
 330                 ret = cxd2820r_get_frontend_t(fe, p);
 331                 break;
 332         case SYS_DVBT2:
 333                 ret = cxd2820r_get_frontend_t2(fe, p);
 334                 break;
 335         case SYS_DVBC_ANNEX_A:
 336                 ret = cxd2820r_get_frontend_c(fe, p);
 337                 break;
 338         default:
 339                 ret = -EINVAL;
 340                 break;
 341         }
 342         return ret;
 343 }
 344
 345 static int cxd2820r_read_ber(struct dvb_frontend *fe, u32 *ber)
 346 {
 347         struct cxd2820r_priv *priv = fe->demodulator_priv;
 348         int ret;
 349
 350         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 351                         fe->dtv_property_cache.delivery_system);
 352
 353         switch (fe->dtv_property_cache.delivery_system) {
 354         case SYS_DVBT:
 355                 ret = cxd2820r_read_ber_t(fe, ber);
 356                 break;
 357         case SYS_DVBT2:
 358                 ret = cxd2820r_read_ber_t2(fe, ber);
 359                 break;
 360         case SYS_DVBC_ANNEX_A:
 361                 ret = cxd2820r_read_ber_c(fe, ber);
 362                 break;
 363         default:
 364                 ret = -EINVAL;
 365                 break;
 366         }
 367         return ret;
 368 }
 369
 370 static int cxd2820r_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
 371 {
 372         struct cxd2820r_priv *priv = fe->demodulator_priv;
 373         int ret;
 374
 375         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 376                         fe->dtv_property_cache.delivery_system);
 377
 378         switch (fe->dtv_property_cache.delivery_system) {
 379         case SYS_DVBT:
 380                 ret = cxd2820r_read_signal_strength_t(fe, strength);
 381                 break;
 382         case SYS_DVBT2:
 383                 ret = cxd2820r_read_signal_strength_t2(fe, strength);
 384                 break;
 385         case SYS_DVBC_ANNEX_A:
 386                 ret = cxd2820r_read_signal_strength_c(fe, strength);
 387                 break;
 388         default:
 389                 ret = -EINVAL;
 390                 break;
 391         }
 392         return ret;
 393 }
 394
 395 static int cxd2820r_read_snr(struct dvb_frontend *fe, u16 *snr)
 396 {
 397         struct cxd2820r_priv *priv = fe->demodulator_priv;
 398         int ret;
 399
 400         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 401                         fe->dtv_property_cache.delivery_system);
 402
 403         switch (fe->dtv_property_cache.delivery_system) {
 404         case SYS_DVBT:
 405                 ret = cxd2820r_read_snr_t(fe, snr);
 406                 break;
 407         case SYS_DVBT2:
 408                 ret = cxd2820r_read_snr_t2(fe, snr);
 409                 break;
 410         case SYS_DVBC_ANNEX_A:
 411                 ret = cxd2820r_read_snr_c(fe, snr);
 412                 break;
 413         default:
 414                 ret = -EINVAL;
 415                 break;
 416         }
 417         return ret;
 418 }
 419
 420 static int cxd2820r_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
 421 {
 422         struct cxd2820r_priv *priv = fe->demodulator_priv;
 423         int ret;
 424
 425         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 426                         fe->dtv_property_cache.delivery_system);
 427
 428         switch (fe->dtv_property_cache.delivery_system) {
 429         case SYS_DVBT:
 430                 ret = cxd2820r_read_ucblocks_t(fe, ucblocks);
 431                 break;
 432         case SYS_DVBT2:
 433                 ret = cxd2820r_read_ucblocks_t2(fe, ucblocks);
 434                 break;
 435         case SYS_DVBC_ANNEX_A:
 436                 ret = cxd2820r_read_ucblocks_c(fe, ucblocks);
 437                 break;
 438         default:
 439                 ret = -EINVAL;
 440                 break;
 441         }
 442         return ret;
 443 }
 444
 445 static int cxd2820r_init(struct dvb_frontend *fe)
 446 {
 447         return 0;
 448 }
 449
 450 static int cxd2820r_sleep(struct dvb_frontend *fe)
 451 {
 452         struct cxd2820r_priv *priv = fe->demodulator_priv;
 453         int ret;
 454
 455         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 456                         fe->dtv_property_cache.delivery_system);
 457
 458         switch (fe->dtv_property_cache.delivery_system) {
 459         case SYS_DVBT:
 460                 ret = cxd2820r_sleep_t(fe);
 461                 break;
 462         case SYS_DVBT2:
 463                 ret = cxd2820r_sleep_t2(fe);
 464                 break;
 465         case SYS_DVBC_ANNEX_A:
 466                 ret = cxd2820r_sleep_c(fe);
 467                 break;
 468         default:
 469                 ret = -EINVAL;
 470                 break;
 471         }
 472         return ret;
 473 }
 474
 475 static int cxd2820r_get_tune_settings(struct dvb_frontend *fe,
 476                                       struct dvb_frontend_tune_settings *s)
 477 {
 478         struct cxd2820r_priv *priv = fe->demodulator_priv;
 479         int ret;
 480
 481         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 482                         fe->dtv_property_cache.delivery_system);
 483
 484         switch (fe->dtv_property_cache.delivery_system) {
 485         case SYS_DVBT:
 486                 ret = cxd2820r_get_tune_settings_t(fe, s);
 487                 break;
 488         case SYS_DVBT2:
 489                 ret = cxd2820r_get_tune_settings_t2(fe, s);
 490                 break;
 491         case SYS_DVBC_ANNEX_A:
 492                 ret = cxd2820r_get_tune_settings_c(fe, s);
 493                 break;
 494         default:
 495                 ret = -EINVAL;
 496                 break;
 497         }
 498         return ret;
 499 }
 500
 501 static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe)
 502 {
 503         struct cxd2820r_priv *priv = fe->demodulator_priv;
 504         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 505         int ret, i;
 506         enum fe_status status = 0;
 507
 508         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 509                         fe->dtv_property_cache.delivery_system);
 510
 511         /* switch between DVB-T and DVB-T2 when tune fails */
 512         if (priv->last_tune_failed) {
 513                 if (priv->delivery_system == SYS_DVBT) {
 514                         ret = cxd2820r_sleep_t(fe);
 515                         if (ret)
 516                                 goto error;
 517
 518                         c->delivery_system = SYS_DVBT2;
 519                 } else if (priv->delivery_system == SYS_DVBT2) {
 520                         ret = cxd2820r_sleep_t2(fe);
 521                         if (ret)
 522                                 goto error;
 523
 524                         c->delivery_system = SYS_DVBT;
 525                 }
 526         }
 527
 528         /* set frontend */
 529         ret = cxd2820r_set_frontend(fe);
 530         if (ret)
 531                 goto error;
 532
 533
 534         /* frontend lock wait loop count */
 535         switch (priv->delivery_system) {
 536         case SYS_DVBT:
 537         case SYS_DVBC_ANNEX_A:
 538                 i = 20;
 539                 break;
 540         case SYS_DVBT2:
 541                 i = 40;
 542                 break;
 543         case SYS_UNDEFINED:
 544         default:
 545                 i = 0;
 546                 break;
 547         }
 548
 549         /* wait frontend lock */
 550         for (; i > 0; i--) {
 551                 dev_dbg(&priv->i2c->dev, "%s: loop=%d\n", __func__, i);
 552                 msleep(50);
 553                 ret = cxd2820r_read_status(fe, &status);
 554                 if (ret)
 555                         goto error;
 556
 557                 if (status & FE_HAS_LOCK)
 558                         break;
 559         }
 560
 561         /* check if we have a valid signal */
 562         if (status & FE_HAS_LOCK) {
 563                 priv->last_tune_failed = false;
 564                 return DVBFE_ALGO_SEARCH_SUCCESS;
 565         } else {
 566                 priv->last_tune_failed = true;
 567                 return DVBFE_ALGO_SEARCH_AGAIN;
 568         }
 569
 570 error:
 571         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
 572         return DVBFE_ALGO_SEARCH_ERROR;
 573 }
 574
 575 static int cxd2820r_get_frontend_algo(struct dvb_frontend *fe)
 576 {
 577         return DVBFE_ALGO_CUSTOM;
 578 }
 579
 580 static void cxd2820r_release(struct dvb_frontend *fe)
 581 {
 582         struct cxd2820r_priv *priv = fe->demodulator_priv;
 583
 584         dev_dbg(&priv->i2c->dev, "%s\n", __func__);
 585
 586 #ifdef CONFIG_GPIOLIB
 587         /* remove GPIOs */
 588         if (priv->gpio_chip.label)
 589                 gpiochip_remove(&priv->gpio_chip);
 590
 591 #endif
 592         kfree(priv);
 593         return;
 594 }
 595
 596 static int cxd2820r_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
 597 {
 598         struct cxd2820r_priv *priv = fe->demodulator_priv;
 599
 600         dev_dbg(&priv->i2c->dev, "%s: %d\n", __func__, enable);
 601
 602         /* Bit 0 of reg 0xdb in bank 0x00 controls I2C repeater */
 603         return cxd2820r_wr_reg_mask(priv, 0xdb, enable ? 1 : 0, 0x1);
 604 }
 605
 606 #ifdef CONFIG_GPIOLIB
 607 static int cxd2820r_gpio_direction_output(struct gpio_chip *chip, unsigned nr,
 608                 int val)
 609 {
 610         struct cxd2820r_priv *priv = gpiochip_get_data(chip);
 611         u8 gpio[GPIO_COUNT];
 612
 613         dev_dbg(&priv->i2c->dev, "%s: nr=%d val=%d\n", __func__, nr, val);
 614
 615         memcpy(gpio, priv->gpio, sizeof(gpio));
 616         gpio[nr] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | (val << 2);
 617
 618         return cxd2820r_gpio(&priv->fe, gpio);
 619 }
 620
 621 static void cxd2820r_gpio_set(struct gpio_chip *chip, unsigned nr, int val)
 622 {
 623         struct cxd2820r_priv *priv = gpiochip_get_data(chip);
 624         u8 gpio[GPIO_COUNT];
 625
 626         dev_dbg(&priv->i2c->dev, "%s: nr=%d val=%d\n", __func__, nr, val);
 627
 628         memcpy(gpio, priv->gpio, sizeof(gpio));
 629         gpio[nr] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | (val << 2);
 630
 631         (void) cxd2820r_gpio(&priv->fe, gpio);
 632
 633         return;
 634 }
 635
 636 static int cxd2820r_gpio_get(struct gpio_chip *chip, unsigned nr)
 637 {
 638         struct cxd2820r_priv *priv = gpiochip_get_data(chip);
 639
 640         dev_dbg(&priv->i2c->dev, "%s: nr=%d\n", __func__, nr);
 641
 642         return (priv->gpio[nr] >> 2) & 0x01;
 643 }
 644 #endif
 645
 646 static const struct dvb_frontend_ops cxd2820r_ops = {
 647         .delsys = { SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A },
 648         /* default: DVB-T/T2 */
 649         .info = {
 650                 .name = "Sony CXD2820R",
 651
 652                 .caps = FE_CAN_FEC_1_2                  |
 653                         FE_CAN_FEC_2_3                  |
 654                         FE_CAN_FEC_3_4                  |
 655                         FE_CAN_FEC_5_6                  |
 656                         FE_CAN_FEC_7_8                  |
 657                         FE_CAN_FEC_AUTO                 |
 658                         FE_CAN_QPSK                     |
 659                         FE_CAN_QAM_16                   |
 660                         FE_CAN_QAM_32                   |
 661                         FE_CAN_QAM_64                   |
 662                         FE_CAN_QAM_128                  |
 663                         FE_CAN_QAM_256                  |
 664                         FE_CAN_QAM_AUTO                 |
 665                         FE_CAN_TRANSMISSION_MODE_AUTO   |
 666                         FE_CAN_GUARD_INTERVAL_AUTO      |
 667                         FE_CAN_HIERARCHY_AUTO           |
 668                         FE_CAN_MUTE_TS                  |
 669                         FE_CAN_2G_MODULATION            |
 670                         FE_CAN_MULTISTREAM
 671                 },
 672
 673         .release                = cxd2820r_release,
 674         .init                   = cxd2820r_init,
 675         .sleep                  = cxd2820r_sleep,
 676
 677         .get_tune_settings      = cxd2820r_get_tune_settings,
 678         .i2c_gate_ctrl          = cxd2820r_i2c_gate_ctrl,
 679
 680         .get_frontend           = cxd2820r_get_frontend,
 681
 682         .get_frontend_algo      = cxd2820r_get_frontend_algo,
 683         .search                 = cxd2820r_search,
 684
 685         .read_status            = cxd2820r_read_status,
 686         .read_snr               = cxd2820r_read_snr,
 687         .read_ber               = cxd2820r_read_ber,
 688         .read_ucblocks          = cxd2820r_read_ucblocks,
 689         .read_signal_strength   = cxd2820r_read_signal_strength,
 690 };
 691
 692 struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *cfg,
 693                 struct i2c_adapter *i2c, int *gpio_chip_base
 694 )
 695 {
 696         struct cxd2820r_priv *priv;
 697         int ret;
 698         u8 tmp;
 699
 700         priv = kzalloc(sizeof(struct cxd2820r_priv), GFP_KERNEL);
 701         if (!priv) {
 702                 ret = -ENOMEM;
 703                 dev_err(&i2c->dev, "%s: kzalloc() failed\n",
 704                                 KBUILD_MODNAME);
 705                 goto error;
 706         }
 707
 708         priv->i2c = i2c;
 709         memcpy(&priv->cfg, cfg, sizeof(struct cxd2820r_config));
 710         memcpy(&priv->fe.ops, &cxd2820r_ops, sizeof(struct dvb_frontend_ops));
 711         priv->fe.demodulator_priv = priv;
 712
 713         priv->bank[0] = priv->bank[1] = 0xff;
 714         ret = cxd2820r_rd_reg(priv, 0x000fd, &tmp);
 715         dev_dbg(&priv->i2c->dev, "%s: chip id=%02x\n", __func__, tmp);
 716         if (ret || tmp != 0xe1)
 717                 goto error;
 718
 719         if (gpio_chip_base) {
 720 #ifdef CONFIG_GPIOLIB
 721                 /* add GPIOs */
 722                 priv->gpio_chip.label = KBUILD_MODNAME;
 723                 priv->gpio_chip.parent = &priv->i2c->dev;
 724                 priv->gpio_chip.owner = THIS_MODULE;
 725                 priv->gpio_chip.direction_output =
 726                                 cxd2820r_gpio_direction_output;
 727                 priv->gpio_chip.set = cxd2820r_gpio_set;
 728                 priv->gpio_chip.get = cxd2820r_gpio_get;
 729                 priv->gpio_chip.base = -1; /* dynamic allocation */
 730                 priv->gpio_chip.ngpio = GPIO_COUNT;
 731                 priv->gpio_chip.can_sleep = 1;
 732                 ret = gpiochip_add_data(&priv->gpio_chip, priv);
 733                 if (ret)
 734                         goto error;
 735
 736                 dev_dbg(&priv->i2c->dev, "%s: gpio_chip.base=%d\n", __func__,
 737                                 priv->gpio_chip.base);
 738
 739                 *gpio_chip_base = priv->gpio_chip.base;
 740 #else
 741                 /*
 742                  * Use static GPIO configuration if GPIOLIB is undefined.
 743                  * This is fallback condition.
 744                  */
 745                 u8 gpio[GPIO_COUNT];
 746                 gpio[0] = (*gpio_chip_base >> 0) & 0x07;
 747                 gpio[1] = (*gpio_chip_base >> 3) & 0x07;
 748                 gpio[2] = 0;
 749                 ret = cxd2820r_gpio(&priv->fe, gpio);
 750                 if (ret)
 751                         goto error;
 752 #endif
 753         }
 754
 755         return &priv->fe;
 756 error:
 757         dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
 758         kfree(priv);
 759         return NULL;
 760 }
 761 EXPORT_SYMBOL(cxd2820r_attach);
 762
 763 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
 764 MODULE_DESCRIPTION("Sony CXD2820R demodulator driver");
 765 MODULE_LICENSE("GPL");