drivers/media/dvb-frontends/si2165.c

   1 /*
   2     Driver for Silicon Labs SI2165 DVB-C/-T Demodulator
   3
   4     Copyright (C) 2013-2014 Matthias Schwarzott <zzam@gentoo.org>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     References:
  17     http://www.silabs.com/Support%20Documents/TechnicalDocs/Si2165-short.pdf
  18 */
  19
  20 #include <linux/delay.h>
  21 #include <linux/errno.h>
  22 #include <linux/init.h>
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/string.h>
  26 #include <linux/slab.h>
  27 #include <linux/firmware.h>
  28
  29 #include "dvb_frontend.h"
  30 #include "dvb_math.h"
  31 #include "si2165_priv.h"
  32 #include "si2165.h"
  33
  34 /* Hauppauge WinTV-HVR-930C-HD B130 / PCTV QuatroStick 521e 1113xx
  35  * uses 16 MHz xtal */
  36
  37 /* Hauppauge WinTV-HVR-930C-HD B131 / PCTV QuatroStick 522e 1114xx
  38  * uses 24 MHz clock provided by tuner */
  39
  40 struct si2165_state {
  41         struct i2c_adapter *i2c;
  42
  43         struct dvb_frontend frontend;
  44
  45         struct si2165_config config;
  46
  47         /* chip revision */
  48         u8 revcode;
  49         /* chip type */
  50         u8 chip_type;
  51
  52         /* calculated by xtal and div settings */
  53         u32 fvco_hz;
  54         u32 sys_clk;
  55         u32 adc_clk;
  56
  57         bool has_dvbc;
  58         bool has_dvbt;
  59         bool firmware_loaded;
  60 };
  61
  62 #define DEBUG_OTHER     0x01
  63 #define DEBUG_I2C_WRITE 0x02
  64 #define DEBUG_I2C_READ  0x04
  65 #define DEBUG_REG_READ  0x08
  66 #define DEBUG_REG_WRITE 0x10
  67 #define DEBUG_FW_LOAD   0x20
  68
  69 static int debug = 0x00;
  70
  71 #define dprintk(args...) \
  72         do { \
  73                 if (debug & DEBUG_OTHER) \
  74                         printk(KERN_DEBUG "si2165: " args); \
  75         } while (0)
  76
  77 #define deb_i2c_write(args...) \
  78         do { \
  79                 if (debug & DEBUG_I2C_WRITE) \
  80                         printk(KERN_DEBUG "si2165: i2c write: " args); \
  81         } while (0)
  82
  83 #define deb_i2c_read(args...) \
  84         do { \
  85                 if (debug & DEBUG_I2C_READ) \
  86                         printk(KERN_DEBUG "si2165: i2c read: " args); \
  87         } while (0)
  88
  89 #define deb_readreg(args...) \
  90         do { \
  91                 if (debug & DEBUG_REG_READ) \
  92                         printk(KERN_DEBUG "si2165: reg read: " args); \
  93         } while (0)
  94
  95 #define deb_writereg(args...) \
  96         do { \
  97                 if (debug & DEBUG_REG_WRITE) \
  98                         printk(KERN_DEBUG "si2165: reg write: " args); \
  99         } while (0)
 100
 101 #define deb_fw_load(args...) \
 102         do { \
 103                 if (debug & DEBUG_FW_LOAD) \
 104                         printk(KERN_DEBUG "si2165: fw load: " args); \
 105         } while (0)
 106
 107 static int si2165_write(struct si2165_state *state, const u16 reg,
 108                        const u8 *src, const int count)
 109 {
 110         int ret;
 111         struct i2c_msg msg;
 112         u8 buf[2 + 4]; /* write a maximum of 4 bytes of data */
 113
 114         if (count + 2 > sizeof(buf)) {
 115                 dev_warn(&state->i2c->dev,
 116                           "%s: i2c wr reg=%04x: count=%d is too big!\n",
 117                           KBUILD_MODNAME, reg, count);
 118                 return -EINVAL;
 119         }
 120         buf[0] = reg >> 8;
 121         buf[1] = reg & 0xff;
 122         memcpy(buf + 2, src, count);
 123
 124         msg.addr = state->config.i2c_addr;
 125         msg.flags = 0;
 126         msg.buf = buf;
 127         msg.len = count + 2;
 128
 129         if (debug & DEBUG_I2C_WRITE)
 130                 deb_i2c_write("reg: 0x%04x, data: %*ph\n", reg, count, src);
 131
 132         ret = i2c_transfer(state->i2c, &msg, 1);
 133
 134         if (ret != 1) {
 135                 dev_err(&state->i2c->dev, "%s: ret == %d\n", __func__, ret);
 136                 if (ret < 0)
 137                         return ret;
 138                 else
 139                         return -EREMOTEIO;
 140         }
 141
 142         return 0;
 143 }
 144
 145 static int si2165_read(struct si2165_state *state,
 146                        const u16 reg, u8 *val, const int count)
 147 {
 148         int ret;
 149         u8 reg_buf[] = { reg >> 8, reg & 0xff };
 150         struct i2c_msg msg[] = {
 151                 { .addr = state->config.i2c_addr,
 152                   .flags = 0, .buf = reg_buf, .len = 2 },
 153                 { .addr = state->config.i2c_addr,
 154                   .flags = I2C_M_RD, .buf = val, .len = count },
 155         };
 156
 157         ret = i2c_transfer(state->i2c, msg, 2);
 158
 159         if (ret != 2) {
 160                 dev_err(&state->i2c->dev, "%s: error (addr %02x reg %04x error (ret == %i)\n",
 161                         __func__, state->config.i2c_addr, reg, ret);
 162                 if (ret < 0)
 163                         return ret;
 164                 else
 165                         return -EREMOTEIO;
 166         }
 167
 168         if (debug & DEBUG_I2C_READ)
 169                 deb_i2c_read("reg: 0x%04x, data: %*ph\n", reg, count, val);
 170
 171         return 0;
 172 }
 173
 174 static int si2165_readreg8(struct si2165_state *state,
 175                        const u16 reg, u8 *val)
 176 {
 177         int ret;
 178
 179         ret = si2165_read(state, reg, val, 1);
 180         deb_readreg("R(0x%04x)=0x%02x\n", reg, *val);
 181         return ret;
 182 }
 183
 184 static int si2165_readreg16(struct si2165_state *state,
 185                        const u16 reg, u16 *val)
 186 {
 187         u8 buf[2];
 188
 189         int ret = si2165_read(state, reg, buf, 2);
 190         *val = buf[0] | buf[1] << 8;
 191         deb_readreg("R(0x%04x)=0x%04x\n", reg, *val);
 192         return ret;
 193 }
 194
 195 static int si2165_writereg8(struct si2165_state *state, const u16 reg, u8 val)
 196 {
 197         return si2165_write(state, reg, &val, 1);
 198 }
 199
 200 static int si2165_writereg16(struct si2165_state *state, const u16 reg, u16 val)
 201 {
 202         u8 buf[2] = { val & 0xff, (val >> 8) & 0xff };
 203
 204         return si2165_write(state, reg, buf, 2);
 205 }
 206
 207 static int si2165_writereg24(struct si2165_state *state, const u16 reg, u32 val)
 208 {
 209         u8 buf[3] = { val & 0xff, (val >> 8) & 0xff, (val >> 16) & 0xff };
 210
 211         return si2165_write(state, reg, buf, 3);
 212 }
 213
 214 static int si2165_writereg32(struct si2165_state *state, const u16 reg, u32 val)
 215 {
 216         u8 buf[4] = {
 217                 val & 0xff,
 218                 (val >> 8) & 0xff,
 219                 (val >> 16) & 0xff,
 220                 (val >> 24) & 0xff
 221         };
 222         return si2165_write(state, reg, buf, 4);
 223 }
 224
 225 static int si2165_writereg_mask8(struct si2165_state *state, const u16 reg,
 226                                  u8 val, u8 mask)
 227 {
 228         int ret;
 229         u8 tmp;
 230
 231         if (mask != 0xff) {
 232                 ret = si2165_readreg8(state, reg, &tmp);
 233                 if (ret < 0)
 234                         goto err;
 235
 236                 val &= mask;
 237                 tmp &= ~mask;
 238                 val |= tmp;
 239         }
 240
 241         ret = si2165_writereg8(state, reg, val);
 242 err:
 243         return ret;
 244 }
 245
 246 static int si2165_get_tune_settings(struct dvb_frontend *fe,
 247                                     struct dvb_frontend_tune_settings *s)
 248 {
 249         s->min_delay_ms = 1000;
 250         return 0;
 251 }
 252
 253 static int si2165_init_pll(struct si2165_state *state)
 254 {
 255         u32 ref_freq_Hz = state->config.ref_freq_Hz;
 256         u8 divr = 1; /* 1..7 */
 257         u8 divp = 1; /* only 1 or 4 */
 258         u8 divn = 56; /* 1..63 */
 259         u8 divm = 8;
 260         u8 divl = 12;
 261         u8 buf[4];
 262
 263         /* hardcoded values can be deleted if calculation is verified
 264          * or it yields the same values as the windows driver */
 265         switch (ref_freq_Hz) {
 266         case 16000000u:
 267                 divn = 56;
 268                 break;
 269         case 24000000u:
 270                 divr = 2;
 271                 divp = 4;
 272                 divn = 19;
 273                 break;
 274         default:
 275                 /* ref_freq / divr must be between 4 and 16 MHz */
 276                 if (ref_freq_Hz > 16000000u)
 277                         divr = 2;
 278
 279                 /* now select divn and divp such that
 280                  * fvco is in 1624..1824 MHz */
 281                 if (1624000000u * divr > ref_freq_Hz * 2u * 63u)
 282                         divp = 4;
 283
 284                 /* is this already correct regarding rounding? */
 285                 divn = 1624000000u * divr / (ref_freq_Hz * 2u * divp);
 286                 break;
 287         }
 288
 289         /* adc_clk and sys_clk depend on xtal and pll settings */
 290         state->fvco_hz = ref_freq_Hz / divr
 291                         * 2u * divn * divp;
 292         state->adc_clk = state->fvco_hz / (divm * 4u);
 293         state->sys_clk = state->fvco_hz / (divl * 2u);
 294
 295         /* write pll registers 0x00a0..0x00a3 at once */
 296         buf[0] = divl;
 297         buf[1] = divm;
 298         buf[2] = (divn & 0x3f) | ((divp == 1) ? 0x40 : 0x00) | 0x80;
 299         buf[3] = divr;
 300         return si2165_write(state, 0x00a0, buf, 4);
 301 }
 302
 303 static int si2165_adjust_pll_divl(struct si2165_state *state, u8 divl)
 304 {
 305         state->sys_clk = state->fvco_hz / (divl * 2u);
 306         return si2165_writereg8(state, 0x00a0, divl); /* pll_divl */
 307 }
 308
 309 static u32 si2165_get_fe_clk(struct si2165_state *state)
 310 {
 311         /* assume Oversampling mode Ovr4 is used */
 312         return state->adc_clk;
 313 }
 314
 315 static bool si2165_wait_init_done(struct si2165_state *state)
 316 {
 317         int ret = -EINVAL;
 318         u8 val = 0;
 319         int i;
 320
 321         for (i = 0; i < 3; ++i) {
 322                 si2165_readreg8(state, 0x0054, &val);
 323                 if (val == 0x01)
 324                         return 0;
 325                 usleep_range(1000, 50000);
 326         }
 327         dev_err(&state->i2c->dev, "%s: init_done was not set\n",
 328                 KBUILD_MODNAME);
 329         return ret;
 330 }
 331
 332 static int si2165_upload_firmware_block(struct si2165_state *state,
 333         const u8 *data, u32 len, u32 *poffset, u32 block_count)
 334 {
 335         int ret;
 336         u8 buf_ctrl[4] = { 0x00, 0x00, 0x00, 0xc0 };
 337         u8 wordcount;
 338         u32 cur_block = 0;
 339         u32 offset = poffset ? *poffset : 0;
 340
 341         if (len < 4)
 342                 return -EINVAL;
 343         if (len % 4 != 0)
 344                 return -EINVAL;
 345
 346         deb_fw_load("si2165_upload_firmware_block called with len=0x%x offset=0x%x blockcount=0x%x\n",
 347                                 len, offset, block_count);
 348         while (offset+12 <= len && cur_block < block_count) {
 349                 deb_fw_load("si2165_upload_firmware_block in while len=0x%x offset=0x%x cur_block=0x%x blockcount=0x%x\n",
 350                                         len, offset, cur_block, block_count);
 351                 wordcount = data[offset];
 352                 if (wordcount < 1 || data[offset+1] ||
 353                     data[offset+2] || data[offset+3]) {
 354                         dev_warn(&state->i2c->dev,
 355                                  "%s: bad fw data[0..3] = %*ph\n",
 356                                 KBUILD_MODNAME, 4, data);
 357                         return -EINVAL;
 358                 }
 359
 360                 if (offset + 8 + wordcount * 4 > len) {
 361                         dev_warn(&state->i2c->dev,
 362                                  "%s: len is too small for block len=%d, wordcount=%d\n",
 363                                 KBUILD_MODNAME, len, wordcount);
 364                         return -EINVAL;
 365                 }
 366
 367                 buf_ctrl[0] = wordcount - 1;
 368
 369                 ret = si2165_write(state, 0x0364, buf_ctrl, 4);
 370                 if (ret < 0)
 371                         goto error;
 372                 ret = si2165_write(state, 0x0368, data+offset+4, 4);
 373                 if (ret < 0)
 374                         goto error;
 375
 376                 offset += 8;
 377
 378                 while (wordcount > 0) {
 379                         ret = si2165_write(state, 0x36c, data+offset, 4);
 380                         if (ret < 0)
 381                                 goto error;
 382                         wordcount--;
 383                         offset += 4;
 384                 }
 385                 cur_block++;
 386         }
 387
 388         deb_fw_load("si2165_upload_firmware_block after while len=0x%x offset=0x%x cur_block=0x%x blockcount=0x%x\n",
 389                                 len, offset, cur_block, block_count);
 390
 391         if (poffset)
 392                 *poffset = offset;
 393
 394         deb_fw_load("si2165_upload_firmware_block returned offset=0x%x\n",
 395                                 offset);
 396
 397         return 0;
 398 error:
 399         return ret;
 400 }
 401
 402 static int si2165_upload_firmware(struct si2165_state *state)
 403 {
 404         /* int ret; */
 405         u8 val[3];
 406         u16 val16;
 407         int ret;
 408
 409         const struct firmware *fw = NULL;
 410         u8 *fw_file = SI2165_FIRMWARE;
 411         const u8 *data;
 412         u32 len;
 413         u32 offset;
 414         u8 patch_version;
 415         u8 block_count;
 416         u16 crc_expected;
 417
 418         /* request the firmware, this will block and timeout */
 419         ret = request_firmware(&fw, fw_file, state->i2c->dev.parent);
 420         if (ret) {
 421                 dev_warn(&state->i2c->dev, "%s: firmare file '%s' not found\n",
 422                                 KBUILD_MODNAME, fw_file);
 423                 goto error;
 424         }
 425
 426         data = fw->data;
 427         len = fw->size;
 428
 429         dev_info(&state->i2c->dev, "%s: downloading firmware from file '%s' size=%d\n",
 430                         KBUILD_MODNAME, fw_file, len);
 431
 432         if (len % 4 != 0) {
 433                 dev_warn(&state->i2c->dev, "%s: firmware size is not multiple of 4\n",
 434                                 KBUILD_MODNAME);
 435                 ret = -EINVAL;
 436                 goto error;
 437         }
 438
 439         /* check header (8 bytes) */
 440         if (len < 8) {
 441                 dev_warn(&state->i2c->dev, "%s: firmware header is missing\n",
 442                                 KBUILD_MODNAME);
 443                 ret = -EINVAL;
 444                 goto error;
 445         }
 446
 447         if (data[0] != 1 || data[1] != 0) {
 448                 dev_warn(&state->i2c->dev, "%s: firmware file version is wrong\n",
 449                                 KBUILD_MODNAME);
 450                 ret = -EINVAL;
 451                 goto error;
 452         }
 453
 454         patch_version = data[2];
 455         block_count = data[4];
 456         crc_expected = data[7] << 8 | data[6];
 457
 458         /* start uploading fw */
 459         /* boot/wdog status */
 460         ret = si2165_writereg8(state, 0x0341, 0x00);
 461         if (ret < 0)
 462                 goto error;
 463         /* reset */
 464         ret = si2165_writereg8(state, 0x00c0, 0x00);
 465         if (ret < 0)
 466                 goto error;
 467         /* boot/wdog status */
 468         ret = si2165_readreg8(state, 0x0341, val);
 469         if (ret < 0)
 470                 goto error;
 471
 472         /* enable reset on error */
 473         ret = si2165_readreg8(state, 0x035c, val);
 474         if (ret < 0)
 475                 goto error;
 476         ret = si2165_readreg8(state, 0x035c, val);
 477         if (ret < 0)
 478                 goto error;
 479         ret = si2165_writereg8(state, 0x035c, 0x02);
 480         if (ret < 0)
 481                 goto error;
 482
 483         /* start right after the header */
 484         offset = 8;
 485
 486         dev_info(&state->i2c->dev, "%s: si2165_upload_firmware extracted patch_version=0x%02x, block_count=0x%02x, crc_expected=0x%04x\n",
 487                 KBUILD_MODNAME, patch_version, block_count, crc_expected);
 488
 489         ret = si2165_upload_firmware_block(state, data, len, &offset, 1);
 490         if (ret < 0)
 491                 goto error;
 492
 493         ret = si2165_writereg8(state, 0x0344, patch_version);
 494         if (ret < 0)
 495                 goto error;
 496
 497         /* reset crc */
 498         ret = si2165_writereg8(state, 0x0379, 0x01);
 499         if (ret)
 500                 return ret;
 501
 502         ret = si2165_upload_firmware_block(state, data, len,
 503                                            &offset, block_count);
 504         if (ret < 0) {
 505                 dev_err(&state->i2c->dev,
 506                         "%s: firmare could not be uploaded\n",
 507                         KBUILD_MODNAME);
 508                 goto error;
 509         }
 510
 511         /* read crc */
 512         ret = si2165_readreg16(state, 0x037a, &val16);
 513         if (ret)
 514                 goto error;
 515
 516         if (val16 != crc_expected) {
 517                 dev_err(&state->i2c->dev,
 518                         "%s: firmware crc mismatch %04x != %04x\n",
 519                         KBUILD_MODNAME, val16, crc_expected);
 520                 ret = -EINVAL;
 521                 goto error;
 522         }
 523
 524         ret = si2165_upload_firmware_block(state, data, len, &offset, 5);
 525         if (ret)
 526                 goto error;
 527
 528         if (len != offset) {
 529                 dev_err(&state->i2c->dev,
 530                         "%s: firmare len mismatch %04x != %04x\n",
 531                         KBUILD_MODNAME, len, offset);
 532                 ret = -EINVAL;
 533                 goto error;
 534         }
 535
 536         /* reset watchdog error register */
 537         ret = si2165_writereg_mask8(state, 0x0341, 0x02, 0x02);
 538         if (ret < 0)
 539                 goto error;
 540
 541         /* enable reset on error */
 542         ret = si2165_writereg_mask8(state, 0x035c, 0x01, 0x01);
 543         if (ret < 0)
 544                 goto error;
 545
 546         dev_info(&state->i2c->dev, "%s: fw load finished\n", KBUILD_MODNAME);
 547
 548         ret = 0;
 549         state->firmware_loaded = true;
 550 error:
 551         if (fw) {
 552                 release_firmware(fw);
 553                 fw = NULL;
 554         }
 555
 556         return ret;
 557 }
 558
 559 static int si2165_init(struct dvb_frontend *fe)
 560 {
 561         int ret = 0;
 562         struct si2165_state *state = fe->demodulator_priv;
 563         u8 val;
 564         u8 patch_version = 0x00;
 565
 566         dprintk("%s: called\n", __func__);
 567
 568         /* powerup */
 569         ret = si2165_writereg8(state, 0x0000, state->config.chip_mode);
 570         if (ret < 0)
 571                 goto error;
 572         /* dsp_clock_enable */
 573         ret = si2165_writereg8(state, 0x0104, 0x01);
 574         if (ret < 0)
 575                 goto error;
 576         ret = si2165_readreg8(state, 0x0000, &val); /* verify chip_mode */
 577         if (ret < 0)
 578                 goto error;
 579         if (val != state->config.chip_mode) {
 580                 dev_err(&state->i2c->dev, "%s: could not set chip_mode\n",
 581                         KBUILD_MODNAME);
 582                 return -EINVAL;
 583         }
 584
 585         /* agc */
 586         ret = si2165_writereg8(state, 0x018b, 0x00);
 587         if (ret < 0)
 588                 goto error;
 589         ret = si2165_writereg8(state, 0x0190, 0x01);
 590         if (ret < 0)
 591                 goto error;
 592         ret = si2165_writereg8(state, 0x0170, 0x00);
 593         if (ret < 0)
 594                 goto error;
 595         ret = si2165_writereg8(state, 0x0171, 0x07);
 596         if (ret < 0)
 597                 goto error;
 598         /* rssi pad */
 599         ret = si2165_writereg8(state, 0x0646, 0x00);
 600         if (ret < 0)
 601                 goto error;
 602         ret = si2165_writereg8(state, 0x0641, 0x00);
 603         if (ret < 0)
 604                 goto error;
 605
 606         ret = si2165_init_pll(state);
 607         if (ret < 0)
 608                 goto error;
 609
 610         /* enable chip_init */
 611         ret = si2165_writereg8(state, 0x0050, 0x01);
 612         if (ret < 0)
 613                 goto error;
 614         /* set start_init */
 615         ret = si2165_writereg8(state, 0x0096, 0x01);
 616         if (ret < 0)
 617                 goto error;
 618         ret = si2165_wait_init_done(state);
 619         if (ret < 0)
 620                 goto error;
 621
 622         /* disable chip_init */
 623         ret = si2165_writereg8(state, 0x0050, 0x00);
 624         if (ret < 0)
 625                 goto error;
 626
 627         /* ber_pkt */
 628         ret = si2165_writereg16(state, 0x0470 , 0x7530);
 629         if (ret < 0)
 630                 goto error;
 631
 632         ret = si2165_readreg8(state, 0x0344, &patch_version);
 633         if (ret < 0)
 634                 goto error;
 635
 636         ret = si2165_writereg8(state, 0x00cb, 0x00);
 637         if (ret < 0)
 638                 goto error;
 639
 640         /* dsp_addr_jump */
 641         ret = si2165_writereg32(state, 0x0348, 0xf4000000);
 642         if (ret < 0)
 643                 goto error;
 644         /* boot/wdog status */
 645         ret = si2165_readreg8(state, 0x0341, &val);
 646         if (ret < 0)
 647                 goto error;
 648
 649         if (patch_version == 0x00) {
 650                 ret = si2165_upload_firmware(state);
 651                 if (ret < 0)
 652                         goto error;
 653         }
 654
 655         /* write adc values after each reset*/
 656         ret = si2165_writereg8(state, 0x012a, 0x46);
 657         if (ret < 0)
 658                 goto error;
 659         ret = si2165_writereg8(state, 0x012c, 0x00);
 660         if (ret < 0)
 661                 goto error;
 662         ret = si2165_writereg8(state, 0x012e, 0x0a);
 663         if (ret < 0)
 664                 goto error;
 665         ret = si2165_writereg8(state, 0x012f, 0xff);
 666         if (ret < 0)
 667                 goto error;
 668         ret = si2165_writereg8(state, 0x0123, 0x70);
 669         if (ret < 0)
 670                 goto error;
 671
 672         return 0;
 673 error:
 674         return ret;
 675 }
 676
 677 static int si2165_sleep(struct dvb_frontend *fe)
 678 {
 679         int ret;
 680         struct si2165_state *state = fe->demodulator_priv;
 681
 682         /* dsp clock disable */
 683         ret = si2165_writereg8(state, 0x0104, 0x00);
 684         if (ret < 0)
 685                 return ret;
 686         /* chip mode */
 687         ret = si2165_writereg8(state, 0x0000, SI2165_MODE_OFF);
 688         if (ret < 0)
 689                 return ret;
 690         return 0;
 691 }
 692
 693 static int si2165_read_status(struct dvb_frontend *fe, fe_status_t *status)
 694 {
 695         int ret;
 696         u8 fec_lock = 0;
 697         struct si2165_state *state = fe->demodulator_priv;
 698
 699         if (!state->has_dvbt)
 700                 return -EINVAL;
 701
 702         /* check fec_lock */
 703         ret = si2165_readreg8(state, 0x4e0, &fec_lock);
 704         if (ret < 0)
 705                 return ret;
 706         *status = 0;
 707         if (fec_lock & 0x01) {
 708                 *status |= FE_HAS_SIGNAL;
 709                 *status |= FE_HAS_CARRIER;
 710                 *status |= FE_HAS_VITERBI;
 711                 *status |= FE_HAS_SYNC;
 712                 *status |= FE_HAS_LOCK;
 713         }
 714
 715         return 0;
 716 }
 717
 718 static int si2165_set_oversamp(struct si2165_state *state, u32 dvb_rate)
 719 {
 720         u64 oversamp;
 721         u32 reg_value;
 722
 723         oversamp = si2165_get_fe_clk(state);
 724         oversamp <<= 23;
 725         do_div(oversamp, dvb_rate);
 726         reg_value = oversamp & 0x3fffffff;
 727
 728         /* oversamp, usbdump contained 0x03100000; */
 729         return si2165_writereg32(state, 0x00e4, reg_value);
 730 }
 731
 732 static int si2165_set_if_freq_shift(struct si2165_state *state, u32 IF)
 733 {
 734         u64 if_freq_shift;
 735         s32 reg_value = 0;
 736         u32 fe_clk = si2165_get_fe_clk(state);
 737
 738         if_freq_shift = IF;
 739         if_freq_shift <<= 29;
 740
 741         do_div(if_freq_shift, fe_clk);
 742         reg_value = (s32)if_freq_shift;
 743
 744         if (state->config.inversion)
 745                 reg_value = -reg_value;
 746
 747         reg_value = reg_value & 0x1fffffff;
 748
 749         /* if_freq_shift, usbdump contained 0x023ee08f; */
 750         return si2165_writereg32(state, 0x00e8, reg_value);
 751 }
 752
 753 static int si2165_set_parameters(struct dvb_frontend *fe)
 754 {
 755         int ret;
 756         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 757         struct si2165_state *state = fe->demodulator_priv;
 758         u8 val[3];
 759         u32 IF;
 760         u32 dvb_rate = 0;
 761         u16 bw10k;
 762
 763         dprintk("%s: called\n", __func__);
 764
 765         if (!fe->ops.tuner_ops.get_if_frequency) {
 766                 dev_err(&state->i2c->dev,
 767                         "%s: Error: get_if_frequency() not defined at tuner. Can't work without it!\n",
 768                         KBUILD_MODNAME);
 769                 return -EINVAL;
 770         }
 771
 772         if (!state->has_dvbt)
 773                 return -EINVAL;
 774
 775         if (p->bandwidth_hz > 0) {
 776                 dvb_rate = p->bandwidth_hz * 8 / 7;
 777                 bw10k = p->bandwidth_hz / 10000;
 778         } else {
 779                 dvb_rate = 8 * 8 / 7;
 780                 bw10k = 800;
 781         }
 782
 783         /* standard = DVB-T */
 784         ret = si2165_writereg8(state, 0x00ec, 0x01);
 785         if (ret < 0)
 786                 return ret;
 787         ret = si2165_adjust_pll_divl(state, 12);
 788         if (ret < 0)
 789                 return ret;
 790
 791         fe->ops.tuner_ops.get_if_frequency(fe, &IF);
 792         ret = si2165_set_if_freq_shift(state, IF);
 793         if (ret < 0)
 794                 return ret;
 795         ret = si2165_writereg8(state, 0x08f8, 0x00);
 796         if (ret < 0)
 797                 return ret;
 798         /* ts output config */
 799         ret = si2165_writereg8(state, 0x04e4, 0x20);
 800         if (ret < 0)
 801                 return ret;
 802         ret = si2165_writereg16(state, 0x04ef, 0x00fe);
 803         if (ret < 0)
 804                 return ret;
 805         ret = si2165_writereg24(state, 0x04f4, 0x555555);
 806         if (ret < 0)
 807                 return ret;
 808         ret = si2165_writereg8(state, 0x04e5, 0x01);
 809         if (ret < 0)
 810                 return ret;
 811         /* bandwidth in 10KHz steps */
 812         ret = si2165_writereg16(state, 0x0308, bw10k);
 813         if (ret < 0)
 814                 return ret;
 815         ret = si2165_set_oversamp(state, dvb_rate);
 816         if (ret < 0)
 817                 return ret;
 818         /* impulsive_noise_remover */
 819         ret = si2165_writereg8(state, 0x031c, 0x01);
 820         if (ret < 0)
 821                 return ret;
 822         ret = si2165_writereg8(state, 0x00cb, 0x00);
 823         if (ret < 0)
 824                 return ret;
 825         /* agc2 */
 826         ret = si2165_writereg8(state, 0x016e, 0x41);
 827         if (ret < 0)
 828                 return ret;
 829         ret = si2165_writereg8(state, 0x016c, 0x0e);
 830         if (ret < 0)
 831                 return ret;
 832         ret = si2165_writereg8(state, 0x016d, 0x10);
 833         if (ret < 0)
 834                 return ret;
 835         /* agc */
 836         ret = si2165_writereg8(state, 0x015b, 0x03);
 837         if (ret < 0)
 838                 return ret;
 839         ret = si2165_writereg8(state, 0x0150, 0x78);
 840         if (ret < 0)
 841                 return ret;
 842         /* agc */
 843         ret = si2165_writereg8(state, 0x01a0, 0x78);
 844         if (ret < 0)
 845                 return ret;
 846         ret = si2165_writereg8(state, 0x01c8, 0x68);
 847         if (ret < 0)
 848                 return ret;
 849         /* freq_sync_range */
 850         ret = si2165_writereg16(state, 0x030c, 0x0064);
 851         if (ret < 0)
 852                 return ret;
 853         /* gp_reg0 */
 854         ret = si2165_readreg8(state, 0x0387, val);
 855         if (ret < 0)
 856                 return ret;
 857         ret = si2165_writereg8(state, 0x0387, 0x00);
 858         if (ret < 0)
 859                 return ret;
 860         /* dsp_addr_jump */
 861         ret = si2165_writereg32(state, 0x0348, 0xf4000000);
 862         if (ret < 0)
 863                 return ret;
 864
 865         if (fe->ops.tuner_ops.set_params)
 866                 fe->ops.tuner_ops.set_params(fe);
 867
 868         /* recalc if_freq_shift if IF might has changed */
 869         fe->ops.tuner_ops.get_if_frequency(fe, &IF);
 870         ret = si2165_set_if_freq_shift(state, IF);
 871         if (ret < 0)
 872                 return ret;
 873
 874         /* boot/wdog status */
 875         ret = si2165_readreg8(state, 0x0341, val);
 876         if (ret < 0)
 877                 return ret;
 878         ret = si2165_writereg8(state, 0x0341, 0x00);
 879         if (ret < 0)
 880                 return ret;
 881         /* reset all */
 882         ret = si2165_writereg8(state, 0x00c0, 0x00);
 883         if (ret < 0)
 884                 return ret;
 885         /* gp_reg0 */
 886         ret = si2165_writereg32(state, 0x0384, 0x00000000);
 887         if (ret < 0)
 888                 return ret;
 889         /* start_synchro */
 890         ret = si2165_writereg8(state, 0x02e0, 0x01);
 891         if (ret < 0)
 892                 return ret;
 893         /* boot/wdog status */
 894         ret = si2165_readreg8(state, 0x0341, val);
 895         if (ret < 0)
 896                 return ret;
 897
 898         return 0;
 899 }
 900
 901 static void si2165_release(struct dvb_frontend *fe)
 902 {
 903         struct si2165_state *state = fe->demodulator_priv;
 904
 905         dprintk("%s: called\n", __func__);
 906         kfree(state);
 907 }
 908
 909 static struct dvb_frontend_ops si2165_ops = {
 910         .info = {
 911                 .name = "Silicon Labs Si2165",
 912                 .caps = FE_CAN_FEC_1_2 |
 913                         FE_CAN_FEC_2_3 |
 914                         FE_CAN_FEC_3_4 |
 915                         FE_CAN_FEC_5_6 |
 916                         FE_CAN_FEC_7_8 |
 917                         FE_CAN_FEC_AUTO |
 918                         FE_CAN_QPSK |
 919                         FE_CAN_QAM_16 |
 920                         FE_CAN_QAM_32 |
 921                         FE_CAN_QAM_64 |
 922                         FE_CAN_QAM_128 |
 923                         FE_CAN_QAM_256 |
 924                         FE_CAN_QAM_AUTO |
 925                         FE_CAN_TRANSMISSION_MODE_AUTO |
 926                         FE_CAN_GUARD_INTERVAL_AUTO |
 927                         FE_CAN_HIERARCHY_AUTO |
 928                         FE_CAN_MUTE_TS |
 929                         FE_CAN_TRANSMISSION_MODE_AUTO |
 930                         FE_CAN_RECOVER
 931         },
 932
 933         .get_tune_settings = si2165_get_tune_settings,
 934
 935         .init = si2165_init,
 936         .sleep = si2165_sleep,
 937
 938         .set_frontend      = si2165_set_parameters,
 939         .read_status       = si2165_read_status,
 940
 941         .release = si2165_release,
 942 };
 943
 944 struct dvb_frontend *si2165_attach(const struct si2165_config *config,
 945                                    struct i2c_adapter *i2c)
 946 {
 947         struct si2165_state *state = NULL;
 948         int n;
 949         int io_ret;
 950         u8 val;
 951
 952         if (config == NULL || i2c == NULL)
 953                 goto error;
 954
 955         /* allocate memory for the internal state */
 956         state = kzalloc(sizeof(struct si2165_state), GFP_KERNEL);
 957         if (state == NULL)
 958                 goto error;
 959
 960         /* setup the state */
 961         state->i2c = i2c;
 962         state->config = *config;
 963
 964         if (state->config.ref_freq_Hz < 4000000
 965             || state->config.ref_freq_Hz > 27000000) {
 966                 dev_err(&state->i2c->dev, "%s: ref_freq of %d Hz not supported by this driver\n",
 967                          KBUILD_MODNAME, state->config.ref_freq_Hz);
 968                 goto error;
 969         }
 970
 971         /* create dvb_frontend */
 972         memcpy(&state->frontend.ops, &si2165_ops,
 973                 sizeof(struct dvb_frontend_ops));
 974         state->frontend.demodulator_priv = state;
 975
 976         /* powerup */
 977         io_ret = si2165_writereg8(state, 0x0000, state->config.chip_mode);
 978         if (io_ret < 0)
 979                 goto error;
 980
 981         io_ret = si2165_readreg8(state, 0x0000, &val);
 982         if (io_ret < 0)
 983                 goto error;
 984         if (val != state->config.chip_mode)
 985                 goto error;
 986
 987         io_ret = si2165_readreg8(state, 0x0023 , &state->revcode);
 988         if (io_ret < 0)
 989                 goto error;
 990
 991         io_ret = si2165_readreg8(state, 0x0118, &state->chip_type);
 992         if (io_ret < 0)
 993                 goto error;
 994
 995         /* powerdown */
 996         io_ret = si2165_writereg8(state, 0x0000, SI2165_MODE_OFF);
 997         if (io_ret < 0)
 998                 goto error;
 999
1000         dev_info(&state->i2c->dev, "%s: hardware revision 0x%02x, chip type 0x%02x\n",
1001                  KBUILD_MODNAME, state->revcode, state->chip_type);
1002
1003         /* It is a guess that register 0x0118 (chip type?) can be used to
1004          * differ between si2161, si2163 and si2165
1005          * Only si2165 has been tested.
1006          */
1007         if (state->revcode == 0x03 && state->chip_type == 0x07) {
1008                 state->has_dvbt = true;
1009                 state->has_dvbc = true;
1010         } else {
1011                 dev_err(&state->i2c->dev, "%s: Unsupported chip.\n",
1012                         KBUILD_MODNAME);
1013                 goto error;
1014         }
1015
1016         n = 0;
1017         if (state->has_dvbt) {
1018                 state->frontend.ops.delsys[n++] = SYS_DVBT;
1019                 strlcat(state->frontend.ops.info.name, " DVB-T",
1020                         sizeof(state->frontend.ops.info.name));
1021         }
1022         if (state->has_dvbc)
1023                 dev_warn(&state->i2c->dev, "%s: DVB-C is not yet supported.\n",
1024                        KBUILD_MODNAME);
1025
1026         return &state->frontend;
1027
1028 error:
1029         kfree(state);
1030         return NULL;
1031 }
1032 EXPORT_SYMBOL(si2165_attach);
1033
1034 module_param(debug, int, 0644);
1035 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1036
1037 MODULE_DESCRIPTION("Silicon Labs Si2165 DVB-C/-T Demodulator driver");
1038 MODULE_AUTHOR("Matthias Schwarzott <zzam@gentoo.org>");
1039 MODULE_LICENSE("GPL");
1040 MODULE_FIRMWARE(SI2165_FIRMWARE);