2 * Driver for the Conexant CX23885 PCIe bridge
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/device.h>
22 #include <linux/kthread.h>
23 #include <linux/file.h>
24 #include <linux/suspend.h>
27 #include <media/v4l2-common.h>
29 #include "dvb_ca_en50221.h"
40 #include "tuner-xc2028.h"
41 #include "tuner-simple.h"
44 #include "dibx000_common.h"
47 #include "stv0900_reg.h"
54 #include "netup-eeprom.h"
55 #include "netup-init.h"
60 #include "cx23885-f300.h"
61 #include "altera-ci.h"
67 #include "stb6100_cfg.h"
74 #include "m88ds3103.h"
75 #include "m88ts2022.h"
77 static unsigned int debug;
79 #define dprintk(level, fmt, arg...)\
80 do { if (debug >= level)\
81 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
84 /* ------------------------------------------------------------------ */
86 static unsigned int alt_tuner;
87 module_param(alt_tuner, int, 0644);
88 MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
90 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
92 /* ------------------------------------------------------------------ */
94 static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
95 unsigned int *num_buffers, unsigned int *num_planes,
96 unsigned int sizes[], void *alloc_ctxs[])
98 struct cx23885_tsport *port = q->drv_priv;
100 port->ts_packet_size = 188 * 4;
101 port->ts_packet_count = 32;
103 sizes[0] = port->ts_packet_size * port->ts_packet_count;
109 static int buffer_prepare(struct vb2_buffer *vb)
111 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
112 struct cx23885_buffer *buf =
113 container_of(vb, struct cx23885_buffer, vb);
115 return cx23885_buf_prepare(buf, port);
118 static void buffer_finish(struct vb2_buffer *vb)
120 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
121 struct cx23885_dev *dev = port->dev;
122 struct cx23885_buffer *buf = container_of(vb,
123 struct cx23885_buffer, vb);
124 struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
126 cx23885_free_buffer(dev, buf);
128 dma_unmap_sg(&dev->pci->dev, sgt->sgl, sgt->nents, DMA_FROM_DEVICE);
131 static void buffer_queue(struct vb2_buffer *vb)
133 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
134 struct cx23885_buffer *buf = container_of(vb,
135 struct cx23885_buffer, vb);
137 cx23885_buf_queue(port, buf);
140 static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open)
142 struct vb2_dvb_frontends *f;
143 struct vb2_dvb_frontend *fe;
145 f = &port->frontends;
147 if (f->gate <= 1) /* undefined or fe0 */
148 fe = vb2_dvb_get_frontend(f, 1);
150 fe = vb2_dvb_get_frontend(f, f->gate);
152 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
153 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
156 static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count)
158 struct cx23885_tsport *port = q->drv_priv;
159 struct cx23885_dmaqueue *dmaq = &port->mpegq;
160 struct cx23885_buffer *buf = list_entry(dmaq->active.next,
161 struct cx23885_buffer, queue);
163 cx23885_start_dma(port, dmaq, buf);
167 static void cx23885_stop_streaming(struct vb2_queue *q)
169 struct cx23885_tsport *port = q->drv_priv;
171 cx23885_cancel_buffers(port);
174 static struct vb2_ops dvb_qops = {
175 .queue_setup = queue_setup,
176 .buf_prepare = buffer_prepare,
177 .buf_finish = buffer_finish,
178 .buf_queue = buffer_queue,
179 .wait_prepare = vb2_ops_wait_prepare,
180 .wait_finish = vb2_ops_wait_finish,
181 .start_streaming = cx23885_start_streaming,
182 .stop_streaming = cx23885_stop_streaming,
185 static struct s5h1409_config hauppauge_generic_config = {
186 .demod_address = 0x32 >> 1,
187 .output_mode = S5H1409_SERIAL_OUTPUT,
188 .gpio = S5H1409_GPIO_ON,
190 .inversion = S5H1409_INVERSION_OFF,
191 .status_mode = S5H1409_DEMODLOCKING,
192 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
195 static struct tda10048_config hauppauge_hvr1200_config = {
196 .demod_address = 0x10 >> 1,
197 .output_mode = TDA10048_SERIAL_OUTPUT,
198 .fwbulkwritelen = TDA10048_BULKWRITE_200,
199 .inversion = TDA10048_INVERSION_ON,
200 .dtv6_if_freq_khz = TDA10048_IF_3300,
201 .dtv7_if_freq_khz = TDA10048_IF_3800,
202 .dtv8_if_freq_khz = TDA10048_IF_4300,
203 .clk_freq_khz = TDA10048_CLK_16000,
206 static struct tda10048_config hauppauge_hvr1210_config = {
207 .demod_address = 0x10 >> 1,
208 .output_mode = TDA10048_SERIAL_OUTPUT,
209 .fwbulkwritelen = TDA10048_BULKWRITE_200,
210 .inversion = TDA10048_INVERSION_ON,
211 .dtv6_if_freq_khz = TDA10048_IF_3300,
212 .dtv7_if_freq_khz = TDA10048_IF_3500,
213 .dtv8_if_freq_khz = TDA10048_IF_4000,
214 .clk_freq_khz = TDA10048_CLK_16000,
217 static struct s5h1409_config hauppauge_ezqam_config = {
218 .demod_address = 0x32 >> 1,
219 .output_mode = S5H1409_SERIAL_OUTPUT,
220 .gpio = S5H1409_GPIO_OFF,
222 .inversion = S5H1409_INVERSION_ON,
223 .status_mode = S5H1409_DEMODLOCKING,
224 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
227 static struct s5h1409_config hauppauge_hvr1800lp_config = {
228 .demod_address = 0x32 >> 1,
229 .output_mode = S5H1409_SERIAL_OUTPUT,
230 .gpio = S5H1409_GPIO_OFF,
232 .inversion = S5H1409_INVERSION_OFF,
233 .status_mode = S5H1409_DEMODLOCKING,
234 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
237 static struct s5h1409_config hauppauge_hvr1500_config = {
238 .demod_address = 0x32 >> 1,
239 .output_mode = S5H1409_SERIAL_OUTPUT,
240 .gpio = S5H1409_GPIO_OFF,
241 .inversion = S5H1409_INVERSION_OFF,
242 .status_mode = S5H1409_DEMODLOCKING,
243 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
246 static struct mt2131_config hauppauge_generic_tunerconfig = {
250 static struct lgdt330x_config fusionhdtv_5_express = {
251 .demod_address = 0x0e,
252 .demod_chip = LGDT3303,
256 static struct s5h1409_config hauppauge_hvr1500q_config = {
257 .demod_address = 0x32 >> 1,
258 .output_mode = S5H1409_SERIAL_OUTPUT,
259 .gpio = S5H1409_GPIO_ON,
261 .inversion = S5H1409_INVERSION_OFF,
262 .status_mode = S5H1409_DEMODLOCKING,
263 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
266 static struct s5h1409_config dvico_s5h1409_config = {
267 .demod_address = 0x32 >> 1,
268 .output_mode = S5H1409_SERIAL_OUTPUT,
269 .gpio = S5H1409_GPIO_ON,
271 .inversion = S5H1409_INVERSION_OFF,
272 .status_mode = S5H1409_DEMODLOCKING,
273 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
276 static struct s5h1411_config dvico_s5h1411_config = {
277 .output_mode = S5H1411_SERIAL_OUTPUT,
278 .gpio = S5H1411_GPIO_ON,
279 .qam_if = S5H1411_IF_44000,
280 .vsb_if = S5H1411_IF_44000,
281 .inversion = S5H1411_INVERSION_OFF,
282 .status_mode = S5H1411_DEMODLOCKING,
283 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
286 static struct s5h1411_config hcw_s5h1411_config = {
287 .output_mode = S5H1411_SERIAL_OUTPUT,
288 .gpio = S5H1411_GPIO_OFF,
289 .vsb_if = S5H1411_IF_44000,
290 .qam_if = S5H1411_IF_4000,
291 .inversion = S5H1411_INVERSION_ON,
292 .status_mode = S5H1411_DEMODLOCKING,
293 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
296 static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
301 static struct xc5000_config dvico_xc5000_tunerconfig = {
306 static struct tda829x_config tda829x_no_probe = {
307 .probe_tuner = TDA829X_DONT_PROBE,
310 static struct tda18271_std_map hauppauge_tda18271_std_map = {
311 .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
312 .if_lvl = 6, .rfagc_top = 0x37 },
313 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
314 .if_lvl = 6, .rfagc_top = 0x37 },
317 static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
318 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
319 .if_lvl = 1, .rfagc_top = 0x37, },
320 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
321 .if_lvl = 1, .rfagc_top = 0x37, },
322 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
323 .if_lvl = 1, .rfagc_top = 0x37, },
326 static struct tda18271_config hauppauge_tda18271_config = {
327 .std_map = &hauppauge_tda18271_std_map,
328 .gate = TDA18271_GATE_ANALOG,
329 .output_opt = TDA18271_OUTPUT_LT_OFF,
332 static struct tda18271_config hauppauge_hvr1200_tuner_config = {
333 .std_map = &hauppauge_hvr1200_tda18271_std_map,
334 .gate = TDA18271_GATE_ANALOG,
335 .output_opt = TDA18271_OUTPUT_LT_OFF,
338 static struct tda18271_config hauppauge_hvr1210_tuner_config = {
339 .gate = TDA18271_GATE_DIGITAL,
340 .output_opt = TDA18271_OUTPUT_LT_OFF,
343 static struct tda18271_config hauppauge_hvr4400_tuner_config = {
344 .gate = TDA18271_GATE_DIGITAL,
345 .output_opt = TDA18271_OUTPUT_LT_OFF,
348 static struct tda18271_std_map hauppauge_hvr127x_std_map = {
349 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
350 .if_lvl = 1, .rfagc_top = 0x58 },
351 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
352 .if_lvl = 1, .rfagc_top = 0x58 },
355 static struct tda18271_config hauppauge_hvr127x_config = {
356 .std_map = &hauppauge_hvr127x_std_map,
357 .output_opt = TDA18271_OUTPUT_LT_OFF,
360 static struct lgdt3305_config hauppauge_lgdt3305_config = {
362 .mpeg_mode = LGDT3305_MPEG_SERIAL,
363 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
364 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
366 .spectral_inversion = 1,
371 static struct dibx000_agc_config xc3028_agc_config = {
372 BAND_VHF | BAND_UHF, /* band_caps */
374 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
375 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
376 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
377 * P_agc_nb_est=2, P_agc_write=0
379 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
380 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
383 21, /* time_stabiliz */
395 39718, /* agc2_max */
404 29, /* agc2_slope1 */
405 29, /* agc2_slope2 */
412 1, /* perform_agc_softsplit */
415 /* PLL Configuration for COFDM BW_MHz = 8.000000
416 * With external clock = 30.000000 */
417 static struct dibx000_bandwidth_config xc3028_bw_config = {
418 60000, /* internal */
419 30000, /* sampling */
420 1, /* pll_cfg: prediv */
421 8, /* pll_cfg: ratio */
422 3, /* pll_cfg: range */
423 1, /* pll_cfg: reset */
424 0, /* pll_cfg: bypass */
425 0, /* misc: refdiv */
426 0, /* misc: bypclk_div */
427 1, /* misc: IO_CLK_en_core */
428 1, /* misc: ADClkSrc */
429 0, /* misc: modulo */
430 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
431 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
433 30000000 /* xtal_hz */
436 static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
437 .output_mpeg2_in_188_bytes = 1,
438 .hostbus_diversity = 1,
439 .tuner_is_baseband = 0,
442 .agc_config_count = 1,
443 .agc = &xc3028_agc_config,
444 .bw = &xc3028_bw_config,
446 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
447 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
448 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
454 .output_mode = OUTMODE_MPEG2_SERIAL,
457 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
458 .demod_address = 0x0f,
461 .disable_i2c_gate_ctrl = 1,
464 static struct stv0900_reg stv0900_ts_regs[] = {
465 { R0900_TSGENERAL, 0x00 },
466 { R0900_P1_TSSPEED, 0x40 },
467 { R0900_P2_TSSPEED, 0x40 },
468 { R0900_P1_TSCFGM, 0xc0 },
469 { R0900_P2_TSCFGM, 0xc0 },
470 { R0900_P1_TSCFGH, 0xe0 },
471 { R0900_P2_TSCFGH, 0xe0 },
472 { R0900_P1_TSCFGL, 0x20 },
473 { R0900_P2_TSCFGL, 0x20 },
474 { 0xffff, 0xff }, /* terminate */
477 static struct stv0900_config netup_stv0900_config = {
478 .demod_address = 0x68,
479 .demod_mode = 1, /* dual */
481 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
482 .diseqc_mode = 2,/* 2/3 PWM */
483 .ts_config_regs = stv0900_ts_regs,
484 .tun1_maddress = 0,/* 0x60 */
485 .tun2_maddress = 3,/* 0x63 */
486 .tun1_adc = 1,/* 1 Vpp */
487 .tun2_adc = 1,/* 1 Vpp */
490 static struct stv6110_config netup_stv6110_tunerconfig_a = {
494 .gain = 8, /* +16 dB - maximum gain */
497 static struct stv6110_config netup_stv6110_tunerconfig_b = {
501 .gain = 8, /* +16 dB - maximum gain */
504 static struct cx24116_config tbs_cx24116_config = {
505 .demod_address = 0x55,
508 static struct cx24117_config tbs_cx24117_config = {
509 .demod_address = 0x55,
512 static struct ds3000_config tevii_ds3000_config = {
513 .demod_address = 0x68,
516 static struct ts2020_config tevii_ts2020_config = {
517 .tuner_address = 0x60,
519 .frequency_div = 1146000,
522 static struct cx24116_config dvbworld_cx24116_config = {
523 .demod_address = 0x05,
526 static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
527 .prod = LGS8GXX_PROD_LGS8GL5,
528 .demod_address = 0x19,
532 .if_clk_freq = 30400, /* 30.4 MHz */
533 .if_freq = 5380, /* 5.38 MHz */
540 static struct xc5000_config mygica_x8506_xc5000_config = {
545 static struct mb86a20s_config mygica_x8507_mb86a20s_config = {
546 .demod_address = 0x10,
549 static struct xc5000_config mygica_x8507_xc5000_config = {
554 static struct stv090x_config prof_8000_stv090x_config = {
556 .demod_mode = STV090x_SINGLE,
557 .clk_mode = STV090x_CLK_EXT,
560 .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED,
561 .repeater_level = STV090x_RPTLEVEL_64,
562 .adc1_range = STV090x_ADC_2Vpp,
563 .diseqc_envelope_mode = false,
565 .tuner_get_frequency = stb6100_get_frequency,
566 .tuner_set_frequency = stb6100_set_frequency,
567 .tuner_set_bandwidth = stb6100_set_bandwidth,
568 .tuner_get_bandwidth = stb6100_get_bandwidth,
571 static struct stb6100_config prof_8000_stb6100_config = {
572 .tuner_address = 0x60,
573 .refclock = 27000000,
576 static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
578 struct cx23885_tsport *port = fe->dvb->priv;
579 struct cx23885_dev *dev = port->dev;
581 if (voltage == SEC_VOLTAGE_18)
582 cx_write(MC417_RWD, 0x00001e00);
583 else if (voltage == SEC_VOLTAGE_13)
584 cx_write(MC417_RWD, 0x00001a00);
586 cx_write(MC417_RWD, 0x00001800);
590 static int dvbsky_t9580_set_voltage(struct dvb_frontend *fe,
591 fe_sec_voltage_t voltage)
593 struct cx23885_tsport *port = fe->dvb->priv;
594 struct cx23885_dev *dev = port->dev;
596 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
600 cx23885_gpio_set(dev, GPIO_1);
601 cx23885_gpio_clear(dev, GPIO_0);
604 cx23885_gpio_set(dev, GPIO_1);
605 cx23885_gpio_set(dev, GPIO_0);
607 case SEC_VOLTAGE_OFF:
608 cx23885_gpio_clear(dev, GPIO_1);
609 cx23885_gpio_clear(dev, GPIO_0);
613 /* call the frontend set_voltage function */
614 port->fe_set_voltage(fe, voltage);
619 static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
621 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
622 struct cx23885_tsport *port = fe->dvb->priv;
623 struct cx23885_dev *dev = port->dev;
625 switch (dev->board) {
626 case CX23885_BOARD_HAUPPAUGE_HVR1275:
627 switch (p->modulation) {
629 cx23885_gpio_clear(dev, GPIO_5);
634 cx23885_gpio_set(dev, GPIO_5);
638 case CX23885_BOARD_MYGICA_X8506:
639 case CX23885_BOARD_MYGICA_X8507:
640 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
641 /* Select Digital TV */
642 cx23885_gpio_set(dev, GPIO_0);
646 /* Call the real set_frontend */
647 if (port->set_frontend)
648 return port->set_frontend(fe);
653 static void cx23885_set_frontend_hook(struct cx23885_tsport *port,
654 struct dvb_frontend *fe)
656 port->set_frontend = fe->ops.set_frontend;
657 fe->ops.set_frontend = cx23885_dvb_set_frontend;
660 static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
661 .prod = LGS8GXX_PROD_LGS8G75,
662 .demod_address = 0x19,
666 .if_clk_freq = 30400, /* 30.4 MHz */
667 .if_freq = 6500, /* 6.50 MHz */
671 .adc_vpp = 2, /* 1.6 Vpp */
675 static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
680 static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
681 .prod = ATBM8830_PROD_8830,
682 .demod_address = 0x44,
684 .ts_sampling_edge = 1,
686 .osc_clk_freq = 30400, /* in kHz */
687 .if_freq = 0, /* zero IF */
694 static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
699 static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
700 .prod = ATBM8830_PROD_8830,
701 .demod_address = 0x44,
703 .ts_sampling_edge = 1,
705 .osc_clk_freq = 30400, /* in kHz */
706 .if_freq = 0, /* zero IF */
713 static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
717 static struct stv0367_config netup_stv0367_config[] = {
719 .demod_address = 0x1c,
726 .demod_address = 0x1d,
735 static struct xc5000_config netup_xc5000_config[] = {
745 static struct drxk_config terratec_drxk_config[] = {
755 static struct mt2063_config terratec_mt2063_config[] = {
757 .tuner_address = 0x60,
759 .tuner_address = 0x67,
763 static const struct tda10071_config hauppauge_tda10071_config = {
764 .demod_i2c_addr = 0x05,
765 .tuner_i2c_addr = 0x54,
767 .ts_mode = TDA10071_TS_SERIAL,
769 .xtal = 40444000, /* 40.444 MHz */
770 .pll_multiplier = 20,
773 static const struct a8293_config hauppauge_a8293_config = {
777 static const struct si2165_config hauppauge_hvr4400_si2165_config = {
779 .chip_mode = SI2165_MODE_PLL_XTAL,
780 .ref_freq_Hz = 16000000,
783 static const struct m88ds3103_config dvbsky_t9580_m88ds3103_config = {
788 .ts_mode = M88DS3103_TS_PARALLEL,
796 static int netup_altera_fpga_rw(void *device, int flag, int data, int read)
798 struct cx23885_dev *dev = (struct cx23885_dev *)device;
799 unsigned long timeout = jiffies + msecs_to_jiffies(1);
802 mem = cx_read(MC417_RWD);
804 cx_set(MC417_OEN, ALT_DATA);
806 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
808 mem |= (data & ALT_DATA);
818 mem = (mem & ~ALT_RD) | ALT_WR;
820 mem = (mem & ~ALT_WR) | ALT_RD;
822 cx_write(MC417_RWD, mem); /* start RW cycle */
825 mem = cx_read(MC417_RWD);
826 if ((mem & ALT_RDY) == 0)
828 if (time_after(jiffies, timeout))
833 cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS);
835 return mem & ALT_DATA;
840 static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
842 struct dib7000p_ops *dib7000p_ops = fe->sec_priv;
844 return dib7000p_ops->set_gpio(fe, 8, 0, !onoff);
847 static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
852 static struct dib0070_config dib7070p_dib0070_config = {
853 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
854 .reset = dib7070_tuner_reset,
855 .sleep = dib7070_tuner_sleep,
857 .freq_offset_khz_vhf = 550,
858 /* .flip_chip = 1, */
861 /* DIB7070 generic */
862 static struct dibx000_agc_config dib7070_agc_config = {
863 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
866 * P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5,
867 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
868 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0
870 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) |
871 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
897 .perform_agc_softsplit = 0,
900 static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
913 /* refsel, sel, freq_15k */
914 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
915 .ifreq = (0 << 25) | 0,
920 static struct dib7000p_config dib7070p_dib7000p_config = {
921 /* .output_mode = OUTMODE_MPEG2_FIFO, */
922 .output_mode = OUTMODE_MPEG2_SERIAL,
923 /* .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, */
924 .output_mpeg2_in_188_bytes = 1,
926 .agc_config_count = 1,
927 .agc = &dib7070_agc_config,
928 .bw = &dib7070_bw_config_12_mhz,
929 .tuner_is_baseband = 1,
932 .gpio_dir = 0xfcef, /* DIB7000P_GPIO_DEFAULT_DIRECTIONS, */
933 .gpio_val = 0x0110, /* DIB7000P_GPIO_DEFAULT_VALUES, */
934 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
936 .hostbus_diversity = 1,
939 static int dvb_register(struct cx23885_tsport *port)
941 struct dib7000p_ops dib7000p_ops;
942 struct cx23885_dev *dev = port->dev;
943 struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
944 struct vb2_dvb_frontend *fe0, *fe1 = NULL;
945 struct si2168_config si2168_config;
946 struct si2157_config si2157_config;
947 struct m88ts2022_config m88ts2022_config;
948 struct i2c_board_info info;
949 struct i2c_adapter *adapter;
950 struct i2c_client *client_demod;
951 struct i2c_client *client_tuner;
952 int mfe_shared = 0; /* bus not shared by default */
955 /* Get the first frontend */
956 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
960 /* init struct vb2_dvb */
961 fe0->dvb.name = dev->name;
963 /* multi-frontend gate control is undefined or defaults to fe0 */
964 port->frontends.gate = 0;
966 /* Sets the gate control callback to be used by i2c command calls */
967 port->gate_ctrl = cx23885_dvb_gate_ctrl;
970 switch (dev->board) {
971 case CX23885_BOARD_HAUPPAUGE_HVR1250:
972 i2c_bus = &dev->i2c_bus[0];
973 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
974 &hauppauge_generic_config,
976 if (fe0->dvb.frontend != NULL) {
977 dvb_attach(mt2131_attach, fe0->dvb.frontend,
979 &hauppauge_generic_tunerconfig, 0);
982 case CX23885_BOARD_HAUPPAUGE_HVR1270:
983 case CX23885_BOARD_HAUPPAUGE_HVR1275:
984 i2c_bus = &dev->i2c_bus[0];
985 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
986 &hauppauge_lgdt3305_config,
988 if (fe0->dvb.frontend != NULL) {
989 dvb_attach(tda18271_attach, fe0->dvb.frontend,
990 0x60, &dev->i2c_bus[1].i2c_adap,
991 &hauppauge_hvr127x_config);
993 if (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1275)
994 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
996 case CX23885_BOARD_HAUPPAUGE_HVR1255:
997 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
998 i2c_bus = &dev->i2c_bus[0];
999 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1000 &hcw_s5h1411_config,
1001 &i2c_bus->i2c_adap);
1002 if (fe0->dvb.frontend != NULL) {
1003 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1004 0x60, &dev->i2c_bus[1].i2c_adap,
1005 &hauppauge_tda18271_config);
1008 tda18271_attach(&dev->ts1.analog_fe,
1009 0x60, &dev->i2c_bus[1].i2c_adap,
1010 &hauppauge_tda18271_config);
1013 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1014 i2c_bus = &dev->i2c_bus[0];
1015 switch (alt_tuner) {
1018 dvb_attach(s5h1409_attach,
1019 &hauppauge_ezqam_config,
1020 &i2c_bus->i2c_adap);
1021 if (fe0->dvb.frontend != NULL) {
1022 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1023 &dev->i2c_bus[1].i2c_adap, 0x42,
1025 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1026 0x60, &dev->i2c_bus[1].i2c_adap,
1027 &hauppauge_tda18271_config);
1033 dvb_attach(s5h1409_attach,
1034 &hauppauge_generic_config,
1035 &i2c_bus->i2c_adap);
1036 if (fe0->dvb.frontend != NULL)
1037 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1039 &hauppauge_generic_tunerconfig, 0);
1043 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1044 i2c_bus = &dev->i2c_bus[0];
1045 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1046 &hauppauge_hvr1800lp_config,
1047 &i2c_bus->i2c_adap);
1048 if (fe0->dvb.frontend != NULL) {
1049 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1051 &hauppauge_generic_tunerconfig, 0);
1054 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1055 i2c_bus = &dev->i2c_bus[0];
1056 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1057 &fusionhdtv_5_express,
1058 &i2c_bus->i2c_adap);
1059 if (fe0->dvb.frontend != NULL) {
1060 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1061 &i2c_bus->i2c_adap, 0x61,
1062 TUNER_LG_TDVS_H06XF);
1065 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1066 i2c_bus = &dev->i2c_bus[1];
1067 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1068 &hauppauge_hvr1500q_config,
1069 &dev->i2c_bus[0].i2c_adap);
1070 if (fe0->dvb.frontend != NULL)
1071 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1073 &hauppauge_hvr1500q_tunerconfig);
1075 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1076 i2c_bus = &dev->i2c_bus[1];
1077 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1078 &hauppauge_hvr1500_config,
1079 &dev->i2c_bus[0].i2c_adap);
1080 if (fe0->dvb.frontend != NULL) {
1081 struct dvb_frontend *fe;
1082 struct xc2028_config cfg = {
1083 .i2c_adap = &i2c_bus->i2c_adap,
1086 static struct xc2028_ctrl ctl = {
1087 .fname = XC2028_DEFAULT_FIRMWARE,
1089 .demod = XC3028_FE_OREN538,
1092 fe = dvb_attach(xc2028_attach,
1093 fe0->dvb.frontend, &cfg);
1094 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1095 fe->ops.tuner_ops.set_config(fe, &ctl);
1098 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1099 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1100 i2c_bus = &dev->i2c_bus[0];
1101 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1102 &hauppauge_hvr1200_config,
1103 &i2c_bus->i2c_adap);
1104 if (fe0->dvb.frontend != NULL) {
1105 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1106 &dev->i2c_bus[1].i2c_adap, 0x42,
1108 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1109 0x60, &dev->i2c_bus[1].i2c_adap,
1110 &hauppauge_hvr1200_tuner_config);
1113 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1114 i2c_bus = &dev->i2c_bus[0];
1115 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1116 &hauppauge_hvr1210_config,
1117 &i2c_bus->i2c_adap);
1118 if (fe0->dvb.frontend != NULL) {
1119 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1120 0x60, &dev->i2c_bus[1].i2c_adap,
1121 &hauppauge_hvr1210_tuner_config);
1124 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1125 i2c_bus = &dev->i2c_bus[0];
1127 if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
1130 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap,
1131 0x12, &hauppauge_hvr1400_dib7000_config);
1132 if (fe0->dvb.frontend != NULL) {
1133 struct dvb_frontend *fe;
1134 struct xc2028_config cfg = {
1135 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
1138 static struct xc2028_ctrl ctl = {
1139 .fname = XC3028L_DEFAULT_FIRMWARE,
1141 .demod = XC3028_FE_DIBCOM52,
1142 /* This is true for all demods with
1144 .type = XC2028_D2633,
1147 fe = dvb_attach(xc2028_attach,
1148 fe0->dvb.frontend, &cfg);
1149 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1150 fe->ops.tuner_ops.set_config(fe, &ctl);
1153 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1154 i2c_bus = &dev->i2c_bus[port->nr - 1];
1156 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1157 &dvico_s5h1409_config,
1158 &i2c_bus->i2c_adap);
1159 if (fe0->dvb.frontend == NULL)
1160 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1161 &dvico_s5h1411_config,
1162 &i2c_bus->i2c_adap);
1163 if (fe0->dvb.frontend != NULL)
1164 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1166 &dvico_xc5000_tunerconfig);
1168 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
1169 i2c_bus = &dev->i2c_bus[port->nr - 1];
1171 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1172 &dvico_fusionhdtv_xc3028,
1173 &i2c_bus->i2c_adap);
1174 if (fe0->dvb.frontend != NULL) {
1175 struct dvb_frontend *fe;
1176 struct xc2028_config cfg = {
1177 .i2c_adap = &i2c_bus->i2c_adap,
1180 static struct xc2028_ctrl ctl = {
1181 .fname = XC2028_DEFAULT_FIRMWARE,
1183 .demod = XC3028_FE_ZARLINK456,
1186 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
1188 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1189 fe->ops.tuner_ops.set_config(fe, &ctl);
1193 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: {
1194 i2c_bus = &dev->i2c_bus[port->nr - 1];
1195 /* cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0); */
1196 /* cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1); */
1198 if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
1201 if (dib7000p_ops.i2c_enumeration(&i2c_bus->i2c_adap, 1, 0x12, &dib7070p_dib7000p_config) < 0) {
1202 printk(KERN_WARNING "Unable to enumerate dib7000p\n");
1205 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap, 0x80, &dib7070p_dib7000p_config);
1206 if (fe0->dvb.frontend != NULL) {
1207 struct i2c_adapter *tun_i2c;
1209 fe0->dvb.frontend->sec_priv = kmalloc(sizeof(dib7000p_ops), GFP_KERNEL);
1210 memcpy(fe0->dvb.frontend->sec_priv, &dib7000p_ops, sizeof(dib7000p_ops));
1211 tun_i2c = dib7000p_ops.get_i2c_master(fe0->dvb.frontend, DIBX000_I2C_INTERFACE_TUNER, 1);
1212 if (!dvb_attach(dib0070_attach, fe0->dvb.frontend, tun_i2c, &dib7070p_dib0070_config))
1217 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1218 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1219 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1220 i2c_bus = &dev->i2c_bus[0];
1222 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1223 &dvico_fusionhdtv_xc3028,
1224 &i2c_bus->i2c_adap);
1225 if (fe0->dvb.frontend != NULL) {
1226 struct dvb_frontend *fe;
1227 struct xc2028_config cfg = {
1228 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
1231 static struct xc2028_ctrl ctl = {
1232 .fname = XC2028_DEFAULT_FIRMWARE,
1234 .demod = XC3028_FE_ZARLINK456,
1237 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
1239 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1240 fe->ops.tuner_ops.set_config(fe, &ctl);
1243 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1244 i2c_bus = &dev->i2c_bus[0];
1246 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1247 &dvico_fusionhdtv_xc3028,
1248 &i2c_bus->i2c_adap);
1249 if (fe0->dvb.frontend != NULL) {
1250 struct dvb_frontend *fe;
1251 struct xc4000_config cfg = {
1252 .i2c_address = 0x61,
1254 .dvb_amplitude = 134,
1255 .set_smoothedcvbs = 1,
1259 fe = dvb_attach(xc4000_attach, fe0->dvb.frontend,
1260 &dev->i2c_bus[1].i2c_adap, &cfg);
1262 printk(KERN_ERR "%s/2: xc4000 attach failed\n",
1264 goto frontend_detach;
1268 case CX23885_BOARD_TBS_6920:
1269 i2c_bus = &dev->i2c_bus[1];
1271 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1272 &tbs_cx24116_config,
1273 &i2c_bus->i2c_adap);
1274 if (fe0->dvb.frontend != NULL)
1275 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
1278 case CX23885_BOARD_TBS_6980:
1279 case CX23885_BOARD_TBS_6981:
1280 i2c_bus = &dev->i2c_bus[1];
1285 fe0->dvb.frontend = dvb_attach(cx24117_attach,
1286 &tbs_cx24117_config,
1287 &i2c_bus->i2c_adap);
1291 fe0->dvb.frontend = dvb_attach(cx24117_attach,
1292 &tbs_cx24117_config,
1293 &i2c_bus->i2c_adap);
1297 case CX23885_BOARD_TEVII_S470:
1298 i2c_bus = &dev->i2c_bus[1];
1300 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1301 &tevii_ds3000_config,
1302 &i2c_bus->i2c_adap);
1303 if (fe0->dvb.frontend != NULL) {
1304 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1305 &tevii_ts2020_config, &i2c_bus->i2c_adap);
1306 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
1310 case CX23885_BOARD_DVBWORLD_2005:
1311 i2c_bus = &dev->i2c_bus[1];
1313 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1314 &dvbworld_cx24116_config,
1315 &i2c_bus->i2c_adap);
1317 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1318 i2c_bus = &dev->i2c_bus[0];
1322 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1323 &netup_stv0900_config,
1324 &i2c_bus->i2c_adap, 0);
1325 if (fe0->dvb.frontend != NULL) {
1326 if (dvb_attach(stv6110_attach,
1328 &netup_stv6110_tunerconfig_a,
1329 &i2c_bus->i2c_adap)) {
1330 if (!dvb_attach(lnbh24_attach,
1333 LNBH24_PCL | LNBH24_TTX,
1336 "No LNBH24 found!\n");
1343 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1344 &netup_stv0900_config,
1345 &i2c_bus->i2c_adap, 1);
1346 if (fe0->dvb.frontend != NULL) {
1347 if (dvb_attach(stv6110_attach,
1349 &netup_stv6110_tunerconfig_b,
1350 &i2c_bus->i2c_adap)) {
1351 if (!dvb_attach(lnbh24_attach,
1354 LNBH24_PCL | LNBH24_TTX,
1357 "No LNBH24 found!\n");
1364 case CX23885_BOARD_MYGICA_X8506:
1365 i2c_bus = &dev->i2c_bus[0];
1366 i2c_bus2 = &dev->i2c_bus[1];
1367 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1368 &mygica_x8506_lgs8gl5_config,
1369 &i2c_bus->i2c_adap);
1370 if (fe0->dvb.frontend != NULL) {
1371 dvb_attach(xc5000_attach,
1373 &i2c_bus2->i2c_adap,
1374 &mygica_x8506_xc5000_config);
1376 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1378 case CX23885_BOARD_MYGICA_X8507:
1379 i2c_bus = &dev->i2c_bus[0];
1380 i2c_bus2 = &dev->i2c_bus[1];
1381 fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
1382 &mygica_x8507_mb86a20s_config,
1383 &i2c_bus->i2c_adap);
1384 if (fe0->dvb.frontend != NULL) {
1385 dvb_attach(xc5000_attach,
1387 &i2c_bus2->i2c_adap,
1388 &mygica_x8507_xc5000_config);
1390 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1392 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1393 i2c_bus = &dev->i2c_bus[0];
1394 i2c_bus2 = &dev->i2c_bus[1];
1395 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1396 &magicpro_prohdtve2_lgs8g75_config,
1397 &i2c_bus->i2c_adap);
1398 if (fe0->dvb.frontend != NULL) {
1399 dvb_attach(xc5000_attach,
1401 &i2c_bus2->i2c_adap,
1402 &magicpro_prohdtve2_xc5000_config);
1404 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1406 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1407 i2c_bus = &dev->i2c_bus[0];
1408 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1409 &hcw_s5h1411_config,
1410 &i2c_bus->i2c_adap);
1411 if (fe0->dvb.frontend != NULL)
1412 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1413 0x60, &dev->i2c_bus[0].i2c_adap,
1414 &hauppauge_tda18271_config);
1416 tda18271_attach(&dev->ts1.analog_fe,
1417 0x60, &dev->i2c_bus[1].i2c_adap,
1418 &hauppauge_tda18271_config);
1421 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1422 i2c_bus = &dev->i2c_bus[0];
1423 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1424 &hcw_s5h1411_config,
1425 &i2c_bus->i2c_adap);
1426 if (fe0->dvb.frontend != NULL)
1427 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1428 0x60, &dev->i2c_bus[0].i2c_adap,
1429 &hauppauge_tda18271_config);
1431 case CX23885_BOARD_MYGICA_X8558PRO:
1435 i2c_bus = &dev->i2c_bus[0];
1436 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1437 &mygica_x8558pro_atbm8830_cfg1,
1438 &i2c_bus->i2c_adap);
1439 if (fe0->dvb.frontend != NULL) {
1440 dvb_attach(max2165_attach,
1443 &mygic_x8558pro_max2165_cfg1);
1448 i2c_bus = &dev->i2c_bus[1];
1449 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1450 &mygica_x8558pro_atbm8830_cfg2,
1451 &i2c_bus->i2c_adap);
1452 if (fe0->dvb.frontend != NULL) {
1453 dvb_attach(max2165_attach,
1456 &mygic_x8558pro_max2165_cfg2);
1461 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1462 i2c_bus = &dev->i2c_bus[0];
1463 mfe_shared = 1;/* MFE */
1464 port->frontends.gate = 0;/* not clear for me yet */
1466 /* MFE frontend 1 DVB-T */
1467 fe0->dvb.frontend = dvb_attach(stv0367ter_attach,
1468 &netup_stv0367_config[port->nr - 1],
1469 &i2c_bus->i2c_adap);
1470 if (fe0->dvb.frontend != NULL) {
1471 if (NULL == dvb_attach(xc5000_attach,
1474 &netup_xc5000_config[port->nr - 1]))
1475 goto frontend_detach;
1476 /* load xc5000 firmware */
1477 fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
1479 /* MFE frontend 2 */
1480 fe1 = vb2_dvb_get_frontend(&port->frontends, 2);
1482 goto frontend_detach;
1484 fe1->dvb.frontend = dvb_attach(stv0367cab_attach,
1485 &netup_stv0367_config[port->nr - 1],
1486 &i2c_bus->i2c_adap);
1487 if (fe1->dvb.frontend != NULL) {
1488 fe1->dvb.frontend->id = 1;
1489 if (NULL == dvb_attach(xc5000_attach,
1492 &netup_xc5000_config[port->nr - 1]))
1493 goto frontend_detach;
1496 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1497 i2c_bus = &dev->i2c_bus[0];
1498 i2c_bus2 = &dev->i2c_bus[1];
1503 fe0->dvb.frontend = dvb_attach(drxk_attach,
1504 &terratec_drxk_config[0],
1505 &i2c_bus->i2c_adap);
1506 if (fe0->dvb.frontend != NULL) {
1507 if (!dvb_attach(mt2063_attach,
1509 &terratec_mt2063_config[0],
1510 &i2c_bus2->i2c_adap))
1511 goto frontend_detach;
1516 fe0->dvb.frontend = dvb_attach(drxk_attach,
1517 &terratec_drxk_config[1],
1518 &i2c_bus->i2c_adap);
1519 if (fe0->dvb.frontend != NULL) {
1520 if (!dvb_attach(mt2063_attach,
1522 &terratec_mt2063_config[1],
1523 &i2c_bus2->i2c_adap))
1524 goto frontend_detach;
1529 case CX23885_BOARD_TEVII_S471:
1530 i2c_bus = &dev->i2c_bus[1];
1532 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1533 &tevii_ds3000_config,
1534 &i2c_bus->i2c_adap);
1535 if (fe0->dvb.frontend != NULL) {
1536 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1537 &tevii_ts2020_config, &i2c_bus->i2c_adap);
1540 case CX23885_BOARD_PROF_8000:
1541 i2c_bus = &dev->i2c_bus[0];
1543 fe0->dvb.frontend = dvb_attach(stv090x_attach,
1544 &prof_8000_stv090x_config,
1546 STV090x_DEMODULATOR_0);
1547 if (fe0->dvb.frontend != NULL) {
1548 if (!dvb_attach(stb6100_attach,
1550 &prof_8000_stb6100_config,
1551 &i2c_bus->i2c_adap))
1552 goto frontend_detach;
1554 fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage;
1557 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1558 i2c_bus = &dev->i2c_bus[0];
1559 i2c_bus2 = &dev->i2c_bus[1];
1563 fe0->dvb.frontend = dvb_attach(tda10071_attach,
1564 &hauppauge_tda10071_config,
1565 &i2c_bus->i2c_adap);
1566 if (fe0->dvb.frontend != NULL) {
1567 if (!dvb_attach(a8293_attach, fe0->dvb.frontend,
1569 &hauppauge_a8293_config))
1570 goto frontend_detach;
1575 fe0->dvb.frontend = dvb_attach(si2165_attach,
1576 &hauppauge_hvr4400_si2165_config,
1577 &i2c_bus->i2c_adap);
1578 if (fe0->dvb.frontend != NULL) {
1579 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1580 if (!dvb_attach(tda18271_attach,
1582 0x60, &i2c_bus2->i2c_adap,
1583 &hauppauge_hvr4400_tuner_config))
1584 goto frontend_detach;
1589 case CX23885_BOARD_DVBSKY_T9580:
1590 i2c_bus = &dev->i2c_bus[0];
1591 i2c_bus2 = &dev->i2c_bus[1];
1593 /* port b - satellite */
1595 /* attach frontend */
1596 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
1597 &dvbsky_t9580_m88ds3103_config,
1598 &i2c_bus2->i2c_adap, &adapter);
1599 if (fe0->dvb.frontend == NULL)
1603 memset(&m88ts2022_config, 0, sizeof(m88ts2022_config));
1604 m88ts2022_config.fe = fe0->dvb.frontend;
1605 m88ts2022_config.clock = 27000000;
1606 memset(&info, 0, sizeof(struct i2c_board_info));
1607 strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE);
1609 info.platform_data = &m88ts2022_config;
1610 request_module(info.type);
1611 client_tuner = i2c_new_device(adapter, &info);
1612 if (client_tuner == NULL ||
1613 client_tuner->dev.driver == NULL)
1614 goto frontend_detach;
1615 if (!try_module_get(client_tuner->dev.driver->owner)) {
1616 i2c_unregister_device(client_tuner);
1617 goto frontend_detach;
1620 /* delegate signal strength measurement to tuner */
1621 fe0->dvb.frontend->ops.read_signal_strength =
1622 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
1625 * for setting the voltage we need to set GPIOs on
1628 port->fe_set_voltage =
1629 fe0->dvb.frontend->ops.set_voltage;
1630 fe0->dvb.frontend->ops.set_voltage =
1631 dvbsky_t9580_set_voltage;
1633 port->i2c_client_tuner = client_tuner;
1636 /* port c - terrestrial/cable */
1638 /* attach frontend */
1639 memset(&si2168_config, 0, sizeof(si2168_config));
1640 si2168_config.i2c_adapter = &adapter;
1641 si2168_config.fe = &fe0->dvb.frontend;
1642 si2168_config.ts_mode = SI2168_TS_SERIAL;
1643 memset(&info, 0, sizeof(struct i2c_board_info));
1644 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1646 info.platform_data = &si2168_config;
1647 request_module(info.type);
1648 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1649 if (client_demod == NULL ||
1650 client_demod->dev.driver == NULL)
1651 goto frontend_detach;
1652 if (!try_module_get(client_demod->dev.driver->owner)) {
1653 i2c_unregister_device(client_demod);
1654 goto frontend_detach;
1656 port->i2c_client_demod = client_demod;
1659 memset(&si2157_config, 0, sizeof(si2157_config));
1660 si2157_config.fe = fe0->dvb.frontend;
1661 memset(&info, 0, sizeof(struct i2c_board_info));
1662 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
1664 info.platform_data = &si2157_config;
1665 request_module(info.type);
1666 client_tuner = i2c_new_device(adapter, &info);
1667 if (client_tuner == NULL ||
1668 client_tuner->dev.driver == NULL) {
1669 module_put(client_demod->dev.driver->owner);
1670 i2c_unregister_device(client_demod);
1671 goto frontend_detach;
1673 if (!try_module_get(client_tuner->dev.driver->owner)) {
1674 i2c_unregister_device(client_tuner);
1675 module_put(client_demod->dev.driver->owner);
1676 i2c_unregister_device(client_demod);
1677 goto frontend_detach;
1679 port->i2c_client_tuner = client_tuner;
1684 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
1685 " isn't supported yet\n",
1690 if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
1691 printk(KERN_ERR "%s: frontend initialization failed\n",
1693 goto frontend_detach;
1696 /* define general-purpose callback pointer */
1697 fe0->dvb.frontend->callback = cx23885_tuner_callback;
1699 fe1->dvb.frontend->callback = cx23885_tuner_callback;
1701 /* Ensure all frontends negotiate bus access */
1702 fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
1704 fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
1707 /* Put the analog decoder in standby to keep it quiet */
1708 call_all(dev, core, s_power, 0);
1710 if (fe0->dvb.frontend->ops.analog_ops.standby)
1711 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
1713 /* register everything */
1714 ret = vb2_dvb_register_bus(&port->frontends, THIS_MODULE, port,
1715 &dev->pci->dev, adapter_nr, mfe_shared);
1717 goto frontend_detach;
1720 switch (dev->board) {
1721 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
1722 static struct netup_card_info cinfo;
1724 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1725 memcpy(port->frontends.adapter.proposed_mac,
1726 cinfo.port[port->nr - 1].mac, 6);
1727 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
1728 port->nr, port->frontends.adapter.proposed_mac);
1730 netup_ci_init(port);
1733 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1734 struct altera_ci_config netup_ci_cfg = {
1735 .dev = dev,/* magic number to identify*/
1736 .adapter = &port->frontends.adapter,/* for CI */
1737 .demux = &fe0->dvb.demux,/* for hw pid filter */
1738 .fpga_rw = netup_altera_fpga_rw,
1741 altera_ci_init(&netup_ci_cfg, port->nr);
1744 case CX23885_BOARD_TEVII_S470: {
1745 u8 eeprom[256]; /* 24C02 i2c eeprom */
1750 /* Read entire EEPROM */
1751 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1752 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom));
1753 printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0);
1754 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
1757 case CX23885_BOARD_DVBSKY_T9580: {
1758 u8 eeprom[256]; /* 24C02 i2c eeprom */
1763 /* Read entire EEPROM */
1764 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1765 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
1767 printk(KERN_INFO "DVBSky T9580 port %d MAC address: %pM\n",
1768 port->nr, eeprom + 0xc0 + (port->nr-1) * 8);
1769 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 +
1770 (port->nr-1) * 8, 6);
1778 port->gate_ctrl = NULL;
1779 vb2_dvb_dealloc_frontends(&port->frontends);
1783 int cx23885_dvb_register(struct cx23885_tsport *port)
1786 struct vb2_dvb_frontend *fe0;
1787 struct cx23885_dev *dev = port->dev;
1790 /* Here we need to allocate the correct number of frontends,
1791 * as reflected in the cards struct. The reality is that currently
1792 * no cx23885 boards support this - yet. But, if we don't modify this
1793 * code then the second frontend would never be allocated (later)
1794 * and fail with error before the attach in dvb_register().
1795 * Without these changes we risk an OOPS later. The changes here
1796 * are for safety, and should provide a good foundation for the
1797 * future addition of any multi-frontend cx23885 based boards.
1799 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
1800 port->num_frontends);
1802 for (i = 1; i <= port->num_frontends; i++) {
1803 struct vb2_queue *q;
1805 if (vb2_dvb_alloc_frontend(
1806 &port->frontends, i) == NULL) {
1807 printk(KERN_ERR "%s() failed to alloc\n", __func__);
1811 fe0 = vb2_dvb_get_frontend(&port->frontends, i);
1815 dprintk(1, "%s\n", __func__);
1816 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
1825 /* We have to init the queue for each frontend on a port. */
1826 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
1828 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1829 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1830 q->gfp_flags = GFP_DMA32;
1831 q->min_buffers_needed = 2;
1833 q->buf_struct_size = sizeof(struct cx23885_buffer);
1835 q->mem_ops = &vb2_dma_sg_memops;
1836 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1837 q->lock = &dev->lock;
1839 err = vb2_queue_init(q);
1843 err = dvb_register(port);
1845 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
1851 int cx23885_dvb_unregister(struct cx23885_tsport *port)
1853 struct vb2_dvb_frontend *fe0;
1854 struct i2c_client *client;
1856 /* remove I2C client for tuner */
1857 client = port->i2c_client_tuner;
1859 module_put(client->dev.driver->owner);
1860 i2c_unregister_device(client);
1863 /* remove I2C client for demodulator */
1864 client = port->i2c_client_demod;
1866 module_put(client->dev.driver->owner);
1867 i2c_unregister_device(client);
1870 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
1872 if (fe0 && fe0->dvb.frontend)
1873 vb2_dvb_unregister_bus(&port->frontends);
1875 switch (port->dev->board) {
1876 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1877 netup_ci_exit(port);
1879 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1880 altera_ci_release(port->dev, port->nr);
1884 port->gate_ctrl = NULL;