drivers/media/platform/coda.c

   1 /*
   2  * Coda multi-standard codec IP
   3  *
   4  * Copyright (C) 2012 Vista Silicon S.L.
   5  *    Javier Martin, <javier.martin@vista-silicon.com>
   6  *    Xavier Duret
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/clk.h>
  15 #include <linux/debugfs.h>
  16 #include <linux/delay.h>
  17 #include <linux/firmware.h>
  18 #include <linux/genalloc.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/io.h>
  21 #include <linux/irq.h>
  22 #include <linux/kfifo.h>
  23 #include <linux/module.h>
  24 #include <linux/of_device.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/pm_runtime.h>
  27 #include <linux/slab.h>
  28 #include <linux/videodev2.h>
  29 #include <linux/of.h>
  30 #include <linux/platform_data/coda.h>
  31 #include <linux/reset.h>
  32
  33 #include <media/v4l2-ctrls.h>
  34 #include <media/v4l2-device.h>
  35 #include <media/v4l2-event.h>
  36 #include <media/v4l2-ioctl.h>
  37 #include <media/v4l2-mem2mem.h>
  38 #include <media/videobuf2-core.h>
  39 #include <media/videobuf2-dma-contig.h>
  40
  41 #include "coda.h"
  42
  43 #define CODA_NAME               "coda"
  44
  45 #define CODADX6_MAX_INSTANCES   4
  46
  47 #define CODA_PARA_BUF_SIZE      (10 * 1024)
  48 #define CODA_ISRAM_SIZE (2048 * 2)
  49
  50 #define CODA7_PS_BUF_SIZE       0x28000
  51 #define CODA9_PS_SAVE_SIZE      (512 * 1024)
  52
  53 #define CODA_MAX_FRAMEBUFFERS   8
  54
  55 #define CODA_MAX_FRAME_SIZE     0x100000
  56 #define FMO_SLICE_SAVE_BUF_SIZE         (32)
  57 #define CODA_DEFAULT_GAMMA              4096
  58 #define CODA9_DEFAULT_GAMMA             24576   /* 0.75 * 32768 */
  59
  60 #define MIN_W 176
  61 #define MIN_H 144
  62
  63 #define S_ALIGN         1 /* multiple of 2 */
  64 #define W_ALIGN         1 /* multiple of 2 */
  65 #define H_ALIGN         1 /* multiple of 2 */
  66
  67 #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
  68
  69 static int coda_debug;
  70 module_param(coda_debug, int, 0644);
  71 MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
  72
  73 enum {
  74         V4L2_M2M_SRC = 0,
  75         V4L2_M2M_DST = 1,
  76 };
  77
  78 enum coda_inst_type {
  79         CODA_INST_ENCODER,
  80         CODA_INST_DECODER,
  81 };
  82
  83 enum coda_product {
  84         CODA_DX6 = 0xf001,
  85         CODA_7541 = 0xf012,
  86         CODA_960 = 0xf020,
  87 };
  88
  89 struct coda_fmt {
  90         char *name;
  91         u32 fourcc;
  92 };
  93
  94 struct coda_codec {
  95         u32 mode;
  96         u32 src_fourcc;
  97         u32 dst_fourcc;
  98         u32 max_w;
  99         u32 max_h;
 100 };
 101
 102 struct coda_devtype {
 103         char                    *firmware;
 104         enum coda_product       product;
 105         struct coda_codec       *codecs;
 106         unsigned int            num_codecs;
 107         size_t                  workbuf_size;
 108         size_t                  tempbuf_size;
 109         size_t                  iram_size;
 110 };
 111
 112 /* Per-queue, driver-specific private data */
 113 struct coda_q_data {
 114         unsigned int            width;
 115         unsigned int            height;
 116         unsigned int            bytesperline;
 117         unsigned int            sizeimage;
 118         unsigned int            fourcc;
 119         struct v4l2_rect        rect;
 120 };
 121
 122 struct coda_aux_buf {
 123         void                    *vaddr;
 124         dma_addr_t              paddr;
 125         u32                     size;
 126         struct debugfs_blob_wrapper blob;
 127         struct dentry           *dentry;
 128 };
 129
 130 struct coda_dev {
 131         struct v4l2_device      v4l2_dev;
 132         struct video_device     vfd;
 133         struct platform_device  *plat_dev;
 134         const struct coda_devtype *devtype;
 135
 136         void __iomem            *regs_base;
 137         struct clk              *clk_per;
 138         struct clk              *clk_ahb;
 139         struct reset_control    *rstc;
 140
 141         struct coda_aux_buf     codebuf;
 142         struct coda_aux_buf     tempbuf;
 143         struct coda_aux_buf     workbuf;
 144         struct gen_pool         *iram_pool;
 145         struct coda_aux_buf     iram;
 146
 147         spinlock_t              irqlock;
 148         struct mutex            dev_mutex;
 149         struct mutex            coda_mutex;
 150         struct workqueue_struct *workqueue;
 151         struct v4l2_m2m_dev     *m2m_dev;
 152         struct vb2_alloc_ctx    *alloc_ctx;
 153         struct list_head        instances;
 154         unsigned long           instance_mask;
 155         struct dentry           *debugfs_root;
 156 };
 157
 158 struct coda_params {
 159         u8                      rot_mode;
 160         u8                      h264_intra_qp;
 161         u8                      h264_inter_qp;
 162         u8                      h264_min_qp;
 163         u8                      h264_max_qp;
 164         u8                      h264_deblk_enabled;
 165         u8                      h264_deblk_alpha;
 166         u8                      h264_deblk_beta;
 167         u8                      mpeg4_intra_qp;
 168         u8                      mpeg4_inter_qp;
 169         u8                      gop_size;
 170         int                     intra_refresh;
 171         int                     codec_mode;
 172         int                     codec_mode_aux;
 173         enum v4l2_mpeg_video_multi_slice_mode slice_mode;
 174         u32                     framerate;
 175         u16                     bitrate;
 176         u32                     slice_max_bits;
 177         u32                     slice_max_mb;
 178 };
 179
 180 struct coda_iram_info {
 181         u32             axi_sram_use;
 182         phys_addr_t     buf_bit_use;
 183         phys_addr_t     buf_ip_ac_dc_use;
 184         phys_addr_t     buf_dbk_y_use;
 185         phys_addr_t     buf_dbk_c_use;
 186         phys_addr_t     buf_ovl_use;
 187         phys_addr_t     buf_btp_use;
 188         phys_addr_t     search_ram_paddr;
 189         int             search_ram_size;
 190         int             remaining;
 191         phys_addr_t     next_paddr;
 192 };
 193
 194 struct gdi_tiled_map {
 195         int xy2ca_map[16];
 196         int xy2ba_map[16];
 197         int xy2ra_map[16];
 198         int rbc2axi_map[32];
 199         int xy2rbc_config;
 200         int map_type;
 201 #define GDI_LINEAR_FRAME_MAP 0
 202 };
 203
 204 struct coda_timestamp {
 205         struct list_head        list;
 206         u32                     sequence;
 207         struct v4l2_timecode    timecode;
 208         struct timeval          timestamp;
 209 };
 210
 211 struct coda_ctx {
 212         struct coda_dev                 *dev;
 213         struct mutex                    buffer_mutex;
 214         struct list_head                list;
 215         struct work_struct              pic_run_work;
 216         struct work_struct              seq_end_work;
 217         struct completion               completion;
 218         int                             aborting;
 219         int                             initialized;
 220         int                             streamon_out;
 221         int                             streamon_cap;
 222         u32                             isequence;
 223         u32                             qsequence;
 224         u32                             osequence;
 225         u32                             sequence_offset;
 226         struct coda_q_data              q_data[2];
 227         enum coda_inst_type             inst_type;
 228         struct coda_codec               *codec;
 229         enum v4l2_colorspace            colorspace;
 230         struct coda_params              params;
 231         struct v4l2_ctrl_handler        ctrls;
 232         struct v4l2_fh                  fh;
 233         int                             gopcounter;
 234         int                             runcounter;
 235         char                            vpu_header[3][64];
 236         int                             vpu_header_size[3];
 237         struct kfifo                    bitstream_fifo;
 238         struct mutex                    bitstream_mutex;
 239         struct coda_aux_buf             bitstream;
 240         bool                            hold;
 241         struct coda_aux_buf             parabuf;
 242         struct coda_aux_buf             psbuf;
 243         struct coda_aux_buf             slicebuf;
 244         struct coda_aux_buf             internal_frames[CODA_MAX_FRAMEBUFFERS];
 245         u32                             frame_types[CODA_MAX_FRAMEBUFFERS];
 246         struct coda_timestamp           frame_timestamps[CODA_MAX_FRAMEBUFFERS];
 247         u32                             frame_errors[CODA_MAX_FRAMEBUFFERS];
 248         struct list_head                timestamp_list;
 249         struct coda_aux_buf             workbuf;
 250         int                             num_internal_frames;
 251         int                             idx;
 252         int                             reg_idx;
 253         struct coda_iram_info           iram_info;
 254         struct gdi_tiled_map            tiled_map;
 255         u32                             bit_stream_param;
 256         u32                             frm_dis_flg;
 257         u32                             frame_mem_ctrl;
 258         int                             display_idx;
 259         struct dentry                   *debugfs_entry;
 260 };
 261
 262 static const u8 coda_filler_nal[14] = { 0x00, 0x00, 0x00, 0x01, 0x0c, 0xff,
 263                         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 };
 264 static const u8 coda_filler_size[8] = { 0, 7, 14, 13, 12, 11, 10, 9 };
 265
 266 static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
 267 {
 268         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 269                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
 270         writel(data, dev->regs_base + reg);
 271 }
 272
 273 static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
 274 {
 275         u32 data;
 276         data = readl(dev->regs_base + reg);
 277         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 278                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
 279         return data;
 280 }
 281
 282 static inline unsigned long coda_isbusy(struct coda_dev *dev)
 283 {
 284         return coda_read(dev, CODA_REG_BIT_BUSY);
 285 }
 286
 287 static inline int coda_is_initialized(struct coda_dev *dev)
 288 {
 289         return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
 290 }
 291
 292 static int coda_wait_timeout(struct coda_dev *dev)
 293 {
 294         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
 295
 296         while (coda_isbusy(dev)) {
 297                 if (time_after(jiffies, timeout))
 298                         return -ETIMEDOUT;
 299         }
 300         return 0;
 301 }
 302
 303 static void coda_command_async(struct coda_ctx *ctx, int cmd)
 304 {
 305         struct coda_dev *dev = ctx->dev;
 306
 307         if (dev->devtype->product == CODA_960 ||
 308             dev->devtype->product == CODA_7541) {
 309                 /* Restore context related registers to CODA */
 310                 coda_write(dev, ctx->bit_stream_param,
 311                                 CODA_REG_BIT_BIT_STREAM_PARAM);
 312                 coda_write(dev, ctx->frm_dis_flg,
 313                                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
 314                 coda_write(dev, ctx->frame_mem_ctrl,
 315                                 CODA_REG_BIT_FRAME_MEM_CTRL);
 316                 coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
 317         }
 318
 319         if (dev->devtype->product == CODA_960) {
 320                 coda_write(dev, 1, CODA9_GDI_WPROT_ERR_CLR);
 321                 coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
 322         }
 323
 324         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 325
 326         coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
 327         coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
 328         coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
 329
 330         coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
 331 }
 332
 333 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
 334 {
 335         struct coda_dev *dev = ctx->dev;
 336
 337         coda_command_async(ctx, cmd);
 338         return coda_wait_timeout(dev);
 339 }
 340
 341 static int coda_hw_reset(struct coda_ctx *ctx)
 342 {
 343         struct coda_dev *dev = ctx->dev;
 344         unsigned long timeout;
 345         unsigned int idx;
 346         int ret;
 347
 348         if (!dev->rstc)
 349                 return -ENOENT;
 350
 351         idx = coda_read(dev, CODA_REG_BIT_RUN_INDEX);
 352
 353         if (dev->devtype->product == CODA_960) {
 354                 timeout = jiffies + msecs_to_jiffies(100);
 355                 coda_write(dev, 0x11, CODA9_GDI_BUS_CTRL);
 356                 while (coda_read(dev, CODA9_GDI_BUS_STATUS) != 0x77) {
 357                         if (time_after(jiffies, timeout))
 358                                 return -ETIME;
 359                         cpu_relax();
 360                 }
 361         }
 362
 363         ret = reset_control_reset(dev->rstc);
 364         if (ret < 0)
 365                 return ret;
 366
 367         if (dev->devtype->product == CODA_960)
 368                 coda_write(dev, 0x00, CODA9_GDI_BUS_CTRL);
 369         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 370         coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
 371         ret = coda_wait_timeout(dev);
 372         coda_write(dev, idx, CODA_REG_BIT_RUN_INDEX);
 373
 374         return ret;
 375 }
 376
 377 static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
 378                                          enum v4l2_buf_type type)
 379 {
 380         switch (type) {
 381         case V4L2_BUF_TYPE_VIDEO_OUTPUT:
 382                 return &(ctx->q_data[V4L2_M2M_SRC]);
 383         case V4L2_BUF_TYPE_VIDEO_CAPTURE:
 384                 return &(ctx->q_data[V4L2_M2M_DST]);
 385         default:
 386                 return NULL;
 387         }
 388 }
 389
 390 /*
 391  * Array of all formats supported by any version of Coda:
 392  */
 393 static struct coda_fmt coda_formats[] = {
 394         {
 395                 .name = "YUV 4:2:0 Planar, YCbCr",
 396                 .fourcc = V4L2_PIX_FMT_YUV420,
 397         },
 398         {
 399                 .name = "YUV 4:2:0 Planar, YCrCb",
 400                 .fourcc = V4L2_PIX_FMT_YVU420,
 401         },
 402         {
 403                 .name = "H264 Encoded Stream",
 404                 .fourcc = V4L2_PIX_FMT_H264,
 405         },
 406         {
 407                 .name = "MPEG4 Encoded Stream",
 408                 .fourcc = V4L2_PIX_FMT_MPEG4,
 409         },
 410 };
 411
 412 #define CODA_CODEC(mode, src_fourcc, dst_fourcc, max_w, max_h) \
 413         { mode, src_fourcc, dst_fourcc, max_w, max_h }
 414
 415 /*
 416  * Arrays of codecs supported by each given version of Coda:
 417  *  i.MX27 -> codadx6
 418  *  i.MX5x -> coda7
 419  *  i.MX6  -> coda960
 420  * Use V4L2_PIX_FMT_YUV420 as placeholder for all supported YUV 4:2:0 variants
 421  */
 422 static struct coda_codec codadx6_codecs[] = {
 423         CODA_CODEC(CODADX6_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264,  720, 576),
 424         CODA_CODEC(CODADX6_MODE_ENCODE_MP4,  V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 720, 576),
 425 };
 426
 427 static struct coda_codec coda7_codecs[] = {
 428         CODA_CODEC(CODA7_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264,   1280, 720),
 429         CODA_CODEC(CODA7_MODE_ENCODE_MP4,  V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4,  1280, 720),
 430         CODA_CODEC(CODA7_MODE_DECODE_H264, V4L2_PIX_FMT_H264,   V4L2_PIX_FMT_YUV420, 1920, 1080),
 431         CODA_CODEC(CODA7_MODE_DECODE_MP4,  V4L2_PIX_FMT_MPEG4,  V4L2_PIX_FMT_YUV420, 1920, 1080),
 432 };
 433
 434 static struct coda_codec coda9_codecs[] = {
 435         CODA_CODEC(CODA9_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264,   1920, 1080),
 436         CODA_CODEC(CODA9_MODE_ENCODE_MP4,  V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4,  1920, 1080),
 437         CODA_CODEC(CODA9_MODE_DECODE_H264, V4L2_PIX_FMT_H264,   V4L2_PIX_FMT_YUV420, 1920, 1080),
 438         CODA_CODEC(CODA9_MODE_DECODE_MP4,  V4L2_PIX_FMT_MPEG4,  V4L2_PIX_FMT_YUV420, 1920, 1080),
 439 };
 440
 441 static bool coda_format_is_yuv(u32 fourcc)
 442 {
 443         switch (fourcc) {
 444         case V4L2_PIX_FMT_YUV420:
 445         case V4L2_PIX_FMT_YVU420:
 446                 return true;
 447         default:
 448                 return false;
 449         }
 450 }
 451
 452 /*
 453  * Normalize all supported YUV 4:2:0 formats to the value used in the codec
 454  * tables.
 455  */
 456 static u32 coda_format_normalize_yuv(u32 fourcc)
 457 {
 458         return coda_format_is_yuv(fourcc) ? V4L2_PIX_FMT_YUV420 : fourcc;
 459 }
 460
 461 static struct coda_codec *coda_find_codec(struct coda_dev *dev, int src_fourcc,
 462                                           int dst_fourcc)
 463 {
 464         struct coda_codec *codecs = dev->devtype->codecs;
 465         int num_codecs = dev->devtype->num_codecs;
 466         int k;
 467
 468         src_fourcc = coda_format_normalize_yuv(src_fourcc);
 469         dst_fourcc = coda_format_normalize_yuv(dst_fourcc);
 470         if (src_fourcc == dst_fourcc)
 471                 return NULL;
 472
 473         for (k = 0; k < num_codecs; k++) {
 474                 if (codecs[k].src_fourcc == src_fourcc &&
 475                     codecs[k].dst_fourcc == dst_fourcc)
 476                         break;
 477         }
 478
 479         if (k == num_codecs)
 480                 return NULL;
 481
 482         return &codecs[k];
 483 }
 484
 485 static void coda_get_max_dimensions(struct coda_dev *dev,
 486                                     struct coda_codec *codec,
 487                                     int *max_w, int *max_h)
 488 {
 489         struct coda_codec *codecs = dev->devtype->codecs;
 490         int num_codecs = dev->devtype->num_codecs;
 491         unsigned int w, h;
 492         int k;
 493
 494         if (codec) {
 495                 w = codec->max_w;
 496                 h = codec->max_h;
 497         } else {
 498                 for (k = 0, w = 0, h = 0; k < num_codecs; k++) {
 499                         w = max(w, codecs[k].max_w);
 500                         h = max(h, codecs[k].max_h);
 501                 }
 502         }
 503
 504         if (max_w)
 505                 *max_w = w;
 506         if (max_h)
 507                 *max_h = h;
 508 }
 509
 510 static char *coda_product_name(int product)
 511 {
 512         static char buf[9];
 513
 514         switch (product) {
 515         case CODA_DX6:
 516                 return "CodaDx6";
 517         case CODA_7541:
 518                 return "CODA7541";
 519         case CODA_960:
 520                 return "CODA960";
 521         default:
 522                 snprintf(buf, sizeof(buf), "(0x%04x)", product);
 523                 return buf;
 524         }
 525 }
 526
 527 /*
 528  * V4L2 ioctl() operations.
 529  */
 530 static int coda_querycap(struct file *file, void *priv,
 531                          struct v4l2_capability *cap)
 532 {
 533         struct coda_ctx *ctx = fh_to_ctx(priv);
 534
 535         strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
 536         strlcpy(cap->card, coda_product_name(ctx->dev->devtype->product),
 537                 sizeof(cap->card));
 538         strlcpy(cap->bus_info, "platform:" CODA_NAME, sizeof(cap->bus_info));
 539         cap->device_caps = V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
 540         cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
 541
 542         return 0;
 543 }
 544
 545 static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
 546                         enum v4l2_buf_type type, int src_fourcc)
 547 {
 548         struct coda_ctx *ctx = fh_to_ctx(priv);
 549         struct coda_codec *codecs = ctx->dev->devtype->codecs;
 550         struct coda_fmt *formats = coda_formats;
 551         struct coda_fmt *fmt;
 552         int num_codecs = ctx->dev->devtype->num_codecs;
 553         int num_formats = ARRAY_SIZE(coda_formats);
 554         int i, k, num = 0;
 555
 556         for (i = 0; i < num_formats; i++) {
 557                 /* Both uncompressed formats are always supported */
 558                 if (coda_format_is_yuv(formats[i].fourcc) &&
 559                     !coda_format_is_yuv(src_fourcc)) {
 560                         if (num == f->index)
 561                                 break;
 562                         ++num;
 563                         continue;
 564                 }
 565                 /* Compressed formats may be supported, check the codec list */
 566                 for (k = 0; k < num_codecs; k++) {
 567                         /* if src_fourcc is set, only consider matching codecs */
 568                         if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
 569                             formats[i].fourcc == codecs[k].dst_fourcc &&
 570                             (!src_fourcc || src_fourcc == codecs[k].src_fourcc))
 571                                 break;
 572                         if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT &&
 573                             formats[i].fourcc == codecs[k].src_fourcc)
 574                                 break;
 575                 }
 576                 if (k < num_codecs) {
 577                         if (num == f->index)
 578                                 break;
 579                         ++num;
 580                 }
 581         }
 582
 583         if (i < num_formats) {
 584                 fmt = &formats[i];
 585                 strlcpy(f->description, fmt->name, sizeof(f->description));
 586                 f->pixelformat = fmt->fourcc;
 587                 if (!coda_format_is_yuv(fmt->fourcc))
 588                         f->flags |= V4L2_FMT_FLAG_COMPRESSED;
 589                 return 0;
 590         }
 591
 592         /* Format not found */
 593         return -EINVAL;
 594 }
 595
 596 static int coda_enum_fmt_vid_cap(struct file *file, void *priv,
 597                                  struct v4l2_fmtdesc *f)
 598 {
 599         struct coda_ctx *ctx = fh_to_ctx(priv);
 600         struct vb2_queue *src_vq;
 601         struct coda_q_data *q_data_src;
 602
 603         /* If the source format is already fixed, only list matching formats */
 604         src_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 605         if (vb2_is_streaming(src_vq)) {
 606                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 607
 608                 return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE,
 609                                 q_data_src->fourcc);
 610         }
 611
 612         return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE, 0);
 613 }
 614
 615 static int coda_enum_fmt_vid_out(struct file *file, void *priv,
 616                                  struct v4l2_fmtdesc *f)
 617 {
 618         return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_OUTPUT, 0);
 619 }
 620
 621 static int coda_g_fmt(struct file *file, void *priv,
 622                       struct v4l2_format *f)
 623 {
 624         struct coda_q_data *q_data;
 625         struct coda_ctx *ctx = fh_to_ctx(priv);
 626
 627         q_data = get_q_data(ctx, f->type);
 628         if (!q_data)
 629                 return -EINVAL;
 630
 631         f->fmt.pix.field        = V4L2_FIELD_NONE;
 632         f->fmt.pix.pixelformat  = q_data->fourcc;
 633         f->fmt.pix.width        = q_data->width;
 634         f->fmt.pix.height       = q_data->height;
 635         f->fmt.pix.bytesperline = q_data->bytesperline;
 636
 637         f->fmt.pix.sizeimage    = q_data->sizeimage;
 638         f->fmt.pix.colorspace   = ctx->colorspace;
 639
 640         return 0;
 641 }
 642
 643 static int coda_try_fmt(struct coda_ctx *ctx, struct coda_codec *codec,
 644                         struct v4l2_format *f)
 645 {
 646         struct coda_dev *dev = ctx->dev;
 647         struct coda_q_data *q_data;
 648         unsigned int max_w, max_h;
 649         enum v4l2_field field;
 650
 651         field = f->fmt.pix.field;
 652         if (field == V4L2_FIELD_ANY)
 653                 field = V4L2_FIELD_NONE;
 654         else if (V4L2_FIELD_NONE != field)
 655                 return -EINVAL;
 656
 657         /* V4L2 specification suggests the driver corrects the format struct
 658          * if any of the dimensions is unsupported */
 659         f->fmt.pix.field = field;
 660
 661         coda_get_max_dimensions(dev, codec, &max_w, &max_h);
 662         v4l_bound_align_image(&f->fmt.pix.width, MIN_W, max_w, W_ALIGN,
 663                               &f->fmt.pix.height, MIN_H, max_h, H_ALIGN,
 664                               S_ALIGN);
 665
 666         switch (f->fmt.pix.pixelformat) {
 667         case V4L2_PIX_FMT_YUV420:
 668         case V4L2_PIX_FMT_YVU420:
 669         case V4L2_PIX_FMT_H264:
 670         case V4L2_PIX_FMT_MPEG4:
 671         case V4L2_PIX_FMT_JPEG:
 672                 break;
 673         default:
 674                 q_data = get_q_data(ctx, f->type);
 675                 if (!q_data)
 676                         return -EINVAL;
 677                 f->fmt.pix.pixelformat = q_data->fourcc;
 678         }
 679
 680         switch (f->fmt.pix.pixelformat) {
 681         case V4L2_PIX_FMT_YUV420:
 682         case V4L2_PIX_FMT_YVU420:
 683                 /* Frame stride must be multiple of 8, but 16 for h.264 */
 684                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 16);
 685                 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
 686                                         f->fmt.pix.height * 3 / 2;
 687                 break;
 688         case V4L2_PIX_FMT_H264:
 689         case V4L2_PIX_FMT_MPEG4:
 690         case V4L2_PIX_FMT_JPEG:
 691                 f->fmt.pix.bytesperline = 0;
 692                 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
 693                 break;
 694         default:
 695                 BUG();
 696         }
 697
 698         return 0;
 699 }
 700
 701 static int coda_try_fmt_vid_cap(struct file *file, void *priv,
 702                                 struct v4l2_format *f)
 703 {
 704         struct coda_ctx *ctx = fh_to_ctx(priv);
 705         struct coda_codec *codec;
 706         struct vb2_queue *src_vq;
 707         int ret;
 708
 709         /*
 710          * If the source format is already fixed, try to find a codec that
 711          * converts to the given destination format
 712          */
 713         src_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 714         if (vb2_is_streaming(src_vq)) {
 715                 struct coda_q_data *q_data_src;
 716
 717                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 718                 codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
 719                                         f->fmt.pix.pixelformat);
 720                 if (!codec)
 721                         return -EINVAL;
 722         } else {
 723                 /* Otherwise determine codec by encoded format, if possible */
 724                 codec = coda_find_codec(ctx->dev, V4L2_PIX_FMT_YUV420,
 725                                         f->fmt.pix.pixelformat);
 726         }
 727
 728         f->fmt.pix.colorspace = ctx->colorspace;
 729
 730         ret = coda_try_fmt(ctx, codec, f);
 731         if (ret < 0)
 732                 return ret;
 733
 734         /* The h.264 decoder only returns complete 16x16 macroblocks */
 735         if (codec && codec->src_fourcc == V4L2_PIX_FMT_H264) {
 736                 f->fmt.pix.width = f->fmt.pix.width;
 737                 f->fmt.pix.height = round_up(f->fmt.pix.height, 16);
 738                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 16);
 739                 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
 740                                        f->fmt.pix.height * 3 / 2;
 741         }
 742
 743         return 0;
 744 }
 745
 746 static int coda_try_fmt_vid_out(struct file *file, void *priv,
 747                                 struct v4l2_format *f)
 748 {
 749         struct coda_ctx *ctx = fh_to_ctx(priv);
 750         struct coda_codec *codec;
 751
 752         /* Determine codec by encoded format, returns NULL if raw or invalid */
 753         codec = coda_find_codec(ctx->dev, f->fmt.pix.pixelformat,
 754                                 V4L2_PIX_FMT_YUV420);
 755
 756         if (!f->fmt.pix.colorspace)
 757                 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
 758
 759         return coda_try_fmt(ctx, codec, f);
 760 }
 761
 762 static int coda_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
 763 {
 764         struct coda_q_data *q_data;
 765         struct vb2_queue *vq;
 766
 767         vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type);
 768         if (!vq)
 769                 return -EINVAL;
 770
 771         q_data = get_q_data(ctx, f->type);
 772         if (!q_data)
 773                 return -EINVAL;
 774
 775         if (vb2_is_busy(vq)) {
 776                 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
 777                 return -EBUSY;
 778         }
 779
 780         q_data->fourcc = f->fmt.pix.pixelformat;
 781         q_data->width = f->fmt.pix.width;
 782         q_data->height = f->fmt.pix.height;
 783         q_data->bytesperline = f->fmt.pix.bytesperline;
 784         q_data->sizeimage = f->fmt.pix.sizeimage;
 785         q_data->rect.left = 0;
 786         q_data->rect.top = 0;
 787         q_data->rect.width = f->fmt.pix.width;
 788         q_data->rect.height = f->fmt.pix.height;
 789
 790         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 791                 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
 792                 f->type, q_data->width, q_data->height, q_data->fourcc);
 793
 794         return 0;
 795 }
 796
 797 static int coda_s_fmt_vid_cap(struct file *file, void *priv,
 798                               struct v4l2_format *f)
 799 {
 800         struct coda_ctx *ctx = fh_to_ctx(priv);
 801         int ret;
 802
 803         ret = coda_try_fmt_vid_cap(file, priv, f);
 804         if (ret)
 805                 return ret;
 806
 807         return coda_s_fmt(ctx, f);
 808 }
 809
 810 static int coda_s_fmt_vid_out(struct file *file, void *priv,
 811                               struct v4l2_format *f)
 812 {
 813         struct coda_ctx *ctx = fh_to_ctx(priv);
 814         int ret;
 815
 816         ret = coda_try_fmt_vid_out(file, priv, f);
 817         if (ret)
 818                 return ret;
 819
 820         ret = coda_s_fmt(ctx, f);
 821         if (ret)
 822                 ctx->colorspace = f->fmt.pix.colorspace;
 823
 824         return ret;
 825 }
 826
 827 static int coda_qbuf(struct file *file, void *priv,
 828                      struct v4l2_buffer *buf)
 829 {
 830         struct coda_ctx *ctx = fh_to_ctx(priv);
 831
 832         return v4l2_m2m_qbuf(file, ctx->fh.m2m_ctx, buf);
 833 }
 834
 835 static bool coda_buf_is_end_of_stream(struct coda_ctx *ctx,
 836                                       struct v4l2_buffer *buf)
 837 {
 838         struct vb2_queue *src_vq;
 839
 840         src_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 841
 842         return ((ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) &&
 843                 (buf->sequence == (ctx->qsequence - 1)));
 844 }
 845
 846 static int coda_dqbuf(struct file *file, void *priv,
 847                       struct v4l2_buffer *buf)
 848 {
 849         struct coda_ctx *ctx = fh_to_ctx(priv);
 850         int ret;
 851
 852         ret = v4l2_m2m_dqbuf(file, ctx->fh.m2m_ctx, buf);
 853
 854         /* If this is the last capture buffer, emit an end-of-stream event */
 855         if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
 856             coda_buf_is_end_of_stream(ctx, buf)) {
 857                 const struct v4l2_event eos_event = {
 858                         .type = V4L2_EVENT_EOS
 859                 };
 860
 861                 v4l2_event_queue_fh(&ctx->fh, &eos_event);
 862         }
 863
 864         return ret;
 865 }
 866
 867 static int coda_g_selection(struct file *file, void *fh,
 868                             struct v4l2_selection *s)
 869 {
 870         struct coda_ctx *ctx = fh_to_ctx(fh);
 871         struct coda_q_data *q_data;
 872         struct v4l2_rect r, *rsel;
 873
 874         q_data = get_q_data(ctx, s->type);
 875         if (!q_data)
 876                 return -EINVAL;
 877
 878         r.left = 0;
 879         r.top = 0;
 880         r.width = q_data->width;
 881         r.height = q_data->height;
 882         rsel = &q_data->rect;
 883
 884         switch (s->target) {
 885         case V4L2_SEL_TGT_CROP_DEFAULT:
 886         case V4L2_SEL_TGT_CROP_BOUNDS:
 887                 rsel = &r;
 888                 /* fallthrough */
 889         case V4L2_SEL_TGT_CROP:
 890                 if (s->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
 891                         return -EINVAL;
 892                 break;
 893         case V4L2_SEL_TGT_COMPOSE_BOUNDS:
 894         case V4L2_SEL_TGT_COMPOSE_PADDED:
 895                 rsel = &r;
 896                 /* fallthrough */
 897         case V4L2_SEL_TGT_COMPOSE:
 898         case V4L2_SEL_TGT_COMPOSE_DEFAULT:
 899                 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
 900                         return -EINVAL;
 901                 break;
 902         default:
 903                 return -EINVAL;
 904         }
 905
 906         s->r = *rsel;
 907
 908         return 0;
 909 }
 910
 911 static int coda_try_decoder_cmd(struct file *file, void *fh,
 912                                 struct v4l2_decoder_cmd *dc)
 913 {
 914         if (dc->cmd != V4L2_DEC_CMD_STOP)
 915                 return -EINVAL;
 916
 917         if (dc->flags & V4L2_DEC_CMD_STOP_TO_BLACK)
 918                 return -EINVAL;
 919
 920         if (!(dc->flags & V4L2_DEC_CMD_STOP_IMMEDIATELY) && (dc->stop.pts != 0))
 921                 return -EINVAL;
 922
 923         return 0;
 924 }
 925
 926 static int coda_decoder_cmd(struct file *file, void *fh,
 927                             struct v4l2_decoder_cmd *dc)
 928 {
 929         struct coda_ctx *ctx = fh_to_ctx(fh);
 930         struct coda_dev *dev = ctx->dev;
 931         int ret;
 932
 933         ret = coda_try_decoder_cmd(file, fh, dc);
 934         if (ret < 0)
 935                 return ret;
 936
 937         /* Ignore decoder stop command silently in encoder context */
 938         if (ctx->inst_type != CODA_INST_DECODER)
 939                 return 0;
 940
 941         /* Set the strem-end flag on this context */
 942         ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
 943
 944         if ((dev->devtype->product == CODA_960) &&
 945             coda_isbusy(dev) &&
 946             (ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX))) {
 947                 /* If this context is currently running, update the hardware flag */
 948                 coda_write(dev, ctx->bit_stream_param, CODA_REG_BIT_BIT_STREAM_PARAM);
 949         }
 950         ctx->hold = false;
 951         v4l2_m2m_try_schedule(ctx->fh.m2m_ctx);
 952
 953         return 0;
 954 }
 955
 956 static int coda_subscribe_event(struct v4l2_fh *fh,
 957                                 const struct v4l2_event_subscription *sub)
 958 {
 959         switch (sub->type) {
 960         case V4L2_EVENT_EOS:
 961                 return v4l2_event_subscribe(fh, sub, 0, NULL);
 962         default:
 963                 return v4l2_ctrl_subscribe_event(fh, sub);
 964         }
 965 }
 966
 967 static const struct v4l2_ioctl_ops coda_ioctl_ops = {
 968         .vidioc_querycap        = coda_querycap,
 969
 970         .vidioc_enum_fmt_vid_cap = coda_enum_fmt_vid_cap,
 971         .vidioc_g_fmt_vid_cap   = coda_g_fmt,
 972         .vidioc_try_fmt_vid_cap = coda_try_fmt_vid_cap,
 973         .vidioc_s_fmt_vid_cap   = coda_s_fmt_vid_cap,
 974
 975         .vidioc_enum_fmt_vid_out = coda_enum_fmt_vid_out,
 976         .vidioc_g_fmt_vid_out   = coda_g_fmt,
 977         .vidioc_try_fmt_vid_out = coda_try_fmt_vid_out,
 978         .vidioc_s_fmt_vid_out   = coda_s_fmt_vid_out,
 979
 980         .vidioc_reqbufs         = v4l2_m2m_ioctl_reqbufs,
 981         .vidioc_querybuf        = v4l2_m2m_ioctl_querybuf,
 982
 983         .vidioc_qbuf            = coda_qbuf,
 984         .vidioc_expbuf          = v4l2_m2m_ioctl_expbuf,
 985         .vidioc_dqbuf           = coda_dqbuf,
 986         .vidioc_create_bufs     = v4l2_m2m_ioctl_create_bufs,
 987
 988         .vidioc_streamon        = v4l2_m2m_ioctl_streamon,
 989         .vidioc_streamoff       = v4l2_m2m_ioctl_streamoff,
 990
 991         .vidioc_g_selection     = coda_g_selection,
 992
 993         .vidioc_try_decoder_cmd = coda_try_decoder_cmd,
 994         .vidioc_decoder_cmd     = coda_decoder_cmd,
 995
 996         .vidioc_subscribe_event = coda_subscribe_event,
 997         .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
 998 };
 999
1000 static int coda_start_decoding(struct coda_ctx *ctx);
1001
1002 static inline int coda_get_bitstream_payload(struct coda_ctx *ctx)
1003 {
1004         return kfifo_len(&ctx->bitstream_fifo);
1005 }
1006
1007 static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
1008 {
1009         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
1010         struct coda_dev *dev = ctx->dev;
1011         u32 rd_ptr;
1012
1013         rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
1014         kfifo->out = (kfifo->in & ~kfifo->mask) |
1015                       (rd_ptr - ctx->bitstream.paddr);
1016         if (kfifo->out > kfifo->in)
1017                 kfifo->out -= kfifo->mask + 1;
1018 }
1019
1020 static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
1021 {
1022         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
1023         struct coda_dev *dev = ctx->dev;
1024         u32 rd_ptr, wr_ptr;
1025
1026         rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
1027         coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
1028         wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
1029         coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
1030 }
1031
1032 static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
1033 {
1034         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
1035         struct coda_dev *dev = ctx->dev;
1036         u32 wr_ptr;
1037
1038         wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
1039         coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
1040 }
1041
1042 static int coda_bitstream_queue(struct coda_ctx *ctx, struct vb2_buffer *src_buf)
1043 {
1044         u32 src_size = vb2_get_plane_payload(src_buf, 0);
1045         u32 n;
1046
1047         n = kfifo_in(&ctx->bitstream_fifo, vb2_plane_vaddr(src_buf, 0), src_size);
1048         if (n < src_size)
1049                 return -ENOSPC;
1050
1051         dma_sync_single_for_device(&ctx->dev->plat_dev->dev, ctx->bitstream.paddr,
1052                                    ctx->bitstream.size, DMA_TO_DEVICE);
1053
1054         src_buf->v4l2_buf.sequence = ctx->qsequence++;
1055
1056         return 0;
1057 }
1058
1059 static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
1060                                      struct vb2_buffer *src_buf)
1061 {
1062         int ret;
1063
1064         if (coda_get_bitstream_payload(ctx) +
1065             vb2_get_plane_payload(src_buf, 0) + 512 >= ctx->bitstream.size)
1066                 return false;
1067
1068         if (vb2_plane_vaddr(src_buf, 0) == NULL) {
1069                 v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
1070                 return true;
1071         }
1072
1073         ret = coda_bitstream_queue(ctx, src_buf);
1074         if (ret < 0) {
1075                 v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
1076                 return false;
1077         }
1078         /* Sync read pointer to device */
1079         if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
1080                 coda_kfifo_sync_to_device_write(ctx);
1081
1082         ctx->hold = false;
1083
1084         return true;
1085 }
1086
1087 static void coda_fill_bitstream(struct coda_ctx *ctx)
1088 {
1089         struct vb2_buffer *src_buf;
1090         struct coda_timestamp *ts;
1091
1092         while (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) > 0) {
1093                 src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
1094
1095                 if (coda_bitstream_try_queue(ctx, src_buf)) {
1096                         /*
1097                          * Source buffer is queued in the bitstream ringbuffer;
1098                          * queue the timestamp and mark source buffer as done
1099                          */
1100                         src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
1101
1102                         ts = kmalloc(sizeof(*ts), GFP_KERNEL);
1103                         if (ts) {
1104                                 ts->sequence = src_buf->v4l2_buf.sequence;
1105                                 ts->timecode = src_buf->v4l2_buf.timecode;
1106                                 ts->timestamp = src_buf->v4l2_buf.timestamp;
1107                                 list_add_tail(&ts->list, &ctx->timestamp_list);
1108                         }
1109
1110                         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1111                 } else {
1112                         break;
1113                 }
1114         }
1115 }
1116
1117 static void coda_set_gdi_regs(struct coda_ctx *ctx)
1118 {
1119         struct gdi_tiled_map *tiled_map = &ctx->tiled_map;
1120         struct coda_dev *dev = ctx->dev;
1121         int i;
1122
1123         for (i = 0; i < 16; i++)
1124                 coda_write(dev, tiled_map->xy2ca_map[i],
1125                                 CODA9_GDI_XY2_CAS_0 + 4 * i);
1126         for (i = 0; i < 4; i++)
1127                 coda_write(dev, tiled_map->xy2ba_map[i],
1128                                 CODA9_GDI_XY2_BA_0 + 4 * i);
1129         for (i = 0; i < 16; i++)
1130                 coda_write(dev, tiled_map->xy2ra_map[i],
1131                                 CODA9_GDI_XY2_RAS_0 + 4 * i);
1132         coda_write(dev, tiled_map->xy2rbc_config, CODA9_GDI_XY2_RBC_CONFIG);
1133         for (i = 0; i < 32; i++)
1134                 coda_write(dev, tiled_map->rbc2axi_map[i],
1135                                 CODA9_GDI_RBC2_AXI_0 + 4 * i);
1136 }
1137
1138 /*
1139  * Mem-to-mem operations.
1140  */
1141 static int coda_prepare_decode(struct coda_ctx *ctx)
1142 {
1143         struct vb2_buffer *dst_buf;
1144         struct coda_dev *dev = ctx->dev;
1145         struct coda_q_data *q_data_dst;
1146         u32 stridey, height;
1147         u32 picture_y, picture_cb, picture_cr;
1148
1149         dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1150         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1151
1152         if (ctx->params.rot_mode & CODA_ROT_90) {
1153                 stridey = q_data_dst->height;
1154                 height = q_data_dst->width;
1155         } else {
1156                 stridey = q_data_dst->width;
1157                 height = q_data_dst->height;
1158         }
1159
1160         /* Try to copy source buffer contents into the bitstream ringbuffer */
1161         mutex_lock(&ctx->bitstream_mutex);
1162         coda_fill_bitstream(ctx);
1163         mutex_unlock(&ctx->bitstream_mutex);
1164
1165         if (coda_get_bitstream_payload(ctx) < 512 &&
1166             (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1167                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1168                          "bitstream payload: %d, skipping\n",
1169                          coda_get_bitstream_payload(ctx));
1170                 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1171                 return -EAGAIN;
1172         }
1173
1174         /* Run coda_start_decoding (again) if not yet initialized */
1175         if (!ctx->initialized) {
1176                 int ret = coda_start_decoding(ctx);
1177                 if (ret < 0) {
1178                         v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
1179                         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1180                         return -EAGAIN;
1181                 } else {
1182                         ctx->initialized = 1;
1183                 }
1184         }
1185
1186         if (dev->devtype->product == CODA_960)
1187                 coda_set_gdi_regs(ctx);
1188
1189         /* Set rotator output */
1190         picture_y = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1191         if (q_data_dst->fourcc == V4L2_PIX_FMT_YVU420) {
1192                 /* Switch Cr and Cb for YVU420 format */
1193                 picture_cr = picture_y + stridey * height;
1194                 picture_cb = picture_cr + stridey / 2 * height / 2;
1195         } else {
1196                 picture_cb = picture_y + stridey * height;
1197                 picture_cr = picture_cb + stridey / 2 * height / 2;
1198         }
1199
1200         if (dev->devtype->product == CODA_960) {
1201                 /*
1202                  * The CODA960 seems to have an internal list of buffers with
1203                  * 64 entries that includes the registered frame buffers as
1204                  * well as the rotator buffer output.
1205                  * ROT_INDEX needs to be < 0x40, but > ctx->num_internal_frames.
1206                  */
1207                 coda_write(dev, CODA_MAX_FRAMEBUFFERS + dst_buf->v4l2_buf.index,
1208                                 CODA9_CMD_DEC_PIC_ROT_INDEX);
1209                 coda_write(dev, picture_y, CODA9_CMD_DEC_PIC_ROT_ADDR_Y);
1210                 coda_write(dev, picture_cb, CODA9_CMD_DEC_PIC_ROT_ADDR_CB);
1211                 coda_write(dev, picture_cr, CODA9_CMD_DEC_PIC_ROT_ADDR_CR);
1212                 coda_write(dev, stridey, CODA9_CMD_DEC_PIC_ROT_STRIDE);
1213         } else {
1214                 coda_write(dev, picture_y, CODA_CMD_DEC_PIC_ROT_ADDR_Y);
1215                 coda_write(dev, picture_cb, CODA_CMD_DEC_PIC_ROT_ADDR_CB);
1216                 coda_write(dev, picture_cr, CODA_CMD_DEC_PIC_ROT_ADDR_CR);
1217                 coda_write(dev, stridey, CODA_CMD_DEC_PIC_ROT_STRIDE);
1218         }
1219         coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode,
1220                         CODA_CMD_DEC_PIC_ROT_MODE);
1221
1222         switch (dev->devtype->product) {
1223         case CODA_DX6:
1224                 /* TBD */
1225         case CODA_7541:
1226                 coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
1227                 break;
1228         case CODA_960:
1229                 coda_write(dev, (1 << 10), CODA_CMD_DEC_PIC_OPTION); /* 'hardcode to use interrupt disable mode'? */
1230                 break;
1231         }
1232
1233         coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
1234
1235         coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
1236         coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
1237
1238         return 0;
1239 }
1240
1241 static void coda_prepare_encode(struct coda_ctx *ctx)
1242 {
1243         struct coda_q_data *q_data_src, *q_data_dst;
1244         struct vb2_buffer *src_buf, *dst_buf;
1245         struct coda_dev *dev = ctx->dev;
1246         int force_ipicture;
1247         int quant_param = 0;
1248         u32 picture_y, picture_cb, picture_cr;
1249         u32 pic_stream_buffer_addr, pic_stream_buffer_size;
1250         u32 dst_fourcc;
1251
1252         src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
1253         dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1254         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1255         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1256         dst_fourcc = q_data_dst->fourcc;
1257
1258         src_buf->v4l2_buf.sequence = ctx->osequence;
1259         dst_buf->v4l2_buf.sequence = ctx->osequence;
1260         ctx->osequence++;
1261
1262         /*
1263          * Workaround coda firmware BUG that only marks the first
1264          * frame as IDR. This is a problem for some decoders that can't
1265          * recover when a frame is lost.
1266          */
1267         if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
1268                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1269                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1270         } else {
1271                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1272                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1273         }
1274
1275         if (dev->devtype->product == CODA_960)
1276                 coda_set_gdi_regs(ctx);
1277
1278         /*
1279          * Copy headers at the beginning of the first frame for H.264 only.
1280          * In MPEG4 they are already copied by the coda.
1281          */
1282         if (src_buf->v4l2_buf.sequence == 0) {
1283                 pic_stream_buffer_addr =
1284                         vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
1285                         ctx->vpu_header_size[0] +
1286                         ctx->vpu_header_size[1] +
1287                         ctx->vpu_header_size[2];
1288                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
1289                         ctx->vpu_header_size[0] -
1290                         ctx->vpu_header_size[1] -
1291                         ctx->vpu_header_size[2];
1292                 memcpy(vb2_plane_vaddr(dst_buf, 0),
1293                        &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
1294                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
1295                        &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
1296                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
1297                         ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
1298                         ctx->vpu_header_size[2]);
1299         } else {
1300                 pic_stream_buffer_addr =
1301                         vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1302                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
1303         }
1304
1305         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1306                 force_ipicture = 1;
1307                 switch (dst_fourcc) {
1308                 case V4L2_PIX_FMT_H264:
1309                         quant_param = ctx->params.h264_intra_qp;
1310                         break;
1311                 case V4L2_PIX_FMT_MPEG4:
1312                         quant_param = ctx->params.mpeg4_intra_qp;
1313                         break;
1314                 default:
1315                         v4l2_warn(&ctx->dev->v4l2_dev,
1316                                 "cannot set intra qp, fmt not supported\n");
1317                         break;
1318                 }
1319         } else {
1320                 force_ipicture = 0;
1321                 switch (dst_fourcc) {
1322                 case V4L2_PIX_FMT_H264:
1323                         quant_param = ctx->params.h264_inter_qp;
1324                         break;
1325                 case V4L2_PIX_FMT_MPEG4:
1326                         quant_param = ctx->params.mpeg4_inter_qp;
1327                         break;
1328                 default:
1329                         v4l2_warn(&ctx->dev->v4l2_dev,
1330                                 "cannot set inter qp, fmt not supported\n");
1331                         break;
1332                 }
1333         }
1334
1335         /* submit */
1336         coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
1337         coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
1338
1339
1340         picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
1341         switch (q_data_src->fourcc) {
1342         case V4L2_PIX_FMT_YVU420:
1343                 /* Switch Cb and Cr for YVU420 format */
1344                 picture_cr = picture_y + q_data_src->bytesperline *
1345                                 q_data_src->height;
1346                 picture_cb = picture_cr + q_data_src->bytesperline / 2 *
1347                                 q_data_src->height / 2;
1348                 break;
1349         case V4L2_PIX_FMT_YUV420:
1350         default:
1351                 picture_cb = picture_y + q_data_src->bytesperline *
1352                                 q_data_src->height;
1353                 picture_cr = picture_cb + q_data_src->bytesperline / 2 *
1354                                 q_data_src->height / 2;
1355                 break;
1356         }
1357
1358         if (dev->devtype->product == CODA_960) {
1359                 coda_write(dev, 4/*FIXME: 0*/, CODA9_CMD_ENC_PIC_SRC_INDEX);
1360                 coda_write(dev, q_data_src->width, CODA9_CMD_ENC_PIC_SRC_STRIDE);
1361                 coda_write(dev, 0, CODA9_CMD_ENC_PIC_SUB_FRAME_SYNC);
1362
1363                 coda_write(dev, picture_y, CODA9_CMD_ENC_PIC_SRC_ADDR_Y);
1364                 coda_write(dev, picture_cb, CODA9_CMD_ENC_PIC_SRC_ADDR_CB);
1365                 coda_write(dev, picture_cr, CODA9_CMD_ENC_PIC_SRC_ADDR_CR);
1366         } else {
1367                 coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
1368                 coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
1369                 coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
1370         }
1371         coda_write(dev, force_ipicture << 1 & 0x2,
1372                    CODA_CMD_ENC_PIC_OPTION);
1373
1374         coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
1375         coda_write(dev, pic_stream_buffer_size / 1024,
1376                    CODA_CMD_ENC_PIC_BB_SIZE);
1377
1378         if (!ctx->streamon_out) {
1379                 /* After streamoff on the output side, set the stream end flag */
1380                 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1381                 coda_write(dev, ctx->bit_stream_param, CODA_REG_BIT_BIT_STREAM_PARAM);
1382         }
1383 }
1384
1385 static void coda_device_run(void *m2m_priv)
1386 {
1387         struct coda_ctx *ctx = m2m_priv;
1388         struct coda_dev *dev = ctx->dev;
1389
1390         queue_work(dev->workqueue, &ctx->pic_run_work);
1391 }
1392
1393 static void coda_free_framebuffers(struct coda_ctx *ctx);
1394 static void coda_free_context_buffers(struct coda_ctx *ctx);
1395
1396 static void coda_seq_end_work(struct work_struct *work)
1397 {
1398         struct coda_ctx *ctx = container_of(work, struct coda_ctx, seq_end_work);
1399         struct coda_dev *dev = ctx->dev;
1400
1401         mutex_lock(&ctx->buffer_mutex);
1402         mutex_lock(&dev->coda_mutex);
1403
1404         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1405                  "%d: %s: sent command 'SEQ_END' to coda\n", ctx->idx, __func__);
1406         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1407                 v4l2_err(&dev->v4l2_dev,
1408                          "CODA_COMMAND_SEQ_END failed\n");
1409         }
1410
1411         kfifo_init(&ctx->bitstream_fifo,
1412                 ctx->bitstream.vaddr, ctx->bitstream.size);
1413
1414         coda_free_framebuffers(ctx);
1415         coda_free_context_buffers(ctx);
1416
1417         mutex_unlock(&dev->coda_mutex);
1418         mutex_unlock(&ctx->buffer_mutex);
1419 }
1420
1421 static void coda_finish_decode(struct coda_ctx *ctx);
1422 static void coda_finish_encode(struct coda_ctx *ctx);
1423
1424 static void coda_pic_run_work(struct work_struct *work)
1425 {
1426         struct coda_ctx *ctx = container_of(work, struct coda_ctx, pic_run_work);
1427         struct coda_dev *dev = ctx->dev;
1428         int ret;
1429
1430         mutex_lock(&ctx->buffer_mutex);
1431         mutex_lock(&dev->coda_mutex);
1432
1433         if (ctx->inst_type == CODA_INST_DECODER) {
1434                 ret = coda_prepare_decode(ctx);
1435                 if (ret < 0) {
1436                         mutex_unlock(&dev->coda_mutex);
1437                         mutex_unlock(&ctx->buffer_mutex);
1438                         /* job_finish scheduled by prepare_decode */
1439                         return;
1440                 }
1441         } else {
1442                 coda_prepare_encode(ctx);
1443         }
1444
1445         if (dev->devtype->product != CODA_DX6)
1446                 coda_write(dev, ctx->iram_info.axi_sram_use,
1447                                 CODA7_REG_BIT_AXI_SRAM_USE);
1448
1449         if (ctx->inst_type == CODA_INST_DECODER)
1450                 coda_kfifo_sync_to_device_full(ctx);
1451         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1452
1453         if (!wait_for_completion_timeout(&ctx->completion, msecs_to_jiffies(1000))) {
1454                 dev_err(&dev->plat_dev->dev, "CODA PIC_RUN timeout\n");
1455
1456                 ctx->hold = true;
1457
1458                 coda_hw_reset(ctx);
1459         } else if (!ctx->aborting) {
1460                 if (ctx->inst_type == CODA_INST_DECODER)
1461                         coda_finish_decode(ctx);
1462                 else
1463                         coda_finish_encode(ctx);
1464         }
1465
1466         if (ctx->aborting || (!ctx->streamon_cap && !ctx->streamon_out))
1467                 queue_work(dev->workqueue, &ctx->seq_end_work);
1468
1469         mutex_unlock(&dev->coda_mutex);
1470         mutex_unlock(&ctx->buffer_mutex);
1471
1472         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1473 }
1474
1475 static int coda_job_ready(void *m2m_priv)
1476 {
1477         struct coda_ctx *ctx = m2m_priv;
1478
1479         /*
1480          * For both 'P' and 'key' frame cases 1 picture
1481          * and 1 frame are needed. In the decoder case,
1482          * the compressed frame can be in the bitstream.
1483          */
1484         if (!v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) &&
1485             ctx->inst_type != CODA_INST_DECODER) {
1486                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1487                          "not ready: not enough video buffers.\n");
1488                 return 0;
1489         }
1490
1491         if (!v4l2_m2m_num_dst_bufs_ready(ctx->fh.m2m_ctx)) {
1492                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1493                          "not ready: not enough video capture buffers.\n");
1494                 return 0;
1495         }
1496
1497         if (ctx->hold ||
1498             ((ctx->inst_type == CODA_INST_DECODER) &&
1499              (coda_get_bitstream_payload(ctx) < 512) &&
1500              !(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1501                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1502                          "%d: not ready: not enough bitstream data.\n",
1503                          ctx->idx);
1504                 return 0;
1505         }
1506
1507         if (ctx->aborting) {
1508                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1509                          "not ready: aborting\n");
1510                 return 0;
1511         }
1512
1513         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1514                         "job ready\n");
1515         return 1;
1516 }
1517
1518 static void coda_job_abort(void *priv)
1519 {
1520         struct coda_ctx *ctx = priv;
1521
1522         ctx->aborting = 1;
1523
1524         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1525                  "Aborting task\n");
1526 }
1527
1528 static void coda_lock(void *m2m_priv)
1529 {
1530         struct coda_ctx *ctx = m2m_priv;
1531         struct coda_dev *pcdev = ctx->dev;
1532         mutex_lock(&pcdev->dev_mutex);
1533 }
1534
1535 static void coda_unlock(void *m2m_priv)
1536 {
1537         struct coda_ctx *ctx = m2m_priv;
1538         struct coda_dev *pcdev = ctx->dev;
1539         mutex_unlock(&pcdev->dev_mutex);
1540 }
1541
1542 static struct v4l2_m2m_ops coda_m2m_ops = {
1543         .device_run     = coda_device_run,
1544         .job_ready      = coda_job_ready,
1545         .job_abort      = coda_job_abort,
1546         .lock           = coda_lock,
1547         .unlock         = coda_unlock,
1548 };
1549
1550 static void coda_set_tiled_map_type(struct coda_ctx *ctx, int tiled_map_type)
1551 {
1552         struct gdi_tiled_map *tiled_map = &ctx->tiled_map;
1553         int luma_map, chro_map, i;
1554
1555         memset(tiled_map, 0, sizeof(*tiled_map));
1556
1557         luma_map = 64;
1558         chro_map = 64;
1559         tiled_map->map_type = tiled_map_type;
1560         for (i = 0; i < 16; i++)
1561                 tiled_map->xy2ca_map[i] = luma_map << 8 | chro_map;
1562         for (i = 0; i < 4; i++)
1563                 tiled_map->xy2ba_map[i] = luma_map << 8 | chro_map;
1564         for (i = 0; i < 16; i++)
1565                 tiled_map->xy2ra_map[i] = luma_map << 8 | chro_map;
1566
1567         if (tiled_map_type == GDI_LINEAR_FRAME_MAP) {
1568                 tiled_map->xy2rbc_config = 0;
1569         } else {
1570                 dev_err(&ctx->dev->plat_dev->dev, "invalid map type: %d\n",
1571                         tiled_map_type);
1572                 return;
1573         }
1574 }
1575
1576 static void set_default_params(struct coda_ctx *ctx)
1577 {
1578         int max_w;
1579         int max_h;
1580
1581         ctx->codec = &ctx->dev->devtype->codecs[0];
1582         max_w = ctx->codec->max_w;
1583         max_h = ctx->codec->max_h;
1584
1585         ctx->params.codec_mode = CODA_MODE_INVALID;
1586         ctx->colorspace = V4L2_COLORSPACE_REC709;
1587         ctx->params.framerate = 30;
1588         ctx->aborting = 0;
1589
1590         /* Default formats for output and input queues */
1591         ctx->q_data[V4L2_M2M_SRC].fourcc = ctx->codec->src_fourcc;
1592         ctx->q_data[V4L2_M2M_DST].fourcc = ctx->codec->dst_fourcc;
1593         ctx->q_data[V4L2_M2M_SRC].width = max_w;
1594         ctx->q_data[V4L2_M2M_SRC].height = max_h;
1595         ctx->q_data[V4L2_M2M_SRC].bytesperline = max_w;
1596         ctx->q_data[V4L2_M2M_SRC].sizeimage = (max_w * max_h * 3) / 2;
1597         ctx->q_data[V4L2_M2M_DST].width = max_w;
1598         ctx->q_data[V4L2_M2M_DST].height = max_h;
1599         ctx->q_data[V4L2_M2M_DST].bytesperline = 0;
1600         ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
1601         ctx->q_data[V4L2_M2M_SRC].rect.width = max_w;
1602         ctx->q_data[V4L2_M2M_SRC].rect.height = max_h;
1603         ctx->q_data[V4L2_M2M_DST].rect.width = max_w;
1604         ctx->q_data[V4L2_M2M_DST].rect.height = max_h;
1605
1606         if (ctx->dev->devtype->product == CODA_960)
1607                 coda_set_tiled_map_type(ctx, GDI_LINEAR_FRAME_MAP);
1608 }
1609
1610 /*
1611  * Queue operations
1612  */
1613 static int coda_queue_setup(struct vb2_queue *vq,
1614                                 const struct v4l2_format *fmt,
1615                                 unsigned int *nbuffers, unsigned int *nplanes,
1616                                 unsigned int sizes[], void *alloc_ctxs[])
1617 {
1618         struct coda_ctx *ctx = vb2_get_drv_priv(vq);
1619         struct coda_q_data *q_data;
1620         unsigned int size;
1621
1622         q_data = get_q_data(ctx, vq->type);
1623         size = q_data->sizeimage;
1624
1625         *nplanes = 1;
1626         sizes[0] = size;
1627
1628         alloc_ctxs[0] = ctx->dev->alloc_ctx;
1629
1630         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1631                  "get %d buffer(s) of size %d each.\n", *nbuffers, size);
1632
1633         return 0;
1634 }
1635
1636 static int coda_buf_prepare(struct vb2_buffer *vb)
1637 {
1638         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
1639         struct coda_q_data *q_data;
1640
1641         q_data = get_q_data(ctx, vb->vb2_queue->type);
1642
1643         if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
1644                 v4l2_warn(&ctx->dev->v4l2_dev,
1645                           "%s data will not fit into plane (%lu < %lu)\n",
1646                           __func__, vb2_plane_size(vb, 0),
1647                           (long)q_data->sizeimage);
1648                 return -EINVAL;
1649         }
1650
1651         return 0;
1652 }
1653
1654 static void coda_buf_queue(struct vb2_buffer *vb)
1655 {
1656         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
1657         struct coda_dev *dev = ctx->dev;
1658         struct coda_q_data *q_data;
1659
1660         q_data = get_q_data(ctx, vb->vb2_queue->type);
1661
1662         /*
1663          * In the decoder case, immediately try to copy the buffer into the
1664          * bitstream ringbuffer and mark it as ready to be dequeued.
1665          */
1666         if (q_data->fourcc == V4L2_PIX_FMT_H264 &&
1667             vb->vb2_queue->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1668                 /*
1669                  * For backwards compatibility, queuing an empty buffer marks
1670                  * the stream end
1671                  */
1672                 if (vb2_get_plane_payload(vb, 0) == 0) {
1673                         ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1674                         if ((dev->devtype->product == CODA_960) &&
1675                             coda_isbusy(dev) &&
1676                             (ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX))) {
1677                                 /* if this decoder instance is running, set the stream end flag */
1678                                 coda_write(dev, ctx->bit_stream_param, CODA_REG_BIT_BIT_STREAM_PARAM);
1679                         }
1680                 }
1681                 mutex_lock(&ctx->bitstream_mutex);
1682                 v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vb);
1683                 coda_fill_bitstream(ctx);
1684                 mutex_unlock(&ctx->bitstream_mutex);
1685         } else {
1686                 v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vb);
1687         }
1688 }
1689
1690 static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
1691 {
1692         struct coda_dev *dev = ctx->dev;
1693         u32 *p = ctx->parabuf.vaddr;
1694
1695         if (dev->devtype->product == CODA_DX6)
1696                 p[index] = value;
1697         else
1698                 p[index ^ 1] = value;
1699 }
1700
1701 static int coda_alloc_aux_buf(struct coda_dev *dev,
1702                               struct coda_aux_buf *buf, size_t size,
1703                               const char *name, struct dentry *parent)
1704 {
1705         buf->vaddr = dma_alloc_coherent(&dev->plat_dev->dev, size, &buf->paddr,
1706                                         GFP_KERNEL);
1707         if (!buf->vaddr)
1708                 return -ENOMEM;
1709
1710         buf->size = size;
1711
1712         if (name && parent) {
1713                 buf->blob.data = buf->vaddr;
1714                 buf->blob.size = size;
1715                 buf->dentry = debugfs_create_blob(name, 0644, parent, &buf->blob);
1716                 if (!buf->dentry)
1717                         dev_warn(&dev->plat_dev->dev,
1718                                  "failed to create debugfs entry %s\n", name);
1719         }
1720
1721         return 0;
1722 }
1723
1724 static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
1725                                          struct coda_aux_buf *buf, size_t size,
1726                                          const char *name)
1727 {
1728         return coda_alloc_aux_buf(ctx->dev, buf, size, name, ctx->debugfs_entry);
1729 }
1730
1731 static void coda_free_aux_buf(struct coda_dev *dev,
1732                               struct coda_aux_buf *buf)
1733 {
1734         if (buf->vaddr) {
1735                 dma_free_coherent(&dev->plat_dev->dev, buf->size,
1736                                   buf->vaddr, buf->paddr);
1737                 buf->vaddr = NULL;
1738                 buf->size = 0;
1739         }
1740         debugfs_remove(buf->dentry);
1741 }
1742
1743 static void coda_free_framebuffers(struct coda_ctx *ctx)
1744 {
1745         int i;
1746
1747         for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
1748                 coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
1749 }
1750
1751 static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
1752 {
1753         struct coda_dev *dev = ctx->dev;
1754         int width, height;
1755         dma_addr_t paddr;
1756         int ysize;
1757         int ret;
1758         int i;
1759
1760         if (ctx->codec && (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 ||
1761              ctx->codec->dst_fourcc == V4L2_PIX_FMT_H264)) {
1762                 width = round_up(q_data->width, 16);
1763                 height = round_up(q_data->height, 16);
1764         } else {
1765                 width = round_up(q_data->width, 8);
1766                 height = q_data->height;
1767         }
1768         ysize = width * height;
1769
1770         /* Allocate frame buffers */
1771         for (i = 0; i < ctx->num_internal_frames; i++) {
1772                 size_t size;
1773                 char *name;
1774
1775                 size = ysize + ysize / 2;
1776                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
1777                     dev->devtype->product != CODA_DX6)
1778                         size += ysize / 4;
1779                 name = kasprintf(GFP_KERNEL, "fb%d", i);
1780                 ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i],
1781                                              size, name);
1782                 kfree(name);
1783                 if (ret < 0) {
1784                         coda_free_framebuffers(ctx);
1785                         return ret;
1786                 }
1787         }
1788
1789         /* Register frame buffers in the parameter buffer */
1790         for (i = 0; i < ctx->num_internal_frames; i++) {
1791                 paddr = ctx->internal_frames[i].paddr;
1792                 coda_parabuf_write(ctx, i * 3 + 0, paddr); /* Y */
1793                 coda_parabuf_write(ctx, i * 3 + 1, paddr + ysize); /* Cb */
1794                 coda_parabuf_write(ctx, i * 3 + 2, paddr + ysize + ysize/4); /* Cr */
1795
1796                 /* mvcol buffer for h.264 */
1797                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
1798                     dev->devtype->product != CODA_DX6)
1799                         coda_parabuf_write(ctx, 96 + i,
1800                                            ctx->internal_frames[i].paddr +
1801                                            ysize + ysize/4 + ysize/4);
1802         }
1803
1804         /* mvcol buffer for mpeg4 */
1805         if ((dev->devtype->product != CODA_DX6) &&
1806             (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4))
1807                 coda_parabuf_write(ctx, 97, ctx->internal_frames[i].paddr +
1808                                             ysize + ysize/4 + ysize/4);
1809
1810         return 0;
1811 }
1812
1813 static int coda_h264_padding(int size, char *p)
1814 {
1815         int nal_size;
1816         int diff;
1817
1818         diff = size - (size & ~0x7);
1819         if (diff == 0)
1820                 return 0;
1821
1822         nal_size = coda_filler_size[diff];
1823         memcpy(p, coda_filler_nal, nal_size);
1824
1825         /* Add rbsp stop bit and trailing at the end */
1826         *(p + nal_size - 1) = 0x80;
1827
1828         return nal_size;
1829 }
1830
1831 static phys_addr_t coda_iram_alloc(struct coda_iram_info *iram, size_t size)
1832 {
1833         phys_addr_t ret;
1834
1835         size = round_up(size, 1024);
1836         if (size > iram->remaining)
1837                 return 0;
1838         iram->remaining -= size;
1839
1840         ret = iram->next_paddr;
1841         iram->next_paddr += size;
1842
1843         return ret;
1844 }
1845
1846 static void coda_setup_iram(struct coda_ctx *ctx)
1847 {
1848         struct coda_iram_info *iram_info = &ctx->iram_info;
1849         struct coda_dev *dev = ctx->dev;
1850         int mb_width;
1851         int dbk_bits;
1852         int bit_bits;
1853         int ip_bits;
1854
1855         memset(iram_info, 0, sizeof(*iram_info));
1856         iram_info->next_paddr = dev->iram.paddr;
1857         iram_info->remaining = dev->iram.size;
1858
1859         switch (dev->devtype->product) {
1860         case CODA_7541:
1861                 dbk_bits = CODA7_USE_HOST_DBK_ENABLE | CODA7_USE_DBK_ENABLE;
1862                 bit_bits = CODA7_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
1863                 ip_bits = CODA7_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
1864                 break;
1865         case CODA_960:
1866                 dbk_bits = CODA9_USE_HOST_DBK_ENABLE | CODA9_USE_DBK_ENABLE;
1867                 bit_bits = CODA9_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
1868                 ip_bits = CODA9_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
1869                 break;
1870         default: /* CODA_DX6 */
1871                 return;
1872         }
1873
1874         if (ctx->inst_type == CODA_INST_ENCODER) {
1875                 struct coda_q_data *q_data_src;
1876
1877                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1878                 mb_width = DIV_ROUND_UP(q_data_src->width, 16);
1879
1880                 /* Prioritize in case IRAM is too small for everything */
1881                 if (dev->devtype->product == CODA_7541) {
1882                         iram_info->search_ram_size = round_up(mb_width * 16 *
1883                                                               36 + 2048, 1024);
1884                         iram_info->search_ram_paddr = coda_iram_alloc(iram_info,
1885                                                         iram_info->search_ram_size);
1886                         if (!iram_info->search_ram_paddr) {
1887                                 pr_err("IRAM is smaller than the search ram size\n");
1888                                 goto out;
1889                         }
1890                         iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE |
1891                                                    CODA7_USE_ME_ENABLE;
1892                 }
1893
1894                 /* Only H.264BP and H.263P3 are considered */
1895                 iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, 64 * mb_width);
1896                 iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, 64 * mb_width);
1897                 if (!iram_info->buf_dbk_c_use)
1898                         goto out;
1899                 iram_info->axi_sram_use |= dbk_bits;
1900
1901                 iram_info->buf_bit_use = coda_iram_alloc(iram_info, 128 * mb_width);
1902                 if (!iram_info->buf_bit_use)
1903                         goto out;
1904                 iram_info->axi_sram_use |= bit_bits;
1905
1906                 iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, 128 * mb_width);
1907                 if (!iram_info->buf_ip_ac_dc_use)
1908                         goto out;
1909                 iram_info->axi_sram_use |= ip_bits;
1910
1911                 /* OVL and BTP disabled for encoder */
1912         } else if (ctx->inst_type == CODA_INST_DECODER) {
1913                 struct coda_q_data *q_data_dst;
1914
1915                 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1916                 mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
1917
1918                 iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, 128 * mb_width);
1919                 iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, 128 * mb_width);
1920                 if (!iram_info->buf_dbk_c_use)
1921                         goto out;
1922                 iram_info->axi_sram_use |= dbk_bits;
1923
1924                 iram_info->buf_bit_use = coda_iram_alloc(iram_info, 128 * mb_width);
1925                 if (!iram_info->buf_bit_use)
1926                         goto out;
1927                 iram_info->axi_sram_use |= bit_bits;
1928
1929                 iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, 128 * mb_width);
1930                 if (!iram_info->buf_ip_ac_dc_use)
1931                         goto out;
1932                 iram_info->axi_sram_use |= ip_bits;
1933
1934                 /* OVL and BTP unused as there is no VC1 support yet */
1935         }
1936
1937 out:
1938         if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
1939                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1940                          "IRAM smaller than needed\n");
1941
1942         if (dev->devtype->product == CODA_7541) {
1943                 /* TODO - Enabling these causes picture errors on CODA7541 */
1944                 if (ctx->inst_type == CODA_INST_DECODER) {
1945                         /* fw 1.4.50 */
1946                         iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
1947                                                      CODA7_USE_IP_ENABLE);
1948                 } else {
1949                         /* fw 13.4.29 */
1950                         iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
1951                                                      CODA7_USE_HOST_DBK_ENABLE |
1952                                                      CODA7_USE_IP_ENABLE |
1953                                                      CODA7_USE_DBK_ENABLE);
1954                 }
1955         }
1956 }
1957
1958 static void coda_free_context_buffers(struct coda_ctx *ctx)
1959 {
1960         struct coda_dev *dev = ctx->dev;
1961
1962         coda_free_aux_buf(dev, &ctx->slicebuf);
1963         coda_free_aux_buf(dev, &ctx->psbuf);
1964         if (dev->devtype->product != CODA_DX6)
1965                 coda_free_aux_buf(dev, &ctx->workbuf);
1966 }
1967
1968 static int coda_alloc_context_buffers(struct coda_ctx *ctx,
1969                                       struct coda_q_data *q_data)
1970 {
1971         struct coda_dev *dev = ctx->dev;
1972         size_t size;
1973         int ret;
1974
1975         if (dev->devtype->product == CODA_DX6)
1976                 return 0;
1977
1978         if (ctx->psbuf.vaddr) {
1979                 v4l2_err(&dev->v4l2_dev, "psmembuf still allocated\n");
1980                 return -EBUSY;
1981         }
1982         if (ctx->slicebuf.vaddr) {
1983                 v4l2_err(&dev->v4l2_dev, "slicebuf still allocated\n");
1984                 return -EBUSY;
1985         }
1986         if (ctx->workbuf.vaddr) {
1987                 v4l2_err(&dev->v4l2_dev, "context buffer still allocated\n");
1988                 ret = -EBUSY;
1989                 return -ENOMEM;
1990         }
1991
1992         if (q_data->fourcc == V4L2_PIX_FMT_H264) {
1993                 /* worst case slice size */
1994                 size = (DIV_ROUND_UP(q_data->width, 16) *
1995                         DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512;
1996                 ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size, "slicebuf");
1997                 if (ret < 0) {
1998                         v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte slice buffer",
1999                                  ctx->slicebuf.size);
2000                         return ret;
2001                 }
2002         }
2003
2004         if (dev->devtype->product == CODA_7541) {
2005                 ret = coda_alloc_context_buf(ctx, &ctx->psbuf, CODA7_PS_BUF_SIZE, "psbuf");
2006                 if (ret < 0) {
2007                         v4l2_err(&dev->v4l2_dev, "failed to allocate psmem buffer");
2008                         goto err;
2009                 }
2010         }
2011
2012         size = dev->devtype->workbuf_size;
2013         if (dev->devtype->product == CODA_960 &&
2014             q_data->fourcc == V4L2_PIX_FMT_H264)
2015                 size += CODA9_PS_SAVE_SIZE;
2016         ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size, "workbuf");
2017         if (ret < 0) {
2018                 v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte context buffer",
2019                          ctx->workbuf.size);
2020                 goto err;
2021         }
2022
2023         return 0;
2024
2025 err:
2026         coda_free_context_buffers(ctx);
2027         return ret;
2028 }
2029
2030 static int coda_start_decoding(struct coda_ctx *ctx)
2031 {
2032         struct coda_q_data *q_data_src, *q_data_dst;
2033         u32 bitstream_buf, bitstream_size;
2034         struct coda_dev *dev = ctx->dev;
2035         int width, height;
2036         u32 src_fourcc;
2037         u32 val;
2038         int ret;
2039
2040         /* Start decoding */
2041         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2042         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2043         bitstream_buf = ctx->bitstream.paddr;
2044         bitstream_size = ctx->bitstream.size;
2045         src_fourcc = q_data_src->fourcc;
2046
2047         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
2048
2049         /* Update coda bitstream read and write pointers from kfifo */
2050         coda_kfifo_sync_to_device_full(ctx);
2051
2052         ctx->display_idx = -1;
2053         ctx->frm_dis_flg = 0;
2054         coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
2055
2056         coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE,
2057                         CODA_REG_BIT_BIT_STREAM_PARAM);
2058
2059         coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
2060         coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
2061         val = 0;
2062         if ((dev->devtype->product == CODA_7541) ||
2063             (dev->devtype->product == CODA_960))
2064                 val |= CODA_REORDER_ENABLE;
2065         coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
2066
2067         ctx->params.codec_mode = ctx->codec->mode;
2068         if (dev->devtype->product == CODA_960 &&
2069             src_fourcc == V4L2_PIX_FMT_MPEG4)
2070                 ctx->params.codec_mode_aux = CODA_MP4_AUX_MPEG4;
2071         else
2072                 ctx->params.codec_mode_aux = 0;
2073         if (src_fourcc == V4L2_PIX_FMT_H264) {
2074                 if (dev->devtype->product == CODA_7541) {
2075                         coda_write(dev, ctx->psbuf.paddr,
2076                                         CODA_CMD_DEC_SEQ_PS_BB_START);
2077                         coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
2078                                         CODA_CMD_DEC_SEQ_PS_BB_SIZE);
2079                 }
2080                 if (dev->devtype->product == CODA_960) {
2081                         coda_write(dev, 0, CODA_CMD_DEC_SEQ_X264_MV_EN);
2082                         coda_write(dev, 512, CODA_CMD_DEC_SEQ_SPP_CHUNK_SIZE);
2083                 }
2084         }
2085         if (dev->devtype->product != CODA_960) {
2086                 coda_write(dev, 0, CODA_CMD_DEC_SEQ_SRC_SIZE);
2087         }
2088
2089         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
2090                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
2091                 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
2092                 return -ETIMEDOUT;
2093         }
2094
2095         /* Update kfifo out pointer from coda bitstream read pointer */
2096         coda_kfifo_sync_from_device(ctx);
2097
2098         coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
2099
2100         if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
2101                 v4l2_err(&dev->v4l2_dev,
2102                         "CODA_COMMAND_SEQ_INIT failed, error code = %d\n",
2103                         coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
2104                 return -EAGAIN;
2105         }
2106
2107         val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
2108         if (dev->devtype->product == CODA_DX6) {
2109                 width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
2110                 height = val & CODADX6_PICHEIGHT_MASK;
2111         } else {
2112                 width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
2113                 height = val & CODA7_PICHEIGHT_MASK;
2114         }
2115
2116         if (width > q_data_dst->width || height > q_data_dst->height) {
2117                 v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
2118                          width, height, q_data_dst->width, q_data_dst->height);
2119                 return -EINVAL;
2120         }
2121
2122         width = round_up(width, 16);
2123         height = round_up(height, 16);
2124
2125         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n",
2126                  __func__, ctx->idx, width, height);
2127
2128         ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED);
2129         if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
2130                 v4l2_err(&dev->v4l2_dev,
2131                          "not enough framebuffers to decode (%d < %d)\n",
2132                          CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
2133                 return -EINVAL;
2134         }
2135
2136         if (src_fourcc == V4L2_PIX_FMT_H264) {
2137                 u32 left_right;
2138                 u32 top_bottom;
2139
2140                 left_right = coda_read(dev, CODA_RET_DEC_SEQ_CROP_LEFT_RIGHT);
2141                 top_bottom = coda_read(dev, CODA_RET_DEC_SEQ_CROP_TOP_BOTTOM);
2142
2143                 q_data_dst->rect.left = (left_right >> 10) & 0x3ff;
2144                 q_data_dst->rect.top = (top_bottom >> 10) & 0x3ff;
2145                 q_data_dst->rect.width = width - q_data_dst->rect.left -
2146                                          (left_right & 0x3ff);
2147                 q_data_dst->rect.height = height - q_data_dst->rect.top -
2148                                           (top_bottom & 0x3ff);
2149         }
2150
2151         ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
2152         if (ret < 0)
2153                 return ret;
2154
2155         /* Tell the decoder how many frame buffers we allocated. */
2156         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
2157         coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE);
2158
2159         if (dev->devtype->product != CODA_DX6) {
2160                 /* Set secondary AXI IRAM */
2161                 coda_setup_iram(ctx);
2162
2163                 coda_write(dev, ctx->iram_info.buf_bit_use,
2164                                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
2165                 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
2166                                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
2167                 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
2168                                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
2169                 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
2170                                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
2171                 coda_write(dev, ctx->iram_info.buf_ovl_use,
2172                                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
2173                 if (dev->devtype->product == CODA_960)
2174                         coda_write(dev, ctx->iram_info.buf_btp_use,
2175                                         CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
2176         }
2177
2178         if (dev->devtype->product == CODA_960) {
2179                 coda_write(dev, -1, CODA9_CMD_SET_FRAME_DELAY);
2180
2181                 coda_write(dev, 0x20262024, CODA9_CMD_SET_FRAME_CACHE_SIZE);
2182                 coda_write(dev, 2 << CODA9_CACHE_PAGEMERGE_OFFSET |
2183                                 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET |
2184                                 8 << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET |
2185                                 8 << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET,
2186                                 CODA9_CMD_SET_FRAME_CACHE_CONFIG);
2187         }
2188
2189         if (src_fourcc == V4L2_PIX_FMT_H264) {
2190                 coda_write(dev, ctx->slicebuf.paddr,
2191                                 CODA_CMD_SET_FRAME_SLICE_BB_START);
2192                 coda_write(dev, ctx->slicebuf.size / 1024,
2193                                 CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
2194         }
2195
2196         if (dev->devtype->product == CODA_7541) {
2197                 int max_mb_x = 1920 / 16;
2198                 int max_mb_y = 1088 / 16;
2199                 int max_mb_num = max_mb_x * max_mb_y;
2200
2201                 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
2202                                 CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
2203         } else if (dev->devtype->product == CODA_960) {
2204                 int max_mb_x = 1920 / 16;
2205                 int max_mb_y = 1088 / 16;
2206                 int max_mb_num = max_mb_x * max_mb_y;
2207
2208                 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
2209                                 CODA9_CMD_SET_FRAME_MAX_DEC_SIZE);
2210         }
2211
2212         if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
2213                 v4l2_err(&ctx->dev->v4l2_dev,
2214                          "CODA_COMMAND_SET_FRAME_BUF timeout\n");
2215                 return -ETIMEDOUT;
2216         }
2217
2218         return 0;
2219 }
2220
2221 static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf,
2222                               int header_code, u8 *header, int *size)
2223 {
2224         struct coda_dev *dev = ctx->dev;
2225         size_t bufsize;
2226         int ret;
2227         int i;
2228
2229         if (dev->devtype->product == CODA_960)
2230                 memset(vb2_plane_vaddr(buf, 0), 0, 64);
2231
2232         coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0),
2233                    CODA_CMD_ENC_HEADER_BB_START);
2234         bufsize = vb2_plane_size(buf, 0);
2235         if (dev->devtype->product == CODA_960)
2236                 bufsize /= 1024;
2237         coda_write(dev, bufsize, CODA_CMD_ENC_HEADER_BB_SIZE);
2238         coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
2239         ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
2240         if (ret < 0) {
2241                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
2242                 return ret;
2243         }
2244
2245         if (dev->devtype->product == CODA_960) {
2246                 for (i = 63; i > 0; i--)
2247                         if (((char *)vb2_plane_vaddr(buf, 0))[i] != 0)
2248                                 break;
2249                 *size = i + 1;
2250         } else {
2251                 *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
2252                         coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
2253         }
2254         memcpy(header, vb2_plane_vaddr(buf, 0), *size);
2255
2256         return 0;
2257 }
2258
2259 static int coda_start_encoding(struct coda_ctx *ctx);
2260
2261 static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
2262 {
2263         struct coda_ctx *ctx = vb2_get_drv_priv(q);
2264         struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
2265         struct coda_dev *dev = ctx->dev;
2266         struct coda_q_data *q_data_src, *q_data_dst;
2267         u32 dst_fourcc;
2268         int ret = 0;
2269
2270         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2271         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
2272                 if (q_data_src->fourcc == V4L2_PIX_FMT_H264) {
2273                         if (coda_get_bitstream_payload(ctx) < 512)
2274                                 return -EINVAL;
2275                 } else {
2276                         if (count < 1)
2277                                 return -EINVAL;
2278                 }
2279
2280                 ctx->streamon_out = 1;
2281
2282                 if (coda_format_is_yuv(q_data_src->fourcc))
2283                         ctx->inst_type = CODA_INST_ENCODER;
2284                 else
2285                         ctx->inst_type = CODA_INST_DECODER;
2286         } else {
2287                 if (count < 1)
2288                         return -EINVAL;
2289
2290                 ctx->streamon_cap = 1;
2291         }
2292
2293         /* Don't start the coda unless both queues are on */
2294         if (!(ctx->streamon_out & ctx->streamon_cap))
2295                 return 0;
2296
2297         /* Allow decoder device_run with no new buffers queued */
2298         if (ctx->inst_type == CODA_INST_DECODER)
2299                 v4l2_m2m_set_src_buffered(ctx->fh.m2m_ctx, true);
2300
2301         ctx->gopcounter = ctx->params.gop_size - 1;
2302         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2303         dst_fourcc = q_data_dst->fourcc;
2304
2305         ctx->codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
2306                                      q_data_dst->fourcc);
2307         if (!ctx->codec) {
2308                 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
2309                 return -EINVAL;
2310         }
2311
2312         /* Allocate per-instance buffers */
2313         ret = coda_alloc_context_buffers(ctx, q_data_src);
2314         if (ret < 0)
2315                 return ret;
2316
2317         if (ctx->inst_type == CODA_INST_DECODER) {
2318                 mutex_lock(&dev->coda_mutex);
2319                 ret = coda_start_decoding(ctx);
2320                 mutex_unlock(&dev->coda_mutex);
2321                 if (ret == -EAGAIN)
2322                         return 0;
2323                 else if (ret < 0)
2324                         return ret;
2325         } else {
2326                 ret = coda_start_encoding(ctx);
2327         }
2328
2329         ctx->initialized = 1;
2330         return ret;
2331 }
2332
2333 static int coda_start_encoding(struct coda_ctx *ctx)
2334 {
2335         struct coda_dev *dev = ctx->dev;
2336         struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
2337         struct coda_q_data *q_data_src, *q_data_dst;
2338         u32 bitstream_buf, bitstream_size;
2339         struct vb2_buffer *buf;
2340         int gamma, ret, value;
2341         u32 dst_fourcc;
2342
2343         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2344         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2345         dst_fourcc = q_data_dst->fourcc;
2346
2347         buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
2348         bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
2349         bitstream_size = q_data_dst->sizeimage;
2350
2351         if (!coda_is_initialized(dev)) {
2352                 v4l2_err(v4l2_dev, "coda is not initialized.\n");
2353                 return -EFAULT;
2354         }
2355
2356         mutex_lock(&dev->coda_mutex);
2357
2358         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
2359         coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
2360         coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
2361         switch (dev->devtype->product) {
2362         case CODA_DX6:
2363                 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
2364                         CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
2365                 break;
2366         case CODA_960:
2367                 coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
2368                 /* fallthrough */
2369         case CODA_7541:
2370                 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
2371                         CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
2372                 break;
2373         }
2374
2375         value = coda_read(dev, CODA_REG_BIT_FRAME_MEM_CTRL);
2376         value &= ~(1 << 2 | 0x7 << 9);
2377         ctx->frame_mem_ctrl = value;
2378         coda_write(dev, value, CODA_REG_BIT_FRAME_MEM_CTRL);
2379
2380         if (dev->devtype->product == CODA_DX6) {
2381                 /* Configure the coda */
2382                 coda_write(dev, dev->iram.paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
2383         }
2384
2385         /* Could set rotation here if needed */
2386         switch (dev->devtype->product) {
2387         case CODA_DX6:
2388                 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
2389                 value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
2390                 break;
2391         case CODA_7541:
2392                 if (dst_fourcc == V4L2_PIX_FMT_H264) {
2393                         value = (round_up(q_data_src->width, 16) &
2394                                  CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
2395                         value |= (round_up(q_data_src->height, 16) &
2396                                   CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
2397                         break;
2398                 }
2399                 /* fallthrough */
2400         case CODA_960:
2401                 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
2402                 value |= (q_data_src->height & CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
2403         }
2404         coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
2405         coda_write(dev, ctx->params.framerate,
2406                    CODA_CMD_ENC_SEQ_SRC_F_RATE);
2407
2408         ctx->params.codec_mode = ctx->codec->mode;
2409         switch (dst_fourcc) {
2410         case V4L2_PIX_FMT_MPEG4:
2411                 if (dev->devtype->product == CODA_960)
2412                         coda_write(dev, CODA9_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
2413                 else
2414                         coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
2415                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
2416                 break;
2417         case V4L2_PIX_FMT_H264:
2418                 if (dev->devtype->product == CODA_960)
2419                         coda_write(dev, CODA9_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
2420                 else
2421                         coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
2422                 if (ctx->params.h264_deblk_enabled) {
2423                         value = ((ctx->params.h264_deblk_alpha &
2424                                   CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK) <<
2425                                  CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) |
2426                                 ((ctx->params.h264_deblk_beta &
2427                                   CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) <<
2428                                  CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET);
2429                 } else {
2430                         value = 1 << CODA_264PARAM_DISABLEDEBLK_OFFSET;
2431                 }
2432                 coda_write(dev, value, CODA_CMD_ENC_SEQ_264_PARA);
2433                 break;
2434         default:
2435                 v4l2_err(v4l2_dev,
2436                          "dst format (0x%08x) invalid.\n", dst_fourcc);
2437                 ret = -EINVAL;
2438                 goto out;
2439         }
2440
2441         switch (ctx->params.slice_mode) {
2442         case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
2443                 value = 0;
2444                 break;
2445         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
2446                 value  = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
2447                 value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
2448                 value |=  1 & CODA_SLICING_MODE_MASK;
2449                 break;
2450         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
2451                 value  = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
2452                 value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
2453                 value |=  1 & CODA_SLICING_MODE_MASK;
2454                 break;
2455         }
2456         coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
2457         value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
2458         coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
2459
2460         if (ctx->params.bitrate) {
2461                 /* Rate control enabled */
2462                 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
2463                 value |=  1 & CODA_RATECONTROL_ENABLE_MASK;
2464                 if (dev->devtype->product == CODA_960)
2465                         value |= BIT(31); /* disable autoskip */
2466         } else {
2467                 value = 0;
2468         }
2469         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
2470
2471         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
2472         coda_write(dev, ctx->params.intra_refresh,
2473                    CODA_CMD_ENC_SEQ_INTRA_REFRESH);
2474
2475         coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
2476         coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
2477
2478
2479         value = 0;
2480         if (dev->devtype->product == CODA_960)
2481                 gamma = CODA9_DEFAULT_GAMMA;
2482         else
2483                 gamma = CODA_DEFAULT_GAMMA;
2484         if (gamma > 0) {
2485                 coda_write(dev, (gamma & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET,
2486                            CODA_CMD_ENC_SEQ_RC_GAMMA);
2487         }
2488
2489         if (ctx->params.h264_min_qp || ctx->params.h264_max_qp) {
2490                 coda_write(dev,
2491                            ctx->params.h264_min_qp << CODA_QPMIN_OFFSET |
2492                            ctx->params.h264_max_qp << CODA_QPMAX_OFFSET,
2493                            CODA_CMD_ENC_SEQ_RC_QP_MIN_MAX);
2494         }
2495         if (dev->devtype->product == CODA_960) {
2496                 if (ctx->params.h264_max_qp)
2497                         value |= 1 << CODA9_OPTION_RCQPMAX_OFFSET;
2498                 if (CODA_DEFAULT_GAMMA > 0)
2499                         value |= 1 << CODA9_OPTION_GAMMA_OFFSET;
2500         } else {
2501                 if (CODA_DEFAULT_GAMMA > 0) {
2502                         if (dev->devtype->product == CODA_DX6)
2503                                 value |= 1 << CODADX6_OPTION_GAMMA_OFFSET;
2504                         else
2505                                 value |= 1 << CODA7_OPTION_GAMMA_OFFSET;
2506                 }
2507                 if (ctx->params.h264_min_qp)
2508                         value |= 1 << CODA7_OPTION_RCQPMIN_OFFSET;
2509                 if (ctx->params.h264_max_qp)
2510                         value |= 1 << CODA7_OPTION_RCQPMAX_OFFSET;
2511         }
2512         coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
2513
2514         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_INTERVAL_MODE);
2515
2516         coda_setup_iram(ctx);
2517
2518         if (dst_fourcc == V4L2_PIX_FMT_H264) {
2519                 switch (dev->devtype->product) {
2520                 case CODA_DX6:
2521                         value = FMO_SLICE_SAVE_BUF_SIZE << 7;
2522                         coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
2523                         break;
2524                 case CODA_7541:
2525                         coda_write(dev, ctx->iram_info.search_ram_paddr,
2526                                         CODA7_CMD_ENC_SEQ_SEARCH_BASE);
2527                         coda_write(dev, ctx->iram_info.search_ram_size,
2528                                         CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
2529                         break;
2530                 case CODA_960:
2531                         coda_write(dev, 0, CODA9_CMD_ENC_SEQ_ME_OPTION);
2532                         coda_write(dev, 0, CODA9_CMD_ENC_SEQ_INTRA_WEIGHT);
2533                 }
2534         }
2535
2536         ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
2537         if (ret < 0) {
2538                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
2539                 goto out;
2540         }
2541
2542         if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
2543                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
2544                 ret = -EFAULT;
2545                 goto out;
2546         }
2547
2548         if (dev->devtype->product == CODA_960)
2549                 ctx->num_internal_frames = 4;
2550         else
2551                 ctx->num_internal_frames = 2;
2552         ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
2553         if (ret < 0) {
2554                 v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
2555                 goto out;
2556         }
2557
2558         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
2559         coda_write(dev, q_data_src->bytesperline,
2560                         CODA_CMD_SET_FRAME_BUF_STRIDE);
2561         if (dev->devtype->product == CODA_7541) {
2562                 coda_write(dev, q_data_src->bytesperline,
2563                                 CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
2564         }
2565         if (dev->devtype->product != CODA_DX6) {
2566                 coda_write(dev, ctx->iram_info.buf_bit_use,
2567                                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
2568                 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
2569                                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
2570                 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
2571                                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
2572                 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
2573                                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
2574                 coda_write(dev, ctx->iram_info.buf_ovl_use,
2575                                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
2576                 if (dev->devtype->product == CODA_960) {
2577                         coda_write(dev, ctx->iram_info.buf_btp_use,
2578                                         CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
2579
2580                         /* FIXME */
2581                         coda_write(dev, ctx->internal_frames[2].paddr, CODA9_CMD_SET_FRAME_SUBSAMP_A);
2582                         coda_write(dev, ctx->internal_frames[3].paddr, CODA9_CMD_SET_FRAME_SUBSAMP_B);
2583                 }
2584         }
2585
2586         ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
2587         if (ret < 0) {
2588                 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
2589                 goto out;
2590         }
2591
2592         /* Save stream headers */
2593         buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
2594         switch (dst_fourcc) {
2595         case V4L2_PIX_FMT_H264:
2596                 /*
2597                  * Get SPS in the first frame and copy it to an
2598                  * intermediate buffer.
2599                  */
2600                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
2601                                          &ctx->vpu_header[0][0],
2602                                          &ctx->vpu_header_size[0]);
2603                 if (ret < 0)
2604                         goto out;
2605
2606                 /*
2607                  * Get PPS in the first frame and copy it to an
2608                  * intermediate buffer.
2609                  */
2610                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
2611                                          &ctx->vpu_header[1][0],
2612                                          &ctx->vpu_header_size[1]);
2613                 if (ret < 0)
2614                         goto out;
2615
2616                 /*
2617                  * Length of H.264 headers is variable and thus it might not be
2618                  * aligned for the coda to append the encoded frame. In that is
2619                  * the case a filler NAL must be added to header 2.
2620                  */
2621                 ctx->vpu_header_size[2] = coda_h264_padding(
2622                                         (ctx->vpu_header_size[0] +
2623                                          ctx->vpu_header_size[1]),
2624                                          ctx->vpu_header[2]);
2625                 break;
2626         case V4L2_PIX_FMT_MPEG4:
2627                 /*
2628                  * Get VOS in the first frame and copy it to an
2629                  * intermediate buffer
2630                  */
2631                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
2632                                          &ctx->vpu_header[0][0],
2633                                          &ctx->vpu_header_size[0]);
2634                 if (ret < 0)
2635                         goto out;
2636
2637                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
2638                                          &ctx->vpu_header[1][0],
2639                                          &ctx->vpu_header_size[1]);
2640                 if (ret < 0)
2641                         goto out;
2642
2643                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
2644                                          &ctx->vpu_header[2][0],
2645                                          &ctx->vpu_header_size[2]);
2646                 if (ret < 0)
2647                         goto out;
2648                 break;
2649         default:
2650                 /* No more formats need to save headers at the moment */
2651                 break;
2652         }
2653
2654 out:
2655         mutex_unlock(&dev->coda_mutex);
2656         return ret;
2657 }
2658
2659 static void coda_stop_streaming(struct vb2_queue *q)
2660 {
2661         struct coda_ctx *ctx = vb2_get_drv_priv(q);
2662         struct coda_dev *dev = ctx->dev;
2663
2664         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
2665                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2666                          "%s: output\n", __func__);
2667                 ctx->streamon_out = 0;
2668
2669                 if (ctx->inst_type == CODA_INST_DECODER &&
2670                     coda_isbusy(dev) && ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX)) {
2671                         /* if this decoder instance is running, set the stream end flag */
2672                         if (dev->devtype->product == CODA_960) {
2673                                 u32 val = coda_read(dev, CODA_REG_BIT_BIT_STREAM_PARAM);
2674
2675                                 val |= CODA_BIT_STREAM_END_FLAG;
2676                                 coda_write(dev, val, CODA_REG_BIT_BIT_STREAM_PARAM);
2677                                 ctx->bit_stream_param = val;
2678                         }
2679                 }
2680                 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
2681
2682                 ctx->isequence = 0;
2683         } else {
2684                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2685                          "%s: capture\n", __func__);
2686                 ctx->streamon_cap = 0;
2687
2688                 ctx->osequence = 0;
2689                 ctx->sequence_offset = 0;
2690         }
2691
2692         if (!ctx->streamon_out && !ctx->streamon_cap) {
2693                 struct coda_timestamp *ts;
2694
2695                 while (!list_empty(&ctx->timestamp_list)) {
2696                         ts = list_first_entry(&ctx->timestamp_list,
2697                                               struct coda_timestamp, list);
2698                         list_del(&ts->list);
2699                         kfree(ts);
2700                 }
2701                 kfifo_init(&ctx->bitstream_fifo,
2702                         ctx->bitstream.vaddr, ctx->bitstream.size);
2703                 ctx->runcounter = 0;
2704         }
2705 }
2706
2707 static struct vb2_ops coda_qops = {
2708         .queue_setup            = coda_queue_setup,
2709         .buf_prepare            = coda_buf_prepare,
2710         .buf_queue              = coda_buf_queue,
2711         .start_streaming        = coda_start_streaming,
2712         .stop_streaming         = coda_stop_streaming,
2713         .wait_prepare           = vb2_ops_wait_prepare,
2714         .wait_finish            = vb2_ops_wait_finish,
2715 };
2716
2717 static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
2718 {
2719         struct coda_ctx *ctx =
2720                         container_of(ctrl->handler, struct coda_ctx, ctrls);
2721
2722         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2723                  "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
2724
2725         switch (ctrl->id) {
2726         case V4L2_CID_HFLIP:
2727                 if (ctrl->val)
2728                         ctx->params.rot_mode |= CODA_MIR_HOR;
2729                 else
2730                         ctx->params.rot_mode &= ~CODA_MIR_HOR;
2731                 break;
2732         case V4L2_CID_VFLIP:
2733                 if (ctrl->val)
2734                         ctx->params.rot_mode |= CODA_MIR_VER;
2735                 else
2736                         ctx->params.rot_mode &= ~CODA_MIR_VER;
2737                 break;
2738         case V4L2_CID_MPEG_VIDEO_BITRATE:
2739                 ctx->params.bitrate = ctrl->val / 1000;
2740                 break;
2741         case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
2742                 ctx->params.gop_size = ctrl->val;
2743                 break;
2744         case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
2745                 ctx->params.h264_intra_qp = ctrl->val;
2746                 break;
2747         case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
2748                 ctx->params.h264_inter_qp = ctrl->val;
2749                 break;
2750         case V4L2_CID_MPEG_VIDEO_H264_MIN_QP:
2751                 ctx->params.h264_min_qp = ctrl->val;
2752                 break;
2753         case V4L2_CID_MPEG_VIDEO_H264_MAX_QP:
2754                 ctx->params.h264_max_qp = ctrl->val;
2755                 break;
2756         case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA:
2757                 ctx->params.h264_deblk_alpha = ctrl->val;
2758                 break;
2759         case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA:
2760                 ctx->params.h264_deblk_beta = ctrl->val;
2761                 break;
2762         case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE:
2763                 ctx->params.h264_deblk_enabled = (ctrl->val ==
2764                                 V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED);
2765                 break;
2766         case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
2767                 ctx->params.mpeg4_intra_qp = ctrl->val;
2768                 break;
2769         case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
2770                 ctx->params.mpeg4_inter_qp = ctrl->val;
2771                 break;
2772         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
2773                 ctx->params.slice_mode = ctrl->val;
2774                 break;
2775         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
2776                 ctx->params.slice_max_mb = ctrl->val;
2777                 break;
2778         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
2779                 ctx->params.slice_max_bits = ctrl->val * 8;
2780                 break;
2781         case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
2782                 break;
2783         case V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB:
2784                 ctx->params.intra_refresh = ctrl->val;
2785                 break;
2786         default:
2787                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2788                         "Invalid control, id=%d, val=%d\n",
2789                         ctrl->id, ctrl->val);
2790                 return -EINVAL;
2791         }
2792
2793         return 0;
2794 }
2795
2796 static struct v4l2_ctrl_ops coda_ctrl_ops = {
2797         .s_ctrl = coda_s_ctrl,
2798 };
2799
2800 static int coda_ctrls_setup(struct coda_ctx *ctx)
2801 {
2802         v4l2_ctrl_handler_init(&ctx->ctrls, 9);
2803
2804         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2805                 V4L2_CID_HFLIP, 0, 1, 1, 0);
2806         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2807                 V4L2_CID_VFLIP, 0, 1, 1, 0);
2808         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2809                 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
2810         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2811                 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
2812         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2813                 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 0, 51, 1, 25);
2814         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2815                 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 0, 51, 1, 25);
2816         if (ctx->dev->devtype->product != CODA_960) {
2817                 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2818                         V4L2_CID_MPEG_VIDEO_H264_MIN_QP, 0, 51, 1, 12);
2819         }
2820         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2821                 V4L2_CID_MPEG_VIDEO_H264_MAX_QP, 0, 51, 1, 51);
2822         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2823                 V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA, 0, 15, 1, 0);
2824         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2825                 V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA, 0, 15, 1, 0);
2826         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2827                 V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE,
2828                 V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED, 0x0,
2829                 V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED);
2830         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2831                 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
2832         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2833                 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
2834         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2835                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
2836                 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0,
2837                 V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE);
2838         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2839                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
2840         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2841                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1, 500);
2842         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2843                 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
2844                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
2845                 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
2846                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
2847         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2848                 V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB, 0, 1920 * 1088 / 256, 1, 0);
2849
2850         if (ctx->ctrls.error) {
2851                 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
2852                         ctx->ctrls.error);
2853                 return -EINVAL;
2854         }
2855
2856         return v4l2_ctrl_handler_setup(&ctx->ctrls);
2857 }
2858
2859 static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
2860                       struct vb2_queue *dst_vq)
2861 {
2862         struct coda_ctx *ctx = priv;
2863         int ret;
2864
2865         src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
2866         src_vq->io_modes = VB2_DMABUF | VB2_MMAP;
2867         src_vq->drv_priv = ctx;
2868         src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
2869         src_vq->ops = &coda_qops;
2870         src_vq->mem_ops = &vb2_dma_contig_memops;
2871         src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
2872         src_vq->lock = &ctx->dev->dev_mutex;
2873
2874         ret = vb2_queue_init(src_vq);
2875         if (ret)
2876                 return ret;
2877
2878         dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2879         dst_vq->io_modes = VB2_DMABUF | VB2_MMAP;
2880         dst_vq->drv_priv = ctx;
2881         dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
2882         dst_vq->ops = &coda_qops;
2883         dst_vq->mem_ops = &vb2_dma_contig_memops;
2884         dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
2885         dst_vq->lock = &ctx->dev->dev_mutex;
2886
2887         return vb2_queue_init(dst_vq);
2888 }
2889
2890 static int coda_next_free_instance(struct coda_dev *dev)
2891 {
2892         int idx = ffz(dev->instance_mask);
2893
2894         if ((idx < 0) ||
2895             (dev->devtype->product == CODA_DX6 && idx > CODADX6_MAX_INSTANCES))
2896                 return -EBUSY;
2897
2898         return idx;
2899 }
2900
2901 static int coda_open(struct file *file)
2902 {
2903         struct coda_dev *dev = video_drvdata(file);
2904         struct coda_ctx *ctx = NULL;
2905         char *name;
2906         int ret;
2907         int idx;
2908
2909         ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
2910         if (!ctx)
2911                 return -ENOMEM;
2912
2913         idx = coda_next_free_instance(dev);
2914         if (idx < 0) {
2915                 ret = idx;
2916                 goto err_coda_max;
2917         }
2918         set_bit(idx, &dev->instance_mask);
2919
2920         name = kasprintf(GFP_KERNEL, "context%d", idx);
2921         ctx->debugfs_entry = debugfs_create_dir(name, dev->debugfs_root);
2922         kfree(name);
2923
2924         init_completion(&ctx->completion);
2925         INIT_WORK(&ctx->pic_run_work, coda_pic_run_work);
2926         INIT_WORK(&ctx->seq_end_work, coda_seq_end_work);
2927         v4l2_fh_init(&ctx->fh, video_devdata(file));
2928         file->private_data = &ctx->fh;
2929         v4l2_fh_add(&ctx->fh);
2930         ctx->dev = dev;
2931         ctx->idx = idx;
2932         switch (dev->devtype->product) {
2933         case CODA_7541:
2934         case CODA_960:
2935                 ctx->reg_idx = 0;
2936                 break;
2937         default:
2938                 ctx->reg_idx = idx;
2939         }
2940
2941         /* Power up and upload firmware if necessary */
2942         ret = pm_runtime_get_sync(&dev->plat_dev->dev);
2943         if (ret < 0) {
2944                 v4l2_err(&dev->v4l2_dev, "failed to power up: %d\n", ret);
2945                 goto err_pm_get;
2946         }
2947
2948         ret = clk_prepare_enable(dev->clk_per);
2949         if (ret)
2950                 goto err_clk_per;
2951
2952         ret = clk_prepare_enable(dev->clk_ahb);
2953         if (ret)
2954                 goto err_clk_ahb;
2955
2956         set_default_params(ctx);
2957         ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
2958                                          &coda_queue_init);
2959         if (IS_ERR(ctx->fh.m2m_ctx)) {
2960                 ret = PTR_ERR(ctx->fh.m2m_ctx);
2961
2962                 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
2963                          __func__, ret);
2964                 goto err_ctx_init;
2965         }
2966
2967         ret = coda_ctrls_setup(ctx);
2968         if (ret) {
2969                 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
2970                 goto err_ctrls_setup;
2971         }
2972
2973         ctx->fh.ctrl_handler = &ctx->ctrls;
2974
2975         ret = coda_alloc_context_buf(ctx, &ctx->parabuf, CODA_PARA_BUF_SIZE,
2976                                      "parabuf");
2977         if (ret < 0) {
2978                 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
2979                 goto err_dma_alloc;
2980         }
2981
2982         ctx->bitstream.size = CODA_MAX_FRAME_SIZE;
2983         ctx->bitstream.vaddr = dma_alloc_writecombine(&dev->plat_dev->dev,
2984                         ctx->bitstream.size, &ctx->bitstream.paddr, GFP_KERNEL);
2985         if (!ctx->bitstream.vaddr) {
2986                 v4l2_err(&dev->v4l2_dev, "failed to allocate bitstream ringbuffer");
2987                 ret = -ENOMEM;
2988                 goto err_dma_writecombine;
2989         }
2990         kfifo_init(&ctx->bitstream_fifo,
2991                 ctx->bitstream.vaddr, ctx->bitstream.size);
2992         mutex_init(&ctx->bitstream_mutex);
2993         mutex_init(&ctx->buffer_mutex);
2994         INIT_LIST_HEAD(&ctx->timestamp_list);
2995
2996         coda_lock(ctx);
2997         list_add(&ctx->list, &dev->instances);
2998         coda_unlock(ctx);
2999
3000         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
3001                  ctx->idx, ctx);
3002
3003         return 0;
3004
3005 err_dma_writecombine:
3006         coda_free_context_buffers(ctx);
3007         if (ctx->dev->devtype->product == CODA_DX6)
3008                 coda_free_aux_buf(dev, &ctx->workbuf);
3009         coda_free_aux_buf(dev, &ctx->parabuf);
3010 err_dma_alloc:
3011         v4l2_ctrl_handler_free(&ctx->ctrls);
3012 err_ctrls_setup:
3013         v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
3014 err_ctx_init:
3015         clk_disable_unprepare(dev->clk_ahb);
3016 err_clk_ahb:
3017         clk_disable_unprepare(dev->clk_per);
3018 err_clk_per:
3019         pm_runtime_put_sync(&dev->plat_dev->dev);
3020 err_pm_get:
3021         v4l2_fh_del(&ctx->fh);
3022         v4l2_fh_exit(&ctx->fh);
3023         clear_bit(ctx->idx, &dev->instance_mask);
3024 err_coda_max:
3025         kfree(ctx);
3026         return ret;
3027 }
3028
3029 static int coda_release(struct file *file)
3030 {
3031         struct coda_dev *dev = video_drvdata(file);
3032         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
3033
3034         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
3035                  ctx);
3036
3037         debugfs_remove_recursive(ctx->debugfs_entry);
3038
3039         /* If this instance is running, call .job_abort and wait for it to end */
3040         v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
3041
3042         /* In case the instance was not running, we still need to call SEQ_END */
3043         if (ctx->initialized) {
3044                 queue_work(dev->workqueue, &ctx->seq_end_work);
3045                 flush_work(&ctx->seq_end_work);
3046         }
3047
3048         coda_free_framebuffers(ctx);
3049
3050         coda_lock(ctx);
3051         list_del(&ctx->list);
3052         coda_unlock(ctx);
3053
3054         dma_free_writecombine(&dev->plat_dev->dev, ctx->bitstream.size,
3055                 ctx->bitstream.vaddr, ctx->bitstream.paddr);
3056         coda_free_context_buffers(ctx);
3057         if (ctx->dev->devtype->product == CODA_DX6)
3058                 coda_free_aux_buf(dev, &ctx->workbuf);
3059
3060         coda_free_aux_buf(dev, &ctx->parabuf);
3061         v4l2_ctrl_handler_free(&ctx->ctrls);
3062         clk_disable_unprepare(dev->clk_ahb);
3063         clk_disable_unprepare(dev->clk_per);
3064         pm_runtime_put_sync(&dev->plat_dev->dev);
3065         v4l2_fh_del(&ctx->fh);
3066         v4l2_fh_exit(&ctx->fh);
3067         clear_bit(ctx->idx, &dev->instance_mask);
3068         kfree(ctx);
3069
3070         return 0;
3071 }
3072
3073 static const struct v4l2_file_operations coda_fops = {
3074         .owner          = THIS_MODULE,
3075         .open           = coda_open,
3076         .release        = coda_release,
3077         .poll           = v4l2_m2m_fop_poll,
3078         .unlocked_ioctl = video_ioctl2,
3079         .mmap           = v4l2_m2m_fop_mmap,
3080 };
3081
3082 static void coda_finish_decode(struct coda_ctx *ctx)
3083 {
3084         struct coda_dev *dev = ctx->dev;
3085         struct coda_q_data *q_data_src;
3086         struct coda_q_data *q_data_dst;
3087         struct vb2_buffer *dst_buf;
3088         struct coda_timestamp *ts;
3089         int width, height;
3090         int decoded_idx;
3091         int display_idx;
3092         u32 src_fourcc;
3093         int success;
3094         u32 err_mb;
3095         u32 val;
3096
3097         dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
3098
3099         /* Update kfifo out pointer from coda bitstream read pointer */
3100         coda_kfifo_sync_from_device(ctx);
3101
3102         /*
3103          * in stream-end mode, the read pointer can overshoot the write pointer
3104          * by up to 512 bytes
3105          */
3106         if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
3107                 if (coda_get_bitstream_payload(ctx) >= 0x100000 - 512)
3108                         kfifo_init(&ctx->bitstream_fifo,
3109                                 ctx->bitstream.vaddr, ctx->bitstream.size);
3110         }
3111
3112         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
3113         src_fourcc = q_data_src->fourcc;
3114
3115         val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
3116         if (val != 1)
3117                 pr_err("DEC_PIC_SUCCESS = %d\n", val);
3118
3119         success = val & 0x1;
3120         if (!success)
3121                 v4l2_err(&dev->v4l2_dev, "decode failed\n");
3122
3123         if (src_fourcc == V4L2_PIX_FMT_H264) {
3124                 if (val & (1 << 3))
3125                         v4l2_err(&dev->v4l2_dev,
3126                                  "insufficient PS buffer space (%d bytes)\n",
3127                                  ctx->psbuf.size);
3128                 if (val & (1 << 2))
3129                         v4l2_err(&dev->v4l2_dev,
3130                                  "insufficient slice buffer space (%d bytes)\n",
3131                                  ctx->slicebuf.size);
3132         }
3133
3134         val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
3135         width = (val >> 16) & 0xffff;
3136         height = val & 0xffff;
3137
3138         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
3139
3140         /* frame crop information */
3141         if (src_fourcc == V4L2_PIX_FMT_H264) {
3142                 u32 left_right;
3143                 u32 top_bottom;
3144
3145                 left_right = coda_read(dev, CODA_RET_DEC_PIC_CROP_LEFT_RIGHT);
3146                 top_bottom = coda_read(dev, CODA_RET_DEC_PIC_CROP_TOP_BOTTOM);
3147
3148                 if (left_right == 0xffffffff && top_bottom == 0xffffffff) {
3149                         /* Keep current crop information */
3150                 } else {
3151                         struct v4l2_rect *rect = &q_data_dst->rect;
3152
3153                         rect->left = left_right >> 16 & 0xffff;
3154                         rect->top = top_bottom >> 16 & 0xffff;
3155                         rect->width = width - rect->left -
3156                                       (left_right & 0xffff);
3157                         rect->height = height - rect->top -
3158                                        (top_bottom & 0xffff);
3159                 }
3160         } else {
3161                 /* no cropping */
3162         }
3163
3164         err_mb = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
3165         if (err_mb > 0)
3166                 v4l2_err(&dev->v4l2_dev,
3167                          "errors in %d macroblocks\n", err_mb);
3168
3169         if (dev->devtype->product == CODA_7541) {
3170                 val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
3171                 if (val == 0) {
3172                         /* not enough bitstream data */
3173                         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
3174                                  "prescan failed: %d\n", val);
3175                         ctx->hold = true;
3176                         return;
3177                 }
3178         }
3179
3180         ctx->frm_dis_flg = coda_read(dev, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
3181
3182         /*
3183          * The previous display frame was copied out by the rotator,
3184          * now it can be overwritten again
3185          */
3186         if (ctx->display_idx >= 0 &&
3187             ctx->display_idx < ctx->num_internal_frames) {
3188                 ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
3189                 coda_write(dev, ctx->frm_dis_flg,
3190                                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
3191         }
3192
3193         /*
3194          * The index of the last decoded frame, not necessarily in
3195          * display order, and the index of the next display frame.
3196          * The latter could have been decoded in a previous run.
3197          */
3198         decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
3199         display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
3200
3201         if (decoded_idx == -1) {
3202                 /* no frame was decoded, but we might have a display frame */
3203                 if (display_idx >= 0 && display_idx < ctx->num_internal_frames)
3204                         ctx->sequence_offset++;
3205                 else if (ctx->display_idx < 0)
3206                         ctx->hold = true;
3207         } else if (decoded_idx == -2) {
3208                 /* no frame was decoded, we still return the remaining buffers */
3209         } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
3210                 v4l2_err(&dev->v4l2_dev,
3211                          "decoded frame index out of range: %d\n", decoded_idx);
3212         } else {
3213                 ts = list_first_entry(&ctx->timestamp_list,
3214                                       struct coda_timestamp, list);
3215                 list_del(&ts->list);
3216                 val = coda_read(dev, CODA_RET_DEC_PIC_FRAME_NUM) - 1;
3217                 val -= ctx->sequence_offset;
3218                 if (val != (ts->sequence & 0xffff)) {
3219                         v4l2_err(&dev->v4l2_dev,
3220                                  "sequence number mismatch (%d(%d) != %d)\n",
3221                                  val, ctx->sequence_offset, ts->sequence);
3222                 }
3223                 ctx->frame_timestamps[decoded_idx] = *ts;
3224                 kfree(ts);
3225
3226                 val = coda_read(dev, CODA_RET_DEC_PIC_TYPE) & 0x7;
3227                 if (val == 0)
3228                         ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_KEYFRAME;
3229                 else if (val == 1)
3230                         ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_PFRAME;
3231                 else
3232                         ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_BFRAME;
3233
3234                 ctx->frame_errors[decoded_idx] = err_mb;
3235         }
3236
3237         if (display_idx == -1) {
3238                 /*
3239                  * no more frames to be decoded, but there could still
3240                  * be rotator output to dequeue
3241                  */
3242                 ctx->hold = true;
3243         } else if (display_idx == -3) {
3244                 /* possibly prescan failure */
3245         } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
3246                 v4l2_err(&dev->v4l2_dev,
3247                          "presentation frame index out of range: %d\n",
3248                          display_idx);
3249         }
3250
3251         /* If a frame was copied out, return it */
3252         if (ctx->display_idx >= 0 &&
3253             ctx->display_idx < ctx->num_internal_frames) {
3254                 dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
3255                 dst_buf->v4l2_buf.sequence = ctx->osequence++;
3256
3257                 dst_buf->v4l2_buf.flags &= ~(V4L2_BUF_FLAG_KEYFRAME |
3258                                              V4L2_BUF_FLAG_PFRAME |
3259                                              V4L2_BUF_FLAG_BFRAME);
3260                 dst_buf->v4l2_buf.flags |= ctx->frame_types[ctx->display_idx];
3261                 ts = &ctx->frame_timestamps[ctx->display_idx];
3262                 dst_buf->v4l2_buf.timecode = ts->timecode;
3263                 dst_buf->v4l2_buf.timestamp = ts->timestamp;
3264
3265                 vb2_set_plane_payload(dst_buf, 0, width * height * 3 / 2);
3266
3267                 v4l2_m2m_buf_done(dst_buf, ctx->frame_errors[display_idx] ?
3268                                   VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
3269
3270                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
3271                         "job finished: decoding frame (%d) (%s)\n",
3272                         dst_buf->v4l2_buf.sequence,
3273                         (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
3274                         "KEYFRAME" : "PFRAME");
3275         } else {
3276                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
3277                         "job finished: no frame decoded\n");
3278         }
3279
3280         /* The rotator will copy the current display frame next time */
3281         ctx->display_idx = display_idx;
3282 }
3283
3284 static void coda_finish_encode(struct coda_ctx *ctx)
3285 {
3286         struct vb2_buffer *src_buf, *dst_buf;
3287         struct coda_dev *dev = ctx->dev;
3288         u32 wr_ptr, start_ptr;
3289
3290         src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
3291         dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
3292
3293         /* Get results from the coda */
3294         start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
3295         wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
3296
3297         /* Calculate bytesused field */
3298         if (dst_buf->v4l2_buf.sequence == 0) {
3299                 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr +
3300                                         ctx->vpu_header_size[0] +
3301                                         ctx->vpu_header_size[1] +
3302                                         ctx->vpu_header_size[2]);
3303         } else {
3304                 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr);
3305         }
3306
3307         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
3308                  wr_ptr - start_ptr);
3309
3310         coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
3311         coda_read(dev, CODA_RET_ENC_PIC_FLAG);
3312
3313         if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0) {
3314                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
3315                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
3316         } else {
3317                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
3318                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
3319         }
3320
3321         dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp;
3322         dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
3323         dst_buf->v4l2_buf.flags |=
3324                 src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
3325         dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode;
3326
3327         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
3328
3329         dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
3330         v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
3331
3332         ctx->gopcounter--;
3333         if (ctx->gopcounter < 0)
3334                 ctx->gopcounter = ctx->params.gop_size - 1;
3335
3336         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
3337                 "job finished: encoding frame (%d) (%s)\n",
3338                 dst_buf->v4l2_buf.sequence,
3339                 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
3340                 "KEYFRAME" : "PFRAME");
3341 }
3342
3343 static irqreturn_t coda_irq_handler(int irq, void *data)
3344 {
3345         struct coda_dev *dev = data;
3346         struct coda_ctx *ctx;
3347
3348         /* read status register to attend the IRQ */
3349         coda_read(dev, CODA_REG_BIT_INT_STATUS);
3350         coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
3351                       CODA_REG_BIT_INT_CLEAR);
3352
3353         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
3354         if (ctx == NULL) {
3355                 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
3356                 mutex_unlock(&dev->coda_mutex);
3357                 return IRQ_HANDLED;
3358         }
3359
3360         if (ctx->aborting) {
3361                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
3362                          "task has been aborted\n");
3363         }
3364
3365         if (coda_isbusy(ctx->dev)) {
3366                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
3367                          "coda is still busy!!!!\n");
3368                 return IRQ_NONE;
3369         }
3370
3371         complete(&ctx->completion);
3372
3373         return IRQ_HANDLED;
3374 }
3375
3376 static u32 coda_supported_firmwares[] = {
3377         CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
3378         CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
3379         CODA_FIRMWARE_VERNUM(CODA_960, 2, 1, 5),
3380 };
3381
3382 static bool coda_firmware_supported(u32 vernum)
3383 {
3384         int i;
3385
3386         for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
3387                 if (vernum == coda_supported_firmwares[i])
3388                         return true;
3389         return false;
3390 }
3391
3392 static int coda_hw_init(struct coda_dev *dev)
3393 {
3394         u32 data;
3395         u16 *p;
3396         int i, ret;
3397
3398         ret = clk_prepare_enable(dev->clk_per);
3399         if (ret)
3400                 goto err_clk_per;
3401
3402         ret = clk_prepare_enable(dev->clk_ahb);
3403         if (ret)
3404                 goto err_clk_ahb;
3405
3406         if (dev->rstc)
3407                 reset_control_reset(dev->rstc);
3408
3409         /*
3410          * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
3411          * The 16-bit chars in the code buffer are in memory access
3412          * order, re-sort them to CODA order for register download.
3413          * Data in this SRAM survives a reboot.
3414          */
3415         p = (u16 *)dev->codebuf.vaddr;
3416         if (dev->devtype->product == CODA_DX6) {
3417                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++)  {
3418                         data = CODA_DOWN_ADDRESS_SET(i) |
3419                                 CODA_DOWN_DATA_SET(p[i ^ 1]);
3420                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
3421                 }
3422         } else {
3423                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
3424                         data = CODA_DOWN_ADDRESS_SET(i) |
3425                                 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
3426                                                         3 - (i % 4)]);
3427                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
3428                 }
3429         }
3430
3431         /* Clear registers */
3432         for (i = 0; i < 64; i++)
3433                 coda_write(dev, 0, CODA_REG_BIT_CODE_BUF_ADDR + i * 4);
3434
3435         /* Tell the BIT where to find everything it needs */
3436         if (dev->devtype->product == CODA_960 ||
3437             dev->devtype->product == CODA_7541) {
3438                 coda_write(dev, dev->tempbuf.paddr,
3439                                 CODA_REG_BIT_TEMP_BUF_ADDR);
3440                 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
3441         } else {
3442                 coda_write(dev, dev->workbuf.paddr,
3443                               CODA_REG_BIT_WORK_BUF_ADDR);
3444         }
3445         coda_write(dev, dev->codebuf.paddr,
3446                       CODA_REG_BIT_CODE_BUF_ADDR);
3447         coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
3448
3449         /* Set default values */
3450         switch (dev->devtype->product) {
3451         case CODA_DX6:
3452                 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
3453                 break;
3454         default:
3455                 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
3456         }
3457         if (dev->devtype->product == CODA_960)
3458                 coda_write(dev, 1 << 12, CODA_REG_BIT_FRAME_MEM_CTRL);
3459         else
3460                 coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
3461
3462         if (dev->devtype->product != CODA_DX6)
3463                 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
3464
3465         coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
3466                       CODA_REG_BIT_INT_ENABLE);
3467
3468         /* Reset VPU and start processor */
3469         data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
3470         data |= CODA_REG_RESET_ENABLE;
3471         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
3472         udelay(10);
3473         data &= ~CODA_REG_RESET_ENABLE;
3474         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
3475         coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
3476
3477         clk_disable_unprepare(dev->clk_ahb);
3478         clk_disable_unprepare(dev->clk_per);
3479
3480         return 0;
3481
3482 err_clk_ahb:
3483         clk_disable_unprepare(dev->clk_per);
3484 err_clk_per:
3485         return ret;
3486 }
3487
3488 static int coda_check_firmware(struct coda_dev *dev)
3489 {
3490         u16 product, major, minor, release;
3491         u32 data;
3492         int ret;
3493
3494         ret = clk_prepare_enable(dev->clk_per);
3495         if (ret)
3496                 goto err_clk_per;
3497
3498         ret = clk_prepare_enable(dev->clk_ahb);
3499         if (ret)
3500                 goto err_clk_ahb;
3501
3502         coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
3503         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
3504         coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
3505         coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
3506         coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
3507         if (coda_wait_timeout(dev)) {
3508                 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
3509                 ret = -EIO;
3510                 goto err_run_cmd;
3511         }
3512
3513         if (dev->devtype->product == CODA_960) {
3514                 data = coda_read(dev, CODA9_CMD_FIRMWARE_CODE_REV);
3515                 v4l2_info(&dev->v4l2_dev, "Firmware code revision: %d\n",
3516                           data);
3517         }
3518
3519         /* Check we are compatible with the loaded firmware */
3520         data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
3521         product = CODA_FIRMWARE_PRODUCT(data);
3522         major = CODA_FIRMWARE_MAJOR(data);
3523         minor = CODA_FIRMWARE_MINOR(data);
3524         release = CODA_FIRMWARE_RELEASE(data);
3525
3526         clk_disable_unprepare(dev->clk_per);
3527         clk_disable_unprepare(dev->clk_ahb);
3528
3529         if (product != dev->devtype->product) {
3530                 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
3531                          " Version: %u.%u.%u\n",
3532                          coda_product_name(dev->devtype->product),
3533                          coda_product_name(product), major, minor, release);
3534                 return -EINVAL;
3535         }
3536
3537         v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
3538                   coda_product_name(product));
3539
3540         if (coda_firmware_supported(data)) {
3541                 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
3542                           major, minor, release);
3543         } else {
3544                 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
3545                           "%u.%u.%u\n", major, minor, release);
3546         }
3547
3548         return 0;
3549
3550 err_run_cmd:
3551         clk_disable_unprepare(dev->clk_ahb);
3552 err_clk_ahb:
3553         clk_disable_unprepare(dev->clk_per);
3554 err_clk_per:
3555         return ret;
3556 }
3557
3558 static void coda_fw_callback(const struct firmware *fw, void *context)
3559 {
3560         struct coda_dev *dev = context;
3561         struct platform_device *pdev = dev->plat_dev;
3562         int ret;
3563
3564         if (!fw) {
3565                 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
3566                 return;
3567         }
3568
3569         /* allocate auxiliary per-device code buffer for the BIT processor */
3570         ret = coda_alloc_aux_buf(dev, &dev->codebuf, fw->size, "codebuf",
3571                                  dev->debugfs_root);
3572         if (ret < 0) {
3573                 dev_err(&pdev->dev, "failed to allocate code buffer\n");
3574                 return;
3575         }
3576
3577         /* Copy the whole firmware image to the code buffer */
3578         memcpy(dev->codebuf.vaddr, fw->data, fw->size);
3579         release_firmware(fw);
3580
3581         if (pm_runtime_enabled(&pdev->dev) && pdev->dev.pm_domain) {
3582                 /*
3583                  * Enabling power temporarily will cause coda_hw_init to be
3584                  * called via coda_runtime_resume by the pm domain.
3585                  */
3586                 ret = pm_runtime_get_sync(&dev->plat_dev->dev);
3587                 if (ret < 0) {
3588                         v4l2_err(&dev->v4l2_dev, "failed to power on: %d\n",
3589                                  ret);
3590                         return;
3591                 }
3592
3593                 ret = coda_check_firmware(dev);
3594                 if (ret < 0)
3595                         return;
3596
3597                 pm_runtime_put_sync(&dev->plat_dev->dev);
3598         } else {
3599                 /*
3600                  * If runtime pm is disabled or pm_domain is not set,
3601                  * initialize once manually.
3602                  */
3603                 ret = coda_hw_init(dev);
3604                 if (ret < 0) {
3605                         v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
3606                         return;
3607                 }
3608
3609                 ret = coda_check_firmware(dev);
3610                 if (ret < 0)
3611                         return;
3612         }
3613
3614         dev->vfd.fops   = &coda_fops,
3615         dev->vfd.ioctl_ops      = &coda_ioctl_ops;
3616         dev->vfd.release        = video_device_release_empty,
3617         dev->vfd.lock   = &dev->dev_mutex;
3618         dev->vfd.v4l2_dev       = &dev->v4l2_dev;
3619         dev->vfd.vfl_dir        = VFL_DIR_M2M;
3620         snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
3621         video_set_drvdata(&dev->vfd, dev);
3622
3623         dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
3624         if (IS_ERR(dev->alloc_ctx)) {
3625                 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
3626                 return;
3627         }
3628
3629         dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
3630         if (IS_ERR(dev->m2m_dev)) {
3631                 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
3632                 goto rel_ctx;
3633         }
3634
3635         ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
3636         if (ret) {
3637                 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
3638                 goto rel_m2m;
3639         }
3640         v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
3641                   dev->vfd.num);
3642
3643         return;
3644
3645 rel_m2m:
3646         v4l2_m2m_release(dev->m2m_dev);
3647 rel_ctx:
3648         vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
3649 }
3650
3651 static int coda_firmware_request(struct coda_dev *dev)
3652 {
3653         char *fw = dev->devtype->firmware;
3654
3655         dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
3656                 coda_product_name(dev->devtype->product));
3657
3658         return request_firmware_nowait(THIS_MODULE, true,
3659                 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
3660 }
3661
3662 enum coda_platform {
3663         CODA_IMX27,
3664         CODA_IMX53,
3665         CODA_IMX6Q,
3666         CODA_IMX6DL,
3667 };
3668
3669 static const struct coda_devtype coda_devdata[] = {
3670         [CODA_IMX27] = {
3671                 .firmware     = "v4l-codadx6-imx27.bin",
3672                 .product      = CODA_DX6,
3673                 .codecs       = codadx6_codecs,
3674                 .num_codecs   = ARRAY_SIZE(codadx6_codecs),
3675                 .workbuf_size = 288 * 1024 + FMO_SLICE_SAVE_BUF_SIZE * 8 * 1024,
3676                 .iram_size    = 0xb000,
3677         },
3678         [CODA_IMX53] = {
3679                 .firmware     = "v4l-coda7541-imx53.bin",
3680                 .product      = CODA_7541,
3681                 .codecs       = coda7_codecs,
3682                 .num_codecs   = ARRAY_SIZE(coda7_codecs),
3683                 .workbuf_size = 128 * 1024,
3684                 .tempbuf_size = 304 * 1024,
3685                 .iram_size    = 0x14000,
3686         },
3687         [CODA_IMX6Q] = {
3688                 .firmware     = "v4l-coda960-imx6q.bin",
3689                 .product      = CODA_960,
3690                 .codecs       = coda9_codecs,
3691                 .num_codecs   = ARRAY_SIZE(coda9_codecs),
3692                 .workbuf_size = 80 * 1024,
3693                 .tempbuf_size = 204 * 1024,
3694                 .iram_size    = 0x21000,
3695         },
3696         [CODA_IMX6DL] = {
3697                 .firmware     = "v4l-coda960-imx6dl.bin",
3698                 .product      = CODA_960,
3699                 .codecs       = coda9_codecs,
3700                 .num_codecs   = ARRAY_SIZE(coda9_codecs),
3701                 .workbuf_size = 80 * 1024,
3702                 .tempbuf_size = 204 * 1024,
3703                 .iram_size    = 0x20000,
3704         },
3705 };
3706
3707 static struct platform_device_id coda_platform_ids[] = {
3708         { .name = "coda-imx27", .driver_data = CODA_IMX27 },
3709         { .name = "coda-imx53", .driver_data = CODA_IMX53 },
3710         { /* sentinel */ }
3711 };
3712 MODULE_DEVICE_TABLE(platform, coda_platform_ids);
3713
3714 #ifdef CONFIG_OF
3715 static const struct of_device_id coda_dt_ids[] = {
3716         { .compatible = "fsl,imx27-vpu", .data = &coda_devdata[CODA_IMX27] },
3717         { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
3718         { .compatible = "fsl,imx6q-vpu", .data = &coda_devdata[CODA_IMX6Q] },
3719         { .compatible = "fsl,imx6dl-vpu", .data = &coda_devdata[CODA_IMX6DL] },
3720         { /* sentinel */ }
3721 };
3722 MODULE_DEVICE_TABLE(of, coda_dt_ids);
3723 #endif
3724
3725 static int coda_probe(struct platform_device *pdev)
3726 {
3727         const struct of_device_id *of_id =
3728                         of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
3729         const struct platform_device_id *pdev_id;
3730         struct coda_platform_data *pdata = pdev->dev.platform_data;
3731         struct device_node *np = pdev->dev.of_node;
3732         struct gen_pool *pool;
3733         struct coda_dev *dev;
3734         struct resource *res;
3735         int ret, irq;
3736
3737         dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
3738         if (!dev) {
3739                 dev_err(&pdev->dev, "Not enough memory for %s\n",
3740                         CODA_NAME);
3741                 return -ENOMEM;
3742         }
3743
3744         spin_lock_init(&dev->irqlock);
3745         INIT_LIST_HEAD(&dev->instances);
3746
3747         dev->plat_dev = pdev;
3748         dev->clk_per = devm_clk_get(&pdev->dev, "per");
3749         if (IS_ERR(dev->clk_per)) {
3750                 dev_err(&pdev->dev, "Could not get per clock\n");
3751                 return PTR_ERR(dev->clk_per);
3752         }
3753
3754         dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
3755         if (IS_ERR(dev->clk_ahb)) {
3756                 dev_err(&pdev->dev, "Could not get ahb clock\n");
3757                 return PTR_ERR(dev->clk_ahb);
3758         }
3759
3760         /* Get  memory for physical registers */
3761         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3762         dev->regs_base = devm_ioremap_resource(&pdev->dev, res);
3763         if (IS_ERR(dev->regs_base))
3764                 return PTR_ERR(dev->regs_base);
3765
3766         /* IRQ */
3767         irq = platform_get_irq(pdev, 0);
3768         if (irq < 0) {
3769                 dev_err(&pdev->dev, "failed to get irq resource\n");
3770                 return irq;
3771         }
3772
3773         ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, coda_irq_handler,
3774                         IRQF_ONESHOT, dev_name(&pdev->dev), dev);
3775         if (ret < 0) {
3776                 dev_err(&pdev->dev, "failed to request irq: %d\n", ret);
3777                 return ret;
3778         }
3779
3780         dev->rstc = devm_reset_control_get_optional(&pdev->dev, NULL);
3781         if (IS_ERR(dev->rstc)) {
3782                 ret = PTR_ERR(dev->rstc);
3783                 if (ret == -ENOENT || ret == -ENOSYS) {
3784                         dev->rstc = NULL;
3785                 } else {
3786                         dev_err(&pdev->dev, "failed get reset control: %d\n", ret);
3787                         return ret;
3788                 }
3789         }
3790
3791         /* Get IRAM pool from device tree or platform data */
3792         pool = of_get_named_gen_pool(np, "iram", 0);
3793         if (!pool && pdata)
3794                 pool = dev_get_gen_pool(pdata->iram_dev);
3795         if (!pool) {
3796                 dev_err(&pdev->dev, "iram pool not available\n");
3797                 return -ENOMEM;
3798         }
3799         dev->iram_pool = pool;
3800
3801         ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
3802         if (ret)
3803                 return ret;
3804
3805         mutex_init(&dev->dev_mutex);
3806         mutex_init(&dev->coda_mutex);
3807
3808         pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
3809
3810         if (of_id) {
3811                 dev->devtype = of_id->data;
3812         } else if (pdev_id) {
3813                 dev->devtype = &coda_devdata[pdev_id->driver_data];
3814         } else {
3815                 v4l2_device_unregister(&dev->v4l2_dev);
3816                 return -EINVAL;
3817         }
3818
3819         dev->debugfs_root = debugfs_create_dir("coda", NULL);
3820         if (!dev->debugfs_root)
3821                 dev_warn(&pdev->dev, "failed to create debugfs root\n");
3822
3823         /* allocate auxiliary per-device buffers for the BIT processor */
3824         if (dev->devtype->product == CODA_DX6) {
3825                 ret = coda_alloc_aux_buf(dev, &dev->workbuf,
3826                                          dev->devtype->workbuf_size, "workbuf",
3827                                          dev->debugfs_root);
3828                 if (ret < 0) {
3829                         dev_err(&pdev->dev, "failed to allocate work buffer\n");
3830                         v4l2_device_unregister(&dev->v4l2_dev);
3831                         return ret;
3832                 }
3833         }
3834
3835         if (dev->devtype->tempbuf_size) {
3836                 ret = coda_alloc_aux_buf(dev, &dev->tempbuf,
3837                                          dev->devtype->tempbuf_size, "tempbuf",
3838                                          dev->debugfs_root);
3839                 if (ret < 0) {
3840                         dev_err(&pdev->dev, "failed to allocate temp buffer\n");
3841                         v4l2_device_unregister(&dev->v4l2_dev);
3842                         return ret;
3843                 }
3844         }
3845
3846         dev->iram.size = dev->devtype->iram_size;
3847         dev->iram.vaddr = gen_pool_dma_alloc(dev->iram_pool, dev->iram.size,
3848                                              &dev->iram.paddr);
3849         if (!dev->iram.vaddr) {
3850                 dev_err(&pdev->dev, "unable to alloc iram\n");
3851                 return -ENOMEM;
3852         }
3853
3854         dev->iram.blob.data = dev->iram.vaddr;
3855         dev->iram.blob.size = dev->iram.size;
3856         dev->iram.dentry = debugfs_create_blob("iram", 0644, dev->debugfs_root,
3857                                                &dev->iram.blob);
3858
3859         dev->workqueue = alloc_workqueue("coda", WQ_UNBOUND | WQ_MEM_RECLAIM, 1);
3860         if (!dev->workqueue) {
3861                 dev_err(&pdev->dev, "unable to alloc workqueue\n");
3862                 return -ENOMEM;
3863         }
3864
3865         platform_set_drvdata(pdev, dev);
3866
3867         pm_runtime_enable(&pdev->dev);
3868
3869         return coda_firmware_request(dev);
3870 }
3871
3872 static int coda_remove(struct platform_device *pdev)
3873 {
3874         struct coda_dev *dev = platform_get_drvdata(pdev);
3875
3876         video_unregister_device(&dev->vfd);
3877         if (dev->m2m_dev)
3878                 v4l2_m2m_release(dev->m2m_dev);
3879         pm_runtime_disable(&pdev->dev);
3880         if (dev->alloc_ctx)
3881                 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
3882         v4l2_device_unregister(&dev->v4l2_dev);
3883         destroy_workqueue(dev->workqueue);
3884         if (dev->iram.vaddr)
3885                 gen_pool_free(dev->iram_pool, (unsigned long)dev->iram.vaddr,
3886                               dev->iram.size);
3887         coda_free_aux_buf(dev, &dev->codebuf);
3888         coda_free_aux_buf(dev, &dev->tempbuf);
3889         coda_free_aux_buf(dev, &dev->workbuf);
3890         debugfs_remove_recursive(dev->debugfs_root);
3891         return 0;
3892 }
3893
3894 #ifdef CONFIG_PM_RUNTIME
3895 static int coda_runtime_resume(struct device *dev)
3896 {
3897         struct coda_dev *cdev = dev_get_drvdata(dev);
3898         int ret = 0;
3899
3900         if (dev->pm_domain && cdev->codebuf.vaddr) {
3901                 ret = coda_hw_init(cdev);
3902                 if (ret)
3903                         v4l2_err(&cdev->v4l2_dev, "HW initialization failed\n");
3904         }
3905
3906         return ret;
3907 }
3908 #endif
3909
3910 static const struct dev_pm_ops coda_pm_ops = {
3911         SET_RUNTIME_PM_OPS(NULL, coda_runtime_resume, NULL)
3912 };
3913
3914 static struct platform_driver coda_driver = {
3915         .probe  = coda_probe,
3916         .remove = coda_remove,
3917         .driver = {
3918                 .name   = CODA_NAME,
3919                 .owner  = THIS_MODULE,
3920                 .of_match_table = of_match_ptr(coda_dt_ids),
3921                 .pm     = &coda_pm_ops,
3922         },
3923         .id_table = coda_platform_ids,
3924 };
3925
3926 module_platform_driver(coda_driver);
3927
3928 MODULE_LICENSE("GPL");
3929 MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
3930 MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");