2 * vsp1_drm.c -- R-Car VSP1 DRM API
4 * Copyright (C) 2015 Renesas Electronics Corporation
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/device.h>
15 #include <linux/slab.h>
17 #include <media/media-entity.h>
18 #include <media/v4l2-subdev.h>
19 #include <media/vsp1.h>
26 #include "vsp1_pipe.h"
27 #include "vsp1_rwpf.h"
30 /* -----------------------------------------------------------------------------
34 void vsp1_drm_display_start(struct vsp1_device *vsp1)
36 vsp1_dlm_irq_display_start(vsp1->drm->pipe.output->dlm);
39 /* -----------------------------------------------------------------------------
43 int vsp1_du_init(struct device *dev)
45 struct vsp1_device *vsp1 = dev_get_drvdata(dev);
52 EXPORT_SYMBOL_GPL(vsp1_du_init);
55 * vsp1_du_setup_lif - Setup the output part of the VSP pipeline
56 * @dev: the VSP device
57 * @width: output frame width in pixels
58 * @height: output frame height in pixels
60 * Configure the output part of VSP DRM pipeline for the given frame @width and
61 * @height. This sets up formats on the BRU source pad, the WPF0 sink and source
62 * pads, and the LIF sink pad.
64 * As the media bus code on the BRU source pad is conditioned by the
65 * configuration of the BRU sink 0 pad, we also set up the formats on all BRU
66 * sinks, even if the configuration will be overwritten later by
67 * vsp1_du_setup_rpf(). This ensures that the BRU configuration is set to a well
70 * Return 0 on success or a negative error code on failure.
72 int vsp1_du_setup_lif(struct device *dev, unsigned int width,
75 struct vsp1_device *vsp1 = dev_get_drvdata(dev);
76 struct vsp1_pipeline *pipe = &vsp1->drm->pipe;
77 struct vsp1_bru *bru = vsp1->bru;
78 struct v4l2_subdev_format format;
82 dev_dbg(vsp1->dev, "%s: configuring LIF with format %ux%u\n",
83 __func__, width, height);
85 if (width == 0 || height == 0) {
86 /* Zero width or height means the CRTC is being disabled, stop
87 * the pipeline and turn the light off.
89 ret = vsp1_pipeline_stop(pipe);
90 if (ret == -ETIMEDOUT)
91 dev_err(vsp1->dev, "DRM pipeline stop timeout\n");
93 media_entity_pipeline_stop(&pipe->output->entity.subdev.entity);
95 for (i = 0; i < bru->entity.source_pad; ++i) {
96 vsp1->drm->inputs[i].enabled = false;
97 bru->inputs[i].rpf = NULL;
98 pipe->inputs[i] = NULL;
101 pipe->num_inputs = 0;
103 vsp1_dlm_reset(pipe->output->dlm);
104 vsp1_device_put(vsp1);
106 dev_dbg(vsp1->dev, "%s: pipeline disabled\n", __func__);
111 /* Configure the format at the BRU sinks and propagate it through the
114 memset(&format, 0, sizeof(format));
115 format.which = V4L2_SUBDEV_FORMAT_ACTIVE;
117 for (i = 0; i < bru->entity.source_pad; ++i) {
120 format.format.width = width;
121 format.format.height = height;
122 format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32;
123 format.format.field = V4L2_FIELD_NONE;
125 ret = v4l2_subdev_call(&bru->entity.subdev, pad,
126 set_fmt, NULL, &format);
130 dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on BRU pad %u\n",
131 __func__, format.format.width, format.format.height,
132 format.format.code, i);
135 format.pad = bru->entity.source_pad;
136 format.format.width = width;
137 format.format.height = height;
138 format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32;
139 format.format.field = V4L2_FIELD_NONE;
141 ret = v4l2_subdev_call(&bru->entity.subdev, pad, set_fmt, NULL,
146 dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on BRU pad %u\n",
147 __func__, format.format.width, format.format.height,
148 format.format.code, i);
150 format.pad = RWPF_PAD_SINK;
151 ret = v4l2_subdev_call(&vsp1->wpf[0]->entity.subdev, pad, set_fmt, NULL,
156 dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on WPF0 sink\n",
157 __func__, format.format.width, format.format.height,
160 format.pad = RWPF_PAD_SOURCE;
161 ret = v4l2_subdev_call(&vsp1->wpf[0]->entity.subdev, pad, get_fmt, NULL,
166 dev_dbg(vsp1->dev, "%s: got format %ux%u (%x) on WPF0 source\n",
167 __func__, format.format.width, format.format.height,
170 format.pad = LIF_PAD_SINK;
171 ret = v4l2_subdev_call(&vsp1->lif->entity.subdev, pad, set_fmt, NULL,
176 dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on LIF sink\n",
177 __func__, format.format.width, format.format.height,
180 /* Verify that the format at the output of the pipeline matches the
181 * requested frame size and media bus code.
183 if (format.format.width != width || format.format.height != height ||
184 format.format.code != MEDIA_BUS_FMT_ARGB8888_1X32) {
185 dev_dbg(vsp1->dev, "%s: format mismatch\n", __func__);
189 /* Mark the pipeline as streaming and enable the VSP1. This will store
190 * the pipeline pointer in all entities, which the s_stream handlers
191 * will need. We don't start the entities themselves right at this point
192 * as there's no plane configured yet, so we can't start processing
195 ret = vsp1_device_get(vsp1);
199 ret = media_entity_pipeline_start(&pipe->output->entity.subdev.entity,
202 dev_dbg(vsp1->dev, "%s: pipeline start failed\n", __func__);
203 vsp1_device_put(vsp1);
207 dev_dbg(vsp1->dev, "%s: pipeline enabled\n", __func__);
211 EXPORT_SYMBOL_GPL(vsp1_du_setup_lif);
214 * vsp1_du_atomic_begin - Prepare for an atomic update
215 * @dev: the VSP device
217 void vsp1_du_atomic_begin(struct device *dev)
219 struct vsp1_device *vsp1 = dev_get_drvdata(dev);
220 struct vsp1_pipeline *pipe = &vsp1->drm->pipe;
222 vsp1->drm->num_inputs = pipe->num_inputs;
224 /* Prepare the display list. */
225 pipe->dl = vsp1_dl_list_get(pipe->output->dlm);
227 EXPORT_SYMBOL_GPL(vsp1_du_atomic_begin);
230 * vsp1_du_atomic_update - Setup one RPF input of the VSP pipeline
231 * @dev: the VSP device
232 * @rpf_index: index of the RPF to setup (0-based)
233 * @pixelformat: V4L2 pixel format for the RPF memory input
234 * @pitch: number of bytes per line in the image stored in memory
235 * @mem: DMA addresses of the memory buffers (one per plane)
236 * @src: the source crop rectangle for the RPF
237 * @dst: the destination compose rectangle for the BRU input
238 * @alpha: global alpha value for the input
239 * @zpos: the Z-order position of the input
241 * Configure the VSP to perform composition of the image referenced by @mem
242 * through RPF @rpf_index, using the @src crop rectangle and the @dst
243 * composition rectangle. The Z-order is configurable with higher @zpos values
246 * Image format as stored in memory is expressed as a V4L2 @pixelformat value.
247 * As a special case, setting the pixel format to 0 will disable the RPF. The
248 * @pitch, @mem, @src and @dst parameters are ignored in that case. Calling the
249 * function on a disabled RPF is allowed.
251 * The memory pitch is configurable to allow for padding at end of lines, or
252 * simple for images that extend beyond the crop rectangle boundaries. The
253 * @pitch value is expressed in bytes and applies to all planes for multiplanar
256 * The source memory buffer is referenced by the DMA address of its planes in
257 * the @mem array. Up to two planes are supported. The second plane DMA address
258 * is ignored for formats using a single plane.
260 * This function isn't reentrant, the caller needs to serialize calls.
262 * Return 0 on success or a negative error code on failure.
264 int vsp1_du_atomic_update_ext(struct device *dev, unsigned int rpf_index,
265 u32 pixelformat, unsigned int pitch,
266 dma_addr_t mem[2], const struct v4l2_rect *src,
267 const struct v4l2_rect *dst, unsigned int alpha,
270 struct vsp1_device *vsp1 = dev_get_drvdata(dev);
271 const struct vsp1_format_info *fmtinfo;
272 struct vsp1_rwpf *rpf;
274 if (rpf_index >= vsp1->info->rpf_count)
277 rpf = vsp1->rpf[rpf_index];
279 if (pixelformat == 0) {
280 dev_dbg(vsp1->dev, "%s: RPF%u: disable requested\n", __func__,
283 vsp1->drm->inputs[rpf_index].enabled = false;
288 "%s: RPF%u: (%u,%u)/%ux%u -> (%u,%u)/%ux%u (%08x), pitch %u dma { %pad, %pad } zpos %u\n",
290 src->left, src->top, src->width, src->height,
291 dst->left, dst->top, dst->width, dst->height,
292 pixelformat, pitch, &mem[0], &mem[1], zpos);
294 /* Store the format, stride, memory buffer address, crop and compose
295 * rectangles and Z-order position and for the input.
297 fmtinfo = vsp1_get_format_info(pixelformat);
299 dev_dbg(vsp1->dev, "Unsupport pixel format %08x for RPF\n",
304 rpf->fmtinfo = fmtinfo;
305 rpf->format.num_planes = fmtinfo->planes;
306 rpf->format.plane_fmt[0].bytesperline = pitch;
307 rpf->format.plane_fmt[1].bytesperline = pitch;
310 rpf->mem.addr[0] = mem[0];
311 rpf->mem.addr[1] = mem[1];
312 rpf->mem.addr[2] = 0;
314 vsp1->drm->inputs[rpf_index].crop = *src;
315 vsp1->drm->inputs[rpf_index].compose = *dst;
316 vsp1->drm->inputs[rpf_index].zpos = zpos;
317 vsp1->drm->inputs[rpf_index].enabled = true;
321 EXPORT_SYMBOL_GPL(vsp1_du_atomic_update_ext);
323 static int vsp1_du_setup_rpf_pipe(struct vsp1_device *vsp1,
324 struct vsp1_rwpf *rpf, unsigned int bru_input)
326 struct v4l2_subdev_selection sel;
327 struct v4l2_subdev_format format;
328 const struct v4l2_rect *crop;
331 /* Configure the format on the RPF sink pad and propagate it up to the
334 crop = &vsp1->drm->inputs[rpf->entity.index].crop;
336 memset(&format, 0, sizeof(format));
337 format.which = V4L2_SUBDEV_FORMAT_ACTIVE;
338 format.pad = RWPF_PAD_SINK;
339 format.format.width = crop->width + crop->left;
340 format.format.height = crop->height + crop->top;
341 format.format.code = rpf->fmtinfo->mbus;
342 format.format.field = V4L2_FIELD_NONE;
344 ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_fmt, NULL,
350 "%s: set format %ux%u (%x) on RPF%u sink\n",
351 __func__, format.format.width, format.format.height,
352 format.format.code, rpf->entity.index);
354 memset(&sel, 0, sizeof(sel));
355 sel.which = V4L2_SUBDEV_FORMAT_ACTIVE;
356 sel.pad = RWPF_PAD_SINK;
357 sel.target = V4L2_SEL_TGT_CROP;
360 ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_selection, NULL,
366 "%s: set selection (%u,%u)/%ux%u on RPF%u sink\n",
367 __func__, sel.r.left, sel.r.top, sel.r.width, sel.r.height,
370 /* RPF source, hardcode the format to ARGB8888 to turn on format
371 * conversion if needed.
373 format.pad = RWPF_PAD_SOURCE;
375 ret = v4l2_subdev_call(&rpf->entity.subdev, pad, get_fmt, NULL,
381 "%s: got format %ux%u (%x) on RPF%u source\n",
382 __func__, format.format.width, format.format.height,
383 format.format.code, rpf->entity.index);
385 format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32;
387 ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_fmt, NULL,
392 /* BRU sink, propagate the format from the RPF source. */
393 format.pad = bru_input;
395 ret = v4l2_subdev_call(&vsp1->bru->entity.subdev, pad, set_fmt, NULL,
400 dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on BRU pad %u\n",
401 __func__, format.format.width, format.format.height,
402 format.format.code, format.pad);
405 sel.target = V4L2_SEL_TGT_COMPOSE;
406 sel.r = vsp1->drm->inputs[rpf->entity.index].compose;
408 ret = v4l2_subdev_call(&vsp1->bru->entity.subdev, pad, set_selection,
414 "%s: set selection (%u,%u)/%ux%u on BRU pad %u\n",
415 __func__, sel.r.left, sel.r.top, sel.r.width, sel.r.height,
421 static unsigned int rpf_zpos(struct vsp1_device *vsp1, struct vsp1_rwpf *rpf)
423 return vsp1->drm->inputs[rpf->entity.index].zpos;
427 * vsp1_du_atomic_flush - Commit an atomic update
428 * @dev: the VSP device
430 void vsp1_du_atomic_flush(struct device *dev)
432 struct vsp1_device *vsp1 = dev_get_drvdata(dev);
433 struct vsp1_pipeline *pipe = &vsp1->drm->pipe;
434 struct vsp1_rwpf *inputs[VSP1_MAX_RPF] = { NULL, };
435 struct vsp1_entity *entity;
440 /* Count the number of enabled inputs and sort them by Z-order. */
441 pipe->num_inputs = 0;
443 for (i = 0; i < vsp1->info->rpf_count; ++i) {
444 struct vsp1_rwpf *rpf = vsp1->rpf[i];
447 if (!vsp1->drm->inputs[i].enabled) {
448 pipe->inputs[i] = NULL;
452 pipe->inputs[i] = rpf;
454 /* Insert the RPF in the sorted RPFs array. */
455 for (j = pipe->num_inputs++; j > 0; --j) {
456 if (rpf_zpos(vsp1, inputs[j-1]) <= rpf_zpos(vsp1, rpf))
458 inputs[j] = inputs[j-1];
464 /* Setup the RPF input pipeline for every enabled input. */
465 for (i = 0; i < vsp1->info->num_bru_inputs; ++i) {
466 struct vsp1_rwpf *rpf = inputs[i];
469 vsp1->bru->inputs[i].rpf = NULL;
473 vsp1->bru->inputs[i].rpf = rpf;
475 rpf->entity.sink_pad = i;
477 dev_dbg(vsp1->dev, "%s: connecting RPF.%u to BRU:%u\n",
478 __func__, rpf->entity.index, i);
480 ret = vsp1_du_setup_rpf_pipe(vsp1, rpf, i);
483 "%s: failed to setup RPF.%u\n",
484 __func__, rpf->entity.index);
487 /* Configure all entities in the pipeline. */
488 list_for_each_entry(entity, &pipe->entities, list_pipe) {
489 /* Disconnect unused RPFs from the pipeline. */
490 if (entity->type == VSP1_ENTITY_RPF) {
491 struct vsp1_rwpf *rpf = to_rwpf(&entity->subdev);
493 if (!pipe->inputs[rpf->entity.index]) {
494 vsp1_dl_list_write(pipe->dl, entity->route->reg,
495 VI6_DPR_NODE_UNUSED);
500 vsp1_entity_route_setup(entity, pipe->dl);
502 if (entity->ops->configure)
503 entity->ops->configure(entity, pipe, pipe->dl);
505 /* The memory buffer address must be applied after configuring
506 * the RPF to make sure the crop offset are computed.
508 if (entity->type == VSP1_ENTITY_RPF)
509 vsp1_rwpf_set_memory(to_rwpf(&entity->subdev),
513 vsp1_dl_list_commit(pipe->dl);
516 /* Start or stop the pipeline if needed. */
517 if (!vsp1->drm->num_inputs && pipe->num_inputs) {
518 vsp1_write(vsp1, VI6_DISP_IRQ_STA, 0);
519 vsp1_write(vsp1, VI6_DISP_IRQ_ENB, VI6_DISP_IRQ_ENB_DSTE);
520 spin_lock_irqsave(&pipe->irqlock, flags);
521 vsp1_pipeline_run(pipe);
522 spin_unlock_irqrestore(&pipe->irqlock, flags);
523 } else if (vsp1->drm->num_inputs && !pipe->num_inputs) {
524 vsp1_write(vsp1, VI6_DISP_IRQ_ENB, 0);
525 vsp1_pipeline_stop(pipe);
528 EXPORT_SYMBOL_GPL(vsp1_du_atomic_flush);
530 /* -----------------------------------------------------------------------------
534 int vsp1_drm_create_links(struct vsp1_device *vsp1)
536 const u32 flags = MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE;
540 /* VSPD instances require a BRU to perform composition and a LIF to
543 if (!vsp1->bru || !vsp1->lif)
546 for (i = 0; i < vsp1->info->rpf_count; ++i) {
547 struct vsp1_rwpf *rpf = vsp1->rpf[i];
549 ret = media_create_pad_link(&rpf->entity.subdev.entity,
551 &vsp1->bru->entity.subdev.entity,
556 rpf->entity.sink = &vsp1->bru->entity.subdev.entity;
557 rpf->entity.sink_pad = i;
560 ret = media_create_pad_link(&vsp1->bru->entity.subdev.entity,
561 vsp1->bru->entity.source_pad,
562 &vsp1->wpf[0]->entity.subdev.entity,
563 RWPF_PAD_SINK, flags);
567 vsp1->bru->entity.sink = &vsp1->wpf[0]->entity.subdev.entity;
568 vsp1->bru->entity.sink_pad = RWPF_PAD_SINK;
570 ret = media_create_pad_link(&vsp1->wpf[0]->entity.subdev.entity,
572 &vsp1->lif->entity.subdev.entity,
573 LIF_PAD_SINK, flags);
580 int vsp1_drm_init(struct vsp1_device *vsp1)
582 struct vsp1_pipeline *pipe;
585 vsp1->drm = devm_kzalloc(vsp1->dev, sizeof(*vsp1->drm), GFP_KERNEL);
589 pipe = &vsp1->drm->pipe;
591 vsp1_pipeline_init(pipe);
593 /* The DRM pipeline is static, add entities manually. */
594 for (i = 0; i < vsp1->info->rpf_count; ++i) {
595 struct vsp1_rwpf *input = vsp1->rpf[i];
597 list_add_tail(&input->entity.list_pipe, &pipe->entities);
600 list_add_tail(&vsp1->bru->entity.list_pipe, &pipe->entities);
601 list_add_tail(&vsp1->wpf[0]->entity.list_pipe, &pipe->entities);
602 list_add_tail(&vsp1->lif->entity.list_pipe, &pipe->entities);
604 pipe->bru = &vsp1->bru->entity;
605 pipe->lif = &vsp1->lif->entity;
606 pipe->output = vsp1->wpf[0];
611 void vsp1_drm_cleanup(struct vsp1_device *vsp1)