2 * vsp1_video.c -- R-Car VSP1 Video Node
4 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/list.h>
15 #include <linux/module.h>
16 #include <linux/mutex.h>
17 #include <linux/sched.h>
18 #include <linux/slab.h>
19 #include <linux/v4l2-mediabus.h>
20 #include <linux/videodev2.h>
22 #include <media/media-entity.h>
23 #include <media/v4l2-dev.h>
24 #include <media/v4l2-fh.h>
25 #include <media/v4l2-ioctl.h>
26 #include <media/v4l2-subdev.h>
27 #include <media/videobuf2-v4l2.h>
28 #include <media/videobuf2-dma-contig.h>
32 #include "vsp1_entity.h"
33 #include "vsp1_rwpf.h"
35 #include "vsp1_video.h"
37 #define VSP1_VIDEO_DEF_FORMAT V4L2_PIX_FMT_YUYV
38 #define VSP1_VIDEO_DEF_WIDTH 1024
39 #define VSP1_VIDEO_DEF_HEIGHT 768
41 #define VSP1_VIDEO_MIN_WIDTH 2U
42 #define VSP1_VIDEO_MAX_WIDTH 8190U
43 #define VSP1_VIDEO_MIN_HEIGHT 2U
44 #define VSP1_VIDEO_MAX_HEIGHT 8190U
46 /* -----------------------------------------------------------------------------
50 static const struct vsp1_format_info vsp1_video_formats[] = {
51 { V4L2_PIX_FMT_RGB332, MEDIA_BUS_FMT_ARGB8888_1X32,
52 VI6_FMT_RGB_332, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
53 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
54 1, { 8, 0, 0 }, false, false, 1, 1, false },
55 { V4L2_PIX_FMT_ARGB444, MEDIA_BUS_FMT_ARGB8888_1X32,
56 VI6_FMT_ARGB_4444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
58 1, { 16, 0, 0 }, false, false, 1, 1, true },
59 { V4L2_PIX_FMT_XRGB444, MEDIA_BUS_FMT_ARGB8888_1X32,
60 VI6_FMT_XRGB_4444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
62 1, { 16, 0, 0 }, false, false, 1, 1, true },
63 { V4L2_PIX_FMT_ARGB555, MEDIA_BUS_FMT_ARGB8888_1X32,
64 VI6_FMT_ARGB_1555, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
66 1, { 16, 0, 0 }, false, false, 1, 1, true },
67 { V4L2_PIX_FMT_XRGB555, MEDIA_BUS_FMT_ARGB8888_1X32,
68 VI6_FMT_XRGB_1555, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
70 1, { 16, 0, 0 }, false, false, 1, 1, false },
71 { V4L2_PIX_FMT_RGB565, MEDIA_BUS_FMT_ARGB8888_1X32,
72 VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
74 1, { 16, 0, 0 }, false, false, 1, 1, false },
75 { V4L2_PIX_FMT_BGR24, MEDIA_BUS_FMT_ARGB8888_1X32,
76 VI6_FMT_BGR_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
77 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
78 1, { 24, 0, 0 }, false, false, 1, 1, false },
79 { V4L2_PIX_FMT_RGB24, MEDIA_BUS_FMT_ARGB8888_1X32,
80 VI6_FMT_RGB_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
81 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
82 1, { 24, 0, 0 }, false, false, 1, 1, false },
83 { V4L2_PIX_FMT_ABGR32, MEDIA_BUS_FMT_ARGB8888_1X32,
84 VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS,
85 1, { 32, 0, 0 }, false, false, 1, 1, true },
86 { V4L2_PIX_FMT_XBGR32, MEDIA_BUS_FMT_ARGB8888_1X32,
87 VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS,
88 1, { 32, 0, 0 }, false, false, 1, 1, false },
89 { V4L2_PIX_FMT_ARGB32, MEDIA_BUS_FMT_ARGB8888_1X32,
90 VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
91 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
92 1, { 32, 0, 0 }, false, false, 1, 1, true },
93 { V4L2_PIX_FMT_XRGB32, MEDIA_BUS_FMT_ARGB8888_1X32,
94 VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
95 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
96 1, { 32, 0, 0 }, false, false, 1, 1, false },
97 { V4L2_PIX_FMT_UYVY, MEDIA_BUS_FMT_AYUV8_1X32,
98 VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
99 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
100 1, { 16, 0, 0 }, false, false, 2, 1, false },
101 { V4L2_PIX_FMT_VYUY, MEDIA_BUS_FMT_AYUV8_1X32,
102 VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
103 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
104 1, { 16, 0, 0 }, false, true, 2, 1, false },
105 { V4L2_PIX_FMT_YUYV, MEDIA_BUS_FMT_AYUV8_1X32,
106 VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
107 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
108 1, { 16, 0, 0 }, true, false, 2, 1, false },
109 { V4L2_PIX_FMT_YVYU, MEDIA_BUS_FMT_AYUV8_1X32,
110 VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
111 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
112 1, { 16, 0, 0 }, true, true, 2, 1, false },
113 { V4L2_PIX_FMT_NV12M, MEDIA_BUS_FMT_AYUV8_1X32,
114 VI6_FMT_Y_UV_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
115 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
116 2, { 8, 16, 0 }, false, false, 2, 2, false },
117 { V4L2_PIX_FMT_NV21M, MEDIA_BUS_FMT_AYUV8_1X32,
118 VI6_FMT_Y_UV_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
119 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
120 2, { 8, 16, 0 }, false, true, 2, 2, false },
121 { V4L2_PIX_FMT_NV16M, MEDIA_BUS_FMT_AYUV8_1X32,
122 VI6_FMT_Y_UV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
123 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
124 2, { 8, 16, 0 }, false, false, 2, 1, false },
125 { V4L2_PIX_FMT_NV61M, MEDIA_BUS_FMT_AYUV8_1X32,
126 VI6_FMT_Y_UV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
127 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
128 2, { 8, 16, 0 }, false, true, 2, 1, false },
129 { V4L2_PIX_FMT_YUV420M, MEDIA_BUS_FMT_AYUV8_1X32,
130 VI6_FMT_Y_U_V_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
131 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
132 3, { 8, 8, 8 }, false, false, 2, 2, false },
133 { V4L2_PIX_FMT_YVU420M, MEDIA_BUS_FMT_AYUV8_1X32,
134 VI6_FMT_Y_U_V_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
135 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
136 3, { 8, 8, 8 }, false, true, 2, 2, false },
137 { V4L2_PIX_FMT_YUV422M, MEDIA_BUS_FMT_AYUV8_1X32,
138 VI6_FMT_Y_U_V_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
139 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
140 3, { 8, 8, 8 }, false, false, 2, 1, false },
141 { V4L2_PIX_FMT_YVU422M, MEDIA_BUS_FMT_AYUV8_1X32,
142 VI6_FMT_Y_U_V_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
143 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
144 3, { 8, 8, 8 }, false, true, 2, 1, false },
145 { V4L2_PIX_FMT_YUV444M, MEDIA_BUS_FMT_AYUV8_1X32,
146 VI6_FMT_Y_U_V_444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
147 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
148 3, { 8, 8, 8 }, false, false, 1, 1, false },
149 { V4L2_PIX_FMT_YVU444M, MEDIA_BUS_FMT_AYUV8_1X32,
150 VI6_FMT_Y_U_V_444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
151 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
152 3, { 8, 8, 8 }, false, true, 1, 1, false },
156 * vsp1_get_format_info - Retrieve format information for a 4CC
157 * @fourcc: the format 4CC
159 * Return a pointer to the format information structure corresponding to the
160 * given V4L2 format 4CC, or NULL if no corresponding format can be found.
162 static const struct vsp1_format_info *vsp1_get_format_info(u32 fourcc)
166 for (i = 0; i < ARRAY_SIZE(vsp1_video_formats); ++i) {
167 const struct vsp1_format_info *info = &vsp1_video_formats[i];
169 if (info->fourcc == fourcc)
177 static struct v4l2_subdev *
178 vsp1_video_remote_subdev(struct media_pad *local, u32 *pad)
180 struct media_pad *remote;
182 remote = media_entity_remote_pad(local);
183 if (!remote || !is_media_entity_v4l2_subdev(remote->entity))
187 *pad = remote->index;
189 return media_entity_to_v4l2_subdev(remote->entity);
192 static int vsp1_video_verify_format(struct vsp1_video *video)
194 struct v4l2_subdev_format fmt;
195 struct v4l2_subdev *subdev;
198 subdev = vsp1_video_remote_subdev(&video->pad, &fmt.pad);
202 fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
203 ret = v4l2_subdev_call(subdev, pad, get_fmt, NULL, &fmt);
205 return ret == -ENOIOCTLCMD ? -EINVAL : ret;
207 if (video->rwpf->fmtinfo->mbus != fmt.format.code ||
208 video->rwpf->format.height != fmt.format.height ||
209 video->rwpf->format.width != fmt.format.width)
215 static int __vsp1_video_try_format(struct vsp1_video *video,
216 struct v4l2_pix_format_mplane *pix,
217 const struct vsp1_format_info **fmtinfo)
219 static const u32 xrgb_formats[][2] = {
220 { V4L2_PIX_FMT_RGB444, V4L2_PIX_FMT_XRGB444 },
221 { V4L2_PIX_FMT_RGB555, V4L2_PIX_FMT_XRGB555 },
222 { V4L2_PIX_FMT_BGR32, V4L2_PIX_FMT_XBGR32 },
223 { V4L2_PIX_FMT_RGB32, V4L2_PIX_FMT_XRGB32 },
226 const struct vsp1_format_info *info;
227 unsigned int width = pix->width;
228 unsigned int height = pix->height;
231 /* Backward compatibility: replace deprecated RGB formats by their XRGB
232 * equivalent. This selects the format older userspace applications want
233 * while still exposing the new format.
235 for (i = 0; i < ARRAY_SIZE(xrgb_formats); ++i) {
236 if (xrgb_formats[i][0] == pix->pixelformat) {
237 pix->pixelformat = xrgb_formats[i][1];
242 /* Retrieve format information and select the default format if the
243 * requested format isn't supported.
245 info = vsp1_get_format_info(pix->pixelformat);
247 info = vsp1_get_format_info(VSP1_VIDEO_DEF_FORMAT);
249 pix->pixelformat = info->fourcc;
250 pix->colorspace = V4L2_COLORSPACE_SRGB;
251 pix->field = V4L2_FIELD_NONE;
252 memset(pix->reserved, 0, sizeof(pix->reserved));
254 /* Align the width and height for YUV 4:2:2 and 4:2:0 formats. */
255 width = round_down(width, info->hsub);
256 height = round_down(height, info->vsub);
258 /* Clamp the width and height. */
259 pix->width = clamp(width, VSP1_VIDEO_MIN_WIDTH, VSP1_VIDEO_MAX_WIDTH);
260 pix->height = clamp(height, VSP1_VIDEO_MIN_HEIGHT,
261 VSP1_VIDEO_MAX_HEIGHT);
263 /* Compute and clamp the stride and image size. While not documented in
264 * the datasheet, strides not aligned to a multiple of 128 bytes result
265 * in image corruption.
267 for (i = 0; i < min(info->planes, 2U); ++i) {
268 unsigned int hsub = i > 0 ? info->hsub : 1;
269 unsigned int vsub = i > 0 ? info->vsub : 1;
270 unsigned int align = 128;
273 bpl = clamp_t(unsigned int, pix->plane_fmt[i].bytesperline,
274 pix->width / hsub * info->bpp[i] / 8,
275 round_down(65535U, align));
277 pix->plane_fmt[i].bytesperline = round_up(bpl, align);
278 pix->plane_fmt[i].sizeimage = pix->plane_fmt[i].bytesperline
279 * pix->height / vsub;
282 if (info->planes == 3) {
283 /* The second and third planes must have the same stride. */
284 pix->plane_fmt[2].bytesperline = pix->plane_fmt[1].bytesperline;
285 pix->plane_fmt[2].sizeimage = pix->plane_fmt[1].sizeimage;
288 pix->num_planes = info->planes;
296 /* -----------------------------------------------------------------------------
297 * Pipeline Management
300 static int vsp1_pipeline_validate_branch(struct vsp1_pipeline *pipe,
301 struct vsp1_rwpf *input,
302 struct vsp1_rwpf *output)
304 struct vsp1_entity *entity;
305 struct media_entity_enum ent_enum;
306 struct media_pad *pad;
308 bool bru_found = false;
310 input->location.left = 0;
311 input->location.top = 0;
313 rval = media_entity_enum_init(
314 &ent_enum, input->entity.pads[RWPF_PAD_SOURCE].graph_obj.mdev);
318 pad = media_entity_remote_pad(&input->entity.pads[RWPF_PAD_SOURCE]);
326 /* We've reached a video node, that shouldn't have happened. */
327 if (!is_media_entity_v4l2_subdev(pad->entity)) {
332 entity = to_vsp1_entity(
333 media_entity_to_v4l2_subdev(pad->entity));
335 /* A BRU is present in the pipeline, store the compose rectangle
336 * location in the input RPF for use when configuring the RPF.
338 if (entity->type == VSP1_ENTITY_BRU) {
339 struct vsp1_bru *bru = to_bru(&entity->subdev);
340 struct v4l2_rect *rect =
341 &bru->inputs[pad->index].compose;
343 bru->inputs[pad->index].rpf = input;
345 input->location.left = rect->left;
346 input->location.top = rect->top;
351 /* We've reached the WPF, we're done. */
352 if (entity->type == VSP1_ENTITY_WPF)
355 /* Ensure the branch has no loop. */
356 if (media_entity_enum_test_and_set(&ent_enum,
357 &entity->subdev.entity)) {
362 /* UDS can't be chained. */
363 if (entity->type == VSP1_ENTITY_UDS) {
370 pipe->uds_input = bru_found ? pipe->bru
374 /* Follow the source link. The link setup operations ensure
375 * that the output fan-out can't be more than one, there is thus
376 * no need to verify here that only a single source link is
379 pad = &entity->pads[entity->source_pad];
380 pad = media_entity_remote_pad(pad);
383 /* The last entity must be the output WPF. */
384 if (entity != &output->entity)
388 media_entity_enum_cleanup(&ent_enum);
393 static void __vsp1_pipeline_cleanup(struct vsp1_pipeline *pipe)
396 struct vsp1_bru *bru = to_bru(&pipe->bru->subdev);
399 for (i = 0; i < ARRAY_SIZE(bru->inputs); ++i)
400 bru->inputs[i].rpf = NULL;
403 INIT_LIST_HEAD(&pipe->entities);
404 pipe->state = VSP1_PIPELINE_STOPPED;
405 pipe->buffers_ready = 0;
407 pipe->num_inputs = 0;
414 static int vsp1_pipeline_validate(struct vsp1_pipeline *pipe,
415 struct vsp1_video *video)
417 struct media_entity_graph graph;
418 struct media_entity *entity = &video->video.entity;
419 struct media_device *mdev = entity->graph_obj.mdev;
423 mutex_lock(&mdev->graph_mutex);
425 /* Walk the graph to locate the entities and video nodes. */
426 ret = media_entity_graph_walk_init(&graph, mdev);
428 mutex_unlock(&mdev->graph_mutex);
432 media_entity_graph_walk_start(&graph, entity);
434 while ((entity = media_entity_graph_walk_next(&graph))) {
435 struct v4l2_subdev *subdev;
436 struct vsp1_rwpf *rwpf;
437 struct vsp1_entity *e;
439 if (is_media_entity_v4l2_io(entity)) {
444 subdev = media_entity_to_v4l2_subdev(entity);
445 e = to_vsp1_entity(subdev);
446 list_add_tail(&e->list_pipe, &pipe->entities);
448 if (e->type == VSP1_ENTITY_RPF) {
449 rwpf = to_rwpf(subdev);
450 pipe->inputs[pipe->num_inputs++] = rwpf;
451 rwpf->video.pipe_index = pipe->num_inputs;
452 } else if (e->type == VSP1_ENTITY_WPF) {
453 rwpf = to_rwpf(subdev);
454 pipe->output = to_rwpf(subdev);
455 rwpf->video.pipe_index = 0;
456 } else if (e->type == VSP1_ENTITY_LIF) {
458 } else if (e->type == VSP1_ENTITY_BRU) {
463 mutex_unlock(&mdev->graph_mutex);
465 media_entity_graph_walk_cleanup(&graph);
467 /* We need one output and at least one input. */
468 if (pipe->num_inputs == 0 || !pipe->output) {
473 /* Follow links downstream for each input and make sure the graph
474 * contains no loop and that all branches end at the output WPF.
476 for (i = 0; i < pipe->num_inputs; ++i) {
477 ret = vsp1_pipeline_validate_branch(pipe, pipe->inputs[i],
486 __vsp1_pipeline_cleanup(pipe);
490 static int vsp1_pipeline_init(struct vsp1_pipeline *pipe,
491 struct vsp1_video *video)
495 mutex_lock(&pipe->lock);
497 /* If we're the first user validate and initialize the pipeline. */
498 if (pipe->use_count == 0) {
499 ret = vsp1_pipeline_validate(pipe, video);
508 mutex_unlock(&pipe->lock);
512 static void vsp1_pipeline_cleanup(struct vsp1_pipeline *pipe)
514 mutex_lock(&pipe->lock);
516 /* If we're the last user clean up the pipeline. */
517 if (--pipe->use_count == 0)
518 __vsp1_pipeline_cleanup(pipe);
520 mutex_unlock(&pipe->lock);
523 static void vsp1_pipeline_run(struct vsp1_pipeline *pipe)
525 struct vsp1_device *vsp1 = pipe->output->entity.vsp1;
527 vsp1_write(vsp1, VI6_CMD(pipe->output->entity.index), VI6_CMD_STRCMD);
528 pipe->state = VSP1_PIPELINE_RUNNING;
529 pipe->buffers_ready = 0;
532 static bool vsp1_pipeline_stopped(struct vsp1_pipeline *pipe)
537 spin_lock_irqsave(&pipe->irqlock, flags);
538 stopped = pipe->state == VSP1_PIPELINE_STOPPED;
539 spin_unlock_irqrestore(&pipe->irqlock, flags);
544 static int vsp1_pipeline_stop(struct vsp1_pipeline *pipe)
546 struct vsp1_entity *entity;
550 spin_lock_irqsave(&pipe->irqlock, flags);
551 if (pipe->state == VSP1_PIPELINE_RUNNING)
552 pipe->state = VSP1_PIPELINE_STOPPING;
553 spin_unlock_irqrestore(&pipe->irqlock, flags);
555 ret = wait_event_timeout(pipe->wq, vsp1_pipeline_stopped(pipe),
556 msecs_to_jiffies(500));
557 ret = ret == 0 ? -ETIMEDOUT : 0;
559 list_for_each_entry(entity, &pipe->entities, list_pipe) {
560 if (entity->route && entity->route->reg)
561 vsp1_write(entity->vsp1, entity->route->reg,
562 VI6_DPR_NODE_UNUSED);
564 v4l2_subdev_call(&entity->subdev, video, s_stream, 0);
570 static bool vsp1_pipeline_ready(struct vsp1_pipeline *pipe)
574 mask = ((1 << pipe->num_inputs) - 1) << 1;
578 return pipe->buffers_ready == mask;
582 * vsp1_video_complete_buffer - Complete the current buffer
583 * @video: the video node
585 * This function completes the current buffer by filling its sequence number,
586 * time stamp and payload size, and hands it back to the videobuf core.
588 * When operating in DU output mode (deep pipeline to the DU through the LIF),
589 * the VSP1 needs to constantly supply frames to the display. In that case, if
590 * no other buffer is queued, reuse the one that has just been processed instead
591 * of handing it back to the videobuf core.
593 * Return the next queued buffer or NULL if the queue is empty.
595 static struct vsp1_video_buffer *
596 vsp1_video_complete_buffer(struct vsp1_video *video)
598 struct vsp1_pipeline *pipe = to_vsp1_pipeline(&video->video.entity);
599 struct vsp1_video_buffer *next = NULL;
600 struct vsp1_video_buffer *done;
604 spin_lock_irqsave(&video->irqlock, flags);
606 if (list_empty(&video->irqqueue)) {
607 spin_unlock_irqrestore(&video->irqlock, flags);
611 done = list_first_entry(&video->irqqueue,
612 struct vsp1_video_buffer, queue);
614 /* In DU output mode reuse the buffer if the list is singular. */
615 if (pipe->lif && list_is_singular(&video->irqqueue)) {
616 spin_unlock_irqrestore(&video->irqlock, flags);
620 list_del(&done->queue);
622 if (!list_empty(&video->irqqueue))
623 next = list_first_entry(&video->irqqueue,
624 struct vsp1_video_buffer, queue);
626 spin_unlock_irqrestore(&video->irqlock, flags);
628 done->buf.sequence = video->sequence++;
629 done->buf.vb2_buf.timestamp = ktime_get_ns();
630 for (i = 0; i < done->buf.vb2_buf.num_planes; ++i)
631 vb2_set_plane_payload(&done->buf.vb2_buf, i, done->length[i]);
632 vb2_buffer_done(&done->buf.vb2_buf, VB2_BUF_STATE_DONE);
637 static void vsp1_video_frame_end(struct vsp1_pipeline *pipe,
638 struct vsp1_video *video)
640 struct vsp1_video_buffer *buf;
643 buf = vsp1_video_complete_buffer(video);
647 spin_lock_irqsave(&pipe->irqlock, flags);
649 video->rwpf->ops->queue(video->rwpf, buf);
650 pipe->buffers_ready |= 1 << video->pipe_index;
652 spin_unlock_irqrestore(&pipe->irqlock, flags);
655 void vsp1_pipeline_frame_end(struct vsp1_pipeline *pipe)
657 enum vsp1_pipeline_state state;
664 /* Complete buffers on all video nodes. */
665 for (i = 0; i < pipe->num_inputs; ++i)
666 vsp1_video_frame_end(pipe, &pipe->inputs[i]->video);
669 vsp1_video_frame_end(pipe, &pipe->output->video);
671 spin_lock_irqsave(&pipe->irqlock, flags);
674 pipe->state = VSP1_PIPELINE_STOPPED;
676 /* If a stop has been requested, mark the pipeline as stopped and
679 if (state == VSP1_PIPELINE_STOPPING) {
684 /* Restart the pipeline if ready. */
685 if (vsp1_pipeline_ready(pipe))
686 vsp1_pipeline_run(pipe);
689 spin_unlock_irqrestore(&pipe->irqlock, flags);
693 * Propagate the alpha value through the pipeline.
695 * As the UDS has restricted scaling capabilities when the alpha component needs
696 * to be scaled, we disable alpha scaling when the UDS input has a fixed alpha
697 * value. The UDS then outputs a fixed alpha value which needs to be programmed
698 * from the input RPF alpha.
700 void vsp1_pipeline_propagate_alpha(struct vsp1_pipeline *pipe,
701 struct vsp1_entity *input,
704 struct vsp1_entity *entity;
705 struct media_pad *pad;
707 pad = media_entity_remote_pad(&input->pads[RWPF_PAD_SOURCE]);
710 if (!is_media_entity_v4l2_subdev(pad->entity))
713 entity = to_vsp1_entity(media_entity_to_v4l2_subdev(pad->entity));
715 /* The BRU background color has a fixed alpha value set to 255,
716 * the output alpha value is thus always equal to 255.
718 if (entity->type == VSP1_ENTITY_BRU)
721 if (entity->type == VSP1_ENTITY_UDS) {
722 struct vsp1_uds *uds = to_uds(&entity->subdev);
724 vsp1_uds_set_alpha(uds, alpha);
728 pad = &entity->pads[entity->source_pad];
729 pad = media_entity_remote_pad(pad);
733 void vsp1_pipelines_suspend(struct vsp1_device *vsp1)
739 /* To avoid increasing the system suspend time needlessly, loop over the
740 * pipelines twice, first to set them all to the stopping state, and then
741 * to wait for the stop to complete.
743 for (i = 0; i < vsp1->pdata.wpf_count; ++i) {
744 struct vsp1_rwpf *wpf = vsp1->wpf[i];
745 struct vsp1_pipeline *pipe;
750 pipe = to_vsp1_pipeline(&wpf->entity.subdev.entity);
754 spin_lock_irqsave(&pipe->irqlock, flags);
755 if (pipe->state == VSP1_PIPELINE_RUNNING)
756 pipe->state = VSP1_PIPELINE_STOPPING;
757 spin_unlock_irqrestore(&pipe->irqlock, flags);
760 for (i = 0; i < vsp1->pdata.wpf_count; ++i) {
761 struct vsp1_rwpf *wpf = vsp1->wpf[i];
762 struct vsp1_pipeline *pipe;
767 pipe = to_vsp1_pipeline(&wpf->entity.subdev.entity);
771 ret = wait_event_timeout(pipe->wq, vsp1_pipeline_stopped(pipe),
772 msecs_to_jiffies(500));
774 dev_warn(vsp1->dev, "pipeline %u stop timeout\n",
779 void vsp1_pipelines_resume(struct vsp1_device *vsp1)
783 /* Resume pipeline all running pipelines. */
784 for (i = 0; i < vsp1->pdata.wpf_count; ++i) {
785 struct vsp1_rwpf *wpf = vsp1->wpf[i];
786 struct vsp1_pipeline *pipe;
791 pipe = to_vsp1_pipeline(&wpf->entity.subdev.entity);
795 if (vsp1_pipeline_ready(pipe))
796 vsp1_pipeline_run(pipe);
800 /* -----------------------------------------------------------------------------
801 * videobuf2 Queue Operations
805 vsp1_video_queue_setup(struct vb2_queue *vq,
806 unsigned int *nbuffers, unsigned int *nplanes,
807 unsigned int sizes[], void *alloc_ctxs[])
809 struct vsp1_video *video = vb2_get_drv_priv(vq);
810 const struct v4l2_pix_format_mplane *format = &video->rwpf->format;
814 if (*nplanes != format->num_planes)
817 for (i = 0; i < *nplanes; i++) {
818 if (sizes[i] < format->plane_fmt[i].sizeimage)
820 alloc_ctxs[i] = video->alloc_ctx;
825 *nplanes = format->num_planes;
827 for (i = 0; i < format->num_planes; ++i) {
828 sizes[i] = format->plane_fmt[i].sizeimage;
829 alloc_ctxs[i] = video->alloc_ctx;
835 static int vsp1_video_buffer_prepare(struct vb2_buffer *vb)
837 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
838 struct vsp1_video *video = vb2_get_drv_priv(vb->vb2_queue);
839 struct vsp1_video_buffer *buf = to_vsp1_video_buffer(vbuf);
840 const struct v4l2_pix_format_mplane *format = &video->rwpf->format;
843 if (vb->num_planes < format->num_planes)
846 for (i = 0; i < vb->num_planes; ++i) {
847 buf->addr[i] = vb2_dma_contig_plane_dma_addr(vb, i);
848 buf->length[i] = vb2_plane_size(vb, i);
850 if (buf->length[i] < format->plane_fmt[i].sizeimage)
857 static void vsp1_video_buffer_queue(struct vb2_buffer *vb)
859 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
860 struct vsp1_video *video = vb2_get_drv_priv(vb->vb2_queue);
861 struct vsp1_pipeline *pipe = to_vsp1_pipeline(&video->video.entity);
862 struct vsp1_video_buffer *buf = to_vsp1_video_buffer(vbuf);
866 spin_lock_irqsave(&video->irqlock, flags);
867 empty = list_empty(&video->irqqueue);
868 list_add_tail(&buf->queue, &video->irqqueue);
869 spin_unlock_irqrestore(&video->irqlock, flags);
874 spin_lock_irqsave(&pipe->irqlock, flags);
876 video->rwpf->ops->queue(video->rwpf, buf);
877 pipe->buffers_ready |= 1 << video->pipe_index;
879 if (vb2_is_streaming(&video->queue) &&
880 vsp1_pipeline_ready(pipe))
881 vsp1_pipeline_run(pipe);
883 spin_unlock_irqrestore(&pipe->irqlock, flags);
886 static void vsp1_entity_route_setup(struct vsp1_entity *source)
888 struct vsp1_entity *sink;
890 if (source->route->reg == 0)
893 sink = container_of(source->sink, struct vsp1_entity, subdev.entity);
894 vsp1_write(source->vsp1, source->route->reg,
895 sink->route->inputs[source->sink_pad]);
898 static int vsp1_video_start_streaming(struct vb2_queue *vq, unsigned int count)
900 struct vsp1_video *video = vb2_get_drv_priv(vq);
901 struct vsp1_pipeline *pipe = to_vsp1_pipeline(&video->video.entity);
902 struct vsp1_entity *entity;
906 mutex_lock(&pipe->lock);
907 if (pipe->stream_count == pipe->num_video - 1) {
909 struct vsp1_uds *uds = to_uds(&pipe->uds->subdev);
911 /* If a BRU is present in the pipeline before the UDS,
912 * the alpha component doesn't need to be scaled as the
913 * BRU output alpha value is fixed to 255. Otherwise we
914 * need to scale the alpha component only when available
917 if (pipe->uds_input->type == VSP1_ENTITY_BRU) {
918 uds->scale_alpha = false;
920 struct vsp1_rwpf *rpf =
921 to_rwpf(&pipe->uds_input->subdev);
923 uds->scale_alpha = rpf->fmtinfo->alpha;
927 list_for_each_entry(entity, &pipe->entities, list_pipe) {
928 vsp1_entity_route_setup(entity);
930 ret = v4l2_subdev_call(&entity->subdev, video,
933 mutex_unlock(&pipe->lock);
939 pipe->stream_count++;
940 mutex_unlock(&pipe->lock);
942 spin_lock_irqsave(&pipe->irqlock, flags);
943 if (vsp1_pipeline_ready(pipe))
944 vsp1_pipeline_run(pipe);
945 spin_unlock_irqrestore(&pipe->irqlock, flags);
950 static void vsp1_video_stop_streaming(struct vb2_queue *vq)
952 struct vsp1_video *video = vb2_get_drv_priv(vq);
953 struct vsp1_pipeline *pipe = to_vsp1_pipeline(&video->video.entity);
954 struct vsp1_video_buffer *buffer;
958 mutex_lock(&pipe->lock);
959 if (--pipe->stream_count == 0) {
960 /* Stop the pipeline. */
961 ret = vsp1_pipeline_stop(pipe);
962 if (ret == -ETIMEDOUT)
963 dev_err(video->vsp1->dev, "pipeline stop timeout\n");
965 mutex_unlock(&pipe->lock);
967 vsp1_pipeline_cleanup(pipe);
968 media_entity_pipeline_stop(&video->video.entity);
970 /* Remove all buffers from the IRQ queue. */
971 spin_lock_irqsave(&video->irqlock, flags);
972 list_for_each_entry(buffer, &video->irqqueue, queue)
973 vb2_buffer_done(&buffer->buf.vb2_buf, VB2_BUF_STATE_ERROR);
974 INIT_LIST_HEAD(&video->irqqueue);
975 spin_unlock_irqrestore(&video->irqlock, flags);
978 static struct vb2_ops vsp1_video_queue_qops = {
979 .queue_setup = vsp1_video_queue_setup,
980 .buf_prepare = vsp1_video_buffer_prepare,
981 .buf_queue = vsp1_video_buffer_queue,
982 .wait_prepare = vb2_ops_wait_prepare,
983 .wait_finish = vb2_ops_wait_finish,
984 .start_streaming = vsp1_video_start_streaming,
985 .stop_streaming = vsp1_video_stop_streaming,
988 /* -----------------------------------------------------------------------------
993 vsp1_video_querycap(struct file *file, void *fh, struct v4l2_capability *cap)
995 struct v4l2_fh *vfh = file->private_data;
996 struct vsp1_video *video = to_vsp1_video(vfh->vdev);
998 cap->capabilities = V4L2_CAP_DEVICE_CAPS | V4L2_CAP_STREAMING
999 | V4L2_CAP_VIDEO_CAPTURE_MPLANE
1000 | V4L2_CAP_VIDEO_OUTPUT_MPLANE;
1002 if (video->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
1003 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE
1004 | V4L2_CAP_STREAMING;
1006 cap->device_caps = V4L2_CAP_VIDEO_OUTPUT_MPLANE
1007 | V4L2_CAP_STREAMING;
1009 strlcpy(cap->driver, "vsp1", sizeof(cap->driver));
1010 strlcpy(cap->card, video->video.name, sizeof(cap->card));
1011 snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
1012 dev_name(video->vsp1->dev));
1018 vsp1_video_get_format(struct file *file, void *fh, struct v4l2_format *format)
1020 struct v4l2_fh *vfh = file->private_data;
1021 struct vsp1_video *video = to_vsp1_video(vfh->vdev);
1023 if (format->type != video->queue.type)
1026 mutex_lock(&video->lock);
1027 format->fmt.pix_mp = video->rwpf->format;
1028 mutex_unlock(&video->lock);
1034 vsp1_video_try_format(struct file *file, void *fh, struct v4l2_format *format)
1036 struct v4l2_fh *vfh = file->private_data;
1037 struct vsp1_video *video = to_vsp1_video(vfh->vdev);
1039 if (format->type != video->queue.type)
1042 return __vsp1_video_try_format(video, &format->fmt.pix_mp, NULL);
1046 vsp1_video_set_format(struct file *file, void *fh, struct v4l2_format *format)
1048 struct v4l2_fh *vfh = file->private_data;
1049 struct vsp1_video *video = to_vsp1_video(vfh->vdev);
1050 const struct vsp1_format_info *info;
1053 if (format->type != video->queue.type)
1056 ret = __vsp1_video_try_format(video, &format->fmt.pix_mp, &info);
1060 mutex_lock(&video->lock);
1062 if (vb2_is_busy(&video->queue)) {
1067 video->rwpf->format = format->fmt.pix_mp;
1068 video->rwpf->fmtinfo = info;
1071 mutex_unlock(&video->lock);
1076 vsp1_video_streamon(struct file *file, void *fh, enum v4l2_buf_type type)
1078 struct v4l2_fh *vfh = file->private_data;
1079 struct vsp1_video *video = to_vsp1_video(vfh->vdev);
1080 struct vsp1_pipeline *pipe;
1083 if (video->queue.owner && video->queue.owner != file->private_data)
1086 video->sequence = 0;
1088 /* Start streaming on the pipeline. No link touching an entity in the
1089 * pipeline can be activated or deactivated once streaming is started.
1091 * Use the VSP1 pipeline object embedded in the first video object that
1094 pipe = video->video.entity.pipe
1095 ? to_vsp1_pipeline(&video->video.entity) : &video->pipe;
1097 ret = media_entity_pipeline_start(&video->video.entity, &pipe->pipe);
1101 /* Verify that the configured format matches the output of the connected
1104 ret = vsp1_video_verify_format(video);
1108 ret = vsp1_pipeline_init(pipe, video);
1112 /* Start the queue. */
1113 ret = vb2_streamon(&video->queue, type);
1120 vsp1_pipeline_cleanup(pipe);
1122 media_entity_pipeline_stop(&video->video.entity);
1126 static const struct v4l2_ioctl_ops vsp1_video_ioctl_ops = {
1127 .vidioc_querycap = vsp1_video_querycap,
1128 .vidioc_g_fmt_vid_cap_mplane = vsp1_video_get_format,
1129 .vidioc_s_fmt_vid_cap_mplane = vsp1_video_set_format,
1130 .vidioc_try_fmt_vid_cap_mplane = vsp1_video_try_format,
1131 .vidioc_g_fmt_vid_out_mplane = vsp1_video_get_format,
1132 .vidioc_s_fmt_vid_out_mplane = vsp1_video_set_format,
1133 .vidioc_try_fmt_vid_out_mplane = vsp1_video_try_format,
1134 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1135 .vidioc_querybuf = vb2_ioctl_querybuf,
1136 .vidioc_qbuf = vb2_ioctl_qbuf,
1137 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1138 .vidioc_create_bufs = vb2_ioctl_create_bufs,
1139 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1140 .vidioc_streamon = vsp1_video_streamon,
1141 .vidioc_streamoff = vb2_ioctl_streamoff,
1144 /* -----------------------------------------------------------------------------
1145 * V4L2 File Operations
1148 static int vsp1_video_open(struct file *file)
1150 struct vsp1_video *video = video_drvdata(file);
1151 struct v4l2_fh *vfh;
1154 vfh = kzalloc(sizeof(*vfh), GFP_KERNEL);
1158 v4l2_fh_init(vfh, &video->video);
1161 file->private_data = vfh;
1163 ret = vsp1_device_get(video->vsp1);
1172 static int vsp1_video_release(struct file *file)
1174 struct vsp1_video *video = video_drvdata(file);
1175 struct v4l2_fh *vfh = file->private_data;
1177 mutex_lock(&video->lock);
1178 if (video->queue.owner == vfh) {
1179 vb2_queue_release(&video->queue);
1180 video->queue.owner = NULL;
1182 mutex_unlock(&video->lock);
1184 vsp1_device_put(video->vsp1);
1186 v4l2_fh_release(file);
1188 file->private_data = NULL;
1193 static struct v4l2_file_operations vsp1_video_fops = {
1194 .owner = THIS_MODULE,
1195 .unlocked_ioctl = video_ioctl2,
1196 .open = vsp1_video_open,
1197 .release = vsp1_video_release,
1198 .poll = vb2_fop_poll,
1199 .mmap = vb2_fop_mmap,
1202 /* -----------------------------------------------------------------------------
1203 * Initialization and Cleanup
1206 int vsp1_video_init(struct vsp1_video *video, struct vsp1_rwpf *rwpf)
1208 const char *direction;
1211 switch (video->type) {
1212 case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
1213 direction = "output";
1214 video->pad.flags = MEDIA_PAD_FL_SINK;
1217 case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
1218 direction = "input";
1219 video->pad.flags = MEDIA_PAD_FL_SOURCE;
1220 video->video.vfl_dir = VFL_DIR_TX;
1229 mutex_init(&video->lock);
1230 spin_lock_init(&video->irqlock);
1231 INIT_LIST_HEAD(&video->irqqueue);
1233 mutex_init(&video->pipe.lock);
1234 spin_lock_init(&video->pipe.irqlock);
1235 INIT_LIST_HEAD(&video->pipe.entities);
1236 init_waitqueue_head(&video->pipe.wq);
1237 video->pipe.state = VSP1_PIPELINE_STOPPED;
1239 /* Initialize the media entity... */
1240 ret = media_entity_pads_init(&video->video.entity, 1, &video->pad);
1244 /* ... and the format ... */
1245 rwpf->fmtinfo = vsp1_get_format_info(VSP1_VIDEO_DEF_FORMAT);
1246 rwpf->format.pixelformat = rwpf->fmtinfo->fourcc;
1247 rwpf->format.colorspace = V4L2_COLORSPACE_SRGB;
1248 rwpf->format.field = V4L2_FIELD_NONE;
1249 rwpf->format.width = VSP1_VIDEO_DEF_WIDTH;
1250 rwpf->format.height = VSP1_VIDEO_DEF_HEIGHT;
1251 rwpf->format.num_planes = 1;
1252 rwpf->format.plane_fmt[0].bytesperline =
1253 rwpf->format.width * rwpf->fmtinfo->bpp[0] / 8;
1254 rwpf->format.plane_fmt[0].sizeimage =
1255 rwpf->format.plane_fmt[0].bytesperline * rwpf->format.height;
1257 /* ... and the video node... */
1258 video->video.v4l2_dev = &video->vsp1->v4l2_dev;
1259 video->video.fops = &vsp1_video_fops;
1260 snprintf(video->video.name, sizeof(video->video.name), "%s %s",
1261 rwpf->entity.subdev.name, direction);
1262 video->video.vfl_type = VFL_TYPE_GRABBER;
1263 video->video.release = video_device_release_empty;
1264 video->video.ioctl_ops = &vsp1_video_ioctl_ops;
1266 video_set_drvdata(&video->video, video);
1268 /* ... and the buffers queue... */
1269 video->alloc_ctx = vb2_dma_contig_init_ctx(video->vsp1->dev);
1270 if (IS_ERR(video->alloc_ctx)) {
1271 ret = PTR_ERR(video->alloc_ctx);
1275 video->queue.type = video->type;
1276 video->queue.io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
1277 video->queue.lock = &video->lock;
1278 video->queue.drv_priv = video;
1279 video->queue.buf_struct_size = sizeof(struct vsp1_video_buffer);
1280 video->queue.ops = &vsp1_video_queue_qops;
1281 video->queue.mem_ops = &vb2_dma_contig_memops;
1282 video->queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
1283 ret = vb2_queue_init(&video->queue);
1285 dev_err(video->vsp1->dev, "failed to initialize vb2 queue\n");
1289 /* ... and register the video device. */
1290 video->video.queue = &video->queue;
1291 ret = video_register_device(&video->video, VFL_TYPE_GRABBER, -1);
1293 dev_err(video->vsp1->dev, "failed to register video device\n");
1300 vb2_dma_contig_cleanup_ctx(video->alloc_ctx);
1301 vsp1_video_cleanup(video);
1305 void vsp1_video_cleanup(struct vsp1_video *video)
1307 if (video_is_registered(&video->video))
1308 video_unregister_device(&video->video);
1310 vb2_dma_contig_cleanup_ctx(video->alloc_ctx);
1311 media_entity_cleanup(&video->video.entity);