2 * Samsung S5P Multi Format Codec v 5.0
4 * This file contains definitions of enums and structs used by the codec
7 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
8 * Kamil Debski, <k.debski@samsung.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version
16 #ifndef S5P_MFC_COMMON_H_
17 #define S5P_MFC_COMMON_H_
19 #include <linux/platform_device.h>
20 #include <linux/videodev2.h>
21 #include <media/v4l2-ctrls.h>
22 #include <media/v4l2-device.h>
23 #include <media/v4l2-ioctl.h>
24 #include <media/videobuf2-core.h>
26 /* Definitions related to MFC memory */
28 /* Offset base used to differentiate between CAPTURE and OUTPUT
30 #define DST_QUEUE_OFF_BASE (TASK_SIZE / 2)
32 /* Offset used by the hardware to store addresses */
33 #define MFC_OFFSET_SHIFT 11
35 #define FIRMWARE_ALIGN 0x20000 /* 128KB */
37 #define DEF_CPB_SIZE 0x40000 /* 512KB */
39 #define MFC_BANK1_ALLOC_CTX 0
40 #define MFC_BANK2_ALLOC_CTX 1
42 #define MFC_BANK1_ALIGN_ORDER 13
43 #define MFC_BANK2_ALIGN_ORDER 13
44 #define MFC_BASE_ALIGN_ORDER 17
46 #include <media/videobuf2-dma-contig.h>
48 static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
50 /* Same functionality as the vb2_dma_contig_plane_paddr */
51 dma_addr_t *paddr = vb2_dma_contig_memops.cookie(b);
57 #define MFC_MAX_EXTRA_DPB 5
58 #define MFC_MAX_BUFFERS 32
59 #define MFC_NUM_CONTEXTS 4
60 /* Interrupt timeout */
61 #define MFC_INT_TIMEOUT 2000
62 /* Busy wait timeout */
63 #define MFC_BW_TIMEOUT 500
64 /* Watchdog interval */
65 #define MFC_WATCHDOG_INTERVAL 1000
66 /* After how many executions watchdog should assume lock up */
67 #define MFC_WATCHDOG_CNT 10
68 #define MFC_NO_INSTANCE_SET -1
69 #define MFC_ENC_CAP_PLANE_COUNT 1
70 #define MFC_ENC_OUT_PLANE_COUNT 2
72 #define MFC_MAX_CTRLS 64
74 #define mfc_read(dev, offset) readl(dev->regs_base + (offset))
75 #define mfc_write(dev, data, offset) writel((data), dev->regs_base + \
79 * enum s5p_mfc_fmt_type - type of the pixelformat
81 enum s5p_mfc_fmt_type {
88 * enum s5p_mfc_node_type - The type of an MFC device node.
90 enum s5p_mfc_node_type {
97 * enum s5p_mfc_inst_type - The type of an MFC instance.
99 enum s5p_mfc_inst_type {
106 * enum s5p_mfc_inst_state - The state of an MFC instance.
108 enum s5p_mfc_inst_state {
120 MFCINST_RES_CHANGE_INIT,
121 MFCINST_RES_CHANGE_FLUSH,
122 MFCINST_RES_CHANGE_END,
126 * enum s5p_mfc_queue_state - The state of buffer queue.
128 enum s5p_mfc_queue_state {
130 QUEUE_BUFS_REQUESTED,
136 * enum s5p_mfc_decode_arg - type of frame decoding
138 enum s5p_mfc_decode_arg {
147 * struct s5p_mfc_buf - MFC buffer
150 struct list_head list;
151 struct vb2_buffer *b;
163 * struct s5p_mfc_pm - power management data structure
167 struct clk *clock_gate;
169 struct device *device;
172 struct s5p_mfc_buf_size_v5 {
173 unsigned int h264_ctx;
174 unsigned int non_h264_ctx;
179 struct s5p_mfc_buf_size_v6 {
180 unsigned int dev_ctx;
181 unsigned int h264_dec_ctx;
182 unsigned int other_dec_ctx;
183 unsigned int h264_enc_ctx;
184 unsigned int other_enc_ctx;
187 struct s5p_mfc_buf_size {
193 struct s5p_mfc_buf_align {
197 struct s5p_mfc_variant {
198 unsigned int version;
199 unsigned int port_num;
200 struct s5p_mfc_buf_size *buf_size;
201 struct s5p_mfc_buf_align *buf_align;
205 * struct s5p_mfc_priv_buf - represents internal used buffer
206 * @alloc: allocation-specific context for each buffer
207 * (videobuf2 allocator)
208 * @ofs: offset of each buffer, will be used for MFC
209 * @virt: kernel virtual address, only valid when the
210 * buffer accessed by driver
211 * @dma: DMA address, only valid when kernel DMA API used
213 struct s5p_mfc_priv_buf {
221 * struct s5p_mfc_dev - The struct containing driver internal parameters.
223 * @v4l2_dev: v4l2_device
224 * @vfd_dec: video device for decoding
225 * @vfd_enc: video device for encoding
226 * @plat_dev: platform device
227 * @mem_dev_l: child device of the left memory bank (0)
228 * @mem_dev_r: child device of the right memory bank (1)
229 * @regs_base: base address of the MFC hw registers
231 * @mfc_mem: MFC registers memory resource
232 * @dec_ctrl_handler: control framework handler for decoding
233 * @enc_ctrl_handler: control framework handler for encoding
234 * @pm: power management control
235 * @num_inst: couter of active MFC instances
236 * @irqlock: lock for operations on videobuf2 queues
237 * @condlock: lock for changing/checking if a context is ready to be
239 * @mfc_mutex: lock for video_device
240 * @int_cond: variable used by the waitqueue
241 * @int_type: type of last interrupt
242 * @int_err: error number for last interrupt
243 * @queue: waitqueue for waiting for completion of device commands
244 * @fw_size: size of firmware
245 * @bank1: address of the beggining of bank 1 memory
246 * @bank2: address of the beggining of bank 2 memory
247 * @hw_lock: used for hardware locking
248 * @ctx: array of driver contexts
249 * @curr_ctx: number of the currently running context
250 * @ctx_work_bits: used to mark which contexts are waiting for hardware
251 * @watchdog_cnt: counter for the watchdog
252 * @watchdog_workqueue: workqueue for the watchdog
253 * @watchdog_work: worker for the watchdog
254 * @alloc_ctx: videobuf2 allocator contexts for two memory banks
255 * @enter_suspend: flag set when entering suspend
256 * @ctx_buf: common context memory (MFCv6)
260 struct v4l2_device v4l2_dev;
261 struct video_device *vfd_dec;
262 struct video_device *vfd_enc;
263 struct platform_device *plat_dev;
264 struct device *mem_dev_l;
265 struct device *mem_dev_r;
266 void __iomem *regs_base;
268 struct resource *mfc_mem;
269 struct v4l2_ctrl_handler dec_ctrl_handler;
270 struct v4l2_ctrl_handler enc_ctrl_handler;
271 struct s5p_mfc_pm pm;
272 struct s5p_mfc_variant *variant;
274 spinlock_t irqlock; /* lock when operating on videobuf2 queues */
275 spinlock_t condlock; /* lock when changing/checking if a context is
276 ready to be processed */
277 struct mutex mfc_mutex; /* video_device lock */
280 unsigned int int_err;
281 wait_queue_head_t queue;
285 unsigned long hw_lock;
286 struct s5p_mfc_ctx *ctx[MFC_NUM_CONTEXTS];
288 unsigned long ctx_work_bits;
289 atomic_t watchdog_cnt;
290 struct timer_list watchdog_timer;
291 struct workqueue_struct *watchdog_workqueue;
292 struct work_struct watchdog_work;
294 unsigned long enter_suspend;
296 struct s5p_mfc_priv_buf ctx_buf;
300 * struct s5p_mfc_h264_enc_params - encoding parameters for h264
302 struct s5p_mfc_h264_enc_params {
303 enum v4l2_mpeg_video_h264_profile profile;
304 enum v4l2_mpeg_video_h264_loop_filter_mode loop_filter_mode;
305 s8 loop_filter_alpha;
307 enum v4l2_mpeg_video_h264_entropy_mode entropy_mode;
318 u16 vui_ext_sar_width;
319 u16 vui_ext_sar_height;
327 enum v4l2_mpeg_video_h264_level level_v4l2;
332 enum v4l2_mpeg_video_h264_hierarchical_coding_type hier_qp_type;
334 u8 hier_qp_layer_qp[7];
335 u8 sei_frame_packing;
336 u8 sei_fp_curr_frame_0;
337 enum v4l2_mpeg_video_h264_sei_fp_arrangement_type sei_fp_arrangement_type;
340 enum v4l2_mpeg_video_h264_fmo_map_type fmo_map_type;
342 enum v4l2_mpeg_video_h264_fmo_change_dir fmo_chg_dir;
346 u32 aso_slice_order[8];
350 * struct s5p_mfc_mpeg4_enc_params - encoding parameters for h263 and mpeg4
352 struct s5p_mfc_mpeg4_enc_params {
354 enum v4l2_mpeg_video_mpeg4_profile profile;
356 /* Common for MPEG4, H263 */
362 enum v4l2_mpeg_video_mpeg4_level level_v4l2;
367 * struct s5p_mfc_enc_params - general encoding parameters
369 struct s5p_mfc_enc_params {
374 enum v4l2_mpeg_video_multi_slice_mode slice_mode;
377 u16 intra_refresh_mb;
385 u16 rc_reaction_coeff;
389 enum v4l2_mpeg_video_header_mode seq_hdr_mode;
390 enum v4l2_mpeg_mfc51_video_frame_skip_mode frame_skip_mode;
391 int fixed_target_bit;
394 u32 rc_framerate_num;
395 u32 rc_framerate_denom;
398 struct s5p_mfc_h264_enc_params h264;
399 struct s5p_mfc_mpeg4_enc_params mpeg4;
405 * struct s5p_mfc_codec_ops - codec ops, used by encoding
407 struct s5p_mfc_codec_ops {
408 /* initialization routines */
409 int (*pre_seq_start) (struct s5p_mfc_ctx *ctx);
410 int (*post_seq_start) (struct s5p_mfc_ctx *ctx);
411 /* execution routines */
412 int (*pre_frame_start) (struct s5p_mfc_ctx *ctx);
413 int (*post_frame_start) (struct s5p_mfc_ctx *ctx);
416 #define call_cop(c, op, args...) \
417 (((c)->c_ops->op) ? \
418 ((c)->c_ops->op(args)) : 0)
421 * struct s5p_mfc_ctx - This struct contains the instance context
423 * @dev: pointer to the s5p_mfc_dev of the device
424 * @fh: struct v4l2_fh
425 * @num: number of the context that this structure describes
426 * @int_cond: variable used by the waitqueue
427 * @int_type: type of the last interrupt
428 * @int_err: error number received from MFC hw in the interrupt
429 * @queue: waitqueue that can be used to wait for this context to
431 * @src_fmt: source pixelformat information
432 * @dst_fmt: destination pixelformat information
433 * @vq_src: vb2 queue for source buffers
434 * @vq_dst: vb2 queue for destination buffers
435 * @src_queue: driver internal queue for source buffers
436 * @dst_queue: driver internal queue for destination buffers
437 * @src_queue_cnt: number of buffers queued on the source internal queue
438 * @dst_queue_cnt: number of buffers queued on the dest internal queue
439 * @type: type of the instance - decoder or encoder
440 * @state: state of the context
441 * @inst_no: number of hw instance associated with the context
442 * @img_width: width of the image that is decoded or encoded
443 * @img_height: height of the image that is decoded or encoded
444 * @buf_width: width of the buffer for processed image
445 * @buf_height: height of the buffer for processed image
446 * @luma_size: size of a luma plane
447 * @chroma_size: size of a chroma plane
448 * @mv_size: size of a motion vectors buffer
449 * @consumed_stream: number of bytes that have been used so far from the
451 * @dpb_flush_flag: flag used to indicate that a DPB buffers are being
453 * @bank1_buf: handle to memory allocated for temporary buffers from
455 * @bank1_phys: address of the temporary buffers from memory bank 1
456 * @bank1_size: size of the memory allocated for temporary buffers from
458 * @bank2_buf: handle to memory allocated for temporary buffers from
460 * @bank2_phys: address of the temporary buffers from memory bank 2
461 * @bank2_size: size of the memory allocated for temporary buffers from
463 * @capture_state: state of the capture buffers queue
464 * @output_state: state of the output buffers queue
465 * @src_bufs: information on allocated source buffers
466 * @dst_bufs: information on allocated destination buffers
467 * @sequence: counter for the sequence number for v4l2
468 * @dec_dst_flag: flags for buffers queued in the hardware
469 * @dec_src_buf_size: size of the buffer for source buffers in decoding
470 * @codec_mode: number of codec mode used by MFC hw
471 * @slice_interface: slice interface flag
472 * @loop_filter_mpeg4: loop filter for MPEG4 flag
473 * @display_delay: value of the display delay for H264
474 * @display_delay_enable: display delay for H264 enable flag
475 * @after_packed_pb: flag used to track buffer when stream is in
477 * @dpb_count: count of the DPB buffers required by MFC hw
478 * @total_dpb_count: count of DPB buffers with additional buffers
479 * requested by the application
480 * @ctx_buf: handle to the memory associated with this context
481 * @ctx_phys: address of the memory associated with this context
482 * @ctx_size: size of the memory associated with this context
483 * @desc_buf: description buffer for decoding handle
484 * @desc_phys: description buffer for decoding address
485 * @shm_alloc: handle for the shared memory buffer
486 * @shm: virtual address for the shared memory buffer
487 * @shm_ofs: address offset for shared memory
488 * @enc_params: encoding parameters for MFC
489 * @enc_dst_buf_size: size of the buffers for encoder output
490 * @frame_type: used to force the type of the next encoded frame
491 * @ref_queue: list of the reference buffers for encoding
492 * @ref_queue_cnt: number of the buffers in the reference list
493 * @c_ops: ops for encoding
494 * @ctrls: array of controls, used when adding controls to the
495 * v4l2 control framework
496 * @ctrl_handler: handler for v4l2 framework
499 struct s5p_mfc_dev *dev;
506 unsigned int int_err;
507 wait_queue_head_t queue;
509 struct s5p_mfc_fmt *src_fmt;
510 struct s5p_mfc_fmt *dst_fmt;
512 struct vb2_queue vq_src;
513 struct vb2_queue vq_dst;
515 struct list_head src_queue;
516 struct list_head dst_queue;
518 unsigned int src_queue_cnt;
519 unsigned int dst_queue_cnt;
521 enum s5p_mfc_inst_type type;
522 enum s5p_mfc_inst_state state;
525 /* Image parameters */
535 unsigned long consumed_stream;
537 unsigned int dpb_flush;
538 unsigned int remained;
549 enum s5p_mfc_queue_state capture_state;
550 enum s5p_mfc_queue_state output_state;
552 struct s5p_mfc_buf src_bufs[MFC_MAX_BUFFERS];
554 struct s5p_mfc_buf dst_bufs[MFC_MAX_BUFFERS];
557 unsigned int sequence;
558 unsigned long dec_dst_flag;
559 size_t dec_src_buf_size;
564 int loop_filter_mpeg4;
566 int display_delay_enable;
574 unsigned int ctx_size;
575 struct s5p_mfc_priv_buf ctx;
576 struct s5p_mfc_priv_buf dsc;
577 struct s5p_mfc_priv_buf shm;
579 struct s5p_mfc_enc_params enc_params;
581 size_t enc_dst_buf_size;
582 size_t luma_dpb_size;
583 size_t chroma_dpb_size;
584 size_t me_buffer_size;
585 size_t tmv_buffer_size;
587 enum v4l2_mpeg_mfc51_video_force_frame_type force_frame_type;
589 struct list_head ref_queue;
590 unsigned int ref_queue_cnt;
592 enum v4l2_mpeg_video_multi_slice_mode slice_mode;
598 struct s5p_mfc_codec_ops *c_ops;
600 struct v4l2_ctrl *ctrls[MFC_MAX_CTRLS];
601 struct v4l2_ctrl_handler ctrl_handler;
603 size_t scratch_buf_size;
607 * struct s5p_mfc_fmt - structure used to store information about pixelformats
614 enum s5p_mfc_fmt_type type;
619 * struct mfc_control - structure used to store information about MFC controls
620 * it is used to initialize the control framework.
624 enum v4l2_ctrl_type type;
625 __u8 name[32]; /* Whatever */
626 __s32 minimum; /* Note signedness */
629 __u32 menu_skip_mask;
637 #define fh_to_ctx(__fh) container_of(__fh, struct s5p_mfc_ctx, fh)
638 #define ctrl_to_ctx(__ctrl) \
639 container_of((__ctrl)->handler, struct s5p_mfc_ctx, ctrl_handler)
641 #define HAS_PORTNUM(dev) (dev ? (dev->variant ? \
642 (dev->variant->port_num ? 1 : 0) : 0) : 0)
643 #define IS_TWOPORT(dev) (dev->variant->port_num == 2 ? 1 : 0)
644 #define IS_MFCV6(dev) (dev->variant->version >= 0x60 ? 1 : 0)
646 #if defined(CONFIG_VIDEO_SAMSUNG_S5P_MFC_V5)
647 #include "regs-mfc.h"
648 #include "s5p_mfc_opr.h"
649 #include "s5p_mfc_shm.h"
650 #elif defined(CONFIG_VIDEO_SAMSUNG_S5P_MFC_V6)
651 #include "regs-mfc-v6.h"
652 #include "s5p_mfc_opr_v6.h"
655 #endif /* S5P_MFC_COMMON_H_ */