2 * saa7114 - Philips SAA7114H video decoder driver version 0.0.1
4 * Copyright (C) 2002 Maxim Yevtyushkin <max@linuxmedialabs.com>
6 * Based on saa7111 driver by Dave Perks
8 * Copyright (C) 1998 Dave Perks <dperks@ibm.net>
10 * Slight changes for video timing and attachment output by
11 * Wolfgang Scherr <scherr@net4you.net>
13 * Changes by Ronald Bultje <rbultje@ronald.bitfreak.net>
14 * - moved over to linux>=2.4.x i2c protocol (1/1/2003)
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
36 #include <linux/kernel.h>
37 #include <linux/major.h>
39 #include <linux/slab.h>
42 #include <linux/pci.h>
43 #include <linux/signal.h>
45 #include <asm/pgtable.h>
47 #include <linux/sched.h>
48 #include <linux/types.h>
50 #include <linux/videodev.h>
51 #include <asm/uaccess.h>
53 MODULE_DESCRIPTION("Philips SAA7114H video decoder driver");
54 MODULE_AUTHOR("Maxim Yevtyushkin");
55 MODULE_LICENSE("GPL");
57 #include <linux/i2c.h>
58 #include <linux/i2c-dev.h>
60 #define I2C_NAME(x) (x)->name
62 #include <linux/video_decoder.h>
65 module_param(debug, int, 0);
66 MODULE_PARM_DESC(debug, "Debug level (0-1)");
68 #define dprintk(num, format, args...) \
71 printk(format, ##args); \
74 /* ----------------------------------------------------------------------- */
77 unsigned char reg[0xf0 * 2];
89 #define I2C_SAA7114 0x42
90 #define I2C_SAA7114A 0x40
95 //#define SAA_7114_NTSC_HSYNC_START (-3)
96 //#define SAA_7114_NTSC_HSYNC_STOP (-18)
98 #define SAA_7114_NTSC_HSYNC_START (-17)
99 #define SAA_7114_NTSC_HSYNC_STOP (-32)
101 //#define SAA_7114_NTSC_HOFFSET (5)
102 #define SAA_7114_NTSC_HOFFSET (6)
103 #define SAA_7114_NTSC_VOFFSET (10)
104 #define SAA_7114_NTSC_WIDTH (720)
105 #define SAA_7114_NTSC_HEIGHT (250)
107 #define SAA_7114_SECAM_HSYNC_START (-17)
108 #define SAA_7114_SECAM_HSYNC_STOP (-32)
110 #define SAA_7114_SECAM_HOFFSET (2)
111 #define SAA_7114_SECAM_VOFFSET (10)
112 #define SAA_7114_SECAM_WIDTH (720)
113 #define SAA_7114_SECAM_HEIGHT (300)
115 #define SAA_7114_PAL_HSYNC_START (-17)
116 #define SAA_7114_PAL_HSYNC_STOP (-32)
118 #define SAA_7114_PAL_HOFFSET (2)
119 #define SAA_7114_PAL_VOFFSET (10)
120 #define SAA_7114_PAL_WIDTH (720)
121 #define SAA_7114_PAL_HEIGHT (300)
125 #define SAA_7114_VERTICAL_CHROMA_OFFSET 0 //0x50504040
126 #define SAA_7114_VERTICAL_LUMA_OFFSET 0
128 #define REG_ADDR(x) (((x) << 1) + 1)
129 #define LOBYTE(x) ((unsigned char)((x) & 0xff))
130 #define HIBYTE(x) ((unsigned char)(((x) >> 8) & 0xff))
131 #define LOWORD(x) ((unsigned short int)((x) & 0xffff))
132 #define HIWORD(x) ((unsigned short int)(((x) >> 16) & 0xffff))
135 /* ----------------------------------------------------------------------- */
138 saa7114_write (struct i2c_client *client,
142 return i2c_smbus_write_byte_data(client, reg, value);
146 saa7114_write_block (struct i2c_client *client,
153 /* the saa7114 has an autoincrement function, use it if
154 * the adapter understands raw I2C */
155 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
156 /* do raw I2C, not smbus compatible */
160 msg.addr = client->addr;
163 msg.buf = (char *) block_data;
165 block_data[msg.len++] = reg = data[0];
167 block_data[msg.len++] = data[1];
171 } while (len >= 2 && data[0] == reg &&
173 if ((ret = i2c_transfer(client->adapter,
178 /* do some slow I2C emulation kind of thing */
181 if ((ret = saa7114_write(client, reg,
192 saa7114_read (struct i2c_client *client,
195 return i2c_smbus_read_byte_data(client, reg);
198 /* ----------------------------------------------------------------------- */
200 // initially set NTSC, composite
203 static const unsigned char init[] = {
204 0x00, 0x00, /* 00 - ID byte , chip version,
206 0x01, 0x08, /* 01 - X,X,X,X, IDEL3 to IDEL0 -
207 * horizontal increment delay,
208 * recommended position */
209 0x02, 0x00, /* 02 - FUSE=3, GUDL=2, MODE=0 ;
211 0x03, 0x10, /* 03 - HLNRS=0, VBSL=1, WPOFF=0,
212 * HOLDG=0, GAFIX=0, GAI1=256, GAI2=256 */
213 0x04, 0x90, /* 04 - GAI1=256 */
214 0x05, 0x90, /* 05 - GAI2=256 */
215 0x06, SAA_7114_NTSC_HSYNC_START, /* 06 - HSB: hsync start,
216 * depends on the video standard */
217 0x07, SAA_7114_NTSC_HSYNC_STOP, /* 07 - HSS: hsync stop, depends
218 *on the video standard */
219 0x08, 0xb8, /* 08 - AUFD=1, FSEL=1, EXFIL=0, VTRC=1,
220 * HPLL: free running in playback, locked
221 * in capture, VNOI=0 */
222 0x09, 0x80, /* 09 - BYPS=0, PREF=0, BPSS=0, VBLB=0,
223 * UPTCV=0, APER=1; depends from input */
224 0x0a, 0x80, /* 0a - BRIG=128 */
225 0x0b, 0x44, /* 0b - CONT=1.109 */
226 0x0c, 0x40, /* 0c - SATN=1.0 */
227 0x0d, 0x00, /* 0d - HUE=0 */
228 0x0e, 0x84, /* 0e - CDTO, CSTD2 to 0, DCVF, FCTC,
229 * CCOMB; depends from video standard */
230 0x0f, 0x24, /* 0f - ACGC,CGAIN6 to CGAIN0; depends
231 * from video standard */
232 0x10, 0x03, /* 10 - OFFU1 to 0, OFFV1 to 0, CHBW,
234 0x11, 0x59, /* 11 - COLO, RTP1, HEDL1 to 0, RTP0,
236 0x12, 0xc9, /* 12 - RT signal control RTSE13 to 10
238 0x13, 0x80, /* 13 - RT/X port output control */
239 0x14, 0x00, /* 14 - analog, ADC, compatibility control */
240 0x15, 0x00, /* 15 - VGATE start FID change */
241 0x16, 0xfe, /* 16 - VGATE stop */
242 0x17, 0x00, /* 17 - Misc., VGATE MSBs */
243 0x18, 0x40, /* RAWG */
244 0x19, 0x80, /* RAWO */
250 0x1f, 0x00, /* status byte, read only */
251 0x20, 0x00, /* video decoder reserved part */
267 0x30, 0xbc, /* audio clock generator */
283 0x40, 0x00, /* VBI data slicer */
307 0x58, 0x40, // framing code
308 0x59, 0x47, // horizontal offset
309 0x5a, 0x06, // vertical offset
310 0x5b, 0x83, // field offset
311 0x5c, 0x00, // reserved
312 0x5d, 0x3e, // header and data
313 0x5e, 0x00, // sliced data
314 0x5f, 0x00, // reserved
315 0x60, 0x00, /* video decoder reserved part */
331 0x70, 0x00, /* video decoder reserved part */
347 0x80, 0x00, /* X-port, I-port and scaler */
352 0x85, 0x0d, // hsync and vsync ?
363 0x90, 0x03, /* Task A definition */
367 0x94, 0x00, // window settings
379 0xa0, 0x01, /* horizontal integer prescaling ratio */
380 0xa1, 0x00, /* horizontal prescaler accumulation
382 0xa2, 0x00, /* UV FIR filter, Y FIR filter, prescaler
385 0xa4, 0x80, // luminance brightness
386 0xa5, 0x40, // luminance gain
387 0xa6, 0x40, // chrominance saturation
389 0xa8, 0x00, // horizontal luminance scaling increment
391 0xaa, 0x00, // horizontal luminance phase offset
393 0xac, 0x00, // horizontal chrominance scaling increment
395 0xae, 0x00, // horizontal chrominance phase offset
397 0xb0, 0x00, // vertical luminance scaling increment
399 0xb2, 0x00, // vertical chrominance scaling increment
413 0xc0, 0x02, // Task B definition
417 0xc4, 0x00, // window settings
429 0xd0, 0x01, // horizontal integer prescaling ratio
430 0xd1, 0x00, // horizontal prescaler accumulation sequence length
431 0xd2, 0x00, // UV FIR filter, Y FIR filter, prescaler DC gain
433 0xd4, 0x80, // luminance brightness
434 0xd5, 0x40, // luminance gain
435 0xd6, 0x40, // chrominance saturation
437 0xd8, 0x00, // horizontal luminance scaling increment
439 0xda, 0x00, // horizontal luminance phase offset
441 0xdc, 0x00, // horizontal chrominance scaling increment
443 0xde, 0x00, // horizontal chrominance phase offset
445 0xe0, 0x00, // vertical luminance scaling increment
447 0xe2, 0x00, // vertical chrominance scaling increment
464 saa7114_command (struct i2c_client *client,
468 struct saa7114 *decoder = i2c_get_clientdata(client);
473 //dprintk(1, KERN_INFO "%s: writing init\n", I2C_NAME(client));
474 //saa7114_write_block(client, init, sizeof(init));
481 dprintk(1, KERN_INFO "%s: decoder dump\n", I2C_NAME(client));
483 for (i = 0; i < 32; i += 16) {
486 printk(KERN_DEBUG "%s: %03x", I2C_NAME(client), i);
487 for (j = 0; j < 16; ++j) {
489 saa7114_read(client, i + j));
496 case DECODER_GET_CAPABILITIES:
498 struct video_decoder_capability *cap = arg;
500 dprintk(1, KERN_DEBUG "%s: decoder get capabilities\n",
503 cap->flags = VIDEO_DECODER_PAL |
512 case DECODER_GET_STATUS:
518 status = saa7114_read(client, 0x1f);
520 dprintk(1, KERN_DEBUG "%s status: 0x%02x\n", I2C_NAME(client),
523 if ((status & (1 << 6)) == 0) {
524 res |= DECODER_STATUS_GOOD;
526 switch (decoder->norm) {
527 case VIDEO_MODE_NTSC:
528 res |= DECODER_STATUS_NTSC;
531 res |= DECODER_STATUS_PAL;
533 case VIDEO_MODE_SECAM:
534 res |= DECODER_STATUS_SECAM;
537 case VIDEO_MODE_AUTO:
538 if ((status & (1 << 5)) != 0) {
539 res |= DECODER_STATUS_NTSC;
541 res |= DECODER_STATUS_PAL;
545 if ((status & (1 << 0)) != 0) {
546 res |= DECODER_STATUS_COLOR;
552 case DECODER_SET_NORM:
556 short int hoff = 0, voff = 0, w = 0, h = 0;
558 dprintk(1, KERN_DEBUG "%s: decoder set norm ",
562 case VIDEO_MODE_NTSC:
563 dprintk(1, "NTSC\n");
564 decoder->reg[REG_ADDR(0x06)] =
565 SAA_7114_NTSC_HSYNC_START;
566 decoder->reg[REG_ADDR(0x07)] =
567 SAA_7114_NTSC_HSYNC_STOP;
569 decoder->reg[REG_ADDR(0x08)] = decoder->playback ? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
571 decoder->reg[REG_ADDR(0x0e)] = 0x85;
572 decoder->reg[REG_ADDR(0x0f)] = 0x24;
574 hoff = SAA_7114_NTSC_HOFFSET;
575 voff = SAA_7114_NTSC_VOFFSET;
576 w = SAA_7114_NTSC_WIDTH;
577 h = SAA_7114_NTSC_HEIGHT;
583 decoder->reg[REG_ADDR(0x06)] =
584 SAA_7114_PAL_HSYNC_START;
585 decoder->reg[REG_ADDR(0x07)] =
586 SAA_7114_PAL_HSYNC_STOP;
588 decoder->reg[REG_ADDR(0x08)] = decoder->playback ? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
590 decoder->reg[REG_ADDR(0x0e)] = 0x81;
591 decoder->reg[REG_ADDR(0x0f)] = 0x24;
593 hoff = SAA_7114_PAL_HOFFSET;
594 voff = SAA_7114_PAL_VOFFSET;
595 w = SAA_7114_PAL_WIDTH;
596 h = SAA_7114_PAL_HEIGHT;
601 dprintk(1, " Unknown video mode!!!\n");
607 decoder->reg[REG_ADDR(0x94)] = LOBYTE(hoff); // hoffset low
608 decoder->reg[REG_ADDR(0x95)] = HIBYTE(hoff) & 0x0f; // hoffset high
609 decoder->reg[REG_ADDR(0x96)] = LOBYTE(w); // width low
610 decoder->reg[REG_ADDR(0x97)] = HIBYTE(w) & 0x0f; // width high
611 decoder->reg[REG_ADDR(0x98)] = LOBYTE(voff); // voffset low
612 decoder->reg[REG_ADDR(0x99)] = HIBYTE(voff) & 0x0f; // voffset high
613 decoder->reg[REG_ADDR(0x9a)] = LOBYTE(h + 2); // height low
614 decoder->reg[REG_ADDR(0x9b)] = HIBYTE(h + 2) & 0x0f; // height high
615 decoder->reg[REG_ADDR(0x9c)] = LOBYTE(w); // out width low
616 decoder->reg[REG_ADDR(0x9d)] = HIBYTE(w) & 0x0f; // out width high
617 decoder->reg[REG_ADDR(0x9e)] = LOBYTE(h); // out height low
618 decoder->reg[REG_ADDR(0x9f)] = HIBYTE(h) & 0x0f; // out height high
620 decoder->reg[REG_ADDR(0xc4)] = LOBYTE(hoff); // hoffset low
621 decoder->reg[REG_ADDR(0xc5)] = HIBYTE(hoff) & 0x0f; // hoffset high
622 decoder->reg[REG_ADDR(0xc6)] = LOBYTE(w); // width low
623 decoder->reg[REG_ADDR(0xc7)] = HIBYTE(w) & 0x0f; // width high
624 decoder->reg[REG_ADDR(0xc8)] = LOBYTE(voff); // voffset low
625 decoder->reg[REG_ADDR(0xc9)] = HIBYTE(voff) & 0x0f; // voffset high
626 decoder->reg[REG_ADDR(0xca)] = LOBYTE(h + 2); // height low
627 decoder->reg[REG_ADDR(0xcb)] = HIBYTE(h + 2) & 0x0f; // height high
628 decoder->reg[REG_ADDR(0xcc)] = LOBYTE(w); // out width low
629 decoder->reg[REG_ADDR(0xcd)] = HIBYTE(w) & 0x0f; // out width high
630 decoder->reg[REG_ADDR(0xce)] = LOBYTE(h); // out height low
631 decoder->reg[REG_ADDR(0xcf)] = HIBYTE(h) & 0x0f; // out height high
634 saa7114_write(client, 0x80, 0x06); // i-port and scaler back end clock selection, task A&B off
635 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
636 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
638 saa7114_write_block(client, decoder->reg + (0x06 << 1),
640 saa7114_write_block(client, decoder->reg + (0x0e << 1),
642 saa7114_write_block(client, decoder->reg + (0x5a << 1),
645 saa7114_write_block(client, decoder->reg + (0x94 << 1),
646 (0x9f + 1 - 0x94) << 1);
647 saa7114_write_block(client, decoder->reg + (0xc4 << 1),
648 (0xcf + 1 - 0xc4) << 1);
650 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
651 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
652 saa7114_write(client, 0x80, 0x36); // i-port and scaler back end clock selection
654 decoder->norm = *iarg;
658 case DECODER_SET_INPUT:
662 dprintk(1, KERN_DEBUG "%s: decoder set input (%d)\n",
663 I2C_NAME(client), *iarg);
664 if (*iarg < 0 || *iarg > 7) {
668 if (decoder->input != *iarg) {
669 dprintk(1, KERN_DEBUG "%s: now setting %s input\n",
671 *iarg >= 6 ? "S-Video" : "Composite");
672 decoder->input = *iarg;
675 decoder->reg[REG_ADDR(0x02)] =
677 reg[REG_ADDR(0x02)] & 0xf0) | (decoder->
680 saa7114_write(client, 0x02,
681 decoder->reg[REG_ADDR(0x02)]);
683 /* bypass chrominance trap for modes 6..9 */
684 decoder->reg[REG_ADDR(0x09)] =
686 reg[REG_ADDR(0x09)] & 0x7f) | (decoder->
690 saa7114_write(client, 0x09,
691 decoder->reg[REG_ADDR(0x09)]);
693 decoder->reg[REG_ADDR(0x0e)] =
696 reg[REG_ADDR(0x0e)] | 1 : decoder->
697 reg[REG_ADDR(0x0e)] & ~1;
698 saa7114_write(client, 0x0e,
699 decoder->reg[REG_ADDR(0x0e)]);
704 case DECODER_SET_OUTPUT:
708 dprintk(1, KERN_DEBUG "%s: decoder set output\n",
711 /* not much choice of outputs */
718 case DECODER_ENABLE_OUTPUT:
721 int enable = (*iarg != 0);
723 dprintk(1, KERN_DEBUG "%s: decoder %s output\n",
724 I2C_NAME(client), enable ? "enable" : "disable");
726 decoder->playback = !enable;
728 if (decoder->enable != enable) {
729 decoder->enable = enable;
731 /* RJ: If output should be disabled (for
732 * playing videos), we also need a open PLL.
733 * The input is set to 0 (where no input
734 * source is connected), although this
737 * If output should be enabled, we have to
741 if (decoder->enable) {
742 decoder->reg[REG_ADDR(0x08)] = 0xb8;
743 decoder->reg[REG_ADDR(0x12)] = 0xc9;
744 decoder->reg[REG_ADDR(0x13)] = 0x80;
745 decoder->reg[REG_ADDR(0x87)] = 0x01;
747 decoder->reg[REG_ADDR(0x08)] = 0x7c;
748 decoder->reg[REG_ADDR(0x12)] = 0x00;
749 decoder->reg[REG_ADDR(0x13)] = 0x00;
750 decoder->reg[REG_ADDR(0x87)] = 0x00;
753 saa7114_write_block(client,
754 decoder->reg + (0x12 << 1),
756 saa7114_write(client, 0x08,
757 decoder->reg[REG_ADDR(0x08)]);
758 saa7114_write(client, 0x87,
759 decoder->reg[REG_ADDR(0x87)]);
760 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
761 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
762 saa7114_write(client, 0x80, 0x36);
768 case DECODER_SET_PICTURE:
770 struct video_picture *pic = arg;
774 "%s: decoder set picture bright=%d contrast=%d saturation=%d hue=%d\n",
775 I2C_NAME(client), pic->brightness, pic->contrast,
776 pic->colour, pic->hue);
778 if (decoder->bright != pic->brightness) {
779 /* We want 0 to 255 we get 0-65535 */
780 decoder->bright = pic->brightness;
781 saa7114_write(client, 0x0a, decoder->bright >> 8);
783 if (decoder->contrast != pic->contrast) {
784 /* We want 0 to 127 we get 0-65535 */
785 decoder->contrast = pic->contrast;
786 saa7114_write(client, 0x0b,
787 decoder->contrast >> 9);
789 if (decoder->sat != pic->colour) {
790 /* We want 0 to 127 we get 0-65535 */
791 decoder->sat = pic->colour;
792 saa7114_write(client, 0x0c, decoder->sat >> 9);
794 if (decoder->hue != pic->hue) {
795 /* We want -128 to 127 we get 0-65535 */
796 decoder->hue = pic->hue;
797 saa7114_write(client, 0x0d,
798 (decoder->hue - 32768) >> 8);
810 /* ----------------------------------------------------------------------- */
814 * concerning the addresses: i2c wants 7 bit (without the r/w bit), so '>>1'
816 static unsigned short normal_i2c[] =
817 { I2C_SAA7114 >> 1, I2C_SAA7114A >> 1, I2C_CLIENT_END };
819 static unsigned short ignore = I2C_CLIENT_END;
821 static struct i2c_client_address_data addr_data = {
822 .normal_i2c = normal_i2c,
827 static struct i2c_driver i2c_driver_saa7114;
830 saa7114_detect_client (struct i2c_adapter *adapter,
835 short int hoff = SAA_7114_NTSC_HOFFSET;
836 short int voff = SAA_7114_NTSC_VOFFSET;
837 short int w = SAA_7114_NTSC_WIDTH;
838 short int h = SAA_7114_NTSC_HEIGHT;
839 struct i2c_client *client;
840 struct saa7114 *decoder;
844 "saa7114.c: detecting saa7114 client on address 0x%x\n",
847 /* Check if the adapter supports the needed features */
848 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
851 client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
854 client->addr = address;
855 client->adapter = adapter;
856 client->driver = &i2c_driver_saa7114;
857 strlcpy(I2C_NAME(client), "saa7114", sizeof(I2C_NAME(client)));
859 decoder = kzalloc(sizeof(struct saa7114), GFP_KERNEL);
860 if (decoder == NULL) {
864 decoder->norm = VIDEO_MODE_NTSC;
867 decoder->bright = 32768;
868 decoder->contrast = 32768;
869 decoder->hue = 32768;
870 decoder->sat = 32768;
871 decoder->playback = 0; // initially capture mode useda
872 i2c_set_clientdata(client, decoder);
874 memcpy(decoder->reg, init, sizeof(init));
876 decoder->reg[REG_ADDR(0x94)] = LOBYTE(hoff); // hoffset low
877 decoder->reg[REG_ADDR(0x95)] = HIBYTE(hoff) & 0x0f; // hoffset high
878 decoder->reg[REG_ADDR(0x96)] = LOBYTE(w); // width low
879 decoder->reg[REG_ADDR(0x97)] = HIBYTE(w) & 0x0f; // width high
880 decoder->reg[REG_ADDR(0x98)] = LOBYTE(voff); // voffset low
881 decoder->reg[REG_ADDR(0x99)] = HIBYTE(voff) & 0x0f; // voffset high
882 decoder->reg[REG_ADDR(0x9a)] = LOBYTE(h + 2); // height low
883 decoder->reg[REG_ADDR(0x9b)] = HIBYTE(h + 2) & 0x0f; // height high
884 decoder->reg[REG_ADDR(0x9c)] = LOBYTE(w); // out width low
885 decoder->reg[REG_ADDR(0x9d)] = HIBYTE(w) & 0x0f; // out width high
886 decoder->reg[REG_ADDR(0x9e)] = LOBYTE(h); // out height low
887 decoder->reg[REG_ADDR(0x9f)] = HIBYTE(h) & 0x0f; // out height high
889 decoder->reg[REG_ADDR(0xc4)] = LOBYTE(hoff); // hoffset low
890 decoder->reg[REG_ADDR(0xc5)] = HIBYTE(hoff) & 0x0f; // hoffset high
891 decoder->reg[REG_ADDR(0xc6)] = LOBYTE(w); // width low
892 decoder->reg[REG_ADDR(0xc7)] = HIBYTE(w) & 0x0f; // width high
893 decoder->reg[REG_ADDR(0xc8)] = LOBYTE(voff); // voffset low
894 decoder->reg[REG_ADDR(0xc9)] = HIBYTE(voff) & 0x0f; // voffset high
895 decoder->reg[REG_ADDR(0xca)] = LOBYTE(h + 2); // height low
896 decoder->reg[REG_ADDR(0xcb)] = HIBYTE(h + 2) & 0x0f; // height high
897 decoder->reg[REG_ADDR(0xcc)] = LOBYTE(w); // out width low
898 decoder->reg[REG_ADDR(0xcd)] = HIBYTE(w) & 0x0f; // out width high
899 decoder->reg[REG_ADDR(0xce)] = LOBYTE(h); // out height low
900 decoder->reg[REG_ADDR(0xcf)] = HIBYTE(h) & 0x0f; // out height high
902 decoder->reg[REG_ADDR(0xb8)] =
903 LOBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
904 decoder->reg[REG_ADDR(0xb9)] =
905 HIBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
906 decoder->reg[REG_ADDR(0xba)] =
907 LOBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
908 decoder->reg[REG_ADDR(0xbb)] =
909 HIBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
911 decoder->reg[REG_ADDR(0xbc)] =
912 LOBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
913 decoder->reg[REG_ADDR(0xbd)] =
914 HIBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
915 decoder->reg[REG_ADDR(0xbe)] =
916 LOBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
917 decoder->reg[REG_ADDR(0xbf)] =
918 HIBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
920 decoder->reg[REG_ADDR(0xe8)] =
921 LOBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
922 decoder->reg[REG_ADDR(0xe9)] =
923 HIBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
924 decoder->reg[REG_ADDR(0xea)] =
925 LOBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
926 decoder->reg[REG_ADDR(0xeb)] =
927 HIBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
929 decoder->reg[REG_ADDR(0xec)] =
930 LOBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
931 decoder->reg[REG_ADDR(0xed)] =
932 HIBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
933 decoder->reg[REG_ADDR(0xee)] =
934 LOBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
935 decoder->reg[REG_ADDR(0xef)] =
936 HIBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
939 decoder->reg[REG_ADDR(0x13)] = 0x80; // RTC0 on
940 decoder->reg[REG_ADDR(0x87)] = 0x01; // I-Port
941 decoder->reg[REG_ADDR(0x12)] = 0xc9; // RTS0
943 decoder->reg[REG_ADDR(0x02)] = 0xc0; // set composite1 input, aveasy
944 decoder->reg[REG_ADDR(0x09)] = 0x00; // chrominance trap
945 decoder->reg[REG_ADDR(0x0e)] |= 1; // combfilter on
948 dprintk(1, KERN_DEBUG "%s_attach: starting decoder init\n",
952 saa7114_write_block(client, decoder->reg + (0x20 << 1),
955 saa7114_write_block(client, decoder->reg + (0x30 << 1),
958 saa7114_write_block(client, decoder->reg + (0x63 << 1),
959 (0x7f + 1 - 0x63) << 1);
961 saa7114_write_block(client, decoder->reg + (0x89 << 1),
964 saa7114_write_block(client, decoder->reg + (0xb8 << 1),
967 saa7114_write_block(client, decoder->reg + (0xe8 << 1),
971 for (i = 0; i <= 5; i++) {
975 "%s_attach: init error %d at stage %d, leaving attach.\n",
976 I2C_NAME(client), i, err[i]);
983 for (i = 6; i < 8; i++) {
986 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
987 I2C_NAME(client), i, saa7114_read(client, i),
988 decoder->reg[REG_ADDR(i)]);
993 "%s_attach: performing decoder reset sequence\n",
996 err[6] = saa7114_write(client, 0x80, 0x06); // i-port and scaler backend clock selection, task A&B off
997 err[7] = saa7114_write(client, 0x88, 0xd8); // sw reset scaler
998 err[8] = saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
1000 for (i = 6; i <= 8; i++) {
1004 "%s_attach: init error %d at stage %d, leaving attach.\n",
1005 I2C_NAME(client), i, err[i]);
1012 dprintk(1, KERN_INFO "%s_attach: performing the rest of init\n",
1016 err[9] = saa7114_write(client, 0x01, decoder->reg[REG_ADDR(0x01)]);
1017 err[10] = saa7114_write_block(client, decoder->reg + (0x03 << 1), (0x1e + 1 - 0x03) << 1); // big seq
1018 err[11] = saa7114_write_block(client, decoder->reg + (0x40 << 1), (0x5f + 1 - 0x40) << 1); // slicer
1019 err[12] = saa7114_write_block(client, decoder->reg + (0x81 << 1), 2 << 1); // ?
1020 err[13] = saa7114_write_block(client, decoder->reg + (0x83 << 1), 5 << 1); // ?
1021 err[14] = saa7114_write_block(client, decoder->reg + (0x90 << 1), 4 << 1); // Task A
1023 saa7114_write_block(client, decoder->reg + (0x94 << 1),
1026 saa7114_write_block(client, decoder->reg + (0xa0 << 1),
1029 saa7114_write_block(client, decoder->reg + (0xa8 << 1),
1032 saa7114_write_block(client, decoder->reg + (0xb0 << 1),
1034 err[19] = saa7114_write_block(client, decoder->reg + (0xc0 << 1), 4 << 1); // Task B
1036 saa7114_write_block(client, decoder->reg + (0xc4 << 1),
1039 saa7114_write_block(client, decoder->reg + (0xd0 << 1),
1042 saa7114_write_block(client, decoder->reg + (0xd8 << 1),
1045 saa7114_write_block(client, decoder->reg + (0xe0 << 1),
1048 for (i = 9; i <= 18; i++) {
1052 "%s_attach: init error %d at stage %d, leaving attach.\n",
1053 I2C_NAME(client), i, err[i]);
1061 for (i = 6; i < 8; i++) {
1064 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1065 I2C_NAME(client), i, saa7114_read(client, i),
1066 decoder->reg[REG_ADDR(i)]);
1070 for (i = 0x11; i <= 0x13; i++) {
1073 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1074 I2C_NAME(client), i, saa7114_read(client, i),
1075 decoder->reg[REG_ADDR(i)]);
1079 dprintk(1, KERN_DEBUG "%s_attach: setting video input\n",
1083 saa7114_write(client, 0x02, decoder->reg[REG_ADDR(0x02)]);
1085 saa7114_write(client, 0x09, decoder->reg[REG_ADDR(0x09)]);
1087 saa7114_write(client, 0x0e, decoder->reg[REG_ADDR(0x0e)]);
1089 for (i = 19; i <= 21; i++) {
1093 "%s_attach: init error %d at stage %d, leaving attach.\n",
1094 I2C_NAME(client), i, err[i]);
1103 "%s_attach: performing decoder reset sequence\n",
1106 err[22] = saa7114_write(client, 0x88, 0xd8); // sw reset scaler
1107 err[23] = saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
1108 err[24] = saa7114_write(client, 0x80, 0x36); // i-port and scaler backend clock selection, task A&B off
1111 for (i = 22; i <= 24; i++) {
1115 "%s_attach: init error %d at stage %d, leaving attach.\n",
1116 I2C_NAME(client), i, err[i]);
1123 err[25] = saa7114_write(client, 0x06, init[REG_ADDR(0x06)]);
1124 err[26] = saa7114_write(client, 0x07, init[REG_ADDR(0x07)]);
1125 err[27] = saa7114_write(client, 0x10, init[REG_ADDR(0x10)]);
1129 "%s_attach: chip version %x, decoder status 0x%02x\n",
1130 I2C_NAME(client), saa7114_read(client, 0x00) >> 4,
1131 saa7114_read(client, 0x1f));
1134 "%s_attach: power save control: 0x%02x, scaler status: 0x%02x\n",
1135 I2C_NAME(client), saa7114_read(client, 0x88),
1136 saa7114_read(client, 0x8f));
1139 for (i = 0x94; i < 0x96; i++) {
1142 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1143 I2C_NAME(client), i, saa7114_read(client, i),
1144 decoder->reg[REG_ADDR(i)]);
1147 i = i2c_attach_client(client);
1154 //i = saa7114_write_block(client, init, sizeof(init));
1157 dprintk(1, KERN_ERR "%s_attach error: init status %d\n",
1158 I2C_NAME(client), i);
1162 "%s_attach: chip version %x at address 0x%x\n",
1163 I2C_NAME(client), saa7114_read(client, 0x00) >> 4,
1171 saa7114_attach_adapter (struct i2c_adapter *adapter)
1175 "saa7114.c: starting probe for adapter %s (0x%x)\n",
1176 I2C_NAME(adapter), adapter->id);
1177 return i2c_probe(adapter, &addr_data, &saa7114_detect_client);
1181 saa7114_detach_client (struct i2c_client *client)
1183 struct saa7114 *decoder = i2c_get_clientdata(client);
1186 err = i2c_detach_client(client);
1197 /* ----------------------------------------------------------------------- */
1199 static struct i2c_driver i2c_driver_saa7114 = {
1204 .id = I2C_DRIVERID_SAA7114,
1206 .attach_adapter = saa7114_attach_adapter,
1207 .detach_client = saa7114_detach_client,
1208 .command = saa7114_command,
1214 return i2c_add_driver(&i2c_driver_saa7114);
1220 i2c_del_driver(&i2c_driver_saa7114);
1223 module_init(saa7114_init);
1224 module_exit(saa7114_exit);