drivers/message/fusion/lsi/mpi_ioc.h

   1 /*
   2  *  Copyright (c) 2000-2005 LSI Logic Corporation.
   3  *
   4  *
   5  *           Name:  mpi_ioc.h
   6  *          Title:  MPI IOC, Port, Event, FW Download, and FW Upload messages
   7  *  Creation Date:  August 11, 2000
   8  *
   9  *    mpi_ioc.h Version:  01.05.08
  10  *
  11  *  Version History
  12  *  ---------------
  13  *
  14  *  Date      Version   Description
  15  *  --------  --------  ------------------------------------------------------
  16  *  05-08-00  00.10.01  Original release for 0.10 spec dated 4/26/2000.
  17  *  05-24-00  00.10.02  Added _MSG_IOC_INIT_REPLY structure.
  18  *  06-06-00  01.00.01  Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
  19  *  06-12-00  01.00.02  Added _MSG_PORT_ENABLE_REPLY structure.
  20  *                      Added _MSG_EVENT_ACK_REPLY structure.
  21  *                      Added _MSG_FW_DOWNLOAD_REPLY structure.
  22  *                      Added _MSG_TOOLBOX_REPLY structure.
  23  *  06-30-00  01.00.03  Added MaxLanBuckets to _PORT_FACT_REPLY structure.
  24  *  07-27-00  01.00.04  Added _EVENT_DATA structure definitions for _SCSI,
  25  *                      _LINK_STATUS, _LOOP_STATE and _LOGOUT.
  26  *  08-11-00  01.00.05  Switched positions of MsgLength and Function fields in
  27  *                      _MSG_EVENT_ACK_REPLY structure to match specification.
  28  *  11-02-00  01.01.01  Original release for post 1.0 work.
  29  *                      Added a value for Manufacturer to WhoInit.
  30  *  12-04-00  01.01.02  Modified IOCFacts reply, added FWUpload messages, and
  31  *                      removed toolbox message.
  32  *  01-09-01  01.01.03  Added event enabled and disabled defines.
  33  *                      Added structures for FwHeader and DataHeader.
  34  *                      Added ImageType to FwUpload reply.
  35  *  02-20-01  01.01.04  Started using MPI_POINTER.
  36  *  02-27-01  01.01.05  Added event for RAID status change and its event data.
  37  *                      Added IocNumber field to MSG_IOC_FACTS_REPLY.
  38  *  03-27-01  01.01.06  Added defines for ProductId field of MPI_FW_HEADER.
  39  *                      Added structure offset comments.
  40  *  04-09-01  01.01.07  Added structure EVENT_DATA_EVENT_CHANGE.
  41  *  08-08-01  01.02.01  Original release for v1.2 work.
  42  *                      New format for FWVersion and ProductId in
  43  *                      MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
  44  *  08-31-01  01.02.02  Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
  45  *                      related structure and defines.
  46  *                      Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
  47  *                      Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
  48  *                      Replaced a reserved field in MSG_IOC_FACTS_REPLY with
  49  *                      IOCExceptions and changed DataImageSize to reserved.
  50  *                      Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
  51  *                      MPI_FW_UPLOAD_ITYPE_NVDATA.
  52  *  09-28-01  01.02.03  Modified Event Data for Integrated RAID.
  53  *  11-01-01  01.02.04  Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
  54  *  03-14-02  01.02.05  Added HeaderVersion field to MSG_IOC_FACTS_REPLY.
  55  *  05-31-02  01.02.06  Added define for
  56  *                      MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID.
  57  *                      Added AliasIndex to EVENT_DATA_LOGOUT structure.
  58  *  04-01-03  01.02.07  Added defines for MPI_FW_HEADER_SIGNATURE_.
  59  *  06-26-03  01.02.08  Added new values to the product family defines.
  60  *  04-29-04  01.02.09  Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
  61  *                      added related defines.
  62  *  05-11-04  01.03.01  Original release for MPI v1.3.
  63  *  08-19-04  01.05.01  Added four new fields to MSG_IOC_INIT.
  64  *                      Added three new fields to MSG_IOC_FACTS_REPLY.
  65  *                      Defined four new bits for the IOCCapabilities field of
  66  *                      the IOCFacts reply.
  67  *                      Added two new PortTypes for the PortFacts reply.
  68  *                      Added six new events along with their EventData
  69  *                      structures.
  70  *                      Added a new MsgFlag to the FwDownload request to
  71  *                      indicate last segment.
  72  *                      Defined a new image type of boot loader.
  73  *                      Added FW family codes for SAS product families.
  74  *  10-05-04  01.05.02  Added ReplyFifoHostSignalingAddr field to
  75  *                      MSG_IOC_FACTS_REPLY.
  76  *  12-07-04  01.05.03  Added more defines for SAS Discovery Error event.
  77  *  12-09-04  01.05.04  Added Unsupported device to SAS Device event.
  78  *  01-15-05  01.05.05  Added event data for SAS SES Event.
  79  *  02-09-05  01.05.06  Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
  80  *  02-22-05  01.05.07  Added Host Page Buffer Persistent flag to IOC Facts
  81  *                      Reply and IOC Init Request.
  82  *  03-11-05  01.05.08  Added family code for 1068E family.
  83  *                      Removed IOCFacts Reply EEDP Capability bit.
  84  *  --------------------------------------------------------------------------
  85  */
  86
  87 #ifndef MPI_IOC_H
  88 #define MPI_IOC_H
  89
  90
  91 /*****************************************************************************
  92 *
  93 *               I O C    M e s s a g e s
  94 *
  95 *****************************************************************************/
  96
  97 /****************************************************************************/
  98 /*  IOCInit message                                                         */
  99 /****************************************************************************/
 100
 101 typedef struct _MSG_IOC_INIT
 102 {
 103     U8                      WhoInit;                    /* 00h */
 104     U8                      Reserved;                   /* 01h */
 105     U8                      ChainOffset;                /* 02h */
 106     U8                      Function;                   /* 03h */
 107     U8                      Flags;                      /* 04h */
 108     U8                      MaxDevices;                 /* 05h */
 109     U8                      MaxBuses;                   /* 06h */
 110     U8                      MsgFlags;                   /* 07h */
 111     U32                     MsgContext;                 /* 08h */
 112     U16                     ReplyFrameSize;             /* 0Ch */
 113     U8                      Reserved1[2];               /* 0Eh */
 114     U32                     HostMfaHighAddr;            /* 10h */
 115     U32                     SenseBufferHighAddr;        /* 14h */
 116     U32                     ReplyFifoHostSignalingAddr; /* 18h */
 117     SGE_SIMPLE_UNION        HostPageBufferSGE;          /* 1Ch */
 118     U16                     MsgVersion;                 /* 28h */
 119     U16                     HeaderVersion;              /* 2Ah */
 120 } MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
 121   IOCInit_t, MPI_POINTER pIOCInit_t;
 122
 123 /* WhoInit values */
 124 #define MPI_WHOINIT_NO_ONE                              (0x00)
 125 #define MPI_WHOINIT_SYSTEM_BIOS                         (0x01)
 126 #define MPI_WHOINIT_ROM_BIOS                            (0x02)
 127 #define MPI_WHOINIT_PCI_PEER                            (0x03)
 128 #define MPI_WHOINIT_HOST_DRIVER                         (0x04)
 129 #define MPI_WHOINIT_MANUFACTURER                        (0x05)
 130
 131 /* Flags values */
 132 #define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT   (0x04)
 133 #define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL        (0x02)
 134 #define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE              (0x01)
 135
 136 /* MsgVersion */
 137 #define MPI_IOCINIT_MSGVERSION_MAJOR_MASK               (0xFF00)
 138 #define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT              (8)
 139 #define MPI_IOCINIT_MSGVERSION_MINOR_MASK               (0x00FF)
 140 #define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT              (0)
 141
 142 /* HeaderVersion */
 143 #define MPI_IOCINIT_HEADERVERSION_UNIT_MASK             (0xFF00)
 144 #define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT            (8)
 145 #define MPI_IOCINIT_HEADERVERSION_DEV_MASK              (0x00FF)
 146 #define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT             (0)
 147
 148
 149 typedef struct _MSG_IOC_INIT_REPLY
 150 {
 151     U8                      WhoInit;                    /* 00h */
 152     U8                      Reserved;                   /* 01h */
 153     U8                      MsgLength;                  /* 02h */
 154     U8                      Function;                   /* 03h */
 155     U8                      Flags;                      /* 04h */
 156     U8                      MaxDevices;                 /* 05h */
 157     U8                      MaxBuses;                   /* 06h */
 158     U8                      MsgFlags;                   /* 07h */
 159     U32                     MsgContext;                 /* 08h */
 160     U16                     Reserved2;                  /* 0Ch */
 161     U16                     IOCStatus;                  /* 0Eh */
 162     U32                     IOCLogInfo;                 /* 10h */
 163 } MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
 164   IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
 165
 166
 167
 168 /****************************************************************************/
 169 /*  IOC Facts message                                                       */
 170 /****************************************************************************/
 171
 172 typedef struct _MSG_IOC_FACTS
 173 {
 174     U8                      Reserved[2];                /* 00h */
 175     U8                      ChainOffset;                /* 01h */
 176     U8                      Function;                   /* 02h */
 177     U8                      Reserved1[3];               /* 03h */
 178     U8                      MsgFlags;                   /* 04h */
 179     U32                     MsgContext;                 /* 08h */
 180 } MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
 181   IOCFacts_t, MPI_POINTER pIOCFacts_t;
 182
 183 typedef struct _MPI_FW_VERSION_STRUCT
 184 {
 185     U8                      Dev;                        /* 00h */
 186     U8                      Unit;                       /* 01h */
 187     U8                      Minor;                      /* 02h */
 188     U8                      Major;                      /* 03h */
 189 } MPI_FW_VERSION_STRUCT;
 190
 191 typedef union _MPI_FW_VERSION
 192 {
 193     MPI_FW_VERSION_STRUCT   Struct;
 194     U32                     Word;
 195 } MPI_FW_VERSION;
 196
 197 /* IOC Facts Reply */
 198 typedef struct _MSG_IOC_FACTS_REPLY
 199 {
 200     U16                     MsgVersion;                 /* 00h */
 201     U8                      MsgLength;                  /* 02h */
 202     U8                      Function;                   /* 03h */
 203     U16                     HeaderVersion;              /* 04h */
 204     U8                      IOCNumber;                  /* 06h */
 205     U8                      MsgFlags;                   /* 07h */
 206     U32                     MsgContext;                 /* 08h */
 207     U16                     IOCExceptions;              /* 0Ch */
 208     U16                     IOCStatus;                  /* 0Eh */
 209     U32                     IOCLogInfo;                 /* 10h */
 210     U8                      MaxChainDepth;              /* 14h */
 211     U8                      WhoInit;                    /* 15h */
 212     U8                      BlockSize;                  /* 16h */
 213     U8                      Flags;                      /* 17h */
 214     U16                     ReplyQueueDepth;            /* 18h */
 215     U16                     RequestFrameSize;           /* 1Ah */
 216     U16                     Reserved_0101_FWVersion;    /* 1Ch */ /* obsolete 16-bit FWVersion */
 217     U16                     ProductID;                  /* 1Eh */
 218     U32                     CurrentHostMfaHighAddr;     /* 20h */
 219     U16                     GlobalCredits;              /* 24h */
 220     U8                      NumberOfPorts;              /* 26h */
 221     U8                      EventState;                 /* 27h */
 222     U32                     CurrentSenseBufferHighAddr; /* 28h */
 223     U16                     CurReplyFrameSize;          /* 2Ch */
 224     U8                      MaxDevices;                 /* 2Eh */
 225     U8                      MaxBuses;                   /* 2Fh */
 226     U32                     FWImageSize;                /* 30h */
 227     U32                     IOCCapabilities;            /* 34h */
 228     MPI_FW_VERSION          FWVersion;                  /* 38h */
 229     U16                     HighPriorityQueueDepth;     /* 3Ch */
 230     U16                     Reserved2;                  /* 3Eh */
 231     SGE_SIMPLE_UNION        HostPageBufferSGE;          /* 40h */
 232     U32                     ReplyFifoHostSignalingAddr; /* 4Ch */
 233 } MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
 234   IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
 235
 236 #define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK              (0xFF00)
 237 #define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT             (8)
 238 #define MPI_IOCFACTS_MSGVERSION_MINOR_MASK              (0x00FF)
 239 #define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT             (0)
 240
 241 #define MPI_IOCFACTS_HDRVERSION_UNIT_MASK               (0xFF00)
 242 #define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT              (8)
 243 #define MPI_IOCFACTS_HDRVERSION_DEV_MASK                (0x00FF)
 244 #define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT               (0)
 245
 246 #define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL        (0x0001)
 247 #define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID         (0x0002)
 248 #define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL            (0x0004)
 249 #define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL       (0x0008)
 250
 251 #define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT             (0x01)
 252 #define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL       (0x02)
 253 #define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT  (0x04)
 254
 255 #define MPI_IOCFACTS_EVENTSTATE_DISABLED                (0x00)
 256 #define MPI_IOCFACTS_EVENTSTATE_ENABLED                 (0x01)
 257
 258 #define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q              (0x00000001)
 259 #define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL       (0x00000002)
 260 #define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING     (0x00000004)
 261 #define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER       (0x00000008)
 262 #define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER         (0x00000010)
 263 #define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER         (0x00000020)
 264
 265
 266
 267 /*****************************************************************************
 268 *
 269 *               P o r t    M e s s a g e s
 270 *
 271 *****************************************************************************/
 272
 273 /****************************************************************************/
 274 /*  Port Facts message and Reply                                            */
 275 /****************************************************************************/
 276
 277 typedef struct _MSG_PORT_FACTS
 278 {
 279      U8                     Reserved[2];                /* 00h */
 280      U8                     ChainOffset;                /* 02h */
 281      U8                     Function;                   /* 03h */
 282      U8                     Reserved1[2];               /* 04h */
 283      U8                     PortNumber;                 /* 06h */
 284      U8                     MsgFlags;                   /* 07h */
 285      U32                    MsgContext;                 /* 08h */
 286 } MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
 287   PortFacts_t, MPI_POINTER pPortFacts_t;
 288
 289 typedef struct _MSG_PORT_FACTS_REPLY
 290 {
 291      U16                    Reserved;                   /* 00h */
 292      U8                     MsgLength;                  /* 02h */
 293      U8                     Function;                   /* 03h */
 294      U16                    Reserved1;                  /* 04h */
 295      U8                     PortNumber;                 /* 06h */
 296      U8                     MsgFlags;                   /* 07h */
 297      U32                    MsgContext;                 /* 08h */
 298      U16                    Reserved2;                  /* 0Ch */
 299      U16                    IOCStatus;                  /* 0Eh */
 300      U32                    IOCLogInfo;                 /* 10h */
 301      U8                     Reserved3;                  /* 14h */
 302      U8                     PortType;                   /* 15h */
 303      U16                    MaxDevices;                 /* 16h */
 304      U16                    PortSCSIID;                 /* 18h */
 305      U16                    ProtocolFlags;              /* 1Ah */
 306      U16                    MaxPostedCmdBuffers;        /* 1Ch */
 307      U16                    MaxPersistentIDs;           /* 1Eh */
 308      U16                    MaxLanBuckets;              /* 20h */
 309      U16                    Reserved4;                  /* 22h */
 310      U32                    Reserved5;                  /* 24h */
 311 } MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
 312   PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
 313
 314
 315 /* PortTypes values */
 316
 317 #define MPI_PORTFACTS_PORTTYPE_INACTIVE         (0x00)
 318 #define MPI_PORTFACTS_PORTTYPE_SCSI             (0x01)
 319 #define MPI_PORTFACTS_PORTTYPE_FC               (0x10)
 320 #define MPI_PORTFACTS_PORTTYPE_ISCSI            (0x20)
 321 #define MPI_PORTFACTS_PORTTYPE_SAS              (0x30)
 322
 323 /* ProtocolFlags values */
 324
 325 #define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR       (0x01)
 326 #define MPI_PORTFACTS_PROTOCOL_LAN              (0x02)
 327 #define MPI_PORTFACTS_PROTOCOL_TARGET           (0x04)
 328 #define MPI_PORTFACTS_PROTOCOL_INITIATOR        (0x08)
 329
 330
 331 /****************************************************************************/
 332 /*  Port Enable Message                                                     */
 333 /****************************************************************************/
 334
 335 typedef struct _MSG_PORT_ENABLE
 336 {
 337     U8                      Reserved[2];                /* 00h */
 338     U8                      ChainOffset;                /* 02h */
 339     U8                      Function;                   /* 03h */
 340     U8                      Reserved1[2];               /* 04h */
 341     U8                      PortNumber;                 /* 06h */
 342     U8                      MsgFlags;                   /* 07h */
 343     U32                     MsgContext;                 /* 08h */
 344 } MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
 345   PortEnable_t, MPI_POINTER pPortEnable_t;
 346
 347 typedef struct _MSG_PORT_ENABLE_REPLY
 348 {
 349     U8                      Reserved[2];                /* 00h */
 350     U8                      MsgLength;                  /* 02h */
 351     U8                      Function;                   /* 03h */
 352     U8                      Reserved1[2];               /* 04h */
 353     U8                      PortNumber;                 /* 05h */
 354     U8                      MsgFlags;                   /* 07h */
 355     U32                     MsgContext;                 /* 08h */
 356     U16                     Reserved2;                  /* 0Ch */
 357     U16                     IOCStatus;                  /* 0Eh */
 358     U32                     IOCLogInfo;                 /* 10h */
 359 } MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
 360   PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
 361
 362
 363 /*****************************************************************************
 364 *
 365 *               E v e n t    M e s s a g e s
 366 *
 367 *****************************************************************************/
 368
 369 /****************************************************************************/
 370 /*  Event Notification messages                                             */
 371 /****************************************************************************/
 372
 373 typedef struct _MSG_EVENT_NOTIFY
 374 {
 375     U8                      Switch;                     /* 00h */
 376     U8                      Reserved;                   /* 01h */
 377     U8                      ChainOffset;                /* 02h */
 378     U8                      Function;                   /* 03h */
 379     U8                      Reserved1[3];               /* 04h */
 380     U8                      MsgFlags;                   /* 07h */
 381     U32                     MsgContext;                 /* 08h */
 382 } MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
 383   EventNotification_t, MPI_POINTER pEventNotification_t;
 384
 385 /* Event Notification Reply */
 386
 387 typedef struct _MSG_EVENT_NOTIFY_REPLY
 388 {
 389      U16                    EventDataLength;            /* 00h */
 390      U8                     MsgLength;                  /* 02h */
 391      U8                     Function;                   /* 03h */
 392      U8                     Reserved1[2];               /* 04h */
 393      U8                     AckRequired;                /* 06h */
 394      U8                     MsgFlags;                   /* 07h */
 395      U32                    MsgContext;                 /* 08h */
 396      U8                     Reserved2[2];               /* 0Ch */
 397      U16                    IOCStatus;                  /* 0Eh */
 398      U32                    IOCLogInfo;                 /* 10h */
 399      U32                    Event;                      /* 14h */
 400      U32                    EventContext;               /* 18h */
 401      U32                    Data[1];                    /* 1Ch */
 402 } MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
 403   EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
 404
 405 /* Event Acknowledge */
 406
 407 typedef struct _MSG_EVENT_ACK
 408 {
 409     U8                      Reserved[2];                /* 00h */
 410     U8                      ChainOffset;                /* 02h */
 411     U8                      Function;                   /* 03h */
 412     U8                      Reserved1[3];               /* 04h */
 413     U8                      MsgFlags;                   /* 07h */
 414     U32                     MsgContext;                 /* 08h */
 415     U32                     Event;                      /* 0Ch */
 416     U32                     EventContext;               /* 10h */
 417 } MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
 418   EventAck_t, MPI_POINTER pEventAck_t;
 419
 420 typedef struct _MSG_EVENT_ACK_REPLY
 421 {
 422     U8                      Reserved[2];                /* 00h */
 423     U8                      MsgLength;                  /* 02h */
 424     U8                      Function;                   /* 03h */
 425     U8                      Reserved1[3];               /* 04h */
 426     U8                      MsgFlags;                   /* 07h */
 427     U32                     MsgContext;                 /* 08h */
 428     U16                     Reserved2;                  /* 0Ch */
 429     U16                     IOCStatus;                  /* 0Eh */
 430     U32                     IOCLogInfo;                 /* 10h */
 431 } MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
 432   EventAckReply_t, MPI_POINTER pEventAckReply_t;
 433
 434 /* Switch */
 435
 436 #define MPI_EVENT_NOTIFICATION_SWITCH_OFF   (0x00)
 437 #define MPI_EVENT_NOTIFICATION_SWITCH_ON    (0x01)
 438
 439 /* Event */
 440
 441 #define MPI_EVENT_NONE                      (0x00000000)
 442 #define MPI_EVENT_LOG_DATA                  (0x00000001)
 443 #define MPI_EVENT_STATE_CHANGE              (0x00000002)
 444 #define MPI_EVENT_UNIT_ATTENTION            (0x00000003)
 445 #define MPI_EVENT_IOC_BUS_RESET             (0x00000004)
 446 #define MPI_EVENT_EXT_BUS_RESET             (0x00000005)
 447 #define MPI_EVENT_RESCAN                    (0x00000006)
 448 #define MPI_EVENT_LINK_STATUS_CHANGE        (0x00000007)
 449 #define MPI_EVENT_LOOP_STATE_CHANGE         (0x00000008)
 450 #define MPI_EVENT_LOGOUT                    (0x00000009)
 451 #define MPI_EVENT_EVENT_CHANGE              (0x0000000A)
 452 #define MPI_EVENT_INTEGRATED_RAID           (0x0000000B)
 453 #define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
 454 #define MPI_EVENT_ON_BUS_TIMER_EXPIRED      (0x0000000D)
 455 #define MPI_EVENT_QUEUE_FULL                (0x0000000E)
 456 #define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE  (0x0000000F)
 457 #define MPI_EVENT_SAS_SES                   (0x00000010)
 458 #define MPI_EVENT_PERSISTENT_TABLE_FULL     (0x00000011)
 459 #define MPI_EVENT_SAS_PHY_LINK_STATUS       (0x00000012)
 460 #define MPI_EVENT_SAS_DISCOVERY_ERROR       (0x00000013)
 461
 462 /* AckRequired field values */
 463
 464 #define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
 465 #define MPI_EVENT_NOTIFICATION_ACK_REQUIRED     (0x01)
 466
 467 /* EventChange Event data */
 468
 469 typedef struct _EVENT_DATA_EVENT_CHANGE
 470 {
 471     U8                      EventState;                 /* 00h */
 472     U8                      Reserved;                   /* 01h */
 473     U16                     Reserved1;                  /* 02h */
 474 } EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
 475   EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
 476
 477 /* SCSI Event data for Port, Bus and Device forms */
 478
 479 typedef struct _EVENT_DATA_SCSI
 480 {
 481     U8                      TargetID;                   /* 00h */
 482     U8                      BusPort;                    /* 01h */
 483     U16                     Reserved;                   /* 02h */
 484 } EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
 485   EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
 486
 487 /* SCSI Device Status Change Event data */
 488
 489 typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
 490 {
 491     U8                      TargetID;                   /* 00h */
 492     U8                      Bus;                        /* 01h */
 493     U8                      ReasonCode;                 /* 02h */
 494     U8                      LUN;                        /* 03h */
 495     U8                      ASC;                        /* 04h */
 496     U8                      ASCQ;                       /* 05h */
 497     U16                     Reserved;                   /* 06h */
 498 } EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
 499   MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
 500   MpiEventDataScsiDeviceStatusChange_t,
 501   MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
 502
 503 /* MPI SCSI Device Status Change Event data ReasonCode values */
 504 #define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED                (0x03)
 505 #define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING       (0x04)
 506 #define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA           (0x05)
 507
 508 /* SAS Device Status Change Event data */
 509
 510 typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
 511 {
 512     U8                      TargetID;                   /* 00h */
 513     U8                      Bus;                        /* 01h */
 514     U8                      ReasonCode;                 /* 02h */
 515     U8                      Reserved;                   /* 03h */
 516     U8                      ASC;                        /* 04h */
 517     U8                      ASCQ;                       /* 05h */
 518     U16                     DevHandle;                  /* 06h */
 519     U32                     DeviceInfo;                 /* 08h */
 520     U16                     ParentDevHandle;            /* 0Ch */
 521     U8                      PhyNum;                     /* 0Eh */
 522     U8                      Reserved1;                  /* 0Fh */
 523     U64                     SASAddress;                 /* 10h */
 524 } EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 525   MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 526   MpiEventDataSasDeviceStatusChange_t,
 527   MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
 528
 529 /* MPI SAS Device Status Change Event data ReasonCode values */
 530 #define MPI_EVENT_SAS_DEV_STAT_RC_ADDED                 (0x03)
 531 #define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING        (0x04)
 532 #define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA            (0x05)
 533 #define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED      (0x06)
 534 #define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED           (0x07)
 535
 536
 537 /* SCSI Event data for Queue Full event */
 538
 539 typedef struct _EVENT_DATA_QUEUE_FULL
 540 {
 541     U8                      TargetID;                   /* 00h */
 542     U8                      Bus;                        /* 01h */
 543     U16                     CurrentDepth;               /* 02h */
 544 } EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
 545   EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
 546
 547 /* MPI Integrated RAID Event data */
 548
 549 typedef struct _EVENT_DATA_RAID
 550 {
 551     U8                      VolumeID;                   /* 00h */
 552     U8                      VolumeBus;                  /* 01h */
 553     U8                      ReasonCode;                 /* 02h */
 554     U8                      PhysDiskNum;                /* 03h */
 555     U8                      ASC;                        /* 04h */
 556     U8                      ASCQ;                       /* 05h */
 557     U16                     Reserved;                   /* 06h */
 558     U32                     SettingsStatus;             /* 08h */
 559 } EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
 560   MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
 561
 562 /* MPI Integrated RAID Event data ReasonCode values */
 563 #define MPI_EVENT_RAID_RC_VOLUME_CREATED                (0x00)
 564 #define MPI_EVENT_RAID_RC_VOLUME_DELETED                (0x01)
 565 #define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED       (0x02)
 566 #define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED         (0x03)
 567 #define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED       (0x04)
 568 #define MPI_EVENT_RAID_RC_PHYSDISK_CREATED              (0x05)
 569 #define MPI_EVENT_RAID_RC_PHYSDISK_DELETED              (0x06)
 570 #define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED     (0x07)
 571 #define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED       (0x08)
 572 #define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED             (0x09)
 573 #define MPI_EVENT_RAID_RC_SMART_DATA                    (0x0A)
 574 #define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED        (0x0B)
 575
 576 /* MPI Link Status Change Event data */
 577
 578 typedef struct _EVENT_DATA_LINK_STATUS
 579 {
 580     U8                      State;                      /* 00h */
 581     U8                      Reserved;                   /* 01h */
 582     U16                     Reserved1;                  /* 02h */
 583     U8                      Reserved2;                  /* 04h */
 584     U8                      Port;                       /* 05h */
 585     U16                     Reserved3;                  /* 06h */
 586 } EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
 587   EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
 588
 589 #define MPI_EVENT_LINK_STATUS_FAILURE       (0x00000000)
 590 #define MPI_EVENT_LINK_STATUS_ACTIVE        (0x00000001)
 591
 592 /* MPI Loop State Change Event data */
 593
 594 typedef struct _EVENT_DATA_LOOP_STATE
 595 {
 596     U8                      Character4;                 /* 00h */
 597     U8                      Character3;                 /* 01h */
 598     U8                      Type;                       /* 02h */
 599     U8                      Reserved;                   /* 03h */
 600     U8                      Reserved1;                  /* 04h */
 601     U8                      Port;                       /* 05h */
 602     U16                     Reserved2;                  /* 06h */
 603 } EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
 604   EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
 605
 606 #define MPI_EVENT_LOOP_STATE_CHANGE_LIP     (0x0001)
 607 #define MPI_EVENT_LOOP_STATE_CHANGE_LPE     (0x0002)
 608 #define MPI_EVENT_LOOP_STATE_CHANGE_LPB     (0x0003)
 609
 610 /* MPI LOGOUT Event data */
 611
 612 typedef struct _EVENT_DATA_LOGOUT
 613 {
 614     U32                     NPortID;                    /* 00h */
 615     U8                      AliasIndex;                 /* 04h */
 616     U8                      Port;                       /* 05h */
 617     U16                     Reserved1;                  /* 06h */
 618 } EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
 619   EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
 620
 621 #define MPI_EVENT_LOGOUT_ALL_ALIASES        (0xFF)
 622
 623 /* SAS SES Event data */
 624
 625 typedef struct _EVENT_DATA_SAS_SES
 626 {
 627     U8                      PhyNum;                     /* 00h */
 628     U8                      Port;                       /* 01h */
 629     U8                      PortWidth;                  /* 02h */
 630     U8                      Reserved1;                  /* 04h */
 631 } EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
 632   MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
 633
 634 /* SAS Phy Link Status Event data */
 635
 636 typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
 637 {
 638     U8                      PhyNum;                     /* 00h */
 639     U8                      LinkRates;                  /* 01h */
 640     U16                     DevHandle;                  /* 02h */
 641     U64                     SASAddress;                 /* 04h */
 642 } EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
 643   MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
 644
 645 /* defines for the LinkRates field of the SAS PHY Link Status event */
 646 #define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK                   (0xF0)
 647 #define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT                  (4)
 648 #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK                  (0x0F)
 649 #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT                 (0)
 650 #define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN                   (0x00)
 651 #define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED              (0x01)
 652 #define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION  (0x02)
 653 #define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE         (0x03)
 654 #define MPI_EVENT_SAS_PLS_LR_RATE_1_5                       (0x08)
 655 #define MPI_EVENT_SAS_PLS_LR_RATE_3_0                       (0x09)
 656
 657 /* SAS Discovery Errror Event data */
 658
 659 typedef struct _EVENT_DATA_DISCOVERY_ERROR
 660 {
 661     U32                     DiscoveryStatus;            /* 00h */
 662     U8                      Port;                       /* 04h */
 663     U8                      Reserved1;                  /* 05h */
 664     U16                     Reserved2;                  /* 06h */
 665 } EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
 666   EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
 667
 668 #define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED               (0x00000001)
 669 #define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE        (0x00000002)
 670 #define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS              (0x00000004)
 671 #define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR                (0x00000008)
 672 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT                 (0x00000010)
 673 #define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES           (0x00000020)
 674 #define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST             (0x00000040)
 675 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED         (0x00000080)
 676 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR               (0x00000100)
 677 #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE          (0x00000200)
 678 #define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE              (0x00000400)
 679 #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_PATHS                (0x00000800)
 680
 681
 682 /*****************************************************************************
 683 *
 684 *               F i r m w a r e    L o a d    M e s s a g e s
 685 *
 686 *****************************************************************************/
 687
 688 /****************************************************************************/
 689 /*  Firmware Download message and associated structures                     */
 690 /****************************************************************************/
 691
 692 typedef struct _MSG_FW_DOWNLOAD
 693 {
 694     U8                      ImageType;                  /* 00h */
 695     U8                      Reserved;                   /* 01h */
 696     U8                      ChainOffset;                /* 02h */
 697     U8                      Function;                   /* 03h */
 698     U8                      Reserved1[3];               /* 04h */
 699     U8                      MsgFlags;                   /* 07h */
 700     U32                     MsgContext;                 /* 08h */
 701     SGE_MPI_UNION           SGL;                        /* 0Ch */
 702 } MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
 703   FWDownload_t, MPI_POINTER pFWDownload_t;
 704
 705 #define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT    (0x01)
 706
 707 #define MPI_FW_DOWNLOAD_ITYPE_RESERVED          (0x00)
 708 #define MPI_FW_DOWNLOAD_ITYPE_FW                (0x01)
 709 #define MPI_FW_DOWNLOAD_ITYPE_BIOS              (0x02)
 710 #define MPI_FW_DOWNLOAD_ITYPE_NVDATA            (0x03)
 711 #define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER        (0x04)
 712
 713
 714 typedef struct _FWDownloadTCSGE
 715 {
 716     U8                      Reserved;                   /* 00h */
 717     U8                      ContextSize;                /* 01h */
 718     U8                      DetailsLength;              /* 02h */
 719     U8                      Flags;                      /* 03h */
 720     U32                     Reserved_0100_Checksum;     /* 04h */ /* obsolete Checksum */
 721     U32                     ImageOffset;                /* 08h */
 722     U32                     ImageSize;                  /* 0Ch */
 723 } FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
 724   FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
 725
 726 /* Firmware Download reply */
 727 typedef struct _MSG_FW_DOWNLOAD_REPLY
 728 {
 729     U8                      ImageType;                  /* 00h */
 730     U8                      Reserved;                   /* 01h */
 731     U8                      MsgLength;                  /* 02h */
 732     U8                      Function;                   /* 03h */
 733     U8                      Reserved1[3];               /* 04h */
 734     U8                      MsgFlags;                   /* 07h */
 735     U32                     MsgContext;                 /* 08h */
 736     U16                     Reserved2;                  /* 0Ch */
 737     U16                     IOCStatus;                  /* 0Eh */
 738     U32                     IOCLogInfo;                 /* 10h */
 739 } MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
 740   FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
 741
 742
 743 /****************************************************************************/
 744 /*  Firmware Upload message and associated structures                       */
 745 /****************************************************************************/
 746
 747 typedef struct _MSG_FW_UPLOAD
 748 {
 749     U8                      ImageType;                  /* 00h */
 750     U8                      Reserved;                   /* 01h */
 751     U8                      ChainOffset;                /* 02h */
 752     U8                      Function;                   /* 03h */
 753     U8                      Reserved1[3];               /* 04h */
 754     U8                      MsgFlags;                   /* 07h */
 755     U32                     MsgContext;                 /* 08h */
 756     SGE_MPI_UNION           SGL;                        /* 0Ch */
 757 } MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
 758   FWUpload_t, MPI_POINTER pFWUpload_t;
 759
 760 #define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM      (0x00)
 761 #define MPI_FW_UPLOAD_ITYPE_FW_FLASH        (0x01)
 762 #define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH      (0x02)
 763 #define MPI_FW_UPLOAD_ITYPE_NVDATA          (0x03)
 764 #define MPI_FW_UPLOAD_ITYPE_BOOTLOADER      (0x04)
 765 #define MPI_FW_UPLOAD_ITYPE_FW_BACKUP       (0x05)
 766
 767 typedef struct _FWUploadTCSGE
 768 {
 769     U8                      Reserved;                   /* 00h */
 770     U8                      ContextSize;                /* 01h */
 771     U8                      DetailsLength;              /* 02h */
 772     U8                      Flags;                      /* 03h */
 773     U32                     Reserved1;                  /* 04h */
 774     U32                     ImageOffset;                /* 08h */
 775     U32                     ImageSize;                  /* 0Ch */
 776 } FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
 777   FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
 778
 779 /* Firmware Upload reply */
 780 typedef struct _MSG_FW_UPLOAD_REPLY
 781 {
 782     U8                      ImageType;                  /* 00h */
 783     U8                      Reserved;                   /* 01h */
 784     U8                      MsgLength;                  /* 02h */
 785     U8                      Function;                   /* 03h */
 786     U8                      Reserved1[3];               /* 04h */
 787     U8                      MsgFlags;                   /* 07h */
 788     U32                     MsgContext;                 /* 08h */
 789     U16                     Reserved2;                  /* 0Ch */
 790     U16                     IOCStatus;                  /* 0Eh */
 791     U32                     IOCLogInfo;                 /* 10h */
 792     U32                     ActualImageSize;            /* 14h */
 793 } MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
 794   FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
 795
 796
 797 typedef struct _MPI_FW_HEADER
 798 {
 799     U32                     ArmBranchInstruction0;      /* 00h */
 800     U32                     Signature0;                 /* 04h */
 801     U32                     Signature1;                 /* 08h */
 802     U32                     Signature2;                 /* 0Ch */
 803     U32                     ArmBranchInstruction1;      /* 10h */
 804     U32                     ArmBranchInstruction2;      /* 14h */
 805     U32                     Reserved;                   /* 18h */
 806     U32                     Checksum;                   /* 1Ch */
 807     U16                     VendorId;                   /* 20h */
 808     U16                     ProductId;                  /* 22h */
 809     MPI_FW_VERSION          FWVersion;                  /* 24h */
 810     U32                     SeqCodeVersion;             /* 28h */
 811     U32                     ImageSize;                  /* 2Ch */
 812     U32                     NextImageHeaderOffset;      /* 30h */
 813     U32                     LoadStartAddress;           /* 34h */
 814     U32                     IopResetVectorValue;        /* 38h */
 815     U32                     IopResetRegAddr;            /* 3Ch */
 816     U32                     VersionNameWhat;            /* 40h */
 817     U8                      VersionName[32];            /* 44h */
 818     U32                     VendorNameWhat;             /* 64h */
 819     U8                      VendorName[32];             /* 68h */
 820 } MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
 821   MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
 822
 823 #define MPI_FW_HEADER_WHAT_SIGNATURE        (0x29232840)
 824
 825 /* defines for using the ProductId field */
 826 #define MPI_FW_HEADER_PID_TYPE_MASK             (0xF000)
 827 #define MPI_FW_HEADER_PID_TYPE_SCSI             (0x0000)
 828 #define MPI_FW_HEADER_PID_TYPE_FC               (0x1000)
 829 #define MPI_FW_HEADER_PID_TYPE_SAS              (0x2000)
 830
 831 #define MPI_FW_HEADER_SIGNATURE_0               (0x5AEAA55A)
 832 #define MPI_FW_HEADER_SIGNATURE_1               (0xA55AEAA5)
 833 #define MPI_FW_HEADER_SIGNATURE_2               (0x5AA55AEA)
 834
 835 #define MPI_FW_HEADER_PID_PROD_MASK                     (0x0F00)
 836 #define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI           (0x0100)
 837 #define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI    (0x0200)
 838 #define MPI_FW_HEADER_PID_PROD_TARGET_SCSI              (0x0300)
 839 #define MPI_FW_HEADER_PID_PROD_IM_SCSI                  (0x0400)
 840 #define MPI_FW_HEADER_PID_PROD_IS_SCSI                  (0x0500)
 841 #define MPI_FW_HEADER_PID_PROD_CTX_SCSI                 (0x0600)
 842 #define MPI_FW_HEADER_PID_PROD_IR_SCSI                  (0x0700)
 843
 844 #define MPI_FW_HEADER_PID_FAMILY_MASK           (0x00FF)
 845 /* SCSI */
 846 #define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI    (0x0001)
 847 #define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI    (0x0002)
 848 #define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI    (0x0003)
 849 #define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI    (0x0004)
 850 #define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI    (0x0005)
 851 #define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI    (0x0006)
 852 #define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI    (0x0007)
 853 #define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI    (0x0008)
 854 #define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI    (0x0009)
 855 #define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI    (0x000A)
 856 #define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI   (0x000B)
 857 #define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI   (0x000C)
 858 /* Fibre Channel */
 859 #define MPI_FW_HEADER_PID_FAMILY_909_FC         (0x0000)
 860 #define MPI_FW_HEADER_PID_FAMILY_919_FC         (0x0001) /* 919 and 929     */
 861 #define MPI_FW_HEADER_PID_FAMILY_919X_FC        (0x0002) /* 919X and 929X   */
 862 #define MPI_FW_HEADER_PID_FAMILY_919XL_FC       (0x0003) /* 919XL and 929XL */
 863 #define MPI_FW_HEADER_PID_FAMILY_939X_FC        (0x0004) /* 939X and 949X   */
 864 #define MPI_FW_HEADER_PID_FAMILY_959_FC         (0x0005)
 865 /* SAS */
 866 #define MPI_FW_HEADER_PID_FAMILY_1064_SAS       (0x0001)
 867 #define MPI_FW_HEADER_PID_FAMILY_1068_SAS       (0x0002)
 868 #define MPI_FW_HEADER_PID_FAMILY_1078_SAS       (0x0003)
 869 #define MPI_FW_HEADER_PID_FAMILY_106xE_SAS      (0x0004) /* 1068E, 1066E, and 1064E */
 870
 871 typedef struct _MPI_EXT_IMAGE_HEADER
 872 {
 873     U8                      ImageType;                  /* 00h */
 874     U8                      Reserved;                   /* 01h */
 875     U16                     Reserved1;                  /* 02h */
 876     U32                     Checksum;                   /* 04h */
 877     U32                     ImageSize;                  /* 08h */
 878     U32                     NextImageHeaderOffset;      /* 0Ch */
 879     U32                     LoadStartAddress;           /* 10h */
 880     U32                     Reserved2;                  /* 14h */
 881 } MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
 882   MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
 883
 884 /* defines for the ImageType field */
 885 #define MPI_EXT_IMAGE_TYPE_UNSPECIFIED          (0x00)
 886 #define MPI_EXT_IMAGE_TYPE_FW                   (0x01)
 887 #define MPI_EXT_IMAGE_TYPE_NVDATA               (0x03)
 888 #define MPI_EXT_IMAGE_TYPE_BOOTLOADER           (0x04)
 889
 890 #endif