drivers/mfd/stmpe.c

   1 /*
   2  * ST Microelectronics MFD: stmpe's driver
   3  *
   4  * Copyright (C) ST-Ericsson SA 2010
   5  *
   6  * License Terms: GNU General Public License, version 2
   7  * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
   8  */
   9
  10 #include <linux/err.h>
  11 #include <linux/gpio.h>
  12 #include <linux/export.h>
  13 #include <linux/kernel.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/irq.h>
  16 #include <linux/irqdomain.h>
  17 #include <linux/of.h>
  18 #include <linux/of_gpio.h>
  19 #include <linux/pm.h>
  20 #include <linux/slab.h>
  21 #include <linux/mfd/core.h>
  22 #include <linux/delay.h>
  23 #include <linux/regulator/consumer.h>
  24 #include "stmpe.h"
  25
  26 static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
  27 {
  28         return stmpe->variant->enable(stmpe, blocks, true);
  29 }
  30
  31 static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
  32 {
  33         return stmpe->variant->enable(stmpe, blocks, false);
  34 }
  35
  36 static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg)
  37 {
  38         int ret;
  39
  40         ret = stmpe->ci->read_byte(stmpe, reg);
  41         if (ret < 0)
  42                 dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret);
  43
  44         dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret);
  45
  46         return ret;
  47 }
  48
  49 static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
  50 {
  51         int ret;
  52
  53         dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val);
  54
  55         ret = stmpe->ci->write_byte(stmpe, reg, val);
  56         if (ret < 0)
  57                 dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret);
  58
  59         return ret;
  60 }
  61
  62 static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
  63 {
  64         int ret;
  65
  66         ret = __stmpe_reg_read(stmpe, reg);
  67         if (ret < 0)
  68                 return ret;
  69
  70         ret &= ~mask;
  71         ret |= val;
  72
  73         return __stmpe_reg_write(stmpe, reg, ret);
  74 }
  75
  76 static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
  77                               u8 *values)
  78 {
  79         int ret;
  80
  81         ret = stmpe->ci->read_block(stmpe, reg, length, values);
  82         if (ret < 0)
  83                 dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret);
  84
  85         dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret);
  86         stmpe_dump_bytes("stmpe rd: ", values, length);
  87
  88         return ret;
  89 }
  90
  91 static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
  92                         const u8 *values)
  93 {
  94         int ret;
  95
  96         dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length);
  97         stmpe_dump_bytes("stmpe wr: ", values, length);
  98
  99         ret = stmpe->ci->write_block(stmpe, reg, length, values);
 100         if (ret < 0)
 101                 dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret);
 102
 103         return ret;
 104 }
 105
 106 /**
 107  * stmpe_enable - enable blocks on an STMPE device
 108  * @stmpe:      Device to work on
 109  * @blocks:     Mask of blocks (enum stmpe_block values) to enable
 110  */
 111 int stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
 112 {
 113         int ret;
 114
 115         mutex_lock(&stmpe->lock);
 116         ret = __stmpe_enable(stmpe, blocks);
 117         mutex_unlock(&stmpe->lock);
 118
 119         return ret;
 120 }
 121 EXPORT_SYMBOL_GPL(stmpe_enable);
 122
 123 /**
 124  * stmpe_disable - disable blocks on an STMPE device
 125  * @stmpe:      Device to work on
 126  * @blocks:     Mask of blocks (enum stmpe_block values) to enable
 127  */
 128 int stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
 129 {
 130         int ret;
 131
 132         mutex_lock(&stmpe->lock);
 133         ret = __stmpe_disable(stmpe, blocks);
 134         mutex_unlock(&stmpe->lock);
 135
 136         return ret;
 137 }
 138 EXPORT_SYMBOL_GPL(stmpe_disable);
 139
 140 /**
 141  * stmpe_reg_read() - read a single STMPE register
 142  * @stmpe:      Device to read from
 143  * @reg:        Register to read
 144  */
 145 int stmpe_reg_read(struct stmpe *stmpe, u8 reg)
 146 {
 147         int ret;
 148
 149         mutex_lock(&stmpe->lock);
 150         ret = __stmpe_reg_read(stmpe, reg);
 151         mutex_unlock(&stmpe->lock);
 152
 153         return ret;
 154 }
 155 EXPORT_SYMBOL_GPL(stmpe_reg_read);
 156
 157 /**
 158  * stmpe_reg_write() - write a single STMPE register
 159  * @stmpe:      Device to write to
 160  * @reg:        Register to write
 161  * @val:        Value to write
 162  */
 163 int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
 164 {
 165         int ret;
 166
 167         mutex_lock(&stmpe->lock);
 168         ret = __stmpe_reg_write(stmpe, reg, val);
 169         mutex_unlock(&stmpe->lock);
 170
 171         return ret;
 172 }
 173 EXPORT_SYMBOL_GPL(stmpe_reg_write);
 174
 175 /**
 176  * stmpe_set_bits() - set the value of a bitfield in a STMPE register
 177  * @stmpe:      Device to write to
 178  * @reg:        Register to write
 179  * @mask:       Mask of bits to set
 180  * @val:        Value to set
 181  */
 182 int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
 183 {
 184         int ret;
 185
 186         mutex_lock(&stmpe->lock);
 187         ret = __stmpe_set_bits(stmpe, reg, mask, val);
 188         mutex_unlock(&stmpe->lock);
 189
 190         return ret;
 191 }
 192 EXPORT_SYMBOL_GPL(stmpe_set_bits);
 193
 194 /**
 195  * stmpe_block_read() - read multiple STMPE registers
 196  * @stmpe:      Device to read from
 197  * @reg:        First register
 198  * @length:     Number of registers
 199  * @values:     Buffer to write to
 200  */
 201 int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values)
 202 {
 203         int ret;
 204
 205         mutex_lock(&stmpe->lock);
 206         ret = __stmpe_block_read(stmpe, reg, length, values);
 207         mutex_unlock(&stmpe->lock);
 208
 209         return ret;
 210 }
 211 EXPORT_SYMBOL_GPL(stmpe_block_read);
 212
 213 /**
 214  * stmpe_block_write() - write multiple STMPE registers
 215  * @stmpe:      Device to write to
 216  * @reg:        First register
 217  * @length:     Number of registers
 218  * @values:     Values to write
 219  */
 220 int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
 221                       const u8 *values)
 222 {
 223         int ret;
 224
 225         mutex_lock(&stmpe->lock);
 226         ret = __stmpe_block_write(stmpe, reg, length, values);
 227         mutex_unlock(&stmpe->lock);
 228
 229         return ret;
 230 }
 231 EXPORT_SYMBOL_GPL(stmpe_block_write);
 232
 233 /**
 234  * stmpe_set_altfunc()- set the alternate function for STMPE pins
 235  * @stmpe:      Device to configure
 236  * @pins:       Bitmask of pins to affect
 237  * @block:      block to enable alternate functions for
 238  *
 239  * @pins is assumed to have a bit set for each of the bits whose alternate
 240  * function is to be changed, numbered according to the GPIOXY numbers.
 241  *
 242  * If the GPIO module is not enabled, this function automatically enables it in
 243  * order to perform the change.
 244  */
 245 int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block)
 246 {
 247         struct stmpe_variant_info *variant = stmpe->variant;
 248         u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB];
 249         int af_bits = variant->af_bits;
 250         int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8);
 251         int mask = (1 << af_bits) - 1;
 252         u8 regs[8];
 253         int af, afperreg, ret;
 254
 255         if (!variant->get_altfunc)
 256                 return 0;
 257
 258         afperreg = 8 / af_bits;
 259         mutex_lock(&stmpe->lock);
 260
 261         ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO);
 262         if (ret < 0)
 263                 goto out;
 264
 265         ret = __stmpe_block_read(stmpe, regaddr, numregs, regs);
 266         if (ret < 0)
 267                 goto out;
 268
 269         af = variant->get_altfunc(stmpe, block);
 270
 271         while (pins) {
 272                 int pin = __ffs(pins);
 273                 int regoffset = numregs - (pin / afperreg) - 1;
 274                 int pos = (pin % afperreg) * (8 / afperreg);
 275
 276                 regs[regoffset] &= ~(mask << pos);
 277                 regs[regoffset] |= af << pos;
 278
 279                 pins &= ~(1 << pin);
 280         }
 281
 282         ret = __stmpe_block_write(stmpe, regaddr, numregs, regs);
 283
 284 out:
 285         mutex_unlock(&stmpe->lock);
 286         return ret;
 287 }
 288 EXPORT_SYMBOL_GPL(stmpe_set_altfunc);
 289
 290 /*
 291  * GPIO (all variants)
 292  */
 293
 294 static struct resource stmpe_gpio_resources[] = {
 295         /* Start and end filled dynamically */
 296         {
 297                 .flags  = IORESOURCE_IRQ,
 298         },
 299 };
 300
 301 static const struct mfd_cell stmpe_gpio_cell = {
 302         .name           = "stmpe-gpio",
 303         .of_compatible  = "st,stmpe-gpio",
 304         .resources      = stmpe_gpio_resources,
 305         .num_resources  = ARRAY_SIZE(stmpe_gpio_resources),
 306 };
 307
 308 static const struct mfd_cell stmpe_gpio_cell_noirq = {
 309         .name           = "stmpe-gpio",
 310         .of_compatible  = "st,stmpe-gpio",
 311         /* gpio cell resources consist of an irq only so no resources here */
 312 };
 313
 314 /*
 315  * Keypad (1601, 2401, 2403)
 316  */
 317
 318 static struct resource stmpe_keypad_resources[] = {
 319         {
 320                 .name   = "KEYPAD",
 321                 .flags  = IORESOURCE_IRQ,
 322         },
 323         {
 324                 .name   = "KEYPAD_OVER",
 325                 .flags  = IORESOURCE_IRQ,
 326         },
 327 };
 328
 329 static const struct mfd_cell stmpe_keypad_cell = {
 330         .name           = "stmpe-keypad",
 331         .of_compatible  = "st,stmpe-keypad",
 332         .resources      = stmpe_keypad_resources,
 333         .num_resources  = ARRAY_SIZE(stmpe_keypad_resources),
 334 };
 335
 336 /*
 337  * PWM (1601, 2401, 2403)
 338  */
 339 static struct resource stmpe_pwm_resources[] = {
 340         {
 341                 .name   = "PWM0",
 342                 .flags  = IORESOURCE_IRQ,
 343         },
 344         {
 345                 .name   = "PWM1",
 346                 .flags  = IORESOURCE_IRQ,
 347         },
 348         {
 349                 .name   = "PWM2",
 350                 .flags  = IORESOURCE_IRQ,
 351         },
 352 };
 353
 354 static const struct mfd_cell stmpe_pwm_cell = {
 355         .name           = "stmpe-pwm",
 356         .of_compatible  = "st,stmpe-pwm",
 357         .resources      = stmpe_pwm_resources,
 358         .num_resources  = ARRAY_SIZE(stmpe_pwm_resources),
 359 };
 360
 361 /*
 362  * STMPE801
 363  */
 364 static const u8 stmpe801_regs[] = {
 365         [STMPE_IDX_CHIP_ID]     = STMPE801_REG_CHIP_ID,
 366         [STMPE_IDX_ICR_LSB]     = STMPE801_REG_SYS_CTRL,
 367         [STMPE_IDX_GPMR_LSB]    = STMPE801_REG_GPIO_MP_STA,
 368         [STMPE_IDX_GPSR_LSB]    = STMPE801_REG_GPIO_SET_PIN,
 369         [STMPE_IDX_GPCR_LSB]    = STMPE801_REG_GPIO_SET_PIN,
 370         [STMPE_IDX_GPDR_LSB]    = STMPE801_REG_GPIO_DIR,
 371         [STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN,
 372         [STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA,
 373
 374 };
 375
 376 static struct stmpe_variant_block stmpe801_blocks[] = {
 377         {
 378                 .cell   = &stmpe_gpio_cell,
 379                 .irq    = 0,
 380                 .block  = STMPE_BLOCK_GPIO,
 381         },
 382 };
 383
 384 static struct stmpe_variant_block stmpe801_blocks_noirq[] = {
 385         {
 386                 .cell   = &stmpe_gpio_cell_noirq,
 387                 .block  = STMPE_BLOCK_GPIO,
 388         },
 389 };
 390
 391 static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks,
 392                            bool enable)
 393 {
 394         if (blocks & STMPE_BLOCK_GPIO)
 395                 return 0;
 396         else
 397                 return -EINVAL;
 398 }
 399
 400 static struct stmpe_variant_info stmpe801 = {
 401         .name           = "stmpe801",
 402         .id_val         = STMPE801_ID,
 403         .id_mask        = 0xffff,
 404         .num_gpios      = 8,
 405         .regs           = stmpe801_regs,
 406         .blocks         = stmpe801_blocks,
 407         .num_blocks     = ARRAY_SIZE(stmpe801_blocks),
 408         .num_irqs       = STMPE801_NR_INTERNAL_IRQS,
 409         .enable         = stmpe801_enable,
 410 };
 411
 412 static struct stmpe_variant_info stmpe801_noirq = {
 413         .name           = "stmpe801",
 414         .id_val         = STMPE801_ID,
 415         .id_mask        = 0xffff,
 416         .num_gpios      = 8,
 417         .regs           = stmpe801_regs,
 418         .blocks         = stmpe801_blocks_noirq,
 419         .num_blocks     = ARRAY_SIZE(stmpe801_blocks_noirq),
 420         .enable         = stmpe801_enable,
 421 };
 422
 423 /*
 424  * Touchscreen (STMPE811 or STMPE610)
 425  */
 426
 427 static struct resource stmpe_ts_resources[] = {
 428         {
 429                 .name   = "TOUCH_DET",
 430                 .flags  = IORESOURCE_IRQ,
 431         },
 432         {
 433                 .name   = "FIFO_TH",
 434                 .flags  = IORESOURCE_IRQ,
 435         },
 436 };
 437
 438 static const struct mfd_cell stmpe_ts_cell = {
 439         .name           = "stmpe-ts",
 440         .of_compatible  = "st,stmpe-ts",
 441         .resources      = stmpe_ts_resources,
 442         .num_resources  = ARRAY_SIZE(stmpe_ts_resources),
 443 };
 444
 445 /*
 446  * STMPE811 or STMPE610
 447  */
 448
 449 static const u8 stmpe811_regs[] = {
 450         [STMPE_IDX_CHIP_ID]     = STMPE811_REG_CHIP_ID,
 451         [STMPE_IDX_ICR_LSB]     = STMPE811_REG_INT_CTRL,
 452         [STMPE_IDX_IER_LSB]     = STMPE811_REG_INT_EN,
 453         [STMPE_IDX_ISR_MSB]     = STMPE811_REG_INT_STA,
 454         [STMPE_IDX_GPMR_LSB]    = STMPE811_REG_GPIO_MP_STA,
 455         [STMPE_IDX_GPSR_LSB]    = STMPE811_REG_GPIO_SET_PIN,
 456         [STMPE_IDX_GPCR_LSB]    = STMPE811_REG_GPIO_CLR_PIN,
 457         [STMPE_IDX_GPDR_LSB]    = STMPE811_REG_GPIO_DIR,
 458         [STMPE_IDX_GPRER_LSB]   = STMPE811_REG_GPIO_RE,
 459         [STMPE_IDX_GPFER_LSB]   = STMPE811_REG_GPIO_FE,
 460         [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF,
 461         [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN,
 462         [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA,
 463         [STMPE_IDX_GPEDR_MSB]   = STMPE811_REG_GPIO_ED,
 464 };
 465
 466 static struct stmpe_variant_block stmpe811_blocks[] = {
 467         {
 468                 .cell   = &stmpe_gpio_cell,
 469                 .irq    = STMPE811_IRQ_GPIOC,
 470                 .block  = STMPE_BLOCK_GPIO,
 471         },
 472         {
 473                 .cell   = &stmpe_ts_cell,
 474                 .irq    = STMPE811_IRQ_TOUCH_DET,
 475                 .block  = STMPE_BLOCK_TOUCHSCREEN,
 476         },
 477 };
 478
 479 static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks,
 480                            bool enable)
 481 {
 482         unsigned int mask = 0;
 483
 484         if (blocks & STMPE_BLOCK_GPIO)
 485                 mask |= STMPE811_SYS_CTRL2_GPIO_OFF;
 486
 487         if (blocks & STMPE_BLOCK_ADC)
 488                 mask |= STMPE811_SYS_CTRL2_ADC_OFF;
 489
 490         if (blocks & STMPE_BLOCK_TOUCHSCREEN)
 491                 mask |= STMPE811_SYS_CTRL2_TSC_OFF;
 492
 493         return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask,
 494                                 enable ? 0 : mask);
 495 }
 496
 497 static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
 498 {
 499         /* 0 for touchscreen, 1 for GPIO */
 500         return block != STMPE_BLOCK_TOUCHSCREEN;
 501 }
 502
 503 static struct stmpe_variant_info stmpe811 = {
 504         .name           = "stmpe811",
 505         .id_val         = 0x0811,
 506         .id_mask        = 0xffff,
 507         .num_gpios      = 8,
 508         .af_bits        = 1,
 509         .regs           = stmpe811_regs,
 510         .blocks         = stmpe811_blocks,
 511         .num_blocks     = ARRAY_SIZE(stmpe811_blocks),
 512         .num_irqs       = STMPE811_NR_INTERNAL_IRQS,
 513         .enable         = stmpe811_enable,
 514         .get_altfunc    = stmpe811_get_altfunc,
 515 };
 516
 517 /* Similar to 811, except number of gpios */
 518 static struct stmpe_variant_info stmpe610 = {
 519         .name           = "stmpe610",
 520         .id_val         = 0x0811,
 521         .id_mask        = 0xffff,
 522         .num_gpios      = 6,
 523         .af_bits        = 1,
 524         .regs           = stmpe811_regs,
 525         .blocks         = stmpe811_blocks,
 526         .num_blocks     = ARRAY_SIZE(stmpe811_blocks),
 527         .num_irqs       = STMPE811_NR_INTERNAL_IRQS,
 528         .enable         = stmpe811_enable,
 529         .get_altfunc    = stmpe811_get_altfunc,
 530 };
 531
 532 /*
 533  * STMPE1601
 534  */
 535
 536 static const u8 stmpe1601_regs[] = {
 537         [STMPE_IDX_CHIP_ID]     = STMPE1601_REG_CHIP_ID,
 538         [STMPE_IDX_ICR_LSB]     = STMPE1601_REG_ICR_LSB,
 539         [STMPE_IDX_IER_LSB]     = STMPE1601_REG_IER_LSB,
 540         [STMPE_IDX_ISR_MSB]     = STMPE1601_REG_ISR_MSB,
 541         [STMPE_IDX_GPMR_LSB]    = STMPE1601_REG_GPIO_MP_LSB,
 542         [STMPE_IDX_GPSR_LSB]    = STMPE1601_REG_GPIO_SET_LSB,
 543         [STMPE_IDX_GPCR_LSB]    = STMPE1601_REG_GPIO_CLR_LSB,
 544         [STMPE_IDX_GPDR_LSB]    = STMPE1601_REG_GPIO_SET_DIR_LSB,
 545         [STMPE_IDX_GPRER_LSB]   = STMPE1601_REG_GPIO_RE_LSB,
 546         [STMPE_IDX_GPFER_LSB]   = STMPE1601_REG_GPIO_FE_LSB,
 547         [STMPE_IDX_GPPUR_LSB]   = STMPE1601_REG_GPIO_PU_LSB,
 548         [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB,
 549         [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB,
 550         [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB,
 551         [STMPE_IDX_GPEDR_MSB]   = STMPE1601_REG_GPIO_ED_MSB,
 552 };
 553
 554 static struct stmpe_variant_block stmpe1601_blocks[] = {
 555         {
 556                 .cell   = &stmpe_gpio_cell,
 557                 .irq    = STMPE1601_IRQ_GPIOC,
 558                 .block  = STMPE_BLOCK_GPIO,
 559         },
 560         {
 561                 .cell   = &stmpe_keypad_cell,
 562                 .irq    = STMPE1601_IRQ_KEYPAD,
 563                 .block  = STMPE_BLOCK_KEYPAD,
 564         },
 565         {
 566                 .cell   = &stmpe_pwm_cell,
 567                 .irq    = STMPE1601_IRQ_PWM0,
 568                 .block  = STMPE_BLOCK_PWM,
 569         },
 570 };
 571
 572 /* supported autosleep timeout delay (in msecs) */
 573 static const int stmpe_autosleep_delay[] = {
 574         4, 16, 32, 64, 128, 256, 512, 1024,
 575 };
 576
 577 static int stmpe_round_timeout(int timeout)
 578 {
 579         int i;
 580
 581         for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) {
 582                 if (stmpe_autosleep_delay[i] >= timeout)
 583                         return i;
 584         }
 585
 586         /*
 587          * requests for delays longer than supported should not return the
 588          * longest supported delay
 589          */
 590         return -EINVAL;
 591 }
 592
 593 static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout)
 594 {
 595         int ret;
 596
 597         if (!stmpe->variant->enable_autosleep)
 598                 return -ENOSYS;
 599
 600         mutex_lock(&stmpe->lock);
 601         ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout);
 602         mutex_unlock(&stmpe->lock);
 603
 604         return ret;
 605 }
 606
 607 /*
 608  * Both stmpe 1601/2403 support same layout for autosleep
 609  */
 610 static int stmpe1601_autosleep(struct stmpe *stmpe,
 611                 int autosleep_timeout)
 612 {
 613         int ret, timeout;
 614
 615         /* choose the best available timeout */
 616         timeout = stmpe_round_timeout(autosleep_timeout);
 617         if (timeout < 0) {
 618                 dev_err(stmpe->dev, "invalid timeout\n");
 619                 return timeout;
 620         }
 621
 622         ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
 623                         STMPE1601_AUTOSLEEP_TIMEOUT_MASK,
 624                         timeout);
 625         if (ret < 0)
 626                 return ret;
 627
 628         return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
 629                         STPME1601_AUTOSLEEP_ENABLE,
 630                         STPME1601_AUTOSLEEP_ENABLE);
 631 }
 632
 633 static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks,
 634                             bool enable)
 635 {
 636         unsigned int mask = 0;
 637
 638         if (blocks & STMPE_BLOCK_GPIO)
 639                 mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO;
 640         else
 641                 mask &= ~STMPE1601_SYS_CTRL_ENABLE_GPIO;
 642
 643         if (blocks & STMPE_BLOCK_KEYPAD)
 644                 mask |= STMPE1601_SYS_CTRL_ENABLE_KPC;
 645         else
 646                 mask &= ~STMPE1601_SYS_CTRL_ENABLE_KPC;
 647
 648         if (blocks & STMPE_BLOCK_PWM)
 649                 mask |= STMPE1601_SYS_CTRL_ENABLE_SPWM;
 650         else
 651                 mask &= ~STMPE1601_SYS_CTRL_ENABLE_SPWM;
 652
 653         return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask,
 654                                 enable ? mask : 0);
 655 }
 656
 657 static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
 658 {
 659         switch (block) {
 660         case STMPE_BLOCK_PWM:
 661                 return 2;
 662
 663         case STMPE_BLOCK_KEYPAD:
 664                 return 1;
 665
 666         case STMPE_BLOCK_GPIO:
 667         default:
 668                 return 0;
 669         }
 670 }
 671
 672 static struct stmpe_variant_info stmpe1601 = {
 673         .name           = "stmpe1601",
 674         .id_val         = 0x0210,
 675         .id_mask        = 0xfff0,       /* at least 0x0210 and 0x0212 */
 676         .num_gpios      = 16,
 677         .af_bits        = 2,
 678         .regs           = stmpe1601_regs,
 679         .blocks         = stmpe1601_blocks,
 680         .num_blocks     = ARRAY_SIZE(stmpe1601_blocks),
 681         .num_irqs       = STMPE1601_NR_INTERNAL_IRQS,
 682         .enable         = stmpe1601_enable,
 683         .get_altfunc    = stmpe1601_get_altfunc,
 684         .enable_autosleep       = stmpe1601_autosleep,
 685 };
 686
 687 /*
 688  * STMPE1801
 689  */
 690 static const u8 stmpe1801_regs[] = {
 691         [STMPE_IDX_CHIP_ID]     = STMPE1801_REG_CHIP_ID,
 692         [STMPE_IDX_ICR_LSB]     = STMPE1801_REG_INT_CTRL_LOW,
 693         [STMPE_IDX_IER_LSB]     = STMPE1801_REG_INT_EN_MASK_LOW,
 694         [STMPE_IDX_ISR_LSB]     = STMPE1801_REG_INT_STA_LOW,
 695         [STMPE_IDX_GPMR_LSB]    = STMPE1801_REG_GPIO_MP_LOW,
 696         [STMPE_IDX_GPSR_LSB]    = STMPE1801_REG_GPIO_SET_LOW,
 697         [STMPE_IDX_GPCR_LSB]    = STMPE1801_REG_GPIO_CLR_LOW,
 698         [STMPE_IDX_GPDR_LSB]    = STMPE1801_REG_GPIO_SET_DIR_LOW,
 699         [STMPE_IDX_GPRER_LSB]   = STMPE1801_REG_GPIO_RE_LOW,
 700         [STMPE_IDX_GPFER_LSB]   = STMPE1801_REG_GPIO_FE_LOW,
 701         [STMPE_IDX_GPPUR_LSB]   = STMPE1801_REG_GPIO_PULL_UP_LOW,
 702         [STMPE_IDX_IEGPIOR_LSB] = STMPE1801_REG_INT_EN_GPIO_MASK_LOW,
 703         [STMPE_IDX_ISGPIOR_LSB] = STMPE1801_REG_INT_STA_GPIO_LOW,
 704 };
 705
 706 static struct stmpe_variant_block stmpe1801_blocks[] = {
 707         {
 708                 .cell   = &stmpe_gpio_cell,
 709                 .irq    = STMPE1801_IRQ_GPIOC,
 710                 .block  = STMPE_BLOCK_GPIO,
 711         },
 712         {
 713                 .cell   = &stmpe_keypad_cell,
 714                 .irq    = STMPE1801_IRQ_KEYPAD,
 715                 .block  = STMPE_BLOCK_KEYPAD,
 716         },
 717 };
 718
 719 static int stmpe1801_enable(struct stmpe *stmpe, unsigned int blocks,
 720                             bool enable)
 721 {
 722         unsigned int mask = 0;
 723         if (blocks & STMPE_BLOCK_GPIO)
 724                 mask |= STMPE1801_MSK_INT_EN_GPIO;
 725
 726         if (blocks & STMPE_BLOCK_KEYPAD)
 727                 mask |= STMPE1801_MSK_INT_EN_KPC;
 728
 729         return __stmpe_set_bits(stmpe, STMPE1801_REG_INT_EN_MASK_LOW, mask,
 730                                 enable ? mask : 0);
 731 }
 732
 733 static int stmpe1801_reset(struct stmpe *stmpe)
 734 {
 735         unsigned long timeout;
 736         int ret = 0;
 737
 738         ret = __stmpe_set_bits(stmpe, STMPE1801_REG_SYS_CTRL,
 739                 STMPE1801_MSK_SYS_CTRL_RESET, STMPE1801_MSK_SYS_CTRL_RESET);
 740         if (ret < 0)
 741                 return ret;
 742
 743         timeout = jiffies + msecs_to_jiffies(100);
 744         while (time_before(jiffies, timeout)) {
 745                 ret = __stmpe_reg_read(stmpe, STMPE1801_REG_SYS_CTRL);
 746                 if (ret < 0)
 747                         return ret;
 748                 if (!(ret & STMPE1801_MSK_SYS_CTRL_RESET))
 749                         return 0;
 750                 usleep_range(100, 200);
 751         }
 752         return -EIO;
 753 }
 754
 755 static struct stmpe_variant_info stmpe1801 = {
 756         .name           = "stmpe1801",
 757         .id_val         = STMPE1801_ID,
 758         .id_mask        = 0xfff0,
 759         .num_gpios      = 18,
 760         .af_bits        = 0,
 761         .regs           = stmpe1801_regs,
 762         .blocks         = stmpe1801_blocks,
 763         .num_blocks     = ARRAY_SIZE(stmpe1801_blocks),
 764         .num_irqs       = STMPE1801_NR_INTERNAL_IRQS,
 765         .enable         = stmpe1801_enable,
 766         /* stmpe1801 do not have any gpio alternate function */
 767         .get_altfunc    = NULL,
 768 };
 769
 770 /*
 771  * STMPE24XX
 772  */
 773
 774 static const u8 stmpe24xx_regs[] = {
 775         [STMPE_IDX_CHIP_ID]     = STMPE24XX_REG_CHIP_ID,
 776         [STMPE_IDX_ICR_LSB]     = STMPE24XX_REG_ICR_LSB,
 777         [STMPE_IDX_IER_LSB]     = STMPE24XX_REG_IER_LSB,
 778         [STMPE_IDX_ISR_MSB]     = STMPE24XX_REG_ISR_MSB,
 779         [STMPE_IDX_GPMR_LSB]    = STMPE24XX_REG_GPMR_LSB,
 780         [STMPE_IDX_GPSR_LSB]    = STMPE24XX_REG_GPSR_LSB,
 781         [STMPE_IDX_GPCR_LSB]    = STMPE24XX_REG_GPCR_LSB,
 782         [STMPE_IDX_GPDR_LSB]    = STMPE24XX_REG_GPDR_LSB,
 783         [STMPE_IDX_GPRER_LSB]   = STMPE24XX_REG_GPRER_LSB,
 784         [STMPE_IDX_GPFER_LSB]   = STMPE24XX_REG_GPFER_LSB,
 785         [STMPE_IDX_GPPUR_LSB]   = STMPE24XX_REG_GPPUR_LSB,
 786         [STMPE_IDX_GPPDR_LSB]   = STMPE24XX_REG_GPPDR_LSB,
 787         [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB,
 788         [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB,
 789         [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB,
 790         [STMPE_IDX_GPEDR_MSB]   = STMPE24XX_REG_GPEDR_MSB,
 791 };
 792
 793 static struct stmpe_variant_block stmpe24xx_blocks[] = {
 794         {
 795                 .cell   = &stmpe_gpio_cell,
 796                 .irq    = STMPE24XX_IRQ_GPIOC,
 797                 .block  = STMPE_BLOCK_GPIO,
 798         },
 799         {
 800                 .cell   = &stmpe_keypad_cell,
 801                 .irq    = STMPE24XX_IRQ_KEYPAD,
 802                 .block  = STMPE_BLOCK_KEYPAD,
 803         },
 804         {
 805                 .cell   = &stmpe_pwm_cell,
 806                 .irq    = STMPE24XX_IRQ_PWM0,
 807                 .block  = STMPE_BLOCK_PWM,
 808         },
 809 };
 810
 811 static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks,
 812                             bool enable)
 813 {
 814         unsigned int mask = 0;
 815
 816         if (blocks & STMPE_BLOCK_GPIO)
 817                 mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO;
 818
 819         if (blocks & STMPE_BLOCK_KEYPAD)
 820                 mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC;
 821
 822         return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask,
 823                                 enable ? mask : 0);
 824 }
 825
 826 static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
 827 {
 828         switch (block) {
 829         case STMPE_BLOCK_ROTATOR:
 830                 return 2;
 831
 832         case STMPE_BLOCK_KEYPAD:
 833         case STMPE_BLOCK_PWM:
 834                 return 1;
 835
 836         case STMPE_BLOCK_GPIO:
 837         default:
 838                 return 0;
 839         }
 840 }
 841
 842 static struct stmpe_variant_info stmpe2401 = {
 843         .name           = "stmpe2401",
 844         .id_val         = 0x0101,
 845         .id_mask        = 0xffff,
 846         .num_gpios      = 24,
 847         .af_bits        = 2,
 848         .regs           = stmpe24xx_regs,
 849         .blocks         = stmpe24xx_blocks,
 850         .num_blocks     = ARRAY_SIZE(stmpe24xx_blocks),
 851         .num_irqs       = STMPE24XX_NR_INTERNAL_IRQS,
 852         .enable         = stmpe24xx_enable,
 853         .get_altfunc    = stmpe24xx_get_altfunc,
 854 };
 855
 856 static struct stmpe_variant_info stmpe2403 = {
 857         .name           = "stmpe2403",
 858         .id_val         = 0x0120,
 859         .id_mask        = 0xffff,
 860         .num_gpios      = 24,
 861         .af_bits        = 2,
 862         .regs           = stmpe24xx_regs,
 863         .blocks         = stmpe24xx_blocks,
 864         .num_blocks     = ARRAY_SIZE(stmpe24xx_blocks),
 865         .num_irqs       = STMPE24XX_NR_INTERNAL_IRQS,
 866         .enable         = stmpe24xx_enable,
 867         .get_altfunc    = stmpe24xx_get_altfunc,
 868         .enable_autosleep       = stmpe1601_autosleep, /* same as stmpe1601 */
 869 };
 870
 871 static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = {
 872         [STMPE610]      = &stmpe610,
 873         [STMPE801]      = &stmpe801,
 874         [STMPE811]      = &stmpe811,
 875         [STMPE1601]     = &stmpe1601,
 876         [STMPE1801]     = &stmpe1801,
 877         [STMPE2401]     = &stmpe2401,
 878         [STMPE2403]     = &stmpe2403,
 879 };
 880
 881 /*
 882  * These devices can be connected in a 'no-irq' configuration - the irq pin
 883  * is not used and the device cannot interrupt the CPU. Here we only list
 884  * devices which support this configuration - the driver will fail probing
 885  * for any devices not listed here which are configured in this way.
 886  */
 887 static struct stmpe_variant_info *stmpe_noirq_variant_info[STMPE_NBR_PARTS] = {
 888         [STMPE801]      = &stmpe801_noirq,
 889 };
 890
 891 static irqreturn_t stmpe_irq(int irq, void *data)
 892 {
 893         struct stmpe *stmpe = data;
 894         struct stmpe_variant_info *variant = stmpe->variant;
 895         int num = DIV_ROUND_UP(variant->num_irqs, 8);
 896         u8 israddr;
 897         u8 isr[3];
 898         int ret;
 899         int i;
 900
 901         if (variant->id_val == STMPE801_ID) {
 902                 int base = irq_create_mapping(stmpe->domain, 0);
 903
 904                 handle_nested_irq(base);
 905                 return IRQ_HANDLED;
 906         }
 907
 908         if (variant->id_val == STMPE1801_ID)
 909                 israddr = stmpe->regs[STMPE_IDX_ISR_LSB];
 910         else
 911                 israddr = stmpe->regs[STMPE_IDX_ISR_MSB];
 912
 913         ret = stmpe_block_read(stmpe, israddr, num, isr);
 914         if (ret < 0)
 915                 return IRQ_NONE;
 916
 917         for (i = 0; i < num; i++) {
 918                 int bank = num - i - 1;
 919                 u8 status = isr[i];
 920                 u8 clear;
 921
 922                 status &= stmpe->ier[bank];
 923                 if (!status)
 924                         continue;
 925
 926                 clear = status;
 927                 while (status) {
 928                         int bit = __ffs(status);
 929                         int line = bank * 8 + bit;
 930                         int nestedirq = irq_create_mapping(stmpe->domain, line);
 931
 932                         handle_nested_irq(nestedirq);
 933                         status &= ~(1 << bit);
 934                 }
 935
 936                 stmpe_reg_write(stmpe, israddr + i, clear);
 937         }
 938
 939         return IRQ_HANDLED;
 940 }
 941
 942 static void stmpe_irq_lock(struct irq_data *data)
 943 {
 944         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
 945
 946         mutex_lock(&stmpe->irq_lock);
 947 }
 948
 949 static void stmpe_irq_sync_unlock(struct irq_data *data)
 950 {
 951         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
 952         struct stmpe_variant_info *variant = stmpe->variant;
 953         int num = DIV_ROUND_UP(variant->num_irqs, 8);
 954         int i;
 955
 956         for (i = 0; i < num; i++) {
 957                 u8 new = stmpe->ier[i];
 958                 u8 old = stmpe->oldier[i];
 959
 960                 if (new == old)
 961                         continue;
 962
 963                 stmpe->oldier[i] = new;
 964                 stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new);
 965         }
 966
 967         mutex_unlock(&stmpe->irq_lock);
 968 }
 969
 970 static void stmpe_irq_mask(struct irq_data *data)
 971 {
 972         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
 973         int offset = data->hwirq;
 974         int regoffset = offset / 8;
 975         int mask = 1 << (offset % 8);
 976
 977         stmpe->ier[regoffset] &= ~mask;
 978 }
 979
 980 static void stmpe_irq_unmask(struct irq_data *data)
 981 {
 982         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
 983         int offset = data->hwirq;
 984         int regoffset = offset / 8;
 985         int mask = 1 << (offset % 8);
 986
 987         stmpe->ier[regoffset] |= mask;
 988 }
 989
 990 static struct irq_chip stmpe_irq_chip = {
 991         .name                   = "stmpe",
 992         .irq_bus_lock           = stmpe_irq_lock,
 993         .irq_bus_sync_unlock    = stmpe_irq_sync_unlock,
 994         .irq_mask               = stmpe_irq_mask,
 995         .irq_unmask             = stmpe_irq_unmask,
 996 };
 997
 998 static int stmpe_irq_map(struct irq_domain *d, unsigned int virq,
 999                                 irq_hw_number_t hwirq)
1000 {
1001         struct stmpe *stmpe = d->host_data;
1002         struct irq_chip *chip = NULL;
1003
1004         if (stmpe->variant->id_val != STMPE801_ID)
1005                 chip = &stmpe_irq_chip;
1006
1007         irq_set_chip_data(virq, stmpe);
1008         irq_set_chip_and_handler(virq, chip, handle_edge_irq);
1009         irq_set_nested_thread(virq, 1);
1010         irq_set_noprobe(virq);
1011
1012         return 0;
1013 }
1014
1015 static void stmpe_irq_unmap(struct irq_domain *d, unsigned int virq)
1016 {
1017                 irq_set_chip_and_handler(virq, NULL, NULL);
1018                 irq_set_chip_data(virq, NULL);
1019 }
1020
1021 static const struct irq_domain_ops stmpe_irq_ops = {
1022         .map    = stmpe_irq_map,
1023         .unmap  = stmpe_irq_unmap,
1024         .xlate  = irq_domain_xlate_twocell,
1025 };
1026
1027 static int stmpe_irq_init(struct stmpe *stmpe, struct device_node *np)
1028 {
1029         int base = 0;
1030         int num_irqs = stmpe->variant->num_irqs;
1031
1032         stmpe->domain = irq_domain_add_simple(np, num_irqs, base,
1033                                               &stmpe_irq_ops, stmpe);
1034         if (!stmpe->domain) {
1035                 dev_err(stmpe->dev, "Failed to create irqdomain\n");
1036                 return -ENOSYS;
1037         }
1038
1039         return 0;
1040 }
1041
1042 static int stmpe_chip_init(struct stmpe *stmpe)
1043 {
1044         unsigned int irq_trigger = stmpe->pdata->irq_trigger;
1045         int autosleep_timeout = stmpe->pdata->autosleep_timeout;
1046         struct stmpe_variant_info *variant = stmpe->variant;
1047         u8 icr = 0;
1048         unsigned int id;
1049         u8 data[2];
1050         int ret;
1051
1052         ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID],
1053                                ARRAY_SIZE(data), data);
1054         if (ret < 0)
1055                 return ret;
1056
1057         id = (data[0] << 8) | data[1];
1058         if ((id & variant->id_mask) != variant->id_val) {
1059                 dev_err(stmpe->dev, "unknown chip id: %#x\n", id);
1060                 return -EINVAL;
1061         }
1062
1063         dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id);
1064
1065         /* Disable all modules -- subdrivers should enable what they need. */
1066         ret = stmpe_disable(stmpe, ~0);
1067         if (ret)
1068                 return ret;
1069
1070         if (id == STMPE1801_ID) {
1071                 ret =  stmpe1801_reset(stmpe);
1072                 if (ret < 0)
1073                         return ret;
1074         }
1075
1076         if (stmpe->irq >= 0) {
1077                 if (id == STMPE801_ID)
1078                         icr = STMPE801_REG_SYS_CTRL_INT_EN;
1079                 else
1080                         icr = STMPE_ICR_LSB_GIM;
1081
1082                 /* STMPE801 doesn't support Edge interrupts */
1083                 if (id != STMPE801_ID) {
1084                         if (irq_trigger == IRQF_TRIGGER_FALLING ||
1085                                         irq_trigger == IRQF_TRIGGER_RISING)
1086                                 icr |= STMPE_ICR_LSB_EDGE;
1087                 }
1088
1089                 if (irq_trigger == IRQF_TRIGGER_RISING ||
1090                                 irq_trigger == IRQF_TRIGGER_HIGH) {
1091                         if (id == STMPE801_ID)
1092                                 icr |= STMPE801_REG_SYS_CTRL_INT_HI;
1093                         else
1094                                 icr |= STMPE_ICR_LSB_HIGH;
1095                 }
1096         }
1097
1098         if (stmpe->pdata->autosleep) {
1099                 ret = stmpe_autosleep(stmpe, autosleep_timeout);
1100                 if (ret)
1101                         return ret;
1102         }
1103
1104         return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr);
1105 }
1106
1107 static int stmpe_add_device(struct stmpe *stmpe, const struct mfd_cell *cell)
1108 {
1109         return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1,
1110                                NULL, 0, stmpe->domain);
1111 }
1112
1113 static int stmpe_devices_init(struct stmpe *stmpe)
1114 {
1115         struct stmpe_variant_info *variant = stmpe->variant;
1116         unsigned int platform_blocks = stmpe->pdata->blocks;
1117         int ret = -EINVAL;
1118         int i, j;
1119
1120         for (i = 0; i < variant->num_blocks; i++) {
1121                 struct stmpe_variant_block *block = &variant->blocks[i];
1122
1123                 if (!(platform_blocks & block->block))
1124                         continue;
1125
1126                 for (j = 0; j < block->cell->num_resources; j++) {
1127                         struct resource *res =
1128                                 (struct resource *) &block->cell->resources[j];
1129
1130                         /* Dynamically fill in a variant's IRQ. */
1131                         if (res->flags & IORESOURCE_IRQ)
1132                                 res->start = res->end = block->irq + j;
1133                 }
1134
1135                 platform_blocks &= ~block->block;
1136                 ret = stmpe_add_device(stmpe, block->cell);
1137                 if (ret)
1138                         return ret;
1139         }
1140
1141         if (platform_blocks)
1142                 dev_warn(stmpe->dev,
1143                          "platform wants blocks (%#x) not present on variant",
1144                          platform_blocks);
1145
1146         return ret;
1147 }
1148
1149 static void stmpe_of_probe(struct stmpe_platform_data *pdata,
1150                            struct device_node *np)
1151 {
1152         struct device_node *child;
1153
1154         pdata->id = of_alias_get_id(np, "stmpe-i2c");
1155         if (pdata->id < 0)
1156                 pdata->id = -1;
1157
1158         pdata->irq_gpio = of_get_named_gpio_flags(np, "irq-gpio", 0,
1159                                 &pdata->irq_trigger);
1160         if (gpio_is_valid(pdata->irq_gpio))
1161                 pdata->irq_over_gpio = 1;
1162         else
1163                 pdata->irq_trigger = IRQF_TRIGGER_NONE;
1164
1165         of_property_read_u32(np, "st,autosleep-timeout",
1166                         &pdata->autosleep_timeout);
1167
1168         pdata->autosleep = (pdata->autosleep_timeout) ? true : false;
1169
1170         for_each_child_of_node(np, child) {
1171                 if (!strcmp(child->name, "stmpe_gpio")) {
1172                         pdata->blocks |= STMPE_BLOCK_GPIO;
1173                 } else if (!strcmp(child->name, "stmpe_keypad")) {
1174                         pdata->blocks |= STMPE_BLOCK_KEYPAD;
1175                 } else if (!strcmp(child->name, "stmpe_touchscreen")) {
1176                         pdata->blocks |= STMPE_BLOCK_TOUCHSCREEN;
1177                 } else if (!strcmp(child->name, "stmpe_adc")) {
1178                         pdata->blocks |= STMPE_BLOCK_ADC;
1179                 } else if (!strcmp(child->name, "stmpe_pwm")) {
1180                         pdata->blocks |= STMPE_BLOCK_PWM;
1181                 } else if (!strcmp(child->name, "stmpe_rotator")) {
1182                         pdata->blocks |= STMPE_BLOCK_ROTATOR;
1183                 }
1184         }
1185 }
1186
1187 /* Called from client specific probe routines */
1188 int stmpe_probe(struct stmpe_client_info *ci, enum stmpe_partnum partnum)
1189 {
1190         struct stmpe_platform_data *pdata = dev_get_platdata(ci->dev);
1191         struct device_node *np = ci->dev->of_node;
1192         struct stmpe *stmpe;
1193         int ret;
1194
1195         if (!pdata) {
1196                 if (!np)
1197                         return -EINVAL;
1198
1199                 pdata = devm_kzalloc(ci->dev, sizeof(*pdata), GFP_KERNEL);
1200                 if (!pdata)
1201                         return -ENOMEM;
1202
1203                 stmpe_of_probe(pdata, np);
1204
1205                 if (of_find_property(np, "interrupts", NULL) == NULL)
1206                         ci->irq = -1;
1207         }
1208
1209         stmpe = devm_kzalloc(ci->dev, sizeof(struct stmpe), GFP_KERNEL);
1210         if (!stmpe)
1211                 return -ENOMEM;
1212
1213         mutex_init(&stmpe->irq_lock);
1214         mutex_init(&stmpe->lock);
1215
1216         stmpe->dev = ci->dev;
1217         stmpe->client = ci->client;
1218         stmpe->pdata = pdata;
1219         stmpe->ci = ci;
1220         stmpe->partnum = partnum;
1221         stmpe->variant = stmpe_variant_info[partnum];
1222         stmpe->regs = stmpe->variant->regs;
1223         stmpe->num_gpios = stmpe->variant->num_gpios;
1224         stmpe->vcc = devm_regulator_get_optional(ci->dev, "vcc");
1225         if (!IS_ERR(stmpe->vcc)) {
1226                 ret = regulator_enable(stmpe->vcc);
1227                 if (ret)
1228                         dev_warn(ci->dev, "failed to enable VCC supply\n");
1229         }
1230         stmpe->vio = devm_regulator_get_optional(ci->dev, "vio");
1231         if (!IS_ERR(stmpe->vio)) {
1232                 ret = regulator_enable(stmpe->vio);
1233                 if (ret)
1234                         dev_warn(ci->dev, "failed to enable VIO supply\n");
1235         }
1236         dev_set_drvdata(stmpe->dev, stmpe);
1237
1238         if (ci->init)
1239                 ci->init(stmpe);
1240
1241         if (pdata->irq_over_gpio) {
1242                 ret = devm_gpio_request_one(ci->dev, pdata->irq_gpio,
1243                                 GPIOF_DIR_IN, "stmpe");
1244                 if (ret) {
1245                         dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n",
1246                                         ret);
1247                         return ret;
1248                 }
1249
1250                 stmpe->irq = gpio_to_irq(pdata->irq_gpio);
1251         } else {
1252                 stmpe->irq = ci->irq;
1253         }
1254
1255         if (stmpe->irq < 0) {
1256                 /* use alternate variant info for no-irq mode, if supported */
1257                 dev_info(stmpe->dev,
1258                         "%s configured in no-irq mode by platform data\n",
1259                         stmpe->variant->name);
1260                 if (!stmpe_noirq_variant_info[stmpe->partnum]) {
1261                         dev_err(stmpe->dev,
1262                                 "%s does not support no-irq mode!\n",
1263                                 stmpe->variant->name);
1264                         return -ENODEV;
1265                 }
1266                 stmpe->variant = stmpe_noirq_variant_info[stmpe->partnum];
1267         } else if (pdata->irq_trigger == IRQF_TRIGGER_NONE) {
1268                 pdata->irq_trigger = irq_get_trigger_type(stmpe->irq);
1269         }
1270
1271         ret = stmpe_chip_init(stmpe);
1272         if (ret)
1273                 return ret;
1274
1275         if (stmpe->irq >= 0) {
1276                 ret = stmpe_irq_init(stmpe, np);
1277                 if (ret)
1278                         return ret;
1279
1280                 ret = devm_request_threaded_irq(ci->dev, stmpe->irq, NULL,
1281                                 stmpe_irq, pdata->irq_trigger | IRQF_ONESHOT,
1282                                 "stmpe", stmpe);
1283                 if (ret) {
1284                         dev_err(stmpe->dev, "failed to request IRQ: %d\n",
1285                                         ret);
1286                         return ret;
1287                 }
1288         }
1289
1290         ret = stmpe_devices_init(stmpe);
1291         if (!ret)
1292                 return 0;
1293
1294         dev_err(stmpe->dev, "failed to add children\n");
1295         mfd_remove_devices(stmpe->dev);
1296
1297         return ret;
1298 }
1299
1300 int stmpe_remove(struct stmpe *stmpe)
1301 {
1302         if (!IS_ERR(stmpe->vio))
1303                 regulator_disable(stmpe->vio);
1304         if (!IS_ERR(stmpe->vcc))
1305                 regulator_disable(stmpe->vcc);
1306
1307         mfd_remove_devices(stmpe->dev);
1308
1309         return 0;
1310 }
1311
1312 #ifdef CONFIG_PM
1313 static int stmpe_suspend(struct device *dev)
1314 {
1315         struct stmpe *stmpe = dev_get_drvdata(dev);
1316
1317         if (stmpe->irq >= 0 && device_may_wakeup(dev))
1318                 enable_irq_wake(stmpe->irq);
1319
1320         return 0;
1321 }
1322
1323 static int stmpe_resume(struct device *dev)
1324 {
1325         struct stmpe *stmpe = dev_get_drvdata(dev);
1326
1327         if (stmpe->irq >= 0 && device_may_wakeup(dev))
1328                 disable_irq_wake(stmpe->irq);
1329
1330         return 0;
1331 }
1332
1333 const struct dev_pm_ops stmpe_dev_pm_ops = {
1334         .suspend        = stmpe_suspend,
1335         .resume         = stmpe_resume,
1336 };
1337 #endif