2 * linux/drivers/mmc/host/pxa.c - PXA MMCI driver
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This hardware is really sick:
11 * - No way to clear interrupts.
12 * - Have to turn off the clock whenever we touch the device.
13 * - Doesn't tell you how many data blocks were transferred.
16 * 1 and 3 byte data transfers not supported
17 * max block length up to 1023
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/ioport.h>
22 #include <linux/platform_device.h>
23 #include <linux/delay.h>
24 #include <linux/interrupt.h>
25 #include <linux/dmaengine.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/dma/pxa-dma.h>
28 #include <linux/clk.h>
29 #include <linux/err.h>
30 #include <linux/mmc/host.h>
31 #include <linux/mmc/slot-gpio.h>
33 #include <linux/regulator/consumer.h>
34 #include <linux/gpio.h>
35 #include <linux/gfp.h>
37 #include <linux/of_gpio.h>
38 #include <linux/of_device.h>
40 #include <asm/sizes.h>
42 #include <mach/hardware.h>
43 #include <linux/platform_data/mmc-pxamci.h>
47 #define DRIVER_NAME "pxa2xx-mci"
50 #define CLKRT_OFF (~0)
52 #define mmc_has_26MHz() (cpu_is_pxa300() || cpu_is_pxa310() \
61 unsigned long clkrate;
66 unsigned int power_mode;
67 struct pxamci_platform_data *pdata;
69 struct mmc_request *mrq;
70 struct mmc_command *cmd;
71 struct mmc_data *data;
73 struct dma_chan *dma_chan_rx;
74 struct dma_chan *dma_chan_tx;
75 dma_cookie_t dma_cookie;
80 unsigned int dma_drcmrrx;
81 unsigned int dma_drcmrtx;
83 struct regulator *vcc;
86 static inline void pxamci_init_ocr(struct pxamci_host *host)
88 #ifdef CONFIG_REGULATOR
89 host->vcc = devm_regulator_get_optional(mmc_dev(host->mmc), "vmmc");
91 if (IS_ERR(host->vcc))
94 host->mmc->ocr_avail = mmc_regulator_get_ocrmask(host->vcc);
95 if (host->pdata && host->pdata->ocr_mask)
96 dev_warn(mmc_dev(host->mmc),
97 "ocr_mask/setpower will not be used\n");
100 if (host->vcc == NULL) {
101 /* fall-back to platform data */
102 host->mmc->ocr_avail = host->pdata ?
103 host->pdata->ocr_mask :
104 MMC_VDD_32_33 | MMC_VDD_33_34;
108 static inline int pxamci_set_power(struct pxamci_host *host,
109 unsigned char power_mode,
117 if (power_mode == MMC_POWER_UP) {
118 ret = mmc_regulator_set_ocr(host->mmc, host->vcc, vdd);
121 } else if (power_mode == MMC_POWER_OFF) {
122 ret = mmc_regulator_set_ocr(host->mmc, host->vcc, 0);
127 if (!host->vcc && host->pdata &&
128 gpio_is_valid(host->pdata->gpio_power)) {
129 on = ((1 << vdd) & host->pdata->ocr_mask);
130 gpio_set_value(host->pdata->gpio_power,
131 !!on ^ host->pdata->gpio_power_invert);
133 if (!host->vcc && host->pdata && host->pdata->setpower)
134 return host->pdata->setpower(mmc_dev(host->mmc), vdd);
139 static void pxamci_stop_clock(struct pxamci_host *host)
141 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
142 unsigned long timeout = 10000;
145 writel(STOP_CLOCK, host->base + MMC_STRPCL);
148 v = readl(host->base + MMC_STAT);
149 if (!(v & STAT_CLK_EN))
155 dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
159 static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask)
163 spin_lock_irqsave(&host->lock, flags);
164 host->imask &= ~mask;
165 writel(host->imask, host->base + MMC_I_MASK);
166 spin_unlock_irqrestore(&host->lock, flags);
169 static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
173 spin_lock_irqsave(&host->lock, flags);
175 writel(host->imask, host->base + MMC_I_MASK);
176 spin_unlock_irqrestore(&host->lock, flags);
179 static void pxamci_dma_irq(void *param);
181 static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
183 struct dma_async_tx_descriptor *tx;
184 enum dma_data_direction direction;
185 struct dma_slave_config config;
186 struct dma_chan *chan;
187 unsigned int nob = data->blocks;
188 unsigned long long clks;
189 unsigned int timeout;
194 if (data->flags & MMC_DATA_STREAM)
197 writel(nob, host->base + MMC_NOB);
198 writel(data->blksz, host->base + MMC_BLKLEN);
200 clks = (unsigned long long)data->timeout_ns * host->clkrate;
201 do_div(clks, 1000000000UL);
202 timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt);
203 writel((timeout + 255) / 256, host->base + MMC_RDTO);
205 memset(&config, 0, sizeof(config));
206 config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
207 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
208 config.src_addr = host->res->start + MMC_RXFIFO;
209 config.dst_addr = host->res->start + MMC_TXFIFO;
210 config.src_maxburst = 32;
211 config.dst_maxburst = 32;
213 if (data->flags & MMC_DATA_READ) {
214 host->dma_dir = DMA_FROM_DEVICE;
215 direction = DMA_DEV_TO_MEM;
216 chan = host->dma_chan_rx;
218 host->dma_dir = DMA_TO_DEVICE;
219 direction = DMA_MEM_TO_DEV;
220 chan = host->dma_chan_tx;
223 config.direction = direction;
225 ret = dmaengine_slave_config(chan, &config);
227 dev_err(mmc_dev(host->mmc), "dma slave config failed\n");
231 host->dma_len = dma_map_sg(chan->device->dev, data->sg, data->sg_len,
234 tx = dmaengine_prep_slave_sg(chan, data->sg, host->dma_len, direction,
237 dev_err(mmc_dev(host->mmc), "prep_slave_sg() failed\n");
241 if (!(data->flags & MMC_DATA_READ)) {
242 tx->callback = pxamci_dma_irq;
243 tx->callback_param = host;
246 host->dma_cookie = dmaengine_submit(tx);
249 * workaround for erratum #91:
250 * only start DMA now if we are doing a read,
251 * otherwise we wait until CMD/RESP has finished
252 * before starting DMA.
254 if (!cpu_is_pxa27x() || data->flags & MMC_DATA_READ)
255 dma_async_issue_pending(chan);
258 static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
260 WARN_ON(host->cmd != NULL);
263 if (cmd->flags & MMC_RSP_BUSY)
266 #define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
267 switch (RSP_TYPE(mmc_resp_type(cmd))) {
268 case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6, r7 */
269 cmdat |= CMDAT_RESP_SHORT;
271 case RSP_TYPE(MMC_RSP_R3):
272 cmdat |= CMDAT_RESP_R3;
274 case RSP_TYPE(MMC_RSP_R2):
275 cmdat |= CMDAT_RESP_R2;
281 writel(cmd->opcode, host->base + MMC_CMD);
282 writel(cmd->arg >> 16, host->base + MMC_ARGH);
283 writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
284 writel(cmdat, host->base + MMC_CMDAT);
285 writel(host->clkrt, host->base + MMC_CLKRT);
287 writel(START_CLOCK, host->base + MMC_STRPCL);
289 pxamci_enable_irq(host, END_CMD_RES);
292 static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
297 mmc_request_done(host->mmc, mrq);
300 static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
302 struct mmc_command *cmd = host->cmd;
312 * Did I mention this is Sick. We always need to
313 * discard the upper 8 bits of the first 16-bit word.
315 v = readl(host->base + MMC_RES) & 0xffff;
316 for (i = 0; i < 4; i++) {
317 u32 w1 = readl(host->base + MMC_RES) & 0xffff;
318 u32 w2 = readl(host->base + MMC_RES) & 0xffff;
319 cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8;
323 if (stat & STAT_TIME_OUT_RESPONSE) {
324 cmd->error = -ETIMEDOUT;
325 } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
327 * workaround for erratum #42:
328 * Intel PXA27x Family Processor Specification Update Rev 001
329 * A bogus CRC error can appear if the msb of a 136 bit
332 if (cpu_is_pxa27x() &&
333 (cmd->flags & MMC_RSP_136 && cmd->resp[0] & 0x80000000))
334 pr_debug("ignoring CRC from command %d - *risky*\n", cmd->opcode);
336 cmd->error = -EILSEQ;
339 pxamci_disable_irq(host, END_CMD_RES);
340 if (host->data && !cmd->error) {
341 pxamci_enable_irq(host, DATA_TRAN_DONE);
343 * workaround for erratum #91, if doing write
346 if (cpu_is_pxa27x() && host->data->flags & MMC_DATA_WRITE)
347 dma_async_issue_pending(host->dma_chan_tx);
349 pxamci_finish_request(host, host->mrq);
355 static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
357 struct mmc_data *data = host->data;
358 struct dma_chan *chan;
363 if (data->flags & MMC_DATA_READ)
364 chan = host->dma_chan_rx;
366 chan = host->dma_chan_tx;
367 dma_unmap_sg(chan->device->dev,
368 data->sg, data->sg_len, host->dma_dir);
370 if (stat & STAT_READ_TIME_OUT)
371 data->error = -ETIMEDOUT;
372 else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR))
373 data->error = -EILSEQ;
376 * There appears to be a hardware design bug here. There seems to
377 * be no way to find out how much data was transferred to the card.
378 * This means that if there was an error on any block, we mark all
379 * data blocks as being in error.
382 data->bytes_xfered = data->blocks * data->blksz;
384 data->bytes_xfered = 0;
386 pxamci_disable_irq(host, DATA_TRAN_DONE);
389 if (host->mrq->stop) {
390 pxamci_stop_clock(host);
391 pxamci_start_cmd(host, host->mrq->stop, host->cmdat);
393 pxamci_finish_request(host, host->mrq);
399 static irqreturn_t pxamci_irq(int irq, void *devid)
401 struct pxamci_host *host = devid;
405 ireg = readl(host->base + MMC_I_REG) & ~readl(host->base + MMC_I_MASK);
408 unsigned stat = readl(host->base + MMC_STAT);
410 pr_debug("PXAMCI: irq %08x stat %08x\n", ireg, stat);
412 if (ireg & END_CMD_RES)
413 handled |= pxamci_cmd_done(host, stat);
414 if (ireg & DATA_TRAN_DONE)
415 handled |= pxamci_data_done(host, stat);
416 if (ireg & SDIO_INT) {
417 mmc_signal_sdio_irq(host->mmc);
422 return IRQ_RETVAL(handled);
425 static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq)
427 struct pxamci_host *host = mmc_priv(mmc);
430 WARN_ON(host->mrq != NULL);
434 pxamci_stop_clock(host);
437 host->cmdat &= ~CMDAT_INIT;
440 pxamci_setup_data(host, mrq->data);
442 cmdat &= ~CMDAT_BUSY;
443 cmdat |= CMDAT_DATAEN | CMDAT_DMAEN;
444 if (mrq->data->flags & MMC_DATA_WRITE)
445 cmdat |= CMDAT_WRITE;
447 if (mrq->data->flags & MMC_DATA_STREAM)
448 cmdat |= CMDAT_STREAM;
451 pxamci_start_cmd(host, mrq->cmd, cmdat);
454 static int pxamci_get_ro(struct mmc_host *mmc)
456 struct pxamci_host *host = mmc_priv(mmc);
458 if (host->pdata && gpio_is_valid(host->pdata->gpio_card_ro))
459 return mmc_gpio_get_ro(mmc);
460 if (host->pdata && host->pdata->get_ro)
461 return !!host->pdata->get_ro(mmc_dev(mmc));
463 * Board doesn't support read only detection; let the mmc core
469 static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
471 struct pxamci_host *host = mmc_priv(mmc);
474 unsigned long rate = host->clkrate;
475 unsigned int clk = rate / ios->clock;
477 if (host->clkrt == CLKRT_OFF)
478 clk_prepare_enable(host->clk);
480 if (ios->clock == 26000000) {
481 /* to support 26MHz */
484 /* to handle (19.5MHz, 26MHz) */
489 * clk might result in a lower divisor than we
490 * desire. check for that condition and adjust
493 if (rate / clk > ios->clock)
495 host->clkrt = fls(clk) - 1;
499 * we write clkrt on the next command
502 pxamci_stop_clock(host);
503 if (host->clkrt != CLKRT_OFF) {
504 host->clkrt = CLKRT_OFF;
505 clk_disable_unprepare(host->clk);
509 if (host->power_mode != ios->power_mode) {
512 host->power_mode = ios->power_mode;
514 ret = pxamci_set_power(host, ios->power_mode, ios->vdd);
516 dev_err(mmc_dev(mmc), "unable to set power\n");
518 * The .set_ios() function in the mmc_host_ops
519 * struct return void, and failing to set the
520 * power should be rare so we print an error and
526 if (ios->power_mode == MMC_POWER_ON)
527 host->cmdat |= CMDAT_INIT;
530 if (ios->bus_width == MMC_BUS_WIDTH_4)
531 host->cmdat |= CMDAT_SD_4DAT;
533 host->cmdat &= ~CMDAT_SD_4DAT;
535 dev_dbg(mmc_dev(mmc), "PXAMCI: clkrt = %x cmdat = %x\n",
536 host->clkrt, host->cmdat);
539 static void pxamci_enable_sdio_irq(struct mmc_host *host, int enable)
541 struct pxamci_host *pxa_host = mmc_priv(host);
544 pxamci_enable_irq(pxa_host, SDIO_INT);
546 pxamci_disable_irq(pxa_host, SDIO_INT);
549 static const struct mmc_host_ops pxamci_ops = {
550 .request = pxamci_request,
551 .get_cd = mmc_gpio_get_cd,
552 .get_ro = pxamci_get_ro,
553 .set_ios = pxamci_set_ios,
554 .enable_sdio_irq = pxamci_enable_sdio_irq,
557 static void pxamci_dma_irq(void *param)
559 struct pxamci_host *host = param;
560 struct dma_tx_state state;
561 enum dma_status status;
562 struct dma_chan *chan;
565 spin_lock_irqsave(&host->lock, flags);
570 if (host->data->flags & MMC_DATA_READ)
571 chan = host->dma_chan_rx;
573 chan = host->dma_chan_tx;
575 status = dmaengine_tx_status(chan, host->dma_cookie, &state);
577 if (likely(status == DMA_COMPLETE)) {
578 writel(BUF_PART_FULL, host->base + MMC_PRTBUF);
580 pr_err("%s: DMA error on %s channel\n", mmc_hostname(host->mmc),
581 host->data->flags & MMC_DATA_READ ? "rx" : "tx");
582 host->data->error = -EIO;
583 pxamci_data_done(host, 0);
587 spin_unlock_irqrestore(&host->lock, flags);
590 static irqreturn_t pxamci_detect_irq(int irq, void *devid)
592 struct pxamci_host *host = mmc_priv(devid);
594 mmc_detect_change(devid, msecs_to_jiffies(host->pdata->detect_delay_ms));
599 static const struct of_device_id pxa_mmc_dt_ids[] = {
600 { .compatible = "marvell,pxa-mmc" },
604 MODULE_DEVICE_TABLE(of, pxa_mmc_dt_ids);
606 static int pxamci_of_init(struct platform_device *pdev)
608 struct device_node *np = pdev->dev.of_node;
609 struct pxamci_platform_data *pdata;
615 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
619 pdata->gpio_card_detect =
620 of_get_named_gpio(np, "cd-gpios", 0);
621 pdata->gpio_card_ro =
622 of_get_named_gpio(np, "wp-gpios", 0);
624 /* pxa-mmc specific */
626 of_get_named_gpio(np, "pxa-mmc,gpio-power", 0);
628 if (of_property_read_u32(np, "pxa-mmc,detect-delay-ms", &tmp) == 0)
629 pdata->detect_delay_ms = tmp;
631 pdev->dev.platform_data = pdata;
636 static int pxamci_of_init(struct platform_device *pdev)
642 static int pxamci_probe(struct platform_device *pdev)
644 struct mmc_host *mmc;
645 struct pxamci_host *host = NULL;
646 struct resource *r, *dmarx, *dmatx;
647 struct pxad_param param_rx, param_tx;
648 int ret, irq, gpio_cd = -1, gpio_ro = -1, gpio_power = -1;
651 ret = pxamci_of_init(pdev);
655 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
656 irq = platform_get_irq(pdev, 0);
660 mmc = mmc_alloc_host(sizeof(struct pxamci_host), &pdev->dev);
666 mmc->ops = &pxamci_ops;
669 * We can do SG-DMA, but we don't because we never know how much
670 * data we successfully wrote to the card.
672 mmc->max_segs = NR_SG;
675 * Our hardware DMA can handle a maximum of one page per SG entry.
677 mmc->max_seg_size = PAGE_SIZE;
680 * Block length register is only 10 bits before PXA27x.
682 mmc->max_blk_size = cpu_is_pxa25x() ? 1023 : 2048;
685 * Block count register is 16 bits.
687 mmc->max_blk_count = 65535;
689 host = mmc_priv(mmc);
691 host->pdata = pdev->dev.platform_data;
692 host->clkrt = CLKRT_OFF;
694 host->clk = devm_clk_get(&pdev->dev, NULL);
695 if (IS_ERR(host->clk)) {
696 ret = PTR_ERR(host->clk);
701 host->clkrate = clk_get_rate(host->clk);
704 * Calculate minimum clock rate, rounding up.
706 mmc->f_min = (host->clkrate + 63) / 64;
707 mmc->f_max = (mmc_has_26MHz()) ? 26000000 : host->clkrate;
709 pxamci_init_ocr(host);
713 if (!cpu_is_pxa25x()) {
714 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
715 host->cmdat |= CMDAT_SDIO_INT_EN;
717 mmc->caps |= MMC_CAP_MMC_HIGHSPEED |
718 MMC_CAP_SD_HIGHSPEED;
721 spin_lock_init(&host->lock);
724 host->imask = MMC_I_MASK_ALL;
726 host->base = devm_ioremap_resource(&pdev->dev, r);
727 if (IS_ERR(host->base)) {
728 ret = PTR_ERR(host->base);
733 * Ensure that the host controller is shut down, and setup
736 pxamci_stop_clock(host);
737 writel(0, host->base + MMC_SPI);
738 writel(64, host->base + MMC_RESTO);
739 writel(host->imask, host->base + MMC_I_MASK);
741 ret = devm_request_irq(&pdev->dev, host->irq, pxamci_irq, 0,
746 platform_set_drvdata(pdev, mmc);
748 if (!pdev->dev.of_node) {
749 dmarx = platform_get_resource(pdev, IORESOURCE_DMA, 0);
750 dmatx = platform_get_resource(pdev, IORESOURCE_DMA, 1);
751 if (!dmarx || !dmatx) {
755 param_rx.prio = PXAD_PRIO_LOWEST;
756 param_rx.drcmr = dmarx->start;
757 param_tx.prio = PXAD_PRIO_LOWEST;
758 param_tx.drcmr = dmatx->start;
762 dma_cap_set(DMA_SLAVE, mask);
765 dma_request_slave_channel_compat(mask, pxad_filter_fn,
766 ¶m_rx, &pdev->dev, "rx");
767 if (host->dma_chan_rx == NULL) {
768 dev_err(&pdev->dev, "unable to request rx dma channel\n");
774 dma_request_slave_channel_compat(mask, pxad_filter_fn,
775 ¶m_tx, &pdev->dev, "tx");
776 if (host->dma_chan_tx == NULL) {
777 dev_err(&pdev->dev, "unable to request tx dma channel\n");
783 gpio_cd = host->pdata->gpio_card_detect;
784 gpio_ro = host->pdata->gpio_card_ro;
785 gpio_power = host->pdata->gpio_power;
787 if (gpio_is_valid(gpio_power)) {
788 ret = devm_gpio_request(&pdev->dev, gpio_power,
791 dev_err(&pdev->dev, "Failed requesting gpio_power %d\n",
795 gpio_direction_output(gpio_power,
796 host->pdata->gpio_power_invert);
798 if (gpio_is_valid(gpio_ro))
799 ret = mmc_gpio_request_ro(mmc, gpio_ro);
801 dev_err(&pdev->dev, "Failed requesting gpio_ro %d\n", gpio_ro);
804 mmc->caps2 |= host->pdata->gpio_card_ro_invert ?
805 0 : MMC_CAP2_RO_ACTIVE_HIGH;
808 if (gpio_is_valid(gpio_cd))
809 ret = mmc_gpio_request_cd(mmc, gpio_cd, 0);
811 dev_err(&pdev->dev, "Failed requesting gpio_cd %d\n", gpio_cd);
815 if (host->pdata && host->pdata->init)
816 host->pdata->init(&pdev->dev, pxamci_detect_irq, mmc);
818 if (gpio_is_valid(gpio_power) && host->pdata->setpower)
819 dev_warn(&pdev->dev, "gpio_power and setpower() both defined\n");
820 if (gpio_is_valid(gpio_ro) && host->pdata->get_ro)
821 dev_warn(&pdev->dev, "gpio_ro and get_ro() both defined\n");
829 if (host->dma_chan_rx)
830 dma_release_channel(host->dma_chan_rx);
831 if (host->dma_chan_tx)
832 dma_release_channel(host->dma_chan_tx);
839 static int pxamci_remove(struct platform_device *pdev)
841 struct mmc_host *mmc = platform_get_drvdata(pdev);
842 int gpio_cd = -1, gpio_ro = -1, gpio_power = -1;
845 struct pxamci_host *host = mmc_priv(mmc);
847 mmc_remove_host(mmc);
850 gpio_cd = host->pdata->gpio_card_detect;
851 gpio_ro = host->pdata->gpio_card_ro;
852 gpio_power = host->pdata->gpio_power;
854 if (host->pdata && host->pdata->exit)
855 host->pdata->exit(&pdev->dev, mmc);
857 pxamci_stop_clock(host);
858 writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
859 END_CMD_RES|PRG_DONE|DATA_TRAN_DONE,
860 host->base + MMC_I_MASK);
862 dmaengine_terminate_all(host->dma_chan_rx);
863 dmaengine_terminate_all(host->dma_chan_tx);
864 dma_release_channel(host->dma_chan_rx);
865 dma_release_channel(host->dma_chan_tx);
872 static struct platform_driver pxamci_driver = {
873 .probe = pxamci_probe,
874 .remove = pxamci_remove,
877 .of_match_table = of_match_ptr(pxa_mmc_dt_ids),
881 module_platform_driver(pxamci_driver);
883 MODULE_DESCRIPTION("PXA Multimedia Card Interface Driver");
884 MODULE_LICENSE("GPL");
885 MODULE_ALIAS("platform:pxa2xx-mci");