drivers/mmc/host/sdhci-pci-core.c

   1 /*  linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
   2  *
   3  *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or (at
   8  * your option) any later version.
   9  *
  10  * Thanks to the following companies for their support:
  11  *
  12  *     - JMicron (hardware and technical support)
  13  */
  14
  15 #include <linux/delay.h>
  16 #include <linux/highmem.h>
  17 #include <linux/module.h>
  18 #include <linux/pci.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/slab.h>
  21 #include <linux/device.h>
  22 #include <linux/mmc/host.h>
  23 #include <linux/mmc/mmc.h>
  24 #include <linux/scatterlist.h>
  25 #include <linux/io.h>
  26 #include <linux/gpio.h>
  27 #include <linux/pm_runtime.h>
  28 #include <linux/mmc/slot-gpio.h>
  29 #include <linux/mmc/sdhci-pci-data.h>
  30
  31 #include "sdhci.h"
  32 #include "sdhci-pci.h"
  33 #include "sdhci-pci-o2micro.h"
  34
  35 /*****************************************************************************\
  36  *                                                                           *
  37  * Hardware specific quirk handling                                          *
  38  *                                                                           *
  39 \*****************************************************************************/
  40
  41 static int ricoh_probe(struct sdhci_pci_chip *chip)
  42 {
  43         if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
  44             chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
  45                 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
  46         return 0;
  47 }
  48
  49 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
  50 {
  51         slot->host->caps =
  52                 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
  53                         & SDHCI_TIMEOUT_CLK_MASK) |
  54
  55                 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
  56                         & SDHCI_CLOCK_BASE_MASK) |
  57
  58                 SDHCI_TIMEOUT_CLK_UNIT |
  59                 SDHCI_CAN_VDD_330 |
  60                 SDHCI_CAN_DO_HISPD |
  61                 SDHCI_CAN_DO_SDMA;
  62         return 0;
  63 }
  64
  65 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
  66 {
  67         /* Apply a delay to allow controller to settle */
  68         /* Otherwise it becomes confused if card state changed
  69                 during suspend */
  70         msleep(500);
  71         return 0;
  72 }
  73
  74 static const struct sdhci_pci_fixes sdhci_ricoh = {
  75         .probe          = ricoh_probe,
  76         .quirks         = SDHCI_QUIRK_32BIT_DMA_ADDR |
  77                           SDHCI_QUIRK_FORCE_DMA |
  78                           SDHCI_QUIRK_CLOCK_BEFORE_RESET,
  79 };
  80
  81 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
  82         .probe_slot     = ricoh_mmc_probe_slot,
  83         .resume         = ricoh_mmc_resume,
  84         .quirks         = SDHCI_QUIRK_32BIT_DMA_ADDR |
  85                           SDHCI_QUIRK_CLOCK_BEFORE_RESET |
  86                           SDHCI_QUIRK_NO_CARD_NO_RESET |
  87                           SDHCI_QUIRK_MISSING_CAPS
  88 };
  89
  90 static const struct sdhci_pci_fixes sdhci_ene_712 = {
  91         .quirks         = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  92                           SDHCI_QUIRK_BROKEN_DMA,
  93 };
  94
  95 static const struct sdhci_pci_fixes sdhci_ene_714 = {
  96         .quirks         = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  97                           SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
  98                           SDHCI_QUIRK_BROKEN_DMA,
  99 };
 100
 101 static const struct sdhci_pci_fixes sdhci_cafe = {
 102         .quirks         = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
 103                           SDHCI_QUIRK_NO_BUSY_IRQ |
 104                           SDHCI_QUIRK_BROKEN_CARD_DETECTION |
 105                           SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
 106 };
 107
 108 static const struct sdhci_pci_fixes sdhci_intel_qrk = {
 109         .quirks         = SDHCI_QUIRK_NO_HISPD_BIT,
 110 };
 111
 112 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
 113 {
 114         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
 115         return 0;
 116 }
 117
 118 /*
 119  * ADMA operation is disabled for Moorestown platform due to
 120  * hardware bugs.
 121  */
 122 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
 123 {
 124         /*
 125          * slots number is fixed here for MRST as SDIO3/5 are never used and
 126          * have hardware bugs.
 127          */
 128         chip->num_slots = 1;
 129         return 0;
 130 }
 131
 132 static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
 133 {
 134         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
 135         return 0;
 136 }
 137
 138 #ifdef CONFIG_PM
 139
 140 static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
 141 {
 142         struct sdhci_pci_slot *slot = dev_id;
 143         struct sdhci_host *host = slot->host;
 144
 145         mmc_detect_change(host->mmc, msecs_to_jiffies(200));
 146         return IRQ_HANDLED;
 147 }
 148
 149 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
 150 {
 151         int err, irq, gpio = slot->cd_gpio;
 152
 153         slot->cd_gpio = -EINVAL;
 154         slot->cd_irq = -EINVAL;
 155
 156         if (!gpio_is_valid(gpio))
 157                 return;
 158
 159         err = gpio_request(gpio, "sd_cd");
 160         if (err < 0)
 161                 goto out;
 162
 163         err = gpio_direction_input(gpio);
 164         if (err < 0)
 165                 goto out_free;
 166
 167         irq = gpio_to_irq(gpio);
 168         if (irq < 0)
 169                 goto out_free;
 170
 171         err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
 172                           IRQF_TRIGGER_FALLING, "sd_cd", slot);
 173         if (err)
 174                 goto out_free;
 175
 176         slot->cd_gpio = gpio;
 177         slot->cd_irq = irq;
 178
 179         return;
 180
 181 out_free:
 182         gpio_free(gpio);
 183 out:
 184         dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
 185 }
 186
 187 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
 188 {
 189         if (slot->cd_irq >= 0)
 190                 free_irq(slot->cd_irq, slot);
 191         if (gpio_is_valid(slot->cd_gpio))
 192                 gpio_free(slot->cd_gpio);
 193 }
 194
 195 #else
 196
 197 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
 198 {
 199 }
 200
 201 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
 202 {
 203 }
 204
 205 #endif
 206
 207 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
 208 {
 209         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
 210         slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC |
 211                                   MMC_CAP2_HC_ERASE_SZ;
 212         return 0;
 213 }
 214
 215 static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
 216 {
 217         slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
 218         return 0;
 219 }
 220
 221 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
 222         .quirks         = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
 223         .probe_slot     = mrst_hc_probe_slot,
 224 };
 225
 226 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
 227         .quirks         = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
 228         .probe          = mrst_hc_probe,
 229 };
 230
 231 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
 232         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 233         .allow_runtime_pm = true,
 234         .own_cd_for_runtime_pm = true,
 235 };
 236
 237 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
 238         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 239         .quirks2        = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
 240         .allow_runtime_pm = true,
 241         .probe_slot     = mfd_sdio_probe_slot,
 242 };
 243
 244 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
 245         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 246         .allow_runtime_pm = true,
 247         .probe_slot     = mfd_emmc_probe_slot,
 248 };
 249
 250 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
 251         .quirks         = SDHCI_QUIRK_BROKEN_ADMA,
 252         .probe_slot     = pch_hc_probe_slot,
 253 };
 254
 255 static void sdhci_pci_int_hw_reset(struct sdhci_host *host)
 256 {
 257         u8 reg;
 258
 259         reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
 260         reg |= 0x10;
 261         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
 262         /* For eMMC, minimum is 1us but give it 9us for good measure */
 263         udelay(9);
 264         reg &= ~0x10;
 265         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
 266         /* For eMMC, minimum is 200us but give it 300us for good measure */
 267         usleep_range(300, 1000);
 268 }
 269
 270 static int spt_select_drive_strength(struct sdhci_host *host,
 271                                      struct mmc_card *card,
 272                                      unsigned int max_dtr,
 273                                      int host_drv, int card_drv, int *drv_type)
 274 {
 275         int drive_strength;
 276
 277         if (sdhci_pci_spt_drive_strength > 0)
 278                 drive_strength = sdhci_pci_spt_drive_strength & 0xf;
 279         else
 280                 drive_strength = 0; /* Default 50-ohm */
 281
 282         if ((mmc_driver_type_mask(drive_strength) & card_drv) == 0)
 283                 drive_strength = 0; /* Default 50-ohm */
 284
 285         return drive_strength;
 286 }
 287
 288 /* Try to read the drive strength from the card */
 289 static void spt_read_drive_strength(struct sdhci_host *host)
 290 {
 291         u32 val, i, t;
 292         u16 m;
 293
 294         if (sdhci_pci_spt_drive_strength)
 295                 return;
 296
 297         sdhci_pci_spt_drive_strength = -1;
 298
 299         m = sdhci_readw(host, SDHCI_HOST_CONTROL2) & 0x7;
 300         if (m != 3 && m != 5)
 301                 return;
 302         val = sdhci_readl(host, SDHCI_PRESENT_STATE);
 303         if (val & 0x3)
 304                 return;
 305         sdhci_writel(host, 0x007f0023, SDHCI_INT_ENABLE);
 306         sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE);
 307         sdhci_writew(host, 0x10, SDHCI_TRANSFER_MODE);
 308         sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
 309         sdhci_writew(host, 512, SDHCI_BLOCK_SIZE);
 310         sdhci_writew(host, 1, SDHCI_BLOCK_COUNT);
 311         sdhci_writel(host, 0, SDHCI_ARGUMENT);
 312         sdhci_writew(host, 0x83b, SDHCI_COMMAND);
 313         for (i = 0; i < 1000; i++) {
 314                 val = sdhci_readl(host, SDHCI_INT_STATUS);
 315                 if (val & 0xffff8000)
 316                         return;
 317                 if (val & 0x20)
 318                         break;
 319                 udelay(1);
 320         }
 321         val = sdhci_readl(host, SDHCI_PRESENT_STATE);
 322         if (!(val & 0x800))
 323                 return;
 324         for (i = 0; i < 47; i++)
 325                 val = sdhci_readl(host, SDHCI_BUFFER);
 326         t = val & 0xf00;
 327         if (t != 0x200 && t != 0x300)
 328                 return;
 329
 330         sdhci_pci_spt_drive_strength = 0x10 | ((val >> 12) & 0xf);
 331 }
 332
 333 static int bxt_get_cd(struct mmc_host *mmc)
 334 {
 335         int gpio_cd = mmc_gpio_get_cd(mmc);
 336         struct sdhci_host *host = mmc_priv(mmc);
 337         unsigned long flags;
 338         int ret = 0;
 339
 340         if (!gpio_cd)
 341                 return 0;
 342
 343         spin_lock_irqsave(&host->lock, flags);
 344
 345         if (host->flags & SDHCI_DEVICE_DEAD)
 346                 goto out;
 347
 348         ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
 349 out:
 350         spin_unlock_irqrestore(&host->lock, flags);
 351
 352         return ret;
 353 }
 354
 355 static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
 356 {
 357         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
 358                                  MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
 359                                  MMC_CAP_WAIT_WHILE_BUSY;
 360         slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
 361         slot->hw_reset = sdhci_pci_int_hw_reset;
 362         if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC)
 363                 slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
 364         if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_SPT_EMMC) {
 365                 spt_read_drive_strength(slot->host);
 366                 slot->select_drive_strength = spt_select_drive_strength;
 367         }
 368         return 0;
 369 }
 370
 371 static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
 372 {
 373         slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE |
 374                                  MMC_CAP_WAIT_WHILE_BUSY;
 375         return 0;
 376 }
 377
 378 static int byt_sd_probe_slot(struct sdhci_pci_slot *slot)
 379 {
 380         slot->host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY;
 381         slot->cd_con_id = NULL;
 382         slot->cd_idx = 0;
 383         slot->cd_override_level = true;
 384         if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXT_SD ||
 385             slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXTM_SD ||
 386             slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_APL_SD) {
 387                 slot->host->mmc_host_ops.get_cd = bxt_get_cd;
 388                 slot->host->mmc->caps |= MMC_CAP_AGGRESSIVE_PM;
 389         }
 390
 391         return 0;
 392 }
 393
 394 static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
 395         .allow_runtime_pm = true,
 396         .probe_slot     = byt_emmc_probe_slot,
 397         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 398         .quirks2        = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
 399                           SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 |
 400                           SDHCI_QUIRK2_STOP_WITH_TC,
 401 };
 402
 403 static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
 404         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 405         .quirks2        = SDHCI_QUIRK2_HOST_OFF_CARD_ON |
 406                         SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
 407         .allow_runtime_pm = true,
 408         .probe_slot     = byt_sdio_probe_slot,
 409 };
 410
 411 static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
 412         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 413         .quirks2        = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
 414                           SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
 415                           SDHCI_QUIRK2_STOP_WITH_TC,
 416         .allow_runtime_pm = true,
 417         .own_cd_for_runtime_pm = true,
 418         .probe_slot     = byt_sd_probe_slot,
 419 };
 420
 421 /* Define Host controllers for Intel Merrifield platform */
 422 #define INTEL_MRFLD_EMMC_0      0
 423 #define INTEL_MRFLD_EMMC_1      1
 424
 425 static int intel_mrfld_mmc_probe_slot(struct sdhci_pci_slot *slot)
 426 {
 427         if ((PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFLD_EMMC_0) &&
 428             (PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFLD_EMMC_1))
 429                 /* SD support is not ready yet */
 430                 return -ENODEV;
 431
 432         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
 433                                  MMC_CAP_1_8V_DDR;
 434
 435         return 0;
 436 }
 437
 438 static const struct sdhci_pci_fixes sdhci_intel_mrfld_mmc = {
 439         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 440         .quirks2        = SDHCI_QUIRK2_BROKEN_HS200 |
 441                         SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
 442         .allow_runtime_pm = true,
 443         .probe_slot     = intel_mrfld_mmc_probe_slot,
 444 };
 445
 446 /* O2Micro extra registers */
 447 #define O2_SD_LOCK_WP           0xD3
 448 #define O2_SD_MULTI_VCC3V       0xEE
 449 #define O2_SD_CLKREQ            0xEC
 450 #define O2_SD_CAPS              0xE0
 451 #define O2_SD_ADMA1             0xE2
 452 #define O2_SD_ADMA2             0xE7
 453 #define O2_SD_INF_MOD           0xF1
 454
 455 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
 456 {
 457         u8 scratch;
 458         int ret;
 459
 460         ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
 461         if (ret)
 462                 return ret;
 463
 464         /*
 465          * Turn PMOS on [bit 0], set over current detection to 2.4 V
 466          * [bit 1:2] and enable over current debouncing [bit 6].
 467          */
 468         if (on)
 469                 scratch |= 0x47;
 470         else
 471                 scratch &= ~0x47;
 472
 473         return pci_write_config_byte(chip->pdev, 0xAE, scratch);
 474 }
 475
 476 static int jmicron_probe(struct sdhci_pci_chip *chip)
 477 {
 478         int ret;
 479         u16 mmcdev = 0;
 480
 481         if (chip->pdev->revision == 0) {
 482                 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
 483                           SDHCI_QUIRK_32BIT_DMA_SIZE |
 484                           SDHCI_QUIRK_32BIT_ADMA_SIZE |
 485                           SDHCI_QUIRK_RESET_AFTER_REQUEST |
 486                           SDHCI_QUIRK_BROKEN_SMALL_PIO;
 487         }
 488
 489         /*
 490          * JMicron chips can have two interfaces to the same hardware
 491          * in order to work around limitations in Microsoft's driver.
 492          * We need to make sure we only bind to one of them.
 493          *
 494          * This code assumes two things:
 495          *
 496          * 1. The PCI code adds subfunctions in order.
 497          *
 498          * 2. The MMC interface has a lower subfunction number
 499          *    than the SD interface.
 500          */
 501         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
 502                 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
 503         else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
 504                 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
 505
 506         if (mmcdev) {
 507                 struct pci_dev *sd_dev;
 508
 509                 sd_dev = NULL;
 510                 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
 511                                                 mmcdev, sd_dev)) != NULL) {
 512                         if ((PCI_SLOT(chip->pdev->devfn) ==
 513                                 PCI_SLOT(sd_dev->devfn)) &&
 514                                 (chip->pdev->bus == sd_dev->bus))
 515                                 break;
 516                 }
 517
 518                 if (sd_dev) {
 519                         pci_dev_put(sd_dev);
 520                         dev_info(&chip->pdev->dev, "Refusing to bind to "
 521                                 "secondary interface.\n");
 522                         return -ENODEV;
 523                 }
 524         }
 525
 526         /*
 527          * JMicron chips need a bit of a nudge to enable the power
 528          * output pins.
 529          */
 530         ret = jmicron_pmos(chip, 1);
 531         if (ret) {
 532                 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
 533                 return ret;
 534         }
 535
 536         /* quirk for unsable RO-detection on JM388 chips */
 537         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
 538             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
 539                 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
 540
 541         return 0;
 542 }
 543
 544 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
 545 {
 546         u8 scratch;
 547
 548         scratch = readb(host->ioaddr + 0xC0);
 549
 550         if (on)
 551                 scratch |= 0x01;
 552         else
 553                 scratch &= ~0x01;
 554
 555         writeb(scratch, host->ioaddr + 0xC0);
 556 }
 557
 558 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
 559 {
 560         if (slot->chip->pdev->revision == 0) {
 561                 u16 version;
 562
 563                 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
 564                 version = (version & SDHCI_VENDOR_VER_MASK) >>
 565                         SDHCI_VENDOR_VER_SHIFT;
 566
 567                 /*
 568                  * Older versions of the chip have lots of nasty glitches
 569                  * in the ADMA engine. It's best just to avoid it
 570                  * completely.
 571                  */
 572                 if (version < 0xAC)
 573                         slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
 574         }
 575
 576         /* JM388 MMC doesn't support 1.8V while SD supports it */
 577         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
 578                 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
 579                         MMC_VDD_29_30 | MMC_VDD_30_31 |
 580                         MMC_VDD_165_195; /* allow 1.8V */
 581                 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
 582                         MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
 583         }
 584
 585         /*
 586          * The secondary interface requires a bit set to get the
 587          * interrupts.
 588          */
 589         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
 590             slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
 591                 jmicron_enable_mmc(slot->host, 1);
 592
 593         slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
 594
 595         return 0;
 596 }
 597
 598 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
 599 {
 600         if (dead)
 601                 return;
 602
 603         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
 604             slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
 605                 jmicron_enable_mmc(slot->host, 0);
 606 }
 607
 608 static int jmicron_suspend(struct sdhci_pci_chip *chip)
 609 {
 610         int i;
 611
 612         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
 613             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
 614                 for (i = 0; i < chip->num_slots; i++)
 615                         jmicron_enable_mmc(chip->slots[i]->host, 0);
 616         }
 617
 618         return 0;
 619 }
 620
 621 static int jmicron_resume(struct sdhci_pci_chip *chip)
 622 {
 623         int ret, i;
 624
 625         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
 626             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
 627                 for (i = 0; i < chip->num_slots; i++)
 628                         jmicron_enable_mmc(chip->slots[i]->host, 1);
 629         }
 630
 631         ret = jmicron_pmos(chip, 1);
 632         if (ret) {
 633                 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
 634                 return ret;
 635         }
 636
 637         return 0;
 638 }
 639
 640 static const struct sdhci_pci_fixes sdhci_o2 = {
 641         .probe = sdhci_pci_o2_probe,
 642         .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 643         .quirks2 = SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD,
 644         .probe_slot = sdhci_pci_o2_probe_slot,
 645         .resume = sdhci_pci_o2_resume,
 646 };
 647
 648 static const struct sdhci_pci_fixes sdhci_jmicron = {
 649         .probe          = jmicron_probe,
 650
 651         .probe_slot     = jmicron_probe_slot,
 652         .remove_slot    = jmicron_remove_slot,
 653
 654         .suspend        = jmicron_suspend,
 655         .resume         = jmicron_resume,
 656 };
 657
 658 /* SysKonnect CardBus2SDIO extra registers */
 659 #define SYSKT_CTRL              0x200
 660 #define SYSKT_RDFIFO_STAT       0x204
 661 #define SYSKT_WRFIFO_STAT       0x208
 662 #define SYSKT_POWER_DATA        0x20c
 663 #define   SYSKT_POWER_330       0xef
 664 #define   SYSKT_POWER_300       0xf8
 665 #define   SYSKT_POWER_184       0xcc
 666 #define SYSKT_POWER_CMD         0x20d
 667 #define   SYSKT_POWER_START     (1 << 7)
 668 #define SYSKT_POWER_STATUS      0x20e
 669 #define   SYSKT_POWER_STATUS_OK (1 << 0)
 670 #define SYSKT_BOARD_REV         0x210
 671 #define SYSKT_CHIP_REV          0x211
 672 #define SYSKT_CONF_DATA         0x212
 673 #define   SYSKT_CONF_DATA_1V8   (1 << 2)
 674 #define   SYSKT_CONF_DATA_2V5   (1 << 1)
 675 #define   SYSKT_CONF_DATA_3V3   (1 << 0)
 676
 677 static int syskt_probe(struct sdhci_pci_chip *chip)
 678 {
 679         if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
 680                 chip->pdev->class &= ~0x0000FF;
 681                 chip->pdev->class |= PCI_SDHCI_IFDMA;
 682         }
 683         return 0;
 684 }
 685
 686 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
 687 {
 688         int tm, ps;
 689
 690         u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
 691         u8  chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
 692         dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
 693                                          "board rev %d.%d, chip rev %d.%d\n",
 694                                          board_rev >> 4, board_rev & 0xf,
 695                                          chip_rev >> 4,  chip_rev & 0xf);
 696         if (chip_rev >= 0x20)
 697                 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
 698
 699         writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
 700         writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
 701         udelay(50);
 702         tm = 10;  /* Wait max 1 ms */
 703         do {
 704                 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
 705                 if (ps & SYSKT_POWER_STATUS_OK)
 706                         break;
 707                 udelay(100);
 708         } while (--tm);
 709         if (!tm) {
 710                 dev_err(&slot->chip->pdev->dev,
 711                         "power regulator never stabilized");
 712                 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
 713                 return -ENODEV;
 714         }
 715
 716         return 0;
 717 }
 718
 719 static const struct sdhci_pci_fixes sdhci_syskt = {
 720         .quirks         = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
 721         .probe          = syskt_probe,
 722         .probe_slot     = syskt_probe_slot,
 723 };
 724
 725 static int via_probe(struct sdhci_pci_chip *chip)
 726 {
 727         if (chip->pdev->revision == 0x10)
 728                 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
 729
 730         return 0;
 731 }
 732
 733 static const struct sdhci_pci_fixes sdhci_via = {
 734         .probe          = via_probe,
 735 };
 736
 737 static int rtsx_probe_slot(struct sdhci_pci_slot *slot)
 738 {
 739         slot->host->mmc->caps2 |= MMC_CAP2_HS200;
 740         return 0;
 741 }
 742
 743 static const struct sdhci_pci_fixes sdhci_rtsx = {
 744         .quirks2        = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
 745                         SDHCI_QUIRK2_BROKEN_64_BIT_DMA |
 746                         SDHCI_QUIRK2_BROKEN_DDR50,
 747         .probe_slot     = rtsx_probe_slot,
 748 };
 749
 750 /*AMD chipset generation*/
 751 enum amd_chipset_gen {
 752         AMD_CHIPSET_BEFORE_ML,
 753         AMD_CHIPSET_CZ,
 754         AMD_CHIPSET_NL,
 755         AMD_CHIPSET_UNKNOWN,
 756 };
 757
 758 static int amd_probe(struct sdhci_pci_chip *chip)
 759 {
 760         struct pci_dev  *smbus_dev;
 761         enum amd_chipset_gen gen;
 762
 763         smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
 764                         PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);
 765         if (smbus_dev) {
 766                 gen = AMD_CHIPSET_BEFORE_ML;
 767         } else {
 768                 smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
 769                                 PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL);
 770                 if (smbus_dev) {
 771                         if (smbus_dev->revision < 0x51)
 772                                 gen = AMD_CHIPSET_CZ;
 773                         else
 774                                 gen = AMD_CHIPSET_NL;
 775                 } else {
 776                         gen = AMD_CHIPSET_UNKNOWN;
 777                 }
 778         }
 779
 780         if ((gen == AMD_CHIPSET_BEFORE_ML) || (gen == AMD_CHIPSET_CZ)) {
 781                 chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;
 782                 chip->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
 783         }
 784
 785         return 0;
 786 }
 787
 788 static const struct sdhci_pci_fixes sdhci_amd = {
 789         .probe          = amd_probe,
 790 };
 791
 792 static const struct pci_device_id pci_ids[] = {
 793         {
 794                 .vendor         = PCI_VENDOR_ID_RICOH,
 795                 .device         = PCI_DEVICE_ID_RICOH_R5C822,
 796                 .subvendor      = PCI_ANY_ID,
 797                 .subdevice      = PCI_ANY_ID,
 798                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh,
 799         },
 800
 801         {
 802                 .vendor         = PCI_VENDOR_ID_RICOH,
 803                 .device         = 0x843,
 804                 .subvendor      = PCI_ANY_ID,
 805                 .subdevice      = PCI_ANY_ID,
 806                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
 807         },
 808
 809         {
 810                 .vendor         = PCI_VENDOR_ID_RICOH,
 811                 .device         = 0xe822,
 812                 .subvendor      = PCI_ANY_ID,
 813                 .subdevice      = PCI_ANY_ID,
 814                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
 815         },
 816
 817         {
 818                 .vendor         = PCI_VENDOR_ID_RICOH,
 819                 .device         = 0xe823,
 820                 .subvendor      = PCI_ANY_ID,
 821                 .subdevice      = PCI_ANY_ID,
 822                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
 823         },
 824
 825         {
 826                 .vendor         = PCI_VENDOR_ID_ENE,
 827                 .device         = PCI_DEVICE_ID_ENE_CB712_SD,
 828                 .subvendor      = PCI_ANY_ID,
 829                 .subdevice      = PCI_ANY_ID,
 830                 .driver_data    = (kernel_ulong_t)&sdhci_ene_712,
 831         },
 832
 833         {
 834                 .vendor         = PCI_VENDOR_ID_ENE,
 835                 .device         = PCI_DEVICE_ID_ENE_CB712_SD_2,
 836                 .subvendor      = PCI_ANY_ID,
 837                 .subdevice      = PCI_ANY_ID,
 838                 .driver_data    = (kernel_ulong_t)&sdhci_ene_712,
 839         },
 840
 841         {
 842                 .vendor         = PCI_VENDOR_ID_ENE,
 843                 .device         = PCI_DEVICE_ID_ENE_CB714_SD,
 844                 .subvendor      = PCI_ANY_ID,
 845                 .subdevice      = PCI_ANY_ID,
 846                 .driver_data    = (kernel_ulong_t)&sdhci_ene_714,
 847         },
 848
 849         {
 850                 .vendor         = PCI_VENDOR_ID_ENE,
 851                 .device         = PCI_DEVICE_ID_ENE_CB714_SD_2,
 852                 .subvendor      = PCI_ANY_ID,
 853                 .subdevice      = PCI_ANY_ID,
 854                 .driver_data    = (kernel_ulong_t)&sdhci_ene_714,
 855         },
 856
 857         {
 858                 .vendor         = PCI_VENDOR_ID_MARVELL,
 859                 .device         = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
 860                 .subvendor      = PCI_ANY_ID,
 861                 .subdevice      = PCI_ANY_ID,
 862                 .driver_data    = (kernel_ulong_t)&sdhci_cafe,
 863         },
 864
 865         {
 866                 .vendor         = PCI_VENDOR_ID_JMICRON,
 867                 .device         = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
 868                 .subvendor      = PCI_ANY_ID,
 869                 .subdevice      = PCI_ANY_ID,
 870                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
 871         },
 872
 873         {
 874                 .vendor         = PCI_VENDOR_ID_JMICRON,
 875                 .device         = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
 876                 .subvendor      = PCI_ANY_ID,
 877                 .subdevice      = PCI_ANY_ID,
 878                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
 879         },
 880
 881         {
 882                 .vendor         = PCI_VENDOR_ID_JMICRON,
 883                 .device         = PCI_DEVICE_ID_JMICRON_JMB388_SD,
 884                 .subvendor      = PCI_ANY_ID,
 885                 .subdevice      = PCI_ANY_ID,
 886                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
 887         },
 888
 889         {
 890                 .vendor         = PCI_VENDOR_ID_JMICRON,
 891                 .device         = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
 892                 .subvendor      = PCI_ANY_ID,
 893                 .subdevice      = PCI_ANY_ID,
 894                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
 895         },
 896
 897         {
 898                 .vendor         = PCI_VENDOR_ID_SYSKONNECT,
 899                 .device         = 0x8000,
 900                 .subvendor      = PCI_ANY_ID,
 901                 .subdevice      = PCI_ANY_ID,
 902                 .driver_data    = (kernel_ulong_t)&sdhci_syskt,
 903         },
 904
 905         {
 906                 .vendor         = PCI_VENDOR_ID_VIA,
 907                 .device         = 0x95d0,
 908                 .subvendor      = PCI_ANY_ID,
 909                 .subdevice      = PCI_ANY_ID,
 910                 .driver_data    = (kernel_ulong_t)&sdhci_via,
 911         },
 912
 913         {
 914                 .vendor         = PCI_VENDOR_ID_REALTEK,
 915                 .device         = 0x5250,
 916                 .subvendor      = PCI_ANY_ID,
 917                 .subdevice      = PCI_ANY_ID,
 918                 .driver_data    = (kernel_ulong_t)&sdhci_rtsx,
 919         },
 920
 921         {
 922                 .vendor         = PCI_VENDOR_ID_INTEL,
 923                 .device         = PCI_DEVICE_ID_INTEL_QRK_SD,
 924                 .subvendor      = PCI_ANY_ID,
 925                 .subdevice      = PCI_ANY_ID,
 926                 .driver_data    = (kernel_ulong_t)&sdhci_intel_qrk,
 927         },
 928
 929         {
 930                 .vendor         = PCI_VENDOR_ID_INTEL,
 931                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD0,
 932                 .subvendor      = PCI_ANY_ID,
 933                 .subdevice      = PCI_ANY_ID,
 934                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
 935         },
 936
 937         {
 938                 .vendor         = PCI_VENDOR_ID_INTEL,
 939                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD1,
 940                 .subvendor      = PCI_ANY_ID,
 941                 .subdevice      = PCI_ANY_ID,
 942                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
 943         },
 944
 945         {
 946                 .vendor         = PCI_VENDOR_ID_INTEL,
 947                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD2,
 948                 .subvendor      = PCI_ANY_ID,
 949                 .subdevice      = PCI_ANY_ID,
 950                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
 951         },
 952
 953         {
 954                 .vendor         = PCI_VENDOR_ID_INTEL,
 955                 .device         = PCI_DEVICE_ID_INTEL_MFD_SD,
 956                 .subvendor      = PCI_ANY_ID,
 957                 .subdevice      = PCI_ANY_ID,
 958                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sd,
 959         },
 960
 961         {
 962                 .vendor         = PCI_VENDOR_ID_INTEL,
 963                 .device         = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
 964                 .subvendor      = PCI_ANY_ID,
 965                 .subdevice      = PCI_ANY_ID,
 966                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
 967         },
 968
 969         {
 970                 .vendor         = PCI_VENDOR_ID_INTEL,
 971                 .device         = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
 972                 .subvendor      = PCI_ANY_ID,
 973                 .subdevice      = PCI_ANY_ID,
 974                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
 975         },
 976
 977         {
 978                 .vendor         = PCI_VENDOR_ID_INTEL,
 979                 .device         = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
 980                 .subvendor      = PCI_ANY_ID,
 981                 .subdevice      = PCI_ANY_ID,
 982                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
 983         },
 984
 985         {
 986                 .vendor         = PCI_VENDOR_ID_INTEL,
 987                 .device         = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
 988                 .subvendor      = PCI_ANY_ID,
 989                 .subdevice      = PCI_ANY_ID,
 990                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
 991         },
 992
 993         {
 994                 .vendor         = PCI_VENDOR_ID_INTEL,
 995                 .device         = PCI_DEVICE_ID_INTEL_PCH_SDIO0,
 996                 .subvendor      = PCI_ANY_ID,
 997                 .subdevice      = PCI_ANY_ID,
 998                 .driver_data    = (kernel_ulong_t)&sdhci_intel_pch_sdio,
 999         },
1000
1001         {
1002                 .vendor         = PCI_VENDOR_ID_INTEL,
1003                 .device         = PCI_DEVICE_ID_INTEL_PCH_SDIO1,
1004                 .subvendor      = PCI_ANY_ID,
1005                 .subdevice      = PCI_ANY_ID,
1006                 .driver_data    = (kernel_ulong_t)&sdhci_intel_pch_sdio,
1007         },
1008
1009         {
1010                 .vendor         = PCI_VENDOR_ID_INTEL,
1011                 .device         = PCI_DEVICE_ID_INTEL_BYT_EMMC,
1012                 .subvendor      = PCI_ANY_ID,
1013                 .subdevice      = PCI_ANY_ID,
1014                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1015         },
1016
1017         {
1018                 .vendor         = PCI_VENDOR_ID_INTEL,
1019                 .device         = PCI_DEVICE_ID_INTEL_BYT_SDIO,
1020                 .subvendor      = PCI_ANY_ID,
1021                 .subdevice      = PCI_ANY_ID,
1022                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1023         },
1024
1025         {
1026                 .vendor         = PCI_VENDOR_ID_INTEL,
1027                 .device         = PCI_DEVICE_ID_INTEL_BYT_SD,
1028                 .subvendor      = PCI_ANY_ID,
1029                 .subdevice      = PCI_ANY_ID,
1030                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1031         },
1032
1033         {
1034                 .vendor         = PCI_VENDOR_ID_INTEL,
1035                 .device         = PCI_DEVICE_ID_INTEL_BYT_EMMC2,
1036                 .subvendor      = PCI_ANY_ID,
1037                 .subdevice      = PCI_ANY_ID,
1038                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1039         },
1040
1041         {
1042                 .vendor         = PCI_VENDOR_ID_INTEL,
1043                 .device         = PCI_DEVICE_ID_INTEL_BSW_EMMC,
1044                 .subvendor      = PCI_ANY_ID,
1045                 .subdevice      = PCI_ANY_ID,
1046                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1047         },
1048
1049         {
1050                 .vendor         = PCI_VENDOR_ID_INTEL,
1051                 .device         = PCI_DEVICE_ID_INTEL_BSW_SDIO,
1052                 .subvendor      = PCI_ANY_ID,
1053                 .subdevice      = PCI_ANY_ID,
1054                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1055         },
1056
1057         {
1058                 .vendor         = PCI_VENDOR_ID_INTEL,
1059                 .device         = PCI_DEVICE_ID_INTEL_BSW_SD,
1060                 .subvendor      = PCI_ANY_ID,
1061                 .subdevice      = PCI_ANY_ID,
1062                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1063         },
1064
1065         {
1066                 .vendor         = PCI_VENDOR_ID_INTEL,
1067                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO0,
1068                 .subvendor      = PCI_ANY_ID,
1069                 .subdevice      = PCI_ANY_ID,
1070                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sd,
1071         },
1072
1073         {
1074                 .vendor         = PCI_VENDOR_ID_INTEL,
1075                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO1,
1076                 .subvendor      = PCI_ANY_ID,
1077                 .subdevice      = PCI_ANY_ID,
1078                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
1079         },
1080
1081         {
1082                 .vendor         = PCI_VENDOR_ID_INTEL,
1083                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO2,
1084                 .subvendor      = PCI_ANY_ID,
1085                 .subdevice      = PCI_ANY_ID,
1086                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
1087         },
1088
1089         {
1090                 .vendor         = PCI_VENDOR_ID_INTEL,
1091                 .device         = PCI_DEVICE_ID_INTEL_CLV_EMMC0,
1092                 .subvendor      = PCI_ANY_ID,
1093                 .subdevice      = PCI_ANY_ID,
1094                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
1095         },
1096
1097         {
1098                 .vendor         = PCI_VENDOR_ID_INTEL,
1099                 .device         = PCI_DEVICE_ID_INTEL_CLV_EMMC1,
1100                 .subvendor      = PCI_ANY_ID,
1101                 .subdevice      = PCI_ANY_ID,
1102                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
1103         },
1104
1105         {
1106                 .vendor         = PCI_VENDOR_ID_INTEL,
1107                 .device         = PCI_DEVICE_ID_INTEL_MRFLD_MMC,
1108                 .subvendor      = PCI_ANY_ID,
1109                 .subdevice      = PCI_ANY_ID,
1110                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrfld_mmc,
1111         },
1112
1113         {
1114                 .vendor         = PCI_VENDOR_ID_INTEL,
1115                 .device         = PCI_DEVICE_ID_INTEL_SPT_EMMC,
1116                 .subvendor      = PCI_ANY_ID,
1117                 .subdevice      = PCI_ANY_ID,
1118                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1119         },
1120
1121         {
1122                 .vendor         = PCI_VENDOR_ID_INTEL,
1123                 .device         = PCI_DEVICE_ID_INTEL_SPT_SDIO,
1124                 .subvendor      = PCI_ANY_ID,
1125                 .subdevice      = PCI_ANY_ID,
1126                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1127         },
1128
1129         {
1130                 .vendor         = PCI_VENDOR_ID_INTEL,
1131                 .device         = PCI_DEVICE_ID_INTEL_SPT_SD,
1132                 .subvendor      = PCI_ANY_ID,
1133                 .subdevice      = PCI_ANY_ID,
1134                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1135         },
1136
1137         {
1138                 .vendor         = PCI_VENDOR_ID_INTEL,
1139                 .device         = PCI_DEVICE_ID_INTEL_DNV_EMMC,
1140                 .subvendor      = PCI_ANY_ID,
1141                 .subdevice      = PCI_ANY_ID,
1142                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1143         },
1144
1145         {
1146                 .vendor         = PCI_VENDOR_ID_INTEL,
1147                 .device         = PCI_DEVICE_ID_INTEL_BXT_EMMC,
1148                 .subvendor      = PCI_ANY_ID,
1149                 .subdevice      = PCI_ANY_ID,
1150                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1151         },
1152
1153         {
1154                 .vendor         = PCI_VENDOR_ID_INTEL,
1155                 .device         = PCI_DEVICE_ID_INTEL_BXT_SDIO,
1156                 .subvendor      = PCI_ANY_ID,
1157                 .subdevice      = PCI_ANY_ID,
1158                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1159         },
1160
1161         {
1162                 .vendor         = PCI_VENDOR_ID_INTEL,
1163                 .device         = PCI_DEVICE_ID_INTEL_BXT_SD,
1164                 .subvendor      = PCI_ANY_ID,
1165                 .subdevice      = PCI_ANY_ID,
1166                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1167         },
1168
1169         {
1170                 .vendor         = PCI_VENDOR_ID_INTEL,
1171                 .device         = PCI_DEVICE_ID_INTEL_BXTM_EMMC,
1172                 .subvendor      = PCI_ANY_ID,
1173                 .subdevice      = PCI_ANY_ID,
1174                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1175         },
1176
1177         {
1178                 .vendor         = PCI_VENDOR_ID_INTEL,
1179                 .device         = PCI_DEVICE_ID_INTEL_BXTM_SDIO,
1180                 .subvendor      = PCI_ANY_ID,
1181                 .subdevice      = PCI_ANY_ID,
1182                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1183         },
1184
1185         {
1186                 .vendor         = PCI_VENDOR_ID_INTEL,
1187                 .device         = PCI_DEVICE_ID_INTEL_BXTM_SD,
1188                 .subvendor      = PCI_ANY_ID,
1189                 .subdevice      = PCI_ANY_ID,
1190                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1191         },
1192
1193         {
1194                 .vendor         = PCI_VENDOR_ID_INTEL,
1195                 .device         = PCI_DEVICE_ID_INTEL_APL_EMMC,
1196                 .subvendor      = PCI_ANY_ID,
1197                 .subdevice      = PCI_ANY_ID,
1198                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1199         },
1200
1201         {
1202                 .vendor         = PCI_VENDOR_ID_INTEL,
1203                 .device         = PCI_DEVICE_ID_INTEL_APL_SDIO,
1204                 .subvendor      = PCI_ANY_ID,
1205                 .subdevice      = PCI_ANY_ID,
1206                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1207         },
1208
1209         {
1210                 .vendor         = PCI_VENDOR_ID_INTEL,
1211                 .device         = PCI_DEVICE_ID_INTEL_APL_SD,
1212                 .subvendor      = PCI_ANY_ID,
1213                 .subdevice      = PCI_ANY_ID,
1214                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1215         },
1216
1217         {
1218                 .vendor         = PCI_VENDOR_ID_O2,
1219                 .device         = PCI_DEVICE_ID_O2_8120,
1220                 .subvendor      = PCI_ANY_ID,
1221                 .subdevice      = PCI_ANY_ID,
1222                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1223         },
1224
1225         {
1226                 .vendor         = PCI_VENDOR_ID_O2,
1227                 .device         = PCI_DEVICE_ID_O2_8220,
1228                 .subvendor      = PCI_ANY_ID,
1229                 .subdevice      = PCI_ANY_ID,
1230                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1231         },
1232
1233         {
1234                 .vendor         = PCI_VENDOR_ID_O2,
1235                 .device         = PCI_DEVICE_ID_O2_8221,
1236                 .subvendor      = PCI_ANY_ID,
1237                 .subdevice      = PCI_ANY_ID,
1238                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1239         },
1240
1241         {
1242                 .vendor         = PCI_VENDOR_ID_O2,
1243                 .device         = PCI_DEVICE_ID_O2_8320,
1244                 .subvendor      = PCI_ANY_ID,
1245                 .subdevice      = PCI_ANY_ID,
1246                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1247         },
1248
1249         {
1250                 .vendor         = PCI_VENDOR_ID_O2,
1251                 .device         = PCI_DEVICE_ID_O2_8321,
1252                 .subvendor      = PCI_ANY_ID,
1253                 .subdevice      = PCI_ANY_ID,
1254                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1255         },
1256
1257         {
1258                 .vendor         = PCI_VENDOR_ID_O2,
1259                 .device         = PCI_DEVICE_ID_O2_FUJIN2,
1260                 .subvendor      = PCI_ANY_ID,
1261                 .subdevice      = PCI_ANY_ID,
1262                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1263         },
1264
1265         {
1266                 .vendor         = PCI_VENDOR_ID_O2,
1267                 .device         = PCI_DEVICE_ID_O2_SDS0,
1268                 .subvendor      = PCI_ANY_ID,
1269                 .subdevice      = PCI_ANY_ID,
1270                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1271         },
1272
1273         {
1274                 .vendor         = PCI_VENDOR_ID_O2,
1275                 .device         = PCI_DEVICE_ID_O2_SDS1,
1276                 .subvendor      = PCI_ANY_ID,
1277                 .subdevice      = PCI_ANY_ID,
1278                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1279         },
1280
1281         {
1282                 .vendor         = PCI_VENDOR_ID_O2,
1283                 .device         = PCI_DEVICE_ID_O2_SEABIRD0,
1284                 .subvendor      = PCI_ANY_ID,
1285                 .subdevice      = PCI_ANY_ID,
1286                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1287         },
1288
1289         {
1290                 .vendor         = PCI_VENDOR_ID_O2,
1291                 .device         = PCI_DEVICE_ID_O2_SEABIRD1,
1292                 .subvendor      = PCI_ANY_ID,
1293                 .subdevice      = PCI_ANY_ID,
1294                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1295         },
1296         {
1297                 .vendor         = PCI_VENDOR_ID_AMD,
1298                 .device         = PCI_ANY_ID,
1299                 .class          = PCI_CLASS_SYSTEM_SDHCI << 8,
1300                 .class_mask     = 0xFFFF00,
1301                 .subvendor      = PCI_ANY_ID,
1302                 .subdevice      = PCI_ANY_ID,
1303                 .driver_data    = (kernel_ulong_t)&sdhci_amd,
1304         },
1305         {       /* Generic SD host controller */
1306                 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
1307         },
1308
1309         { /* end: all zeroes */ },
1310 };
1311
1312 MODULE_DEVICE_TABLE(pci, pci_ids);
1313
1314 /*****************************************************************************\
1315  *                                                                           *
1316  * SDHCI core callbacks                                                      *
1317  *                                                                           *
1318 \*****************************************************************************/
1319
1320 static int sdhci_pci_enable_dma(struct sdhci_host *host)
1321 {
1322         struct sdhci_pci_slot *slot;
1323         struct pci_dev *pdev;
1324
1325         slot = sdhci_priv(host);
1326         pdev = slot->chip->pdev;
1327
1328         if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
1329                 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
1330                 (host->flags & SDHCI_USE_SDMA)) {
1331                 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
1332                         "doesn't fully claim to support it.\n");
1333         }
1334
1335         pci_set_master(pdev);
1336
1337         return 0;
1338 }
1339
1340 static void sdhci_pci_set_bus_width(struct sdhci_host *host, int width)
1341 {
1342         u8 ctrl;
1343
1344         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1345
1346         switch (width) {
1347         case MMC_BUS_WIDTH_8:
1348                 ctrl |= SDHCI_CTRL_8BITBUS;
1349                 ctrl &= ~SDHCI_CTRL_4BITBUS;
1350                 break;
1351         case MMC_BUS_WIDTH_4:
1352                 ctrl |= SDHCI_CTRL_4BITBUS;
1353                 ctrl &= ~SDHCI_CTRL_8BITBUS;
1354                 break;
1355         default:
1356                 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
1357                 break;
1358         }
1359
1360         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1361 }
1362
1363 static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
1364 {
1365         struct sdhci_pci_slot *slot = sdhci_priv(host);
1366         int rst_n_gpio = slot->rst_n_gpio;
1367
1368         if (!gpio_is_valid(rst_n_gpio))
1369                 return;
1370         gpio_set_value_cansleep(rst_n_gpio, 0);
1371         /* For eMMC, minimum is 1us but give it 10us for good measure */
1372         udelay(10);
1373         gpio_set_value_cansleep(rst_n_gpio, 1);
1374         /* For eMMC, minimum is 200us but give it 300us for good measure */
1375         usleep_range(300, 1000);
1376 }
1377
1378 static void sdhci_pci_hw_reset(struct sdhci_host *host)
1379 {
1380         struct sdhci_pci_slot *slot = sdhci_priv(host);
1381
1382         if (slot->hw_reset)
1383                 slot->hw_reset(host);
1384 }
1385
1386 static int sdhci_pci_select_drive_strength(struct sdhci_host *host,
1387                                            struct mmc_card *card,
1388                                            unsigned int max_dtr, int host_drv,
1389                                            int card_drv, int *drv_type)
1390 {
1391         struct sdhci_pci_slot *slot = sdhci_priv(host);
1392
1393         if (!slot->select_drive_strength)
1394                 return 0;
1395
1396         return slot->select_drive_strength(host, card, max_dtr, host_drv,
1397                                            card_drv, drv_type);
1398 }
1399
1400 static const struct sdhci_ops sdhci_pci_ops = {
1401         .set_clock      = sdhci_set_clock,
1402         .enable_dma     = sdhci_pci_enable_dma,
1403         .set_bus_width  = sdhci_pci_set_bus_width,
1404         .reset          = sdhci_reset,
1405         .set_uhs_signaling = sdhci_set_uhs_signaling,
1406         .hw_reset               = sdhci_pci_hw_reset,
1407         .select_drive_strength  = sdhci_pci_select_drive_strength,
1408 };
1409
1410 /*****************************************************************************\
1411  *                                                                           *
1412  * Suspend/resume                                                            *
1413  *                                                                           *
1414 \*****************************************************************************/
1415
1416 #ifdef CONFIG_PM_SLEEP
1417 static int sdhci_pci_suspend(struct device *dev)
1418 {
1419         struct pci_dev *pdev = to_pci_dev(dev);
1420         struct sdhci_pci_chip *chip;
1421         struct sdhci_pci_slot *slot;
1422         mmc_pm_flag_t slot_pm_flags;
1423         mmc_pm_flag_t pm_flags = 0;
1424         int i, ret;
1425
1426         chip = pci_get_drvdata(pdev);
1427         if (!chip)
1428                 return 0;
1429
1430         for (i = 0; i < chip->num_slots; i++) {
1431                 slot = chip->slots[i];
1432                 if (!slot)
1433                         continue;
1434
1435                 ret = sdhci_suspend_host(slot->host);
1436
1437                 if (ret)
1438                         goto err_pci_suspend;
1439
1440                 slot_pm_flags = slot->host->mmc->pm_flags;
1441                 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1442                         sdhci_enable_irq_wakeups(slot->host);
1443
1444                 pm_flags |= slot_pm_flags;
1445         }
1446
1447         if (chip->fixes && chip->fixes->suspend) {
1448                 ret = chip->fixes->suspend(chip);
1449                 if (ret)
1450                         goto err_pci_suspend;
1451         }
1452
1453         if (pm_flags & MMC_PM_KEEP_POWER) {
1454                 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1455                         device_init_wakeup(dev, true);
1456                 else
1457                         device_init_wakeup(dev, false);
1458         } else
1459                 device_init_wakeup(dev, false);
1460
1461         return 0;
1462
1463 err_pci_suspend:
1464         while (--i >= 0)
1465                 sdhci_resume_host(chip->slots[i]->host);
1466         return ret;
1467 }
1468
1469 static int sdhci_pci_resume(struct device *dev)
1470 {
1471         struct pci_dev *pdev = to_pci_dev(dev);
1472         struct sdhci_pci_chip *chip;
1473         struct sdhci_pci_slot *slot;
1474         int i, ret;
1475
1476         chip = pci_get_drvdata(pdev);
1477         if (!chip)
1478                 return 0;
1479
1480         if (chip->fixes && chip->fixes->resume) {
1481                 ret = chip->fixes->resume(chip);
1482                 if (ret)
1483                         return ret;
1484         }
1485
1486         for (i = 0; i < chip->num_slots; i++) {
1487                 slot = chip->slots[i];
1488                 if (!slot)
1489                         continue;
1490
1491                 ret = sdhci_resume_host(slot->host);
1492                 if (ret)
1493                         return ret;
1494         }
1495
1496         return 0;
1497 }
1498 #endif
1499
1500 #ifdef CONFIG_PM
1501 static int sdhci_pci_runtime_suspend(struct device *dev)
1502 {
1503         struct pci_dev *pdev = to_pci_dev(dev);
1504         struct sdhci_pci_chip *chip;
1505         struct sdhci_pci_slot *slot;
1506         int i, ret;
1507
1508         chip = pci_get_drvdata(pdev);
1509         if (!chip)
1510                 return 0;
1511
1512         for (i = 0; i < chip->num_slots; i++) {
1513                 slot = chip->slots[i];
1514                 if (!slot)
1515                         continue;
1516
1517                 ret = sdhci_runtime_suspend_host(slot->host);
1518
1519                 if (ret)
1520                         goto err_pci_runtime_suspend;
1521         }
1522
1523         if (chip->fixes && chip->fixes->suspend) {
1524                 ret = chip->fixes->suspend(chip);
1525                 if (ret)
1526                         goto err_pci_runtime_suspend;
1527         }
1528
1529         return 0;
1530
1531 err_pci_runtime_suspend:
1532         while (--i >= 0)
1533                 sdhci_runtime_resume_host(chip->slots[i]->host);
1534         return ret;
1535 }
1536
1537 static int sdhci_pci_runtime_resume(struct device *dev)
1538 {
1539         struct pci_dev *pdev = to_pci_dev(dev);
1540         struct sdhci_pci_chip *chip;
1541         struct sdhci_pci_slot *slot;
1542         int i, ret;
1543
1544         chip = pci_get_drvdata(pdev);
1545         if (!chip)
1546                 return 0;
1547
1548         if (chip->fixes && chip->fixes->resume) {
1549                 ret = chip->fixes->resume(chip);
1550                 if (ret)
1551                         return ret;
1552         }
1553
1554         for (i = 0; i < chip->num_slots; i++) {
1555                 slot = chip->slots[i];
1556                 if (!slot)
1557                         continue;
1558
1559                 ret = sdhci_runtime_resume_host(slot->host);
1560                 if (ret)
1561                         return ret;
1562         }
1563
1564         return 0;
1565 }
1566 #endif
1567
1568 static const struct dev_pm_ops sdhci_pci_pm_ops = {
1569         SET_SYSTEM_SLEEP_PM_OPS(sdhci_pci_suspend, sdhci_pci_resume)
1570         SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend,
1571                         sdhci_pci_runtime_resume, NULL)
1572 };
1573
1574 /*****************************************************************************\
1575  *                                                                           *
1576  * Device probing/removal                                                    *
1577  *                                                                           *
1578 \*****************************************************************************/
1579
1580 static struct sdhci_pci_slot *sdhci_pci_probe_slot(
1581         struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
1582         int slotno)
1583 {
1584         struct sdhci_pci_slot *slot;
1585         struct sdhci_host *host;
1586         int ret, bar = first_bar + slotno;
1587
1588         if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1589                 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1590                 return ERR_PTR(-ENODEV);
1591         }
1592
1593         if (pci_resource_len(pdev, bar) < 0x100) {
1594                 dev_err(&pdev->dev, "Invalid iomem size. You may "
1595                         "experience problems.\n");
1596         }
1597
1598         if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1599                 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1600                 return ERR_PTR(-ENODEV);
1601         }
1602
1603         if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1604                 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1605                 return ERR_PTR(-ENODEV);
1606         }
1607
1608         host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1609         if (IS_ERR(host)) {
1610                 dev_err(&pdev->dev, "cannot allocate host\n");
1611                 return ERR_CAST(host);
1612         }
1613
1614         slot = sdhci_priv(host);
1615
1616         slot->chip = chip;
1617         slot->host = host;
1618         slot->pci_bar = bar;
1619         slot->rst_n_gpio = -EINVAL;
1620         slot->cd_gpio = -EINVAL;
1621         slot->cd_idx = -1;
1622
1623         /* Retrieve platform data if there is any */
1624         if (*sdhci_pci_get_data)
1625                 slot->data = sdhci_pci_get_data(pdev, slotno);
1626
1627         if (slot->data) {
1628                 if (slot->data->setup) {
1629                         ret = slot->data->setup(slot->data);
1630                         if (ret) {
1631                                 dev_err(&pdev->dev, "platform setup failed\n");
1632                                 goto free;
1633                         }
1634                 }
1635                 slot->rst_n_gpio = slot->data->rst_n_gpio;
1636                 slot->cd_gpio = slot->data->cd_gpio;
1637         }
1638
1639         host->hw_name = "PCI";
1640         host->ops = &sdhci_pci_ops;
1641         host->quirks = chip->quirks;
1642         host->quirks2 = chip->quirks2;
1643
1644         host->irq = pdev->irq;
1645
1646         ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
1647         if (ret) {
1648                 dev_err(&pdev->dev, "cannot request region\n");
1649                 goto cleanup;
1650         }
1651
1652         host->ioaddr = pci_ioremap_bar(pdev, bar);
1653         if (!host->ioaddr) {
1654                 dev_err(&pdev->dev, "failed to remap registers\n");
1655                 ret = -ENOMEM;
1656                 goto release;
1657         }
1658
1659         if (chip->fixes && chip->fixes->probe_slot) {
1660                 ret = chip->fixes->probe_slot(slot);
1661                 if (ret)
1662                         goto unmap;
1663         }
1664
1665         if (gpio_is_valid(slot->rst_n_gpio)) {
1666                 if (!gpio_request(slot->rst_n_gpio, "eMMC_reset")) {
1667                         gpio_direction_output(slot->rst_n_gpio, 1);
1668                         slot->host->mmc->caps |= MMC_CAP_HW_RESET;
1669                         slot->hw_reset = sdhci_pci_gpio_hw_reset;
1670                 } else {
1671                         dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
1672                         slot->rst_n_gpio = -EINVAL;
1673                 }
1674         }
1675
1676         host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1677         host->mmc->slotno = slotno;
1678         host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
1679
1680         if (slot->cd_idx >= 0 &&
1681             mmc_gpiod_request_cd(host->mmc, slot->cd_con_id, slot->cd_idx,
1682                                  slot->cd_override_level, 0, NULL)) {
1683                 dev_warn(&pdev->dev, "failed to setup card detect gpio\n");
1684                 slot->cd_idx = -1;
1685         }
1686
1687         ret = sdhci_add_host(host);
1688         if (ret)
1689                 goto remove;
1690
1691         sdhci_pci_add_own_cd(slot);
1692
1693         /*
1694          * Check if the chip needs a separate GPIO for card detect to wake up
1695          * from runtime suspend.  If it is not there, don't allow runtime PM.
1696          * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure.
1697          */
1698         if (chip->fixes && chip->fixes->own_cd_for_runtime_pm &&
1699             !gpio_is_valid(slot->cd_gpio) && slot->cd_idx < 0)
1700                 chip->allow_runtime_pm = false;
1701
1702         return slot;
1703
1704 remove:
1705         if (gpio_is_valid(slot->rst_n_gpio))
1706                 gpio_free(slot->rst_n_gpio);
1707
1708         if (chip->fixes && chip->fixes->remove_slot)
1709                 chip->fixes->remove_slot(slot, 0);
1710
1711 unmap:
1712         iounmap(host->ioaddr);
1713
1714 release:
1715         pci_release_region(pdev, bar);
1716
1717 cleanup:
1718         if (slot->data && slot->data->cleanup)
1719                 slot->data->cleanup(slot->data);
1720
1721 free:
1722         sdhci_free_host(host);
1723
1724         return ERR_PTR(ret);
1725 }
1726
1727 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1728 {
1729         int dead;
1730         u32 scratch;
1731
1732         sdhci_pci_remove_own_cd(slot);
1733
1734         dead = 0;
1735         scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1736         if (scratch == (u32)-1)
1737                 dead = 1;
1738
1739         sdhci_remove_host(slot->host, dead);
1740
1741         if (gpio_is_valid(slot->rst_n_gpio))
1742                 gpio_free(slot->rst_n_gpio);
1743
1744         if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1745                 slot->chip->fixes->remove_slot(slot, dead);
1746
1747         if (slot->data && slot->data->cleanup)
1748                 slot->data->cleanup(slot->data);
1749
1750         pci_release_region(slot->chip->pdev, slot->pci_bar);
1751
1752         sdhci_free_host(slot->host);
1753 }
1754
1755 static void sdhci_pci_runtime_pm_allow(struct device *dev)
1756 {
1757         pm_suspend_ignore_children(dev, 1);
1758         pm_runtime_set_autosuspend_delay(dev, 50);
1759         pm_runtime_use_autosuspend(dev);
1760         pm_runtime_allow(dev);
1761         /* Stay active until mmc core scans for a card */
1762         pm_runtime_put_noidle(dev);
1763 }
1764
1765 static void sdhci_pci_runtime_pm_forbid(struct device *dev)
1766 {
1767         pm_runtime_forbid(dev);
1768         pm_runtime_get_noresume(dev);
1769 }
1770
1771 static int sdhci_pci_probe(struct pci_dev *pdev,
1772                                      const struct pci_device_id *ent)
1773 {
1774         struct sdhci_pci_chip *chip;
1775         struct sdhci_pci_slot *slot;
1776
1777         u8 slots, first_bar;
1778         int ret, i;
1779
1780         BUG_ON(pdev == NULL);
1781         BUG_ON(ent == NULL);
1782
1783         dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1784                  (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1785
1786         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1787         if (ret)
1788                 return ret;
1789
1790         slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1791         dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1792         if (slots == 0)
1793                 return -ENODEV;
1794
1795         BUG_ON(slots > MAX_SLOTS);
1796
1797         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1798         if (ret)
1799                 return ret;
1800
1801         first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1802
1803         if (first_bar > 5) {
1804                 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1805                 return -ENODEV;
1806         }
1807
1808         ret = pcim_enable_device(pdev);
1809         if (ret)
1810                 return ret;
1811
1812         chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
1813         if (!chip)
1814                 return -ENOMEM;
1815
1816         chip->pdev = pdev;
1817         chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1818         if (chip->fixes) {
1819                 chip->quirks = chip->fixes->quirks;
1820                 chip->quirks2 = chip->fixes->quirks2;
1821                 chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
1822         }
1823         chip->num_slots = slots;
1824
1825         pci_set_drvdata(pdev, chip);
1826
1827         if (chip->fixes && chip->fixes->probe) {
1828                 ret = chip->fixes->probe(chip);
1829                 if (ret)
1830                         return ret;
1831         }
1832
1833         slots = chip->num_slots;        /* Quirk may have changed this */
1834
1835         for (i = 0; i < slots; i++) {
1836                 slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
1837                 if (IS_ERR(slot)) {
1838                         for (i--; i >= 0; i--)
1839                                 sdhci_pci_remove_slot(chip->slots[i]);
1840                         return PTR_ERR(slot);
1841                 }
1842
1843                 chip->slots[i] = slot;
1844         }
1845
1846         if (chip->allow_runtime_pm)
1847                 sdhci_pci_runtime_pm_allow(&pdev->dev);
1848
1849         return 0;
1850 }
1851
1852 static void sdhci_pci_remove(struct pci_dev *pdev)
1853 {
1854         int i;
1855         struct sdhci_pci_chip *chip = pci_get_drvdata(pdev);
1856
1857         if (chip->allow_runtime_pm)
1858                 sdhci_pci_runtime_pm_forbid(&pdev->dev);
1859
1860         for (i = 0; i < chip->num_slots; i++)
1861                 sdhci_pci_remove_slot(chip->slots[i]);
1862 }
1863
1864 static struct pci_driver sdhci_driver = {
1865         .name =         "sdhci-pci",
1866         .id_table =     pci_ids,
1867         .probe =        sdhci_pci_probe,
1868         .remove =       sdhci_pci_remove,
1869         .driver =       {
1870                 .pm =   &sdhci_pci_pm_ops
1871         },
1872 };
1873
1874 module_pci_driver(sdhci_driver);
1875
1876 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1877 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1878 MODULE_LICENSE("GPL");