video: move SH_MIPI_DSI/SH_LCD_MIPI_DSI to the top of menu
[cascardo/linux.git] / drivers / net / bnx2x / bnx2x_stats.c
1 /* bnx2x_stats.c: Broadcom Everest network driver.
2  *
3  * Copyright (c) 2007-2010 Broadcom Corporation
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation.
8  *
9  * Maintained by: Eilon Greenstein <eilong@broadcom.com>
10  * Written by: Eliezer Tamir
11  * Based on code from Michael Chan's bnx2 driver
12  * UDP CSUM errata workaround by Arik Gendelman
13  * Slowpath and fastpath rework by Vladislav Zolotarov
14  * Statistics and Link management by Yitchak Gertner
15  *
16  */
17 #include "bnx2x_cmn.h"
18 #include "bnx2x_stats.h"
19
20 /* Statistics */
21
22 /****************************************************************************
23 * Macros
24 ****************************************************************************/
25
26 /* sum[hi:lo] += add[hi:lo] */
27 #define ADD_64(s_hi, a_hi, s_lo, a_lo) \
28         do { \
29                 s_lo += a_lo; \
30                 s_hi += a_hi + ((s_lo < a_lo) ? 1 : 0); \
31         } while (0)
32
33 /* difference = minuend - subtrahend */
34 #define DIFF_64(d_hi, m_hi, s_hi, d_lo, m_lo, s_lo) \
35         do { \
36                 if (m_lo < s_lo) { \
37                         /* underflow */ \
38                         d_hi = m_hi - s_hi; \
39                         if (d_hi > 0) { \
40                                 /* we can 'loan' 1 */ \
41                                 d_hi--; \
42                                 d_lo = m_lo + (UINT_MAX - s_lo) + 1; \
43                         } else { \
44                                 /* m_hi <= s_hi */ \
45                                 d_hi = 0; \
46                                 d_lo = 0; \
47                         } \
48                 } else { \
49                         /* m_lo >= s_lo */ \
50                         if (m_hi < s_hi) { \
51                                 d_hi = 0; \
52                                 d_lo = 0; \
53                         } else { \
54                                 /* m_hi >= s_hi */ \
55                                 d_hi = m_hi - s_hi; \
56                                 d_lo = m_lo - s_lo; \
57                         } \
58                 } \
59         } while (0)
60
61 #define UPDATE_STAT64(s, t) \
62         do { \
63                 DIFF_64(diff.hi, new->s##_hi, pstats->mac_stx[0].t##_hi, \
64                         diff.lo, new->s##_lo, pstats->mac_stx[0].t##_lo); \
65                 pstats->mac_stx[0].t##_hi = new->s##_hi; \
66                 pstats->mac_stx[0].t##_lo = new->s##_lo; \
67                 ADD_64(pstats->mac_stx[1].t##_hi, diff.hi, \
68                        pstats->mac_stx[1].t##_lo, diff.lo); \
69         } while (0)
70
71 #define UPDATE_STAT64_NIG(s, t) \
72         do { \
73                 DIFF_64(diff.hi, new->s##_hi, old->s##_hi, \
74                         diff.lo, new->s##_lo, old->s##_lo); \
75                 ADD_64(estats->t##_hi, diff.hi, \
76                        estats->t##_lo, diff.lo); \
77         } while (0)
78
79 /* sum[hi:lo] += add */
80 #define ADD_EXTEND_64(s_hi, s_lo, a) \
81         do { \
82                 s_lo += a; \
83                 s_hi += (s_lo < a) ? 1 : 0; \
84         } while (0)
85
86 #define UPDATE_EXTEND_STAT(s) \
87         do { \
88                 ADD_EXTEND_64(pstats->mac_stx[1].s##_hi, \
89                               pstats->mac_stx[1].s##_lo, \
90                               new->s); \
91         } while (0)
92
93 #define UPDATE_EXTEND_TSTAT(s, t) \
94         do { \
95                 diff = le32_to_cpu(tclient->s) - le32_to_cpu(old_tclient->s); \
96                 old_tclient->s = tclient->s; \
97                 ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
98         } while (0)
99
100 #define UPDATE_EXTEND_USTAT(s, t) \
101         do { \
102                 diff = le32_to_cpu(uclient->s) - le32_to_cpu(old_uclient->s); \
103                 old_uclient->s = uclient->s; \
104                 ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
105         } while (0)
106
107 #define UPDATE_EXTEND_XSTAT(s, t) \
108         do { \
109                 diff = le32_to_cpu(xclient->s) - le32_to_cpu(old_xclient->s); \
110                 old_xclient->s = xclient->s; \
111                 ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
112         } while (0)
113
114 /* minuend -= subtrahend */
115 #define SUB_64(m_hi, s_hi, m_lo, s_lo) \
116         do { \
117                 DIFF_64(m_hi, m_hi, s_hi, m_lo, m_lo, s_lo); \
118         } while (0)
119
120 /* minuend[hi:lo] -= subtrahend */
121 #define SUB_EXTEND_64(m_hi, m_lo, s) \
122         do { \
123                 SUB_64(m_hi, 0, m_lo, s); \
124         } while (0)
125
126 #define SUB_EXTEND_USTAT(s, t) \
127         do { \
128                 diff = le32_to_cpu(uclient->s) - le32_to_cpu(old_uclient->s); \
129                 SUB_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
130         } while (0)
131
132 /*
133  * General service functions
134  */
135
136 static inline long bnx2x_hilo(u32 *hiref)
137 {
138         u32 lo = *(hiref + 1);
139 #if (BITS_PER_LONG == 64)
140         u32 hi = *hiref;
141
142         return HILO_U64(hi, lo);
143 #else
144         return lo;
145 #endif
146 }
147
148 /*
149  * Init service functions
150  */
151
152
153 static void bnx2x_storm_stats_post(struct bnx2x *bp)
154 {
155         if (!bp->stats_pending) {
156                 struct common_query_ramrod_data ramrod_data = {0};
157                 int i, rc;
158
159                 spin_lock_bh(&bp->stats_lock);
160
161                 ramrod_data.drv_counter = bp->stats_counter++;
162                 ramrod_data.collect_port = bp->port.pmf ? 1 : 0;
163                 for_each_eth_queue(bp, i)
164                         ramrod_data.ctr_id_vector |= (1 << bp->fp[i].cl_id);
165
166                 rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0,
167                                    ((u32 *)&ramrod_data)[1],
168                                    ((u32 *)&ramrod_data)[0], 1);
169                 if (rc == 0)
170                         bp->stats_pending = 1;
171
172                 spin_unlock_bh(&bp->stats_lock);
173         }
174 }
175
176 static void bnx2x_hw_stats_post(struct bnx2x *bp)
177 {
178         struct dmae_command *dmae = &bp->stats_dmae;
179         u32 *stats_comp = bnx2x_sp(bp, stats_comp);
180
181         *stats_comp = DMAE_COMP_VAL;
182         if (CHIP_REV_IS_SLOW(bp))
183                 return;
184
185         /* loader */
186         if (bp->executer_idx) {
187                 int loader_idx = PMF_DMAE_C(bp);
188                 u32 opcode =  bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
189                                                  true, DMAE_COMP_GRC);
190                 opcode = bnx2x_dmae_opcode_clr_src_reset(opcode);
191
192                 memset(dmae, 0, sizeof(struct dmae_command));
193                 dmae->opcode = opcode;
194                 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
195                 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
196                 dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
197                                      sizeof(struct dmae_command) *
198                                      (loader_idx + 1)) >> 2;
199                 dmae->dst_addr_hi = 0;
200                 dmae->len = sizeof(struct dmae_command) >> 2;
201                 if (CHIP_IS_E1(bp))
202                         dmae->len--;
203                 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
204                 dmae->comp_addr_hi = 0;
205                 dmae->comp_val = 1;
206
207                 *stats_comp = 0;
208                 bnx2x_post_dmae(bp, dmae, loader_idx);
209
210         } else if (bp->func_stx) {
211                 *stats_comp = 0;
212                 bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));
213         }
214 }
215
216 static int bnx2x_stats_comp(struct bnx2x *bp)
217 {
218         u32 *stats_comp = bnx2x_sp(bp, stats_comp);
219         int cnt = 10;
220
221         might_sleep();
222         while (*stats_comp != DMAE_COMP_VAL) {
223                 if (!cnt) {
224                         BNX2X_ERR("timeout waiting for stats finished\n");
225                         break;
226                 }
227                 cnt--;
228                 msleep(1);
229         }
230         return 1;
231 }
232
233 /*
234  * Statistics service functions
235  */
236
237 static void bnx2x_stats_pmf_update(struct bnx2x *bp)
238 {
239         struct dmae_command *dmae;
240         u32 opcode;
241         int loader_idx = PMF_DMAE_C(bp);
242         u32 *stats_comp = bnx2x_sp(bp, stats_comp);
243
244         /* sanity */
245         if (!IS_MF(bp) || !bp->port.pmf || !bp->port.port_stx) {
246                 BNX2X_ERR("BUG!\n");
247                 return;
248         }
249
250         bp->executer_idx = 0;
251
252         opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0);
253
254         dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
255         dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC);
256         dmae->src_addr_lo = bp->port.port_stx >> 2;
257         dmae->src_addr_hi = 0;
258         dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
259         dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
260         dmae->len = DMAE_LEN32_RD_MAX;
261         dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
262         dmae->comp_addr_hi = 0;
263         dmae->comp_val = 1;
264
265         dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
266         dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
267         dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
268         dmae->src_addr_hi = 0;
269         dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
270                                    DMAE_LEN32_RD_MAX * 4);
271         dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
272                                    DMAE_LEN32_RD_MAX * 4);
273         dmae->len = (sizeof(struct host_port_stats) >> 2) - DMAE_LEN32_RD_MAX;
274         dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
275         dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
276         dmae->comp_val = DMAE_COMP_VAL;
277
278         *stats_comp = 0;
279         bnx2x_hw_stats_post(bp);
280         bnx2x_stats_comp(bp);
281 }
282
283 static void bnx2x_port_stats_init(struct bnx2x *bp)
284 {
285         struct dmae_command *dmae;
286         int port = BP_PORT(bp);
287         u32 opcode;
288         int loader_idx = PMF_DMAE_C(bp);
289         u32 mac_addr;
290         u32 *stats_comp = bnx2x_sp(bp, stats_comp);
291
292         /* sanity */
293         if (!bp->link_vars.link_up || !bp->port.pmf) {
294                 BNX2X_ERR("BUG!\n");
295                 return;
296         }
297
298         bp->executer_idx = 0;
299
300         /* MCP */
301         opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
302                                     true, DMAE_COMP_GRC);
303
304         if (bp->port.port_stx) {
305
306                 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
307                 dmae->opcode = opcode;
308                 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
309                 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
310                 dmae->dst_addr_lo = bp->port.port_stx >> 2;
311                 dmae->dst_addr_hi = 0;
312                 dmae->len = sizeof(struct host_port_stats) >> 2;
313                 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
314                 dmae->comp_addr_hi = 0;
315                 dmae->comp_val = 1;
316         }
317
318         if (bp->func_stx) {
319
320                 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
321                 dmae->opcode = opcode;
322                 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
323                 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
324                 dmae->dst_addr_lo = bp->func_stx >> 2;
325                 dmae->dst_addr_hi = 0;
326                 dmae->len = sizeof(struct host_func_stats) >> 2;
327                 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
328                 dmae->comp_addr_hi = 0;
329                 dmae->comp_val = 1;
330         }
331
332         /* MAC */
333         opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
334                                    true, DMAE_COMP_GRC);
335
336         if (bp->link_vars.mac_type == MAC_TYPE_BMAC) {
337
338                 mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
339                                    NIG_REG_INGRESS_BMAC0_MEM);
340
341                 /* BIGMAC_REGISTER_TX_STAT_GTPKT ..
342                    BIGMAC_REGISTER_TX_STAT_GTBYT */
343                 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
344                 dmae->opcode = opcode;
345                 if (CHIP_IS_E1x(bp)) {
346                         dmae->src_addr_lo = (mac_addr +
347                                      BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
348                         dmae->len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
349                                      BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
350                 } else {
351                         dmae->src_addr_lo = (mac_addr +
352                                      BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
353                         dmae->len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT -
354                                      BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
355                 }
356
357                 dmae->src_addr_hi = 0;
358                 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
359                 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
360                 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
361                 dmae->comp_addr_hi = 0;
362                 dmae->comp_val = 1;
363
364                 /* BIGMAC_REGISTER_RX_STAT_GR64 ..
365                    BIGMAC_REGISTER_RX_STAT_GRIPJ */
366                 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
367                 dmae->opcode = opcode;
368                 dmae->src_addr_hi = 0;
369                 if (CHIP_IS_E1x(bp)) {
370                         dmae->src_addr_lo = (mac_addr +
371                                              BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
372                         dmae->dst_addr_lo =
373                                 U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
374                                 offsetof(struct bmac1_stats, rx_stat_gr64_lo));
375                         dmae->dst_addr_hi =
376                                 U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
377                                 offsetof(struct bmac1_stats, rx_stat_gr64_lo));
378                         dmae->len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
379                                      BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
380                 } else {
381                         dmae->src_addr_lo =
382                                 (mac_addr + BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
383                         dmae->dst_addr_lo =
384                                 U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
385                                 offsetof(struct bmac2_stats, rx_stat_gr64_lo));
386                         dmae->dst_addr_hi =
387                                 U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
388                                 offsetof(struct bmac2_stats, rx_stat_gr64_lo));
389                         dmae->len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ -
390                                      BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
391                 }
392
393                 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
394                 dmae->comp_addr_hi = 0;
395                 dmae->comp_val = 1;
396
397         } else if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
398
399                 mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
400
401                 /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
402                 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
403                 dmae->opcode = opcode;
404                 dmae->src_addr_lo = (mac_addr +
405                                      EMAC_REG_EMAC_RX_STAT_AC) >> 2;
406                 dmae->src_addr_hi = 0;
407                 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
408                 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
409                 dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
410                 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
411                 dmae->comp_addr_hi = 0;
412                 dmae->comp_val = 1;
413
414                 /* EMAC_REG_EMAC_RX_STAT_AC_28 */
415                 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
416                 dmae->opcode = opcode;
417                 dmae->src_addr_lo = (mac_addr +
418                                      EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
419                 dmae->src_addr_hi = 0;
420                 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
421                      offsetof(struct emac_stats, rx_stat_falsecarriererrors));
422                 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
423                      offsetof(struct emac_stats, rx_stat_falsecarriererrors));
424                 dmae->len = 1;
425                 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
426                 dmae->comp_addr_hi = 0;
427                 dmae->comp_val = 1;
428
429                 /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
430                 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
431                 dmae->opcode = opcode;
432                 dmae->src_addr_lo = (mac_addr +
433                                      EMAC_REG_EMAC_TX_STAT_AC) >> 2;
434                 dmae->src_addr_hi = 0;
435                 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
436                         offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
437                 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
438                         offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
439                 dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
440                 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
441                 dmae->comp_addr_hi = 0;
442                 dmae->comp_val = 1;
443         }
444
445         /* NIG */
446         dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
447         dmae->opcode = opcode;
448         dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
449                                     NIG_REG_STAT0_BRB_DISCARD) >> 2;
450         dmae->src_addr_hi = 0;
451         dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
452         dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
453         dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
454         dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
455         dmae->comp_addr_hi = 0;
456         dmae->comp_val = 1;
457
458         dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
459         dmae->opcode = opcode;
460         dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
461                                     NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
462         dmae->src_addr_hi = 0;
463         dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
464                         offsetof(struct nig_stats, egress_mac_pkt0_lo));
465         dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
466                         offsetof(struct nig_stats, egress_mac_pkt0_lo));
467         dmae->len = (2*sizeof(u32)) >> 2;
468         dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
469         dmae->comp_addr_hi = 0;
470         dmae->comp_val = 1;
471
472         dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
473         dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
474                                          true, DMAE_COMP_PCI);
475         dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
476                                     NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
477         dmae->src_addr_hi = 0;
478         dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
479                         offsetof(struct nig_stats, egress_mac_pkt1_lo));
480         dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
481                         offsetof(struct nig_stats, egress_mac_pkt1_lo));
482         dmae->len = (2*sizeof(u32)) >> 2;
483         dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
484         dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
485         dmae->comp_val = DMAE_COMP_VAL;
486
487         *stats_comp = 0;
488 }
489
490 static void bnx2x_func_stats_init(struct bnx2x *bp)
491 {
492         struct dmae_command *dmae = &bp->stats_dmae;
493         u32 *stats_comp = bnx2x_sp(bp, stats_comp);
494
495         /* sanity */
496         if (!bp->func_stx) {
497                 BNX2X_ERR("BUG!\n");
498                 return;
499         }
500
501         bp->executer_idx = 0;
502         memset(dmae, 0, sizeof(struct dmae_command));
503
504         dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
505                                          true, DMAE_COMP_PCI);
506         dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
507         dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
508         dmae->dst_addr_lo = bp->func_stx >> 2;
509         dmae->dst_addr_hi = 0;
510         dmae->len = sizeof(struct host_func_stats) >> 2;
511         dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
512         dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
513         dmae->comp_val = DMAE_COMP_VAL;
514
515         *stats_comp = 0;
516 }
517
518 static void bnx2x_stats_start(struct bnx2x *bp)
519 {
520         if (bp->port.pmf)
521                 bnx2x_port_stats_init(bp);
522
523         else if (bp->func_stx)
524                 bnx2x_func_stats_init(bp);
525
526         bnx2x_hw_stats_post(bp);
527         bnx2x_storm_stats_post(bp);
528 }
529
530 static void bnx2x_stats_pmf_start(struct bnx2x *bp)
531 {
532         bnx2x_stats_comp(bp);
533         bnx2x_stats_pmf_update(bp);
534         bnx2x_stats_start(bp);
535 }
536
537 static void bnx2x_stats_restart(struct bnx2x *bp)
538 {
539         bnx2x_stats_comp(bp);
540         bnx2x_stats_start(bp);
541 }
542
543 static void bnx2x_bmac_stats_update(struct bnx2x *bp)
544 {
545         struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
546         struct bnx2x_eth_stats *estats = &bp->eth_stats;
547         struct {
548                 u32 lo;
549                 u32 hi;
550         } diff;
551
552         if (CHIP_IS_E1x(bp)) {
553                 struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats);
554
555                 /* the macros below will use "bmac1_stats" type */
556                 UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
557                 UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
558                 UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
559                 UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
560                 UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
561                 UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
562                 UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
563                 UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
564                 UPDATE_STAT64(rx_stat_grxpf, rx_stat_bmac_xpf);
565                 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
566                 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
567                 UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
568                 UPDATE_STAT64(tx_stat_gt127,
569                                 tx_stat_etherstatspkts65octetsto127octets);
570                 UPDATE_STAT64(tx_stat_gt255,
571                                 tx_stat_etherstatspkts128octetsto255octets);
572                 UPDATE_STAT64(tx_stat_gt511,
573                                 tx_stat_etherstatspkts256octetsto511octets);
574                 UPDATE_STAT64(tx_stat_gt1023,
575                                 tx_stat_etherstatspkts512octetsto1023octets);
576                 UPDATE_STAT64(tx_stat_gt1518,
577                                 tx_stat_etherstatspkts1024octetsto1522octets);
578                 UPDATE_STAT64(tx_stat_gt2047, tx_stat_bmac_2047);
579                 UPDATE_STAT64(tx_stat_gt4095, tx_stat_bmac_4095);
580                 UPDATE_STAT64(tx_stat_gt9216, tx_stat_bmac_9216);
581                 UPDATE_STAT64(tx_stat_gt16383, tx_stat_bmac_16383);
582                 UPDATE_STAT64(tx_stat_gterr,
583                                 tx_stat_dot3statsinternalmactransmiterrors);
584                 UPDATE_STAT64(tx_stat_gtufl, tx_stat_bmac_ufl);
585
586         } else {
587                 struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats);
588
589                 /* the macros below will use "bmac2_stats" type */
590                 UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
591                 UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
592                 UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
593                 UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
594                 UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
595                 UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
596                 UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
597                 UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
598                 UPDATE_STAT64(rx_stat_grxpf, rx_stat_bmac_xpf);
599                 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
600                 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
601                 UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
602                 UPDATE_STAT64(tx_stat_gt127,
603                                 tx_stat_etherstatspkts65octetsto127octets);
604                 UPDATE_STAT64(tx_stat_gt255,
605                                 tx_stat_etherstatspkts128octetsto255octets);
606                 UPDATE_STAT64(tx_stat_gt511,
607                                 tx_stat_etherstatspkts256octetsto511octets);
608                 UPDATE_STAT64(tx_stat_gt1023,
609                                 tx_stat_etherstatspkts512octetsto1023octets);
610                 UPDATE_STAT64(tx_stat_gt1518,
611                                 tx_stat_etherstatspkts1024octetsto1522octets);
612                 UPDATE_STAT64(tx_stat_gt2047, tx_stat_bmac_2047);
613                 UPDATE_STAT64(tx_stat_gt4095, tx_stat_bmac_4095);
614                 UPDATE_STAT64(tx_stat_gt9216, tx_stat_bmac_9216);
615                 UPDATE_STAT64(tx_stat_gt16383, tx_stat_bmac_16383);
616                 UPDATE_STAT64(tx_stat_gterr,
617                                 tx_stat_dot3statsinternalmactransmiterrors);
618                 UPDATE_STAT64(tx_stat_gtufl, tx_stat_bmac_ufl);
619         }
620
621         estats->pause_frames_received_hi =
622                                 pstats->mac_stx[1].rx_stat_bmac_xpf_hi;
623         estats->pause_frames_received_lo =
624                                 pstats->mac_stx[1].rx_stat_bmac_xpf_lo;
625
626         estats->pause_frames_sent_hi =
627                                 pstats->mac_stx[1].tx_stat_outxoffsent_hi;
628         estats->pause_frames_sent_lo =
629                                 pstats->mac_stx[1].tx_stat_outxoffsent_lo;
630 }
631
632 static void bnx2x_emac_stats_update(struct bnx2x *bp)
633 {
634         struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
635         struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
636         struct bnx2x_eth_stats *estats = &bp->eth_stats;
637
638         UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
639         UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
640         UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
641         UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
642         UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
643         UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
644         UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
645         UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
646         UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
647         UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
648         UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
649         UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
650         UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
651         UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
652         UPDATE_EXTEND_STAT(tx_stat_outxonsent);
653         UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
654         UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
655         UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
656         UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
657         UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
658         UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
659         UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
660         UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
661         UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
662         UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
663         UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
664         UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
665         UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
666         UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
667         UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
668         UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
669
670         estats->pause_frames_received_hi =
671                         pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
672         estats->pause_frames_received_lo =
673                         pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
674         ADD_64(estats->pause_frames_received_hi,
675                pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
676                estats->pause_frames_received_lo,
677                pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
678
679         estats->pause_frames_sent_hi =
680                         pstats->mac_stx[1].tx_stat_outxonsent_hi;
681         estats->pause_frames_sent_lo =
682                         pstats->mac_stx[1].tx_stat_outxonsent_lo;
683         ADD_64(estats->pause_frames_sent_hi,
684                pstats->mac_stx[1].tx_stat_outxoffsent_hi,
685                estats->pause_frames_sent_lo,
686                pstats->mac_stx[1].tx_stat_outxoffsent_lo);
687 }
688
689 static int bnx2x_hw_stats_update(struct bnx2x *bp)
690 {
691         struct nig_stats *new = bnx2x_sp(bp, nig_stats);
692         struct nig_stats *old = &(bp->port.old_nig_stats);
693         struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
694         struct bnx2x_eth_stats *estats = &bp->eth_stats;
695         struct {
696                 u32 lo;
697                 u32 hi;
698         } diff;
699
700         if (bp->link_vars.mac_type == MAC_TYPE_BMAC)
701                 bnx2x_bmac_stats_update(bp);
702
703         else if (bp->link_vars.mac_type == MAC_TYPE_EMAC)
704                 bnx2x_emac_stats_update(bp);
705
706         else { /* unreached */
707                 BNX2X_ERR("stats updated by DMAE but no MAC active\n");
708                 return -1;
709         }
710
711         ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
712                       new->brb_discard - old->brb_discard);
713         ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
714                       new->brb_truncate - old->brb_truncate);
715
716         UPDATE_STAT64_NIG(egress_mac_pkt0,
717                                         etherstatspkts1024octetsto1522octets);
718         UPDATE_STAT64_NIG(egress_mac_pkt1, etherstatspktsover1522octets);
719
720         memcpy(old, new, sizeof(struct nig_stats));
721
722         memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
723                sizeof(struct mac_stx));
724         estats->brb_drop_hi = pstats->brb_drop_hi;
725         estats->brb_drop_lo = pstats->brb_drop_lo;
726
727         pstats->host_port_stats_start = ++pstats->host_port_stats_end;
728
729         if (!BP_NOMCP(bp)) {
730                 u32 nig_timer_max =
731                         SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
732                 if (nig_timer_max != estats->nig_timer_max) {
733                         estats->nig_timer_max = nig_timer_max;
734                         BNX2X_ERR("NIG timer max (%u)\n",
735                                   estats->nig_timer_max);
736                 }
737         }
738
739         return 0;
740 }
741
742 static int bnx2x_storm_stats_update(struct bnx2x *bp)
743 {
744         struct eth_stats_query *stats = bnx2x_sp(bp, fw_stats);
745         struct tstorm_per_port_stats *tport =
746                                         &stats->tstorm_common.port_statistics;
747         struct host_func_stats *fstats = bnx2x_sp(bp, func_stats);
748         struct bnx2x_eth_stats *estats = &bp->eth_stats;
749         int i;
750         u16 cur_stats_counter;
751
752         /* Make sure we use the value of the counter
753          * used for sending the last stats ramrod.
754          */
755         spin_lock_bh(&bp->stats_lock);
756         cur_stats_counter = bp->stats_counter - 1;
757         spin_unlock_bh(&bp->stats_lock);
758
759         memcpy(&(fstats->total_bytes_received_hi),
760                &(bnx2x_sp(bp, func_stats_base)->total_bytes_received_hi),
761                sizeof(struct host_func_stats) - 2*sizeof(u32));
762         estats->error_bytes_received_hi = 0;
763         estats->error_bytes_received_lo = 0;
764         estats->etherstatsoverrsizepkts_hi = 0;
765         estats->etherstatsoverrsizepkts_lo = 0;
766         estats->no_buff_discard_hi = 0;
767         estats->no_buff_discard_lo = 0;
768
769         for_each_eth_queue(bp, i) {
770                 struct bnx2x_fastpath *fp = &bp->fp[i];
771                 int cl_id = fp->cl_id;
772                 struct tstorm_per_client_stats *tclient =
773                                 &stats->tstorm_common.client_statistics[cl_id];
774                 struct tstorm_per_client_stats *old_tclient = &fp->old_tclient;
775                 struct ustorm_per_client_stats *uclient =
776                                 &stats->ustorm_common.client_statistics[cl_id];
777                 struct ustorm_per_client_stats *old_uclient = &fp->old_uclient;
778                 struct xstorm_per_client_stats *xclient =
779                                 &stats->xstorm_common.client_statistics[cl_id];
780                 struct xstorm_per_client_stats *old_xclient = &fp->old_xclient;
781                 struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
782                 u32 diff;
783
784                 /* are storm stats valid? */
785                 if (le16_to_cpu(xclient->stats_counter) != cur_stats_counter) {
786                         DP(BNX2X_MSG_STATS, "[%d] stats not updated by xstorm"
787                            "  xstorm counter (0x%x) != stats_counter (0x%x)\n",
788                            i, xclient->stats_counter, cur_stats_counter + 1);
789                         return -1;
790                 }
791                 if (le16_to_cpu(tclient->stats_counter) != cur_stats_counter) {
792                         DP(BNX2X_MSG_STATS, "[%d] stats not updated by tstorm"
793                            "  tstorm counter (0x%x) != stats_counter (0x%x)\n",
794                            i, tclient->stats_counter, cur_stats_counter + 1);
795                         return -2;
796                 }
797                 if (le16_to_cpu(uclient->stats_counter) != cur_stats_counter) {
798                         DP(BNX2X_MSG_STATS, "[%d] stats not updated by ustorm"
799                            "  ustorm counter (0x%x) != stats_counter (0x%x)\n",
800                            i, uclient->stats_counter, cur_stats_counter + 1);
801                         return -4;
802                 }
803
804                 qstats->total_bytes_received_hi =
805                         le32_to_cpu(tclient->rcv_broadcast_bytes.hi);
806                 qstats->total_bytes_received_lo =
807                         le32_to_cpu(tclient->rcv_broadcast_bytes.lo);
808
809                 ADD_64(qstats->total_bytes_received_hi,
810                        le32_to_cpu(tclient->rcv_multicast_bytes.hi),
811                        qstats->total_bytes_received_lo,
812                        le32_to_cpu(tclient->rcv_multicast_bytes.lo));
813
814                 ADD_64(qstats->total_bytes_received_hi,
815                        le32_to_cpu(tclient->rcv_unicast_bytes.hi),
816                        qstats->total_bytes_received_lo,
817                        le32_to_cpu(tclient->rcv_unicast_bytes.lo));
818
819                 SUB_64(qstats->total_bytes_received_hi,
820                        le32_to_cpu(uclient->bcast_no_buff_bytes.hi),
821                        qstats->total_bytes_received_lo,
822                        le32_to_cpu(uclient->bcast_no_buff_bytes.lo));
823
824                 SUB_64(qstats->total_bytes_received_hi,
825                        le32_to_cpu(uclient->mcast_no_buff_bytes.hi),
826                        qstats->total_bytes_received_lo,
827                        le32_to_cpu(uclient->mcast_no_buff_bytes.lo));
828
829                 SUB_64(qstats->total_bytes_received_hi,
830                        le32_to_cpu(uclient->ucast_no_buff_bytes.hi),
831                        qstats->total_bytes_received_lo,
832                        le32_to_cpu(uclient->ucast_no_buff_bytes.lo));
833
834                 qstats->valid_bytes_received_hi =
835                                         qstats->total_bytes_received_hi;
836                 qstats->valid_bytes_received_lo =
837                                         qstats->total_bytes_received_lo;
838
839                 qstats->error_bytes_received_hi =
840                                 le32_to_cpu(tclient->rcv_error_bytes.hi);
841                 qstats->error_bytes_received_lo =
842                                 le32_to_cpu(tclient->rcv_error_bytes.lo);
843
844                 ADD_64(qstats->total_bytes_received_hi,
845                        qstats->error_bytes_received_hi,
846                        qstats->total_bytes_received_lo,
847                        qstats->error_bytes_received_lo);
848
849                 UPDATE_EXTEND_TSTAT(rcv_unicast_pkts,
850                                         total_unicast_packets_received);
851                 UPDATE_EXTEND_TSTAT(rcv_multicast_pkts,
852                                         total_multicast_packets_received);
853                 UPDATE_EXTEND_TSTAT(rcv_broadcast_pkts,
854                                         total_broadcast_packets_received);
855                 UPDATE_EXTEND_TSTAT(packets_too_big_discard,
856                                         etherstatsoverrsizepkts);
857                 UPDATE_EXTEND_TSTAT(no_buff_discard, no_buff_discard);
858
859                 SUB_EXTEND_USTAT(ucast_no_buff_pkts,
860                                         total_unicast_packets_received);
861                 SUB_EXTEND_USTAT(mcast_no_buff_pkts,
862                                         total_multicast_packets_received);
863                 SUB_EXTEND_USTAT(bcast_no_buff_pkts,
864                                         total_broadcast_packets_received);
865                 UPDATE_EXTEND_USTAT(ucast_no_buff_pkts, no_buff_discard);
866                 UPDATE_EXTEND_USTAT(mcast_no_buff_pkts, no_buff_discard);
867                 UPDATE_EXTEND_USTAT(bcast_no_buff_pkts, no_buff_discard);
868
869                 qstats->total_bytes_transmitted_hi =
870                                 le32_to_cpu(xclient->unicast_bytes_sent.hi);
871                 qstats->total_bytes_transmitted_lo =
872                                 le32_to_cpu(xclient->unicast_bytes_sent.lo);
873
874                 ADD_64(qstats->total_bytes_transmitted_hi,
875                        le32_to_cpu(xclient->multicast_bytes_sent.hi),
876                        qstats->total_bytes_transmitted_lo,
877                        le32_to_cpu(xclient->multicast_bytes_sent.lo));
878
879                 ADD_64(qstats->total_bytes_transmitted_hi,
880                        le32_to_cpu(xclient->broadcast_bytes_sent.hi),
881                        qstats->total_bytes_transmitted_lo,
882                        le32_to_cpu(xclient->broadcast_bytes_sent.lo));
883
884                 UPDATE_EXTEND_XSTAT(unicast_pkts_sent,
885                                         total_unicast_packets_transmitted);
886                 UPDATE_EXTEND_XSTAT(multicast_pkts_sent,
887                                         total_multicast_packets_transmitted);
888                 UPDATE_EXTEND_XSTAT(broadcast_pkts_sent,
889                                         total_broadcast_packets_transmitted);
890
891                 old_tclient->checksum_discard = tclient->checksum_discard;
892                 old_tclient->ttl0_discard = tclient->ttl0_discard;
893
894                 ADD_64(fstats->total_bytes_received_hi,
895                        qstats->total_bytes_received_hi,
896                        fstats->total_bytes_received_lo,
897                        qstats->total_bytes_received_lo);
898                 ADD_64(fstats->total_bytes_transmitted_hi,
899                        qstats->total_bytes_transmitted_hi,
900                        fstats->total_bytes_transmitted_lo,
901                        qstats->total_bytes_transmitted_lo);
902                 ADD_64(fstats->total_unicast_packets_received_hi,
903                        qstats->total_unicast_packets_received_hi,
904                        fstats->total_unicast_packets_received_lo,
905                        qstats->total_unicast_packets_received_lo);
906                 ADD_64(fstats->total_multicast_packets_received_hi,
907                        qstats->total_multicast_packets_received_hi,
908                        fstats->total_multicast_packets_received_lo,
909                        qstats->total_multicast_packets_received_lo);
910                 ADD_64(fstats->total_broadcast_packets_received_hi,
911                        qstats->total_broadcast_packets_received_hi,
912                        fstats->total_broadcast_packets_received_lo,
913                        qstats->total_broadcast_packets_received_lo);
914                 ADD_64(fstats->total_unicast_packets_transmitted_hi,
915                        qstats->total_unicast_packets_transmitted_hi,
916                        fstats->total_unicast_packets_transmitted_lo,
917                        qstats->total_unicast_packets_transmitted_lo);
918                 ADD_64(fstats->total_multicast_packets_transmitted_hi,
919                        qstats->total_multicast_packets_transmitted_hi,
920                        fstats->total_multicast_packets_transmitted_lo,
921                        qstats->total_multicast_packets_transmitted_lo);
922                 ADD_64(fstats->total_broadcast_packets_transmitted_hi,
923                        qstats->total_broadcast_packets_transmitted_hi,
924                        fstats->total_broadcast_packets_transmitted_lo,
925                        qstats->total_broadcast_packets_transmitted_lo);
926                 ADD_64(fstats->valid_bytes_received_hi,
927                        qstats->valid_bytes_received_hi,
928                        fstats->valid_bytes_received_lo,
929                        qstats->valid_bytes_received_lo);
930
931                 ADD_64(estats->error_bytes_received_hi,
932                        qstats->error_bytes_received_hi,
933                        estats->error_bytes_received_lo,
934                        qstats->error_bytes_received_lo);
935                 ADD_64(estats->etherstatsoverrsizepkts_hi,
936                        qstats->etherstatsoverrsizepkts_hi,
937                        estats->etherstatsoverrsizepkts_lo,
938                        qstats->etherstatsoverrsizepkts_lo);
939                 ADD_64(estats->no_buff_discard_hi, qstats->no_buff_discard_hi,
940                        estats->no_buff_discard_lo, qstats->no_buff_discard_lo);
941         }
942
943         ADD_64(fstats->total_bytes_received_hi,
944                estats->rx_stat_ifhcinbadoctets_hi,
945                fstats->total_bytes_received_lo,
946                estats->rx_stat_ifhcinbadoctets_lo);
947
948         memcpy(estats, &(fstats->total_bytes_received_hi),
949                sizeof(struct host_func_stats) - 2*sizeof(u32));
950
951         ADD_64(estats->etherstatsoverrsizepkts_hi,
952                estats->rx_stat_dot3statsframestoolong_hi,
953                estats->etherstatsoverrsizepkts_lo,
954                estats->rx_stat_dot3statsframestoolong_lo);
955         ADD_64(estats->error_bytes_received_hi,
956                estats->rx_stat_ifhcinbadoctets_hi,
957                estats->error_bytes_received_lo,
958                estats->rx_stat_ifhcinbadoctets_lo);
959
960         if (bp->port.pmf) {
961                 estats->mac_filter_discard =
962                                 le32_to_cpu(tport->mac_filter_discard);
963                 estats->xxoverflow_discard =
964                                 le32_to_cpu(tport->xxoverflow_discard);
965                 estats->brb_truncate_discard =
966                                 le32_to_cpu(tport->brb_truncate_discard);
967                 estats->mac_discard = le32_to_cpu(tport->mac_discard);
968         }
969
970         fstats->host_func_stats_start = ++fstats->host_func_stats_end;
971
972         bp->stats_pending = 0;
973
974         return 0;
975 }
976
977 static void bnx2x_net_stats_update(struct bnx2x *bp)
978 {
979         struct bnx2x_eth_stats *estats = &bp->eth_stats;
980         struct net_device_stats *nstats = &bp->dev->stats;
981         unsigned long tmp;
982         int i;
983
984         nstats->rx_packets =
985                 bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
986                 bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
987                 bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
988
989         nstats->tx_packets =
990                 bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
991                 bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
992                 bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
993
994         nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
995
996         nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
997
998         tmp = estats->mac_discard;
999         for_each_rx_queue(bp, i)
1000                 tmp += le32_to_cpu(bp->fp[i].old_tclient.checksum_discard);
1001         nstats->rx_dropped = tmp;
1002
1003         nstats->tx_dropped = 0;
1004
1005         nstats->multicast =
1006                 bnx2x_hilo(&estats->total_multicast_packets_received_hi);
1007
1008         nstats->collisions =
1009                 bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
1010
1011         nstats->rx_length_errors =
1012                 bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
1013                 bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
1014         nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
1015                                  bnx2x_hilo(&estats->brb_truncate_hi);
1016         nstats->rx_crc_errors =
1017                 bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
1018         nstats->rx_frame_errors =
1019                 bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
1020         nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
1021         nstats->rx_missed_errors = estats->xxoverflow_discard;
1022
1023         nstats->rx_errors = nstats->rx_length_errors +
1024                             nstats->rx_over_errors +
1025                             nstats->rx_crc_errors +
1026                             nstats->rx_frame_errors +
1027                             nstats->rx_fifo_errors +
1028                             nstats->rx_missed_errors;
1029
1030         nstats->tx_aborted_errors =
1031                 bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
1032                 bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
1033         nstats->tx_carrier_errors =
1034                 bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
1035         nstats->tx_fifo_errors = 0;
1036         nstats->tx_heartbeat_errors = 0;
1037         nstats->tx_window_errors = 0;
1038
1039         nstats->tx_errors = nstats->tx_aborted_errors +
1040                             nstats->tx_carrier_errors +
1041             bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
1042 }
1043
1044 static void bnx2x_drv_stats_update(struct bnx2x *bp)
1045 {
1046         struct bnx2x_eth_stats *estats = &bp->eth_stats;
1047         int i;
1048
1049         estats->driver_xoff = 0;
1050         estats->rx_err_discard_pkt = 0;
1051         estats->rx_skb_alloc_failed = 0;
1052         estats->hw_csum_err = 0;
1053         for_each_queue(bp, i) {
1054                 struct bnx2x_eth_q_stats *qstats = &bp->fp[i].eth_q_stats;
1055
1056                 estats->driver_xoff += qstats->driver_xoff;
1057                 estats->rx_err_discard_pkt += qstats->rx_err_discard_pkt;
1058                 estats->rx_skb_alloc_failed += qstats->rx_skb_alloc_failed;
1059                 estats->hw_csum_err += qstats->hw_csum_err;
1060         }
1061 }
1062
1063 static void bnx2x_stats_update(struct bnx2x *bp)
1064 {
1065         u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1066
1067         if (*stats_comp != DMAE_COMP_VAL)
1068                 return;
1069
1070         if (bp->port.pmf)
1071                 bnx2x_hw_stats_update(bp);
1072
1073         if (bnx2x_storm_stats_update(bp) && (bp->stats_pending++ == 3)) {
1074                 BNX2X_ERR("storm stats were not updated for 3 times\n");
1075                 bnx2x_panic();
1076                 return;
1077         }
1078
1079         bnx2x_net_stats_update(bp);
1080         bnx2x_drv_stats_update(bp);
1081
1082         if (netif_msg_timer(bp)) {
1083                 struct bnx2x_eth_stats *estats = &bp->eth_stats;
1084                 int i;
1085
1086                 printk(KERN_DEBUG "%s: brb drops %u  brb truncate %u\n",
1087                        bp->dev->name,
1088                        estats->brb_drop_lo, estats->brb_truncate_lo);
1089
1090                 for_each_eth_queue(bp, i) {
1091                         struct bnx2x_fastpath *fp = &bp->fp[i];
1092                         struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
1093
1094                         printk(KERN_DEBUG "%s: rx usage(%4u)  *rx_cons_sb(%u)"
1095                                           "  rx pkt(%lu)  rx calls(%lu %lu)\n",
1096                                fp->name, (le16_to_cpu(*fp->rx_cons_sb) -
1097                                fp->rx_comp_cons),
1098                                le16_to_cpu(*fp->rx_cons_sb),
1099                                bnx2x_hilo(&qstats->
1100                                           total_unicast_packets_received_hi),
1101                                fp->rx_calls, fp->rx_pkt);
1102                 }
1103
1104                 for_each_eth_queue(bp, i) {
1105                         struct bnx2x_fastpath *fp = &bp->fp[i];
1106                         struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
1107                         struct netdev_queue *txq =
1108                                 netdev_get_tx_queue(bp->dev, i);
1109
1110                         printk(KERN_DEBUG "%s: tx avail(%4u)  *tx_cons_sb(%u)"
1111                                           "  tx pkt(%lu) tx calls (%lu)"
1112                                           "  %s (Xoff events %u)\n",
1113                                fp->name, bnx2x_tx_avail(fp),
1114                                le16_to_cpu(*fp->tx_cons_sb),
1115                                bnx2x_hilo(&qstats->
1116                                           total_unicast_packets_transmitted_hi),
1117                                fp->tx_pkt,
1118                                (netif_tx_queue_stopped(txq) ? "Xoff" : "Xon"),
1119                                qstats->driver_xoff);
1120                 }
1121         }
1122
1123         bnx2x_hw_stats_post(bp);
1124         bnx2x_storm_stats_post(bp);
1125 }
1126
1127 static void bnx2x_port_stats_stop(struct bnx2x *bp)
1128 {
1129         struct dmae_command *dmae;
1130         u32 opcode;
1131         int loader_idx = PMF_DMAE_C(bp);
1132         u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1133
1134         bp->executer_idx = 0;
1135
1136         opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0);
1137
1138         if (bp->port.port_stx) {
1139
1140                 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
1141                 if (bp->func_stx)
1142                         dmae->opcode = bnx2x_dmae_opcode_add_comp(
1143                                                 opcode, DMAE_COMP_GRC);
1144                 else
1145                         dmae->opcode = bnx2x_dmae_opcode_add_comp(
1146                                                 opcode, DMAE_COMP_PCI);
1147                 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
1148                 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
1149                 dmae->dst_addr_lo = bp->port.port_stx >> 2;
1150                 dmae->dst_addr_hi = 0;
1151                 dmae->len = sizeof(struct host_port_stats) >> 2;
1152                 if (bp->func_stx) {
1153                         dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
1154                         dmae->comp_addr_hi = 0;
1155                         dmae->comp_val = 1;
1156                 } else {
1157                         dmae->comp_addr_lo =
1158                                 U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1159                         dmae->comp_addr_hi =
1160                                 U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1161                         dmae->comp_val = DMAE_COMP_VAL;
1162
1163                         *stats_comp = 0;
1164                 }
1165         }
1166
1167         if (bp->func_stx) {
1168
1169                 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
1170                 dmae->opcode =
1171                         bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
1172                 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
1173                 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
1174                 dmae->dst_addr_lo = bp->func_stx >> 2;
1175                 dmae->dst_addr_hi = 0;
1176                 dmae->len = sizeof(struct host_func_stats) >> 2;
1177                 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1178                 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1179                 dmae->comp_val = DMAE_COMP_VAL;
1180
1181                 *stats_comp = 0;
1182         }
1183 }
1184
1185 static void bnx2x_stats_stop(struct bnx2x *bp)
1186 {
1187         int update = 0;
1188
1189         bnx2x_stats_comp(bp);
1190
1191         if (bp->port.pmf)
1192                 update = (bnx2x_hw_stats_update(bp) == 0);
1193
1194         update |= (bnx2x_storm_stats_update(bp) == 0);
1195
1196         if (update) {
1197                 bnx2x_net_stats_update(bp);
1198
1199                 if (bp->port.pmf)
1200                         bnx2x_port_stats_stop(bp);
1201
1202                 bnx2x_hw_stats_post(bp);
1203                 bnx2x_stats_comp(bp);
1204         }
1205 }
1206
1207 static void bnx2x_stats_do_nothing(struct bnx2x *bp)
1208 {
1209 }
1210
1211 static const struct {
1212         void (*action)(struct bnx2x *bp);
1213         enum bnx2x_stats_state next_state;
1214 } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
1215 /* state        event   */
1216 {
1217 /* DISABLED     PMF     */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
1218 /*              LINK_UP */ {bnx2x_stats_start,      STATS_STATE_ENABLED},
1219 /*              UPDATE  */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
1220 /*              STOP    */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
1221 },
1222 {
1223 /* ENABLED      PMF     */ {bnx2x_stats_pmf_start,  STATS_STATE_ENABLED},
1224 /*              LINK_UP */ {bnx2x_stats_restart,    STATS_STATE_ENABLED},
1225 /*              UPDATE  */ {bnx2x_stats_update,     STATS_STATE_ENABLED},
1226 /*              STOP    */ {bnx2x_stats_stop,       STATS_STATE_DISABLED}
1227 }
1228 };
1229
1230 void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
1231 {
1232         enum bnx2x_stats_state state;
1233
1234         if (unlikely(bp->panic))
1235                 return;
1236
1237         /* Protect a state change flow */
1238         spin_lock_bh(&bp->stats_lock);
1239         state = bp->stats_state;
1240         bp->stats_state = bnx2x_stats_stm[state][event].next_state;
1241         spin_unlock_bh(&bp->stats_lock);
1242
1243         bnx2x_stats_stm[state][event].action(bp);
1244
1245         if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
1246                 DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
1247                    state, event, bp->stats_state);
1248 }
1249
1250 static void bnx2x_port_stats_base_init(struct bnx2x *bp)
1251 {
1252         struct dmae_command *dmae;
1253         u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1254
1255         /* sanity */
1256         if (!bp->port.pmf || !bp->port.port_stx) {
1257                 BNX2X_ERR("BUG!\n");
1258                 return;
1259         }
1260
1261         bp->executer_idx = 0;
1262
1263         dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
1264         dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
1265                                          true, DMAE_COMP_PCI);
1266         dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
1267         dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
1268         dmae->dst_addr_lo = bp->port.port_stx >> 2;
1269         dmae->dst_addr_hi = 0;
1270         dmae->len = sizeof(struct host_port_stats) >> 2;
1271         dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1272         dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1273         dmae->comp_val = DMAE_COMP_VAL;
1274
1275         *stats_comp = 0;
1276         bnx2x_hw_stats_post(bp);
1277         bnx2x_stats_comp(bp);
1278 }
1279
1280 static void bnx2x_func_stats_base_init(struct bnx2x *bp)
1281 {
1282         int vn, vn_max = IS_MF(bp) ? E1HVN_MAX : E1VN_MAX;
1283         u32 func_stx;
1284
1285         /* sanity */
1286         if (!bp->port.pmf || !bp->func_stx) {
1287                 BNX2X_ERR("BUG!\n");
1288                 return;
1289         }
1290
1291         /* save our func_stx */
1292         func_stx = bp->func_stx;
1293
1294         for (vn = VN_0; vn < vn_max; vn++) {
1295                 int mb_idx = !CHIP_IS_E2(bp) ? 2*vn + BP_PORT(bp) : vn;
1296
1297                 bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
1298                 bnx2x_func_stats_init(bp);
1299                 bnx2x_hw_stats_post(bp);
1300                 bnx2x_stats_comp(bp);
1301         }
1302
1303         /* restore our func_stx */
1304         bp->func_stx = func_stx;
1305 }
1306
1307 static void bnx2x_func_stats_base_update(struct bnx2x *bp)
1308 {
1309         struct dmae_command *dmae = &bp->stats_dmae;
1310         u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1311
1312         /* sanity */
1313         if (!bp->func_stx) {
1314                 BNX2X_ERR("BUG!\n");
1315                 return;
1316         }
1317
1318         bp->executer_idx = 0;
1319         memset(dmae, 0, sizeof(struct dmae_command));
1320
1321         dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
1322                                          true, DMAE_COMP_PCI);
1323         dmae->src_addr_lo = bp->func_stx >> 2;
1324         dmae->src_addr_hi = 0;
1325         dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats_base));
1326         dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats_base));
1327         dmae->len = sizeof(struct host_func_stats) >> 2;
1328         dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1329         dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1330         dmae->comp_val = DMAE_COMP_VAL;
1331
1332         *stats_comp = 0;
1333         bnx2x_hw_stats_post(bp);
1334         bnx2x_stats_comp(bp);
1335 }
1336
1337 void bnx2x_stats_init(struct bnx2x *bp)
1338 {
1339         int port = BP_PORT(bp);
1340         int mb_idx = BP_FW_MB_IDX(bp);
1341         int i;
1342         struct eth_stats_query *stats = bnx2x_sp(bp, fw_stats);
1343
1344         bp->stats_pending = 0;
1345         bp->executer_idx = 0;
1346         bp->stats_counter = 0;
1347
1348         /* port and func stats for management */
1349         if (!BP_NOMCP(bp)) {
1350                 bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
1351                 bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
1352
1353         } else {
1354                 bp->port.port_stx = 0;
1355                 bp->func_stx = 0;
1356         }
1357         DP(BNX2X_MSG_STATS, "port_stx 0x%x  func_stx 0x%x\n",
1358            bp->port.port_stx, bp->func_stx);
1359
1360         /* port stats */
1361         memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
1362         bp->port.old_nig_stats.brb_discard =
1363                         REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
1364         bp->port.old_nig_stats.brb_truncate =
1365                         REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
1366         REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
1367                     &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
1368         REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
1369                     &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2);
1370
1371         /* function stats */
1372         for_each_queue(bp, i) {
1373                 struct bnx2x_fastpath *fp = &bp->fp[i];
1374
1375                 memset(&fp->old_tclient, 0,
1376                        sizeof(struct tstorm_per_client_stats));
1377                 memset(&fp->old_uclient, 0,
1378                        sizeof(struct ustorm_per_client_stats));
1379                 memset(&fp->old_xclient, 0,
1380                        sizeof(struct xstorm_per_client_stats));
1381                 memset(&fp->eth_q_stats, 0, sizeof(struct bnx2x_eth_q_stats));
1382         }
1383
1384         /* FW stats are currently collected for ETH clients only */
1385         for_each_eth_queue(bp, i) {
1386                 /* Set initial stats counter in the stats ramrod data to -1 */
1387                 int cl_id = bp->fp[i].cl_id;
1388
1389                 stats->xstorm_common.client_statistics[cl_id].
1390                         stats_counter = 0xffff;
1391                 stats->ustorm_common.client_statistics[cl_id].
1392                         stats_counter = 0xffff;
1393                 stats->tstorm_common.client_statistics[cl_id].
1394                         stats_counter = 0xffff;
1395         }
1396
1397         memset(&bp->dev->stats, 0, sizeof(struct net_device_stats));
1398         memset(&bp->eth_stats, 0, sizeof(struct bnx2x_eth_stats));
1399
1400         bp->stats_state = STATS_STATE_DISABLED;
1401
1402         if (bp->port.pmf) {
1403                 if (bp->port.port_stx)
1404                         bnx2x_port_stats_base_init(bp);
1405
1406                 if (bp->func_stx)
1407                         bnx2x_func_stats_base_init(bp);
1408
1409         } else if (bp->func_stx)
1410                 bnx2x_func_stats_base_update(bp);
1411 }