drivers/net/ethernet/altera/altera_tse_main.c

   1 /* Altera Triple-Speed Ethernet MAC driver
   2  * Copyright (C) 2008-2014 Altera Corporation. All rights reserved
   3  *
   4  * Contributors:
   5  *   Dalon Westergreen
   6  *   Thomas Chou
   7  *   Ian Abbott
   8  *   Yuriy Kozlov
   9  *   Tobias Klauser
  10  *   Andriy Smolskyy
  11  *   Roman Bulgakov
  12  *   Dmytro Mytarchuk
  13  *   Matthew Gerlach
  14  *
  15  * Original driver contributed by SLS.
  16  * Major updates contributed by GlobalLogic
  17  *
  18  * This program is free software; you can redistribute it and/or modify it
  19  * under the terms and conditions of the GNU General Public License,
  20  * version 2, as published by the Free Software Foundation.
  21  *
  22  * This program is distributed in the hope it will be useful, but WITHOUT
  23  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  24  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  25  * more details.
  26  *
  27  * You should have received a copy of the GNU General Public License along with
  28  * this program.  If not, see <http://www.gnu.org/licenses/>.
  29  */
  30
  31 #include <linux/atomic.h>
  32 #include <linux/delay.h>
  33 #include <linux/etherdevice.h>
  34 #include <linux/if_vlan.h>
  35 #include <linux/init.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/io.h>
  38 #include <linux/kernel.h>
  39 #include <linux/module.h>
  40 #include <linux/netdevice.h>
  41 #include <linux/of_device.h>
  42 #include <linux/of_mdio.h>
  43 #include <linux/of_net.h>
  44 #include <linux/of_platform.h>
  45 #include <linux/phy.h>
  46 #include <linux/platform_device.h>
  47 #include <linux/skbuff.h>
  48 #include <asm/cacheflush.h>
  49
  50 #include "altera_utils.h"
  51 #include "altera_tse.h"
  52 #include "altera_sgdma.h"
  53 #include "altera_msgdma.h"
  54
  55 static atomic_t instance_count = ATOMIC_INIT(~0);
  56 /* Module parameters */
  57 static int debug = -1;
  58 module_param(debug, int, S_IRUGO | S_IWUSR);
  59 MODULE_PARM_DESC(debug, "Message Level (-1: default, 0: no output, 16: all)");
  60
  61 static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
  62                                         NETIF_MSG_LINK | NETIF_MSG_IFUP |
  63                                         NETIF_MSG_IFDOWN);
  64
  65 #define RX_DESCRIPTORS 64
  66 static int dma_rx_num = RX_DESCRIPTORS;
  67 module_param(dma_rx_num, int, S_IRUGO | S_IWUSR);
  68 MODULE_PARM_DESC(dma_rx_num, "Number of descriptors in the RX list");
  69
  70 #define TX_DESCRIPTORS 64
  71 static int dma_tx_num = TX_DESCRIPTORS;
  72 module_param(dma_tx_num, int, S_IRUGO | S_IWUSR);
  73 MODULE_PARM_DESC(dma_tx_num, "Number of descriptors in the TX list");
  74
  75
  76 #define POLL_PHY (-1)
  77
  78 /* Make sure DMA buffer size is larger than the max frame size
  79  * plus some alignment offset and a VLAN header. If the max frame size is
  80  * 1518, a VLAN header would be additional 4 bytes and additional
  81  * headroom for alignment is 2 bytes, 2048 is just fine.
  82  */
  83 #define ALTERA_RXDMABUFFER_SIZE 2048
  84
  85 /* Allow network stack to resume queueing packets after we've
  86  * finished transmitting at least 1/4 of the packets in the queue.
  87  */
  88 #define TSE_TX_THRESH(x)        (x->tx_ring_size / 4)
  89
  90 #define TXQUEUESTOP_THRESHHOLD  2
  91
  92 static struct of_device_id altera_tse_ids[];
  93
  94 static inline u32 tse_tx_avail(struct altera_tse_private *priv)
  95 {
  96         return priv->tx_cons + priv->tx_ring_size - priv->tx_prod - 1;
  97 }
  98
  99 /* MDIO specific functions
 100  */
 101 static int altera_tse_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
 102 {
 103         struct altera_tse_mac *mac = (struct altera_tse_mac *)bus->priv;
 104         unsigned int *mdio_regs = (unsigned int *)&mac->mdio_phy0;
 105         u32 data;
 106
 107         /* set MDIO address */
 108         iowrite32((mii_id & 0x1f), &mac->mdio_phy0_addr);
 109
 110         /* get the data */
 111         data = ioread32(&mdio_regs[regnum]) & 0xffff;
 112         return data;
 113 }
 114
 115 static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
 116                                  u16 value)
 117 {
 118         struct altera_tse_mac *mac = (struct altera_tse_mac *)bus->priv;
 119         unsigned int *mdio_regs = (unsigned int *)&mac->mdio_phy0;
 120
 121         /* set MDIO address */
 122         iowrite32((mii_id & 0x1f), &mac->mdio_phy0_addr);
 123
 124         /* write the data */
 125         iowrite32((u32) value, &mdio_regs[regnum]);
 126         return 0;
 127 }
 128
 129 static int altera_tse_mdio_create(struct net_device *dev, unsigned int id)
 130 {
 131         struct altera_tse_private *priv = netdev_priv(dev);
 132         int ret;
 133         int i;
 134         struct device_node *mdio_node = NULL;
 135         struct mii_bus *mdio = NULL;
 136         struct device_node *child_node = NULL;
 137
 138         for_each_child_of_node(priv->device->of_node, child_node) {
 139                 if (of_device_is_compatible(child_node, "altr,tse-mdio")) {
 140                         mdio_node = child_node;
 141                         break;
 142                 }
 143         }
 144
 145         if (mdio_node) {
 146                 netdev_dbg(dev, "FOUND MDIO subnode\n");
 147         } else {
 148                 netdev_dbg(dev, "NO MDIO subnode\n");
 149                 return 0;
 150         }
 151
 152         mdio = mdiobus_alloc();
 153         if (mdio == NULL) {
 154                 netdev_err(dev, "Error allocating MDIO bus\n");
 155                 return -ENOMEM;
 156         }
 157
 158         mdio->name = ALTERA_TSE_RESOURCE_NAME;
 159         mdio->read = &altera_tse_mdio_read;
 160         mdio->write = &altera_tse_mdio_write;
 161         snprintf(mdio->id, MII_BUS_ID_SIZE, "%s-%u", mdio->name, id);
 162
 163         mdio->irq = kcalloc(PHY_MAX_ADDR, sizeof(int), GFP_KERNEL);
 164         if (mdio->irq == NULL) {
 165                 ret = -ENOMEM;
 166                 goto out_free_mdio;
 167         }
 168         for (i = 0; i < PHY_MAX_ADDR; i++)
 169                 mdio->irq[i] = PHY_POLL;
 170
 171         mdio->priv = priv->mac_dev;
 172         mdio->parent = priv->device;
 173
 174         ret = of_mdiobus_register(mdio, mdio_node);
 175         if (ret != 0) {
 176                 netdev_err(dev, "Cannot register MDIO bus %s\n",
 177                            mdio->id);
 178                 goto out_free_mdio_irq;
 179         }
 180
 181         if (netif_msg_drv(priv))
 182                 netdev_info(dev, "MDIO bus %s: created\n", mdio->id);
 183
 184         priv->mdio = mdio;
 185         return 0;
 186 out_free_mdio_irq:
 187         kfree(mdio->irq);
 188 out_free_mdio:
 189         mdiobus_free(mdio);
 190         mdio = NULL;
 191         return ret;
 192 }
 193
 194 static void altera_tse_mdio_destroy(struct net_device *dev)
 195 {
 196         struct altera_tse_private *priv = netdev_priv(dev);
 197
 198         if (priv->mdio == NULL)
 199                 return;
 200
 201         if (netif_msg_drv(priv))
 202                 netdev_info(dev, "MDIO bus %s: removed\n",
 203                             priv->mdio->id);
 204
 205         mdiobus_unregister(priv->mdio);
 206         kfree(priv->mdio->irq);
 207         mdiobus_free(priv->mdio);
 208         priv->mdio = NULL;
 209 }
 210
 211 static int tse_init_rx_buffer(struct altera_tse_private *priv,
 212                               struct tse_buffer *rxbuffer, int len)
 213 {
 214         rxbuffer->skb = netdev_alloc_skb_ip_align(priv->dev, len);
 215         if (!rxbuffer->skb)
 216                 return -ENOMEM;
 217
 218         rxbuffer->dma_addr = dma_map_single(priv->device, rxbuffer->skb->data,
 219                                                 len,
 220                                                 DMA_FROM_DEVICE);
 221
 222         if (dma_mapping_error(priv->device, rxbuffer->dma_addr)) {
 223                 netdev_err(priv->dev, "%s: DMA mapping error\n", __func__);
 224                 dev_kfree_skb_any(rxbuffer->skb);
 225                 return -EINVAL;
 226         }
 227         rxbuffer->dma_addr &= (dma_addr_t)~3;
 228         rxbuffer->len = len;
 229         return 0;
 230 }
 231
 232 static void tse_free_rx_buffer(struct altera_tse_private *priv,
 233                                struct tse_buffer *rxbuffer)
 234 {
 235         struct sk_buff *skb = rxbuffer->skb;
 236         dma_addr_t dma_addr = rxbuffer->dma_addr;
 237
 238         if (skb != NULL) {
 239                 if (dma_addr)
 240                         dma_unmap_single(priv->device, dma_addr,
 241                                          rxbuffer->len,
 242                                          DMA_FROM_DEVICE);
 243                 dev_kfree_skb_any(skb);
 244                 rxbuffer->skb = NULL;
 245                 rxbuffer->dma_addr = 0;
 246         }
 247 }
 248
 249 /* Unmap and free Tx buffer resources
 250  */
 251 static void tse_free_tx_buffer(struct altera_tse_private *priv,
 252                                struct tse_buffer *buffer)
 253 {
 254         if (buffer->dma_addr) {
 255                 if (buffer->mapped_as_page)
 256                         dma_unmap_page(priv->device, buffer->dma_addr,
 257                                        buffer->len, DMA_TO_DEVICE);
 258                 else
 259                         dma_unmap_single(priv->device, buffer->dma_addr,
 260                                          buffer->len, DMA_TO_DEVICE);
 261                 buffer->dma_addr = 0;
 262         }
 263         if (buffer->skb) {
 264                 dev_kfree_skb_any(buffer->skb);
 265                 buffer->skb = NULL;
 266         }
 267 }
 268
 269 static int alloc_init_skbufs(struct altera_tse_private *priv)
 270 {
 271         unsigned int rx_descs = priv->rx_ring_size;
 272         unsigned int tx_descs = priv->tx_ring_size;
 273         int ret = -ENOMEM;
 274         int i;
 275
 276         /* Create Rx ring buffer */
 277         priv->rx_ring = kcalloc(rx_descs, sizeof(struct tse_buffer),
 278                                 GFP_KERNEL);
 279         if (!priv->rx_ring)
 280                 goto err_rx_ring;
 281
 282         /* Create Tx ring buffer */
 283         priv->tx_ring = kcalloc(tx_descs, sizeof(struct tse_buffer),
 284                                 GFP_KERNEL);
 285         if (!priv->tx_ring)
 286                 goto err_tx_ring;
 287
 288         priv->tx_cons = 0;
 289         priv->tx_prod = 0;
 290
 291         /* Init Rx ring */
 292         for (i = 0; i < rx_descs; i++) {
 293                 ret = tse_init_rx_buffer(priv, &priv->rx_ring[i],
 294                                          priv->rx_dma_buf_sz);
 295                 if (ret)
 296                         goto err_init_rx_buffers;
 297         }
 298
 299         priv->rx_cons = 0;
 300         priv->rx_prod = 0;
 301
 302         return 0;
 303 err_init_rx_buffers:
 304         while (--i >= 0)
 305                 tse_free_rx_buffer(priv, &priv->rx_ring[i]);
 306         kfree(priv->tx_ring);
 307 err_tx_ring:
 308         kfree(priv->rx_ring);
 309 err_rx_ring:
 310         return ret;
 311 }
 312
 313 static void free_skbufs(struct net_device *dev)
 314 {
 315         struct altera_tse_private *priv = netdev_priv(dev);
 316         unsigned int rx_descs = priv->rx_ring_size;
 317         unsigned int tx_descs = priv->tx_ring_size;
 318         int i;
 319
 320         /* Release the DMA TX/RX socket buffers */
 321         for (i = 0; i < rx_descs; i++)
 322                 tse_free_rx_buffer(priv, &priv->rx_ring[i]);
 323         for (i = 0; i < tx_descs; i++)
 324                 tse_free_tx_buffer(priv, &priv->tx_ring[i]);
 325
 326
 327         kfree(priv->tx_ring);
 328 }
 329
 330 /* Reallocate the skb for the reception process
 331  */
 332 static inline void tse_rx_refill(struct altera_tse_private *priv)
 333 {
 334         unsigned int rxsize = priv->rx_ring_size;
 335         unsigned int entry;
 336         int ret;
 337
 338         for (; priv->rx_cons - priv->rx_prod > 0;
 339                         priv->rx_prod++) {
 340                 entry = priv->rx_prod % rxsize;
 341                 if (likely(priv->rx_ring[entry].skb == NULL)) {
 342                         ret = tse_init_rx_buffer(priv, &priv->rx_ring[entry],
 343                                 priv->rx_dma_buf_sz);
 344                         if (unlikely(ret != 0))
 345                                 break;
 346                         priv->dmaops->add_rx_desc(priv, &priv->rx_ring[entry]);
 347                 }
 348         }
 349 }
 350
 351 /* Pull out the VLAN tag and fix up the packet
 352  */
 353 static inline void tse_rx_vlan(struct net_device *dev, struct sk_buff *skb)
 354 {
 355         struct ethhdr *eth_hdr;
 356         u16 vid;
 357         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
 358             !__vlan_get_tag(skb, &vid)) {
 359                 eth_hdr = (struct ethhdr *)skb->data;
 360                 memmove(skb->data + VLAN_HLEN, eth_hdr, ETH_ALEN * 2);
 361                 skb_pull(skb, VLAN_HLEN);
 362                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
 363         }
 364 }
 365
 366 /* Receive a packet: retrieve and pass over to upper levels
 367  */
 368 static int tse_rx(struct altera_tse_private *priv, int limit)
 369 {
 370         unsigned int count = 0;
 371         unsigned int next_entry;
 372         struct sk_buff *skb;
 373         unsigned int entry = priv->rx_cons % priv->rx_ring_size;
 374         u32 rxstatus;
 375         u16 pktlength;
 376         u16 pktstatus;
 377
 378         while ((rxstatus = priv->dmaops->get_rx_status(priv)) != 0) {
 379                 pktstatus = rxstatus >> 16;
 380                 pktlength = rxstatus & 0xffff;
 381
 382                 if ((pktstatus & 0xFF) || (pktlength == 0))
 383                         netdev_err(priv->dev,
 384                                    "RCV pktstatus %08X pktlength %08X\n",
 385                                    pktstatus, pktlength);
 386
 387                 count++;
 388                 next_entry = (++priv->rx_cons) % priv->rx_ring_size;
 389
 390                 skb = priv->rx_ring[entry].skb;
 391                 if (unlikely(!skb)) {
 392                         netdev_err(priv->dev,
 393                                    "%s: Inconsistent Rx descriptor chain\n",
 394                                    __func__);
 395                         priv->dev->stats.rx_dropped++;
 396                         break;
 397                 }
 398                 priv->rx_ring[entry].skb = NULL;
 399
 400                 skb_put(skb, pktlength);
 401
 402                 /* make cache consistent with receive packet buffer */
 403                 dma_sync_single_for_cpu(priv->device,
 404                                         priv->rx_ring[entry].dma_addr,
 405                                         priv->rx_ring[entry].len,
 406                                         DMA_FROM_DEVICE);
 407
 408                 dma_unmap_single(priv->device, priv->rx_ring[entry].dma_addr,
 409                                  priv->rx_ring[entry].len, DMA_FROM_DEVICE);
 410
 411                 if (netif_msg_pktdata(priv)) {
 412                         netdev_info(priv->dev, "frame received %d bytes\n",
 413                                     pktlength);
 414                         print_hex_dump(KERN_ERR, "data: ", DUMP_PREFIX_OFFSET,
 415                                        16, 1, skb->data, pktlength, true);
 416                 }
 417
 418                 tse_rx_vlan(priv->dev, skb);
 419
 420                 skb->protocol = eth_type_trans(skb, priv->dev);
 421                 skb_checksum_none_assert(skb);
 422
 423                 napi_gro_receive(&priv->napi, skb);
 424
 425                 priv->dev->stats.rx_packets++;
 426                 priv->dev->stats.rx_bytes += pktlength;
 427
 428                 entry = next_entry;
 429
 430                 tse_rx_refill(priv);
 431         }
 432
 433         return count;
 434 }
 435
 436 /* Reclaim resources after transmission completes
 437  */
 438 static int tse_tx_complete(struct altera_tse_private *priv)
 439 {
 440         unsigned int txsize = priv->tx_ring_size;
 441         u32 ready;
 442         unsigned int entry;
 443         struct tse_buffer *tx_buff;
 444         int txcomplete = 0;
 445
 446         spin_lock(&priv->tx_lock);
 447
 448         ready = priv->dmaops->tx_completions(priv);
 449
 450         /* Free sent buffers */
 451         while (ready && (priv->tx_cons != priv->tx_prod)) {
 452                 entry = priv->tx_cons % txsize;
 453                 tx_buff = &priv->tx_ring[entry];
 454
 455                 if (netif_msg_tx_done(priv))
 456                         netdev_dbg(priv->dev, "%s: curr %d, dirty %d\n",
 457                                    __func__, priv->tx_prod, priv->tx_cons);
 458
 459                 if (likely(tx_buff->skb))
 460                         priv->dev->stats.tx_packets++;
 461
 462                 tse_free_tx_buffer(priv, tx_buff);
 463                 priv->tx_cons++;
 464
 465                 txcomplete++;
 466                 ready--;
 467         }
 468
 469         if (unlikely(netif_queue_stopped(priv->dev) &&
 470                      tse_tx_avail(priv) > TSE_TX_THRESH(priv))) {
 471                 netif_tx_lock(priv->dev);
 472                 if (netif_queue_stopped(priv->dev) &&
 473                     tse_tx_avail(priv) > TSE_TX_THRESH(priv)) {
 474                         if (netif_msg_tx_done(priv))
 475                                 netdev_dbg(priv->dev, "%s: restart transmit\n",
 476                                            __func__);
 477                         netif_wake_queue(priv->dev);
 478                 }
 479                 netif_tx_unlock(priv->dev);
 480         }
 481
 482         spin_unlock(&priv->tx_lock);
 483         return txcomplete;
 484 }
 485
 486 /* NAPI polling function
 487  */
 488 static int tse_poll(struct napi_struct *napi, int budget)
 489 {
 490         struct altera_tse_private *priv =
 491                         container_of(napi, struct altera_tse_private, napi);
 492         int rxcomplete = 0;
 493         int txcomplete = 0;
 494         unsigned long int flags;
 495
 496         txcomplete = tse_tx_complete(priv);
 497
 498         rxcomplete = tse_rx(priv, budget);
 499
 500         if (rxcomplete >= budget || txcomplete > 0)
 501                 return rxcomplete;
 502
 503         napi_gro_flush(napi, false);
 504         __napi_complete(napi);
 505
 506         netdev_dbg(priv->dev,
 507                    "NAPI Complete, did %d packets with budget %d\n",
 508                    txcomplete+rxcomplete, budget);
 509
 510         spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
 511         priv->dmaops->enable_rxirq(priv);
 512         priv->dmaops->enable_txirq(priv);
 513         spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
 514         return rxcomplete + txcomplete;
 515 }
 516
 517 /* DMA TX & RX FIFO interrupt routing
 518  */
 519 static irqreturn_t altera_isr(int irq, void *dev_id)
 520 {
 521         struct net_device *dev = dev_id;
 522         struct altera_tse_private *priv;
 523         unsigned long int flags;
 524
 525         if (unlikely(!dev)) {
 526                 pr_err("%s: invalid dev pointer\n", __func__);
 527                 return IRQ_NONE;
 528         }
 529         priv = netdev_priv(dev);
 530
 531         /* turn off desc irqs and enable napi rx */
 532         spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
 533
 534         if (likely(napi_schedule_prep(&priv->napi))) {
 535                 priv->dmaops->disable_rxirq(priv);
 536                 priv->dmaops->disable_txirq(priv);
 537                 __napi_schedule(&priv->napi);
 538         }
 539
 540         /* reset IRQs */
 541         priv->dmaops->clear_rxirq(priv);
 542         priv->dmaops->clear_txirq(priv);
 543
 544         spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
 545
 546         return IRQ_HANDLED;
 547 }
 548
 549 /* Transmit a packet (called by the kernel). Dispatches
 550  * either the SGDMA method for transmitting or the
 551  * MSGDMA method, assumes no scatter/gather support,
 552  * implying an assumption that there's only one
 553  * physically contiguous fragment starting at
 554  * skb->data, for length of skb_headlen(skb).
 555  */
 556 static int tse_start_xmit(struct sk_buff *skb, struct net_device *dev)
 557 {
 558         struct altera_tse_private *priv = netdev_priv(dev);
 559         unsigned int txsize = priv->tx_ring_size;
 560         unsigned int entry;
 561         struct tse_buffer *buffer = NULL;
 562         int nfrags = skb_shinfo(skb)->nr_frags;
 563         unsigned int nopaged_len = skb_headlen(skb);
 564         enum netdev_tx ret = NETDEV_TX_OK;
 565         dma_addr_t dma_addr;
 566         int txcomplete = 0;
 567
 568         spin_lock_bh(&priv->tx_lock);
 569
 570         if (unlikely(tse_tx_avail(priv) < nfrags + 1)) {
 571                 if (!netif_queue_stopped(dev)) {
 572                         netif_stop_queue(dev);
 573                         /* This is a hard error, log it. */
 574                         netdev_err(priv->dev,
 575                                    "%s: Tx list full when queue awake\n",
 576                                    __func__);
 577                 }
 578                 ret = NETDEV_TX_BUSY;
 579                 goto out;
 580         }
 581
 582         /* Map the first skb fragment */
 583         entry = priv->tx_prod % txsize;
 584         buffer = &priv->tx_ring[entry];
 585
 586         dma_addr = dma_map_single(priv->device, skb->data, nopaged_len,
 587                                   DMA_TO_DEVICE);
 588         if (dma_mapping_error(priv->device, dma_addr)) {
 589                 netdev_err(priv->dev, "%s: DMA mapping error\n", __func__);
 590                 ret = NETDEV_TX_OK;
 591                 goto out;
 592         }
 593
 594         buffer->skb = skb;
 595         buffer->dma_addr = dma_addr;
 596         buffer->len = nopaged_len;
 597
 598         /* Push data out of the cache hierarchy into main memory */
 599         dma_sync_single_for_device(priv->device, buffer->dma_addr,
 600                                    buffer->len, DMA_TO_DEVICE);
 601
 602         txcomplete = priv->dmaops->tx_buffer(priv, buffer);
 603
 604         skb_tx_timestamp(skb);
 605
 606         priv->tx_prod++;
 607         dev->stats.tx_bytes += skb->len;
 608
 609         if (unlikely(tse_tx_avail(priv) <= TXQUEUESTOP_THRESHHOLD)) {
 610                 if (netif_msg_hw(priv))
 611                         netdev_dbg(priv->dev, "%s: stop transmitted packets\n",
 612                                    __func__);
 613                 netif_stop_queue(dev);
 614         }
 615
 616 out:
 617         spin_unlock_bh(&priv->tx_lock);
 618
 619         return ret;
 620 }
 621
 622 /* Called every time the controller might need to be made
 623  * aware of new link state.  The PHY code conveys this
 624  * information through variables in the phydev structure, and this
 625  * function converts those variables into the appropriate
 626  * register values, and can bring down the device if needed.
 627  */
 628 static void altera_tse_adjust_link(struct net_device *dev)
 629 {
 630         struct altera_tse_private *priv = netdev_priv(dev);
 631         struct phy_device *phydev = priv->phydev;
 632         int new_state = 0;
 633
 634         /* only change config if there is a link */
 635         spin_lock(&priv->mac_cfg_lock);
 636         if (phydev->link) {
 637                 /* Read old config */
 638                 u32 cfg_reg = ioread32(&priv->mac_dev->command_config);
 639
 640                 /* Check duplex */
 641                 if (phydev->duplex != priv->oldduplex) {
 642                         new_state = 1;
 643                         if (!(phydev->duplex))
 644                                 cfg_reg |= MAC_CMDCFG_HD_ENA;
 645                         else
 646                                 cfg_reg &= ~MAC_CMDCFG_HD_ENA;
 647
 648                         netdev_dbg(priv->dev, "%s: Link duplex = 0x%x\n",
 649                                    dev->name, phydev->duplex);
 650
 651                         priv->oldduplex = phydev->duplex;
 652                 }
 653
 654                 /* Check speed */
 655                 if (phydev->speed != priv->oldspeed) {
 656                         new_state = 1;
 657                         switch (phydev->speed) {
 658                         case 1000:
 659                                 cfg_reg |= MAC_CMDCFG_ETH_SPEED;
 660                                 cfg_reg &= ~MAC_CMDCFG_ENA_10;
 661                                 break;
 662                         case 100:
 663                                 cfg_reg &= ~MAC_CMDCFG_ETH_SPEED;
 664                                 cfg_reg &= ~MAC_CMDCFG_ENA_10;
 665                                 break;
 666                         case 10:
 667                                 cfg_reg &= ~MAC_CMDCFG_ETH_SPEED;
 668                                 cfg_reg |= MAC_CMDCFG_ENA_10;
 669                                 break;
 670                         default:
 671                                 if (netif_msg_link(priv))
 672                                         netdev_warn(dev, "Speed (%d) is not 10/100/1000!\n",
 673                                                     phydev->speed);
 674                                 break;
 675                         }
 676                         priv->oldspeed = phydev->speed;
 677                 }
 678                 iowrite32(cfg_reg, &priv->mac_dev->command_config);
 679
 680                 if (!priv->oldlink) {
 681                         new_state = 1;
 682                         priv->oldlink = 1;
 683                 }
 684         } else if (priv->oldlink) {
 685                 new_state = 1;
 686                 priv->oldlink = 0;
 687                 priv->oldspeed = 0;
 688                 priv->oldduplex = -1;
 689         }
 690
 691         if (new_state && netif_msg_link(priv))
 692                 phy_print_status(phydev);
 693
 694         spin_unlock(&priv->mac_cfg_lock);
 695 }
 696 static struct phy_device *connect_local_phy(struct net_device *dev)
 697 {
 698         struct altera_tse_private *priv = netdev_priv(dev);
 699         struct phy_device *phydev = NULL;
 700         char phy_id_fmt[MII_BUS_ID_SIZE + 3];
 701         int ret;
 702
 703         if (priv->phy_addr != POLL_PHY) {
 704                 snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT,
 705                          priv->mdio->id, priv->phy_addr);
 706
 707                 netdev_dbg(dev, "trying to attach to %s\n", phy_id_fmt);
 708
 709                 phydev = phy_connect(dev, phy_id_fmt, &altera_tse_adjust_link,
 710                                      priv->phy_iface);
 711                 if (IS_ERR(phydev))
 712                         netdev_err(dev, "Could not attach to PHY\n");
 713
 714         } else {
 715                 phydev = phy_find_first(priv->mdio);
 716                 if (phydev == NULL) {
 717                         netdev_err(dev, "No PHY found\n");
 718                         return phydev;
 719                 }
 720
 721                 ret = phy_connect_direct(dev, phydev, &altera_tse_adjust_link,
 722                                 priv->phy_iface);
 723                 if (ret != 0) {
 724                         netdev_err(dev, "Could not attach to PHY\n");
 725                         phydev = NULL;
 726                 }
 727         }
 728         return phydev;
 729 }
 730
 731 /* Initialize driver's PHY state, and attach to the PHY
 732  */
 733 static int init_phy(struct net_device *dev)
 734 {
 735         struct altera_tse_private *priv = netdev_priv(dev);
 736         struct phy_device *phydev;
 737         struct device_node *phynode;
 738
 739         priv->oldlink = 0;
 740         priv->oldspeed = 0;
 741         priv->oldduplex = -1;
 742
 743         phynode = of_parse_phandle(priv->device->of_node, "phy-handle", 0);
 744
 745         if (!phynode) {
 746                 netdev_dbg(dev, "no phy-handle found\n");
 747                 if (!priv->mdio) {
 748                         netdev_err(dev,
 749                                    "No phy-handle nor local mdio specified\n");
 750                         return -ENODEV;
 751                 }
 752                 phydev = connect_local_phy(dev);
 753         } else {
 754                 netdev_dbg(dev, "phy-handle found\n");
 755                 phydev = of_phy_connect(dev, phynode,
 756                         &altera_tse_adjust_link, 0, priv->phy_iface);
 757         }
 758
 759         if (!phydev) {
 760                 netdev_err(dev, "Could not find the PHY\n");
 761                 return -ENODEV;
 762         }
 763
 764         /* Stop Advertising 1000BASE Capability if interface is not GMII
 765          * Note: Checkpatch throws CHECKs for the camel case defines below,
 766          * it's ok to ignore.
 767          */
 768         if ((priv->phy_iface == PHY_INTERFACE_MODE_MII) ||
 769             (priv->phy_iface == PHY_INTERFACE_MODE_RMII))
 770                 phydev->advertising &= ~(SUPPORTED_1000baseT_Half |
 771                                          SUPPORTED_1000baseT_Full);
 772
 773         /* Broken HW is sometimes missing the pull-up resistor on the
 774          * MDIO line, which results in reads to non-existent devices returning
 775          * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
 776          * device as well.
 777          * Note: phydev->phy_id is the result of reading the UID PHY registers.
 778          */
 779         if (phydev->phy_id == 0) {
 780                 netdev_err(dev, "Bad PHY UID 0x%08x\n", phydev->phy_id);
 781                 phy_disconnect(phydev);
 782                 return -ENODEV;
 783         }
 784
 785         netdev_dbg(dev, "attached to PHY %d UID 0x%08x Link = %d\n",
 786                    phydev->addr, phydev->phy_id, phydev->link);
 787
 788         priv->phydev = phydev;
 789         return 0;
 790 }
 791
 792 static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr)
 793 {
 794         struct altera_tse_mac *mac = priv->mac_dev;
 795         u32 msb;
 796         u32 lsb;
 797
 798         msb = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
 799         lsb = ((addr[5] << 8) | addr[4]) & 0xffff;
 800
 801         /* Set primary MAC address */
 802         iowrite32(msb, &mac->mac_addr_0);
 803         iowrite32(lsb, &mac->mac_addr_1);
 804 }
 805
 806 /* MAC software reset.
 807  * When reset is triggered, the MAC function completes the current
 808  * transmission or reception, and subsequently disables the transmit and
 809  * receive logic, flushes the receive FIFO buffer, and resets the statistics
 810  * counters.
 811  */
 812 static int reset_mac(struct altera_tse_private *priv)
 813 {
 814         void __iomem *cmd_cfg_reg = &priv->mac_dev->command_config;
 815         int counter;
 816         u32 dat;
 817
 818         dat = ioread32(cmd_cfg_reg);
 819         dat &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA);
 820         dat |= MAC_CMDCFG_SW_RESET | MAC_CMDCFG_CNT_RESET;
 821         iowrite32(dat, cmd_cfg_reg);
 822
 823         counter = 0;
 824         while (counter++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) {
 825                 if (tse_bit_is_clear(cmd_cfg_reg, MAC_CMDCFG_SW_RESET))
 826                         break;
 827                 udelay(1);
 828         }
 829
 830         if (counter >= ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) {
 831                 dat = ioread32(cmd_cfg_reg);
 832                 dat &= ~MAC_CMDCFG_SW_RESET;
 833                 iowrite32(dat, cmd_cfg_reg);
 834                 return -1;
 835         }
 836         return 0;
 837 }
 838
 839 /* Initialize MAC core registers
 840 */
 841 static int init_mac(struct altera_tse_private *priv)
 842 {
 843         struct altera_tse_mac *mac = priv->mac_dev;
 844         unsigned int cmd = 0;
 845         u32 frm_length;
 846
 847         /* Setup Rx FIFO */
 848         iowrite32(priv->rx_fifo_depth - ALTERA_TSE_RX_SECTION_EMPTY,
 849                   &mac->rx_section_empty);
 850         iowrite32(ALTERA_TSE_RX_SECTION_FULL, &mac->rx_section_full);
 851         iowrite32(ALTERA_TSE_RX_ALMOST_EMPTY, &mac->rx_almost_empty);
 852         iowrite32(ALTERA_TSE_RX_ALMOST_FULL, &mac->rx_almost_full);
 853
 854         /* Setup Tx FIFO */
 855         iowrite32(priv->tx_fifo_depth - ALTERA_TSE_TX_SECTION_EMPTY,
 856                   &mac->tx_section_empty);
 857         iowrite32(ALTERA_TSE_TX_SECTION_FULL, &mac->tx_section_full);
 858         iowrite32(ALTERA_TSE_TX_ALMOST_EMPTY, &mac->tx_almost_empty);
 859         iowrite32(ALTERA_TSE_TX_ALMOST_FULL, &mac->tx_almost_full);
 860
 861         /* MAC Address Configuration */
 862         tse_update_mac_addr(priv, priv->dev->dev_addr);
 863
 864         /* MAC Function Configuration */
 865         frm_length = ETH_HLEN + priv->dev->mtu + ETH_FCS_LEN;
 866         iowrite32(frm_length, &mac->frm_length);
 867         iowrite32(ALTERA_TSE_TX_IPG_LENGTH, &mac->tx_ipg_length);
 868
 869         /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit
 870          * start address
 871          */
 872         tse_set_bit(&mac->rx_cmd_stat, ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16);
 873         tse_clear_bit(&mac->tx_cmd_stat, ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 |
 874                                          ALTERA_TSE_TX_CMD_STAT_OMIT_CRC);
 875
 876         /* Set the MAC options */
 877         cmd = ioread32(&mac->command_config);
 878         cmd &= ~MAC_CMDCFG_PAD_EN;      /* No padding Removal on Receive */
 879         cmd &= ~MAC_CMDCFG_CRC_FWD;     /* CRC Removal */
 880         cmd |= MAC_CMDCFG_RX_ERR_DISC;  /* Automatically discard frames
 881                                          * with CRC errors
 882                                          */
 883         cmd |= MAC_CMDCFG_CNTL_FRM_ENA;
 884         cmd &= ~MAC_CMDCFG_TX_ENA;
 885         cmd &= ~MAC_CMDCFG_RX_ENA;
 886
 887         /* Default speed and duplex setting, full/100 */
 888         cmd &= ~MAC_CMDCFG_HD_ENA;
 889         cmd &= ~MAC_CMDCFG_ETH_SPEED;
 890         cmd &= ~MAC_CMDCFG_ENA_10;
 891
 892         iowrite32(cmd, &mac->command_config);
 893
 894         if (netif_msg_hw(priv))
 895                 dev_dbg(priv->device,
 896                         "MAC post-initialization: CMD_CONFIG = 0x%08x\n", cmd);
 897
 898         return 0;
 899 }
 900
 901 /* Start/stop MAC transmission logic
 902  */
 903 static void tse_set_mac(struct altera_tse_private *priv, bool enable)
 904 {
 905         struct altera_tse_mac *mac = priv->mac_dev;
 906         u32 value = ioread32(&mac->command_config);
 907
 908         if (enable)
 909                 value |= MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA;
 910         else
 911                 value &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA);
 912
 913         iowrite32(value, &mac->command_config);
 914 }
 915
 916 /* Change the MTU
 917  */
 918 static int tse_change_mtu(struct net_device *dev, int new_mtu)
 919 {
 920         struct altera_tse_private *priv = netdev_priv(dev);
 921         unsigned int max_mtu = priv->max_mtu;
 922         unsigned int min_mtu = ETH_ZLEN + ETH_FCS_LEN;
 923
 924         if (netif_running(dev)) {
 925                 netdev_err(dev, "must be stopped to change its MTU\n");
 926                 return -EBUSY;
 927         }
 928
 929         if ((new_mtu < min_mtu) || (new_mtu > max_mtu)) {
 930                 netdev_err(dev, "invalid MTU, max MTU is: %u\n", max_mtu);
 931                 return -EINVAL;
 932         }
 933
 934         dev->mtu = new_mtu;
 935         netdev_update_features(dev);
 936
 937         return 0;
 938 }
 939
 940 static void altera_tse_set_mcfilter(struct net_device *dev)
 941 {
 942         struct altera_tse_private *priv = netdev_priv(dev);
 943         struct altera_tse_mac *mac = priv->mac_dev;
 944         int i;
 945         struct netdev_hw_addr *ha;
 946
 947         /* clear the hash filter */
 948         for (i = 0; i < 64; i++)
 949                 iowrite32(0, &(mac->hash_table[i]));
 950
 951         netdev_for_each_mc_addr(ha, dev) {
 952                 unsigned int hash = 0;
 953                 int mac_octet;
 954
 955                 for (mac_octet = 5; mac_octet >= 0; mac_octet--) {
 956                         unsigned char xor_bit = 0;
 957                         unsigned char octet = ha->addr[mac_octet];
 958                         unsigned int bitshift;
 959
 960                         for (bitshift = 0; bitshift < 8; bitshift++)
 961                                 xor_bit ^= ((octet >> bitshift) & 0x01);
 962
 963                         hash = (hash << 1) | xor_bit;
 964                 }
 965                 iowrite32(1, &(mac->hash_table[hash]));
 966         }
 967 }
 968
 969
 970 static void altera_tse_set_mcfilterall(struct net_device *dev)
 971 {
 972         struct altera_tse_private *priv = netdev_priv(dev);
 973         struct altera_tse_mac *mac = priv->mac_dev;
 974         int i;
 975
 976         /* set the hash filter */
 977         for (i = 0; i < 64; i++)
 978                 iowrite32(1, &(mac->hash_table[i]));
 979 }
 980
 981 /* Set or clear the multicast filter for this adaptor
 982  */
 983 static void tse_set_rx_mode_hashfilter(struct net_device *dev)
 984 {
 985         struct altera_tse_private *priv = netdev_priv(dev);
 986         struct altera_tse_mac *mac = priv->mac_dev;
 987
 988         spin_lock(&priv->mac_cfg_lock);
 989
 990         if (dev->flags & IFF_PROMISC)
 991                 tse_set_bit(&mac->command_config, MAC_CMDCFG_PROMIS_EN);
 992
 993         if (dev->flags & IFF_ALLMULTI)
 994                 altera_tse_set_mcfilterall(dev);
 995         else
 996                 altera_tse_set_mcfilter(dev);
 997
 998         spin_unlock(&priv->mac_cfg_lock);
 999 }
1000
1001 /* Set or clear the multicast filter for this adaptor
1002  */
1003 static void tse_set_rx_mode(struct net_device *dev)
1004 {
1005         struct altera_tse_private *priv = netdev_priv(dev);
1006         struct altera_tse_mac *mac = priv->mac_dev;
1007
1008         spin_lock(&priv->mac_cfg_lock);
1009
1010         if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI) ||
1011             !netdev_mc_empty(dev) || !netdev_uc_empty(dev))
1012                 tse_set_bit(&mac->command_config, MAC_CMDCFG_PROMIS_EN);
1013         else
1014                 tse_clear_bit(&mac->command_config, MAC_CMDCFG_PROMIS_EN);
1015
1016         spin_unlock(&priv->mac_cfg_lock);
1017 }
1018
1019 /* Open and initialize the interface
1020  */
1021 static int tse_open(struct net_device *dev)
1022 {
1023         struct altera_tse_private *priv = netdev_priv(dev);
1024         int ret = 0;
1025         int i;
1026         unsigned long int flags;
1027
1028         /* Reset and configure TSE MAC and probe associated PHY */
1029         ret = priv->dmaops->init_dma(priv);
1030         if (ret != 0) {
1031                 netdev_err(dev, "Cannot initialize DMA\n");
1032                 goto phy_error;
1033         }
1034
1035         if (netif_msg_ifup(priv))
1036                 netdev_warn(dev, "device MAC address %pM\n",
1037                             dev->dev_addr);
1038
1039         if ((priv->revision < 0xd00) || (priv->revision > 0xe00))
1040                 netdev_warn(dev, "TSE revision %x\n", priv->revision);
1041
1042         spin_lock(&priv->mac_cfg_lock);
1043         ret = reset_mac(priv);
1044         if (ret)
1045                 netdev_err(dev, "Cannot reset MAC core (error: %d)\n", ret);
1046
1047         ret = init_mac(priv);
1048         spin_unlock(&priv->mac_cfg_lock);
1049         if (ret) {
1050                 netdev_err(dev, "Cannot init MAC core (error: %d)\n", ret);
1051                 goto alloc_skbuf_error;
1052         }
1053
1054         priv->dmaops->reset_dma(priv);
1055
1056         /* Create and initialize the TX/RX descriptors chains. */
1057         priv->rx_ring_size = dma_rx_num;
1058         priv->tx_ring_size = dma_tx_num;
1059         ret = alloc_init_skbufs(priv);
1060         if (ret) {
1061                 netdev_err(dev, "DMA descriptors initialization failed\n");
1062                 goto alloc_skbuf_error;
1063         }
1064
1065
1066         /* Register RX interrupt */
1067         ret = request_irq(priv->rx_irq, altera_isr, IRQF_SHARED,
1068                           dev->name, dev);
1069         if (ret) {
1070                 netdev_err(dev, "Unable to register RX interrupt %d\n",
1071                            priv->rx_irq);
1072                 goto init_error;
1073         }
1074
1075         /* Register TX interrupt */
1076         ret = request_irq(priv->tx_irq, altera_isr, IRQF_SHARED,
1077                           dev->name, dev);
1078         if (ret) {
1079                 netdev_err(dev, "Unable to register TX interrupt %d\n",
1080                            priv->tx_irq);
1081                 goto tx_request_irq_error;
1082         }
1083
1084         /* Enable DMA interrupts */
1085         spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
1086         priv->dmaops->enable_rxirq(priv);
1087         priv->dmaops->enable_txirq(priv);
1088
1089         /* Setup RX descriptor chain */
1090         for (i = 0; i < priv->rx_ring_size; i++)
1091                 priv->dmaops->add_rx_desc(priv, &priv->rx_ring[i]);
1092
1093         spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
1094
1095         if (priv->phydev)
1096                 phy_start(priv->phydev);
1097
1098         napi_enable(&priv->napi);
1099         netif_start_queue(dev);
1100
1101         priv->dmaops->start_rxdma(priv);
1102
1103         /* Start MAC Rx/Tx */
1104         spin_lock(&priv->mac_cfg_lock);
1105         tse_set_mac(priv, true);
1106         spin_unlock(&priv->mac_cfg_lock);
1107
1108         return 0;
1109
1110 tx_request_irq_error:
1111         free_irq(priv->rx_irq, dev);
1112 init_error:
1113         free_skbufs(dev);
1114 alloc_skbuf_error:
1115         if (priv->phydev) {
1116                 phy_disconnect(priv->phydev);
1117                 priv->phydev = NULL;
1118         }
1119 phy_error:
1120         return ret;
1121 }
1122
1123 /* Stop TSE MAC interface and put the device in an inactive state
1124  */
1125 static int tse_shutdown(struct net_device *dev)
1126 {
1127         struct altera_tse_private *priv = netdev_priv(dev);
1128         int ret;
1129         unsigned long int flags;
1130
1131         /* Stop and disconnect the PHY */
1132         if (priv->phydev) {
1133                 phy_stop(priv->phydev);
1134                 phy_disconnect(priv->phydev);
1135                 priv->phydev = NULL;
1136         }
1137
1138         netif_stop_queue(dev);
1139         napi_disable(&priv->napi);
1140
1141         /* Disable DMA interrupts */
1142         spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
1143         priv->dmaops->disable_rxirq(priv);
1144         priv->dmaops->disable_txirq(priv);
1145         spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
1146
1147         /* Free the IRQ lines */
1148         free_irq(priv->rx_irq, dev);
1149         free_irq(priv->tx_irq, dev);
1150
1151         /* disable and reset the MAC, empties fifo */
1152         spin_lock(&priv->mac_cfg_lock);
1153         spin_lock(&priv->tx_lock);
1154
1155         ret = reset_mac(priv);
1156         if (ret)
1157                 netdev_err(dev, "Cannot reset MAC core (error: %d)\n", ret);
1158         priv->dmaops->reset_dma(priv);
1159         free_skbufs(dev);
1160
1161         spin_unlock(&priv->tx_lock);
1162         spin_unlock(&priv->mac_cfg_lock);
1163
1164         priv->dmaops->uninit_dma(priv);
1165
1166         return 0;
1167 }
1168
1169 static struct net_device_ops altera_tse_netdev_ops = {
1170         .ndo_open               = tse_open,
1171         .ndo_stop               = tse_shutdown,
1172         .ndo_start_xmit         = tse_start_xmit,
1173         .ndo_set_mac_address    = eth_mac_addr,
1174         .ndo_set_rx_mode        = tse_set_rx_mode,
1175         .ndo_change_mtu         = tse_change_mtu,
1176         .ndo_validate_addr      = eth_validate_addr,
1177 };
1178
1179 static int request_and_map(struct platform_device *pdev, const char *name,
1180                            struct resource **res, void __iomem **ptr)
1181 {
1182         struct resource *region;
1183         struct device *device = &pdev->dev;
1184
1185         *res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
1186         if (*res == NULL) {
1187                 dev_err(device, "resource %s not defined\n", name);
1188                 return -ENODEV;
1189         }
1190
1191         region = devm_request_mem_region(device, (*res)->start,
1192                                          resource_size(*res), dev_name(device));
1193         if (region == NULL) {
1194                 dev_err(device, "unable to request %s\n", name);
1195                 return -EBUSY;
1196         }
1197
1198         *ptr = devm_ioremap_nocache(device, region->start,
1199                                     resource_size(region));
1200         if (*ptr == NULL) {
1201                 dev_err(device, "ioremap_nocache of %s failed!", name);
1202                 return -ENOMEM;
1203         }
1204
1205         return 0;
1206 }
1207
1208 /* Probe Altera TSE MAC device
1209  */
1210 static int altera_tse_probe(struct platform_device *pdev)
1211 {
1212         struct net_device *ndev;
1213         int ret = -ENODEV;
1214         struct resource *control_port;
1215         struct resource *dma_res;
1216         struct altera_tse_private *priv;
1217         const unsigned char *macaddr;
1218         struct device_node *np = pdev->dev.of_node;
1219         void __iomem *descmap;
1220         const struct of_device_id *of_id = NULL;
1221
1222         ndev = alloc_etherdev(sizeof(struct altera_tse_private));
1223         if (!ndev) {
1224                 dev_err(&pdev->dev, "Could not allocate network device\n");
1225                 return -ENODEV;
1226         }
1227
1228         SET_NETDEV_DEV(ndev, &pdev->dev);
1229
1230         priv = netdev_priv(ndev);
1231         priv->device = &pdev->dev;
1232         priv->dev = ndev;
1233         priv->msg_enable = netif_msg_init(debug, default_msg_level);
1234
1235         of_id = of_match_device(altera_tse_ids, &pdev->dev);
1236
1237         if (of_id)
1238                 priv->dmaops = (struct altera_dmaops *)of_id->data;
1239
1240
1241         if (priv->dmaops &&
1242             priv->dmaops->altera_dtype == ALTERA_DTYPE_SGDMA) {
1243                 /* Get the mapped address to the SGDMA descriptor memory */
1244                 ret = request_and_map(pdev, "s1", &dma_res, &descmap);
1245                 if (ret)
1246                         goto out_free;
1247
1248                 /* Start of that memory is for transmit descriptors */
1249                 priv->tx_dma_desc = descmap;
1250
1251                 /* First half is for tx descriptors, other half for tx */
1252                 priv->txdescmem = resource_size(dma_res)/2;
1253
1254                 priv->txdescmem_busaddr = (dma_addr_t)dma_res->start;
1255
1256                 priv->rx_dma_desc = (void __iomem *)((uintptr_t)(descmap +
1257                                                      priv->txdescmem));
1258                 priv->rxdescmem = resource_size(dma_res)/2;
1259                 priv->rxdescmem_busaddr = dma_res->start;
1260                 priv->rxdescmem_busaddr += priv->txdescmem;
1261
1262                 if (upper_32_bits(priv->rxdescmem_busaddr)) {
1263                         dev_dbg(priv->device,
1264                                 "SGDMA bus addresses greater than 32-bits\n");
1265                         goto out_free;
1266                 }
1267                 if (upper_32_bits(priv->txdescmem_busaddr)) {
1268                         dev_dbg(priv->device,
1269                                 "SGDMA bus addresses greater than 32-bits\n");
1270                         goto out_free;
1271                 }
1272         } else if (priv->dmaops &&
1273                    priv->dmaops->altera_dtype == ALTERA_DTYPE_MSGDMA) {
1274                 ret = request_and_map(pdev, "rx_resp", &dma_res,
1275                                       &priv->rx_dma_resp);
1276                 if (ret)
1277                         goto out_free;
1278
1279                 ret = request_and_map(pdev, "tx_desc", &dma_res,
1280                                       &priv->tx_dma_desc);
1281                 if (ret)
1282                         goto out_free;
1283
1284                 priv->txdescmem = resource_size(dma_res);
1285                 priv->txdescmem_busaddr = dma_res->start;
1286
1287                 ret = request_and_map(pdev, "rx_desc", &dma_res,
1288                                       &priv->rx_dma_desc);
1289                 if (ret)
1290                         goto out_free;
1291
1292                 priv->rxdescmem = resource_size(dma_res);
1293                 priv->rxdescmem_busaddr = dma_res->start;
1294
1295         } else {
1296                 goto out_free;
1297         }
1298
1299         if (!dma_set_mask(priv->device, DMA_BIT_MASK(priv->dmaops->dmamask)))
1300                 dma_set_coherent_mask(priv->device,
1301                                       DMA_BIT_MASK(priv->dmaops->dmamask));
1302         else if (!dma_set_mask(priv->device, DMA_BIT_MASK(32)))
1303                 dma_set_coherent_mask(priv->device, DMA_BIT_MASK(32));
1304         else
1305                 goto out_free;
1306
1307         /* MAC address space */
1308         ret = request_and_map(pdev, "control_port", &control_port,
1309                               (void __iomem **)&priv->mac_dev);
1310         if (ret)
1311                 goto out_free;
1312
1313         /* xSGDMA Rx Dispatcher address space */
1314         ret = request_and_map(pdev, "rx_csr", &dma_res,
1315                               &priv->rx_dma_csr);
1316         if (ret)
1317                 goto out_free;
1318
1319
1320         /* xSGDMA Tx Dispatcher address space */
1321         ret = request_and_map(pdev, "tx_csr", &dma_res,
1322                               &priv->tx_dma_csr);
1323         if (ret)
1324                 goto out_free;
1325
1326
1327         /* Rx IRQ */
1328         priv->rx_irq = platform_get_irq_byname(pdev, "rx_irq");
1329         if (priv->rx_irq == -ENXIO) {
1330                 dev_err(&pdev->dev, "cannot obtain Rx IRQ\n");
1331                 ret = -ENXIO;
1332                 goto out_free;
1333         }
1334
1335         /* Tx IRQ */
1336         priv->tx_irq = platform_get_irq_byname(pdev, "tx_irq");
1337         if (priv->tx_irq == -ENXIO) {
1338                 dev_err(&pdev->dev, "cannot obtain Tx IRQ\n");
1339                 ret = -ENXIO;
1340                 goto out_free;
1341         }
1342
1343         /* get FIFO depths from device tree */
1344         if (of_property_read_u32(pdev->dev.of_node, "rx-fifo-depth",
1345                                  &priv->rx_fifo_depth)) {
1346                 dev_err(&pdev->dev, "cannot obtain rx-fifo-depth\n");
1347                 ret = -ENXIO;
1348                 goto out_free;
1349         }
1350
1351         if (of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth",
1352                                  &priv->rx_fifo_depth)) {
1353                 dev_err(&pdev->dev, "cannot obtain tx-fifo-depth\n");
1354                 ret = -ENXIO;
1355                 goto out_free;
1356         }
1357
1358         /* get hash filter settings for this instance */
1359         priv->hash_filter =
1360                 of_property_read_bool(pdev->dev.of_node,
1361                                       "altr,has-hash-multicast-filter");
1362
1363         /* get supplemental address settings for this instance */
1364         priv->added_unicast =
1365                 of_property_read_bool(pdev->dev.of_node,
1366                                       "altr,has-supplementary-unicast");
1367
1368         /* Max MTU is 1500, ETH_DATA_LEN */
1369         priv->max_mtu = ETH_DATA_LEN;
1370
1371         /* Get the max mtu from the device tree. Note that the
1372          * "max-frame-size" parameter is actually max mtu. Definition
1373          * in the ePAPR v1.1 spec and usage differ, so go with usage.
1374          */
1375         of_property_read_u32(pdev->dev.of_node, "max-frame-size",
1376                              &priv->max_mtu);
1377
1378         /* The DMA buffer size already accounts for an alignment bias
1379          * to avoid unaligned access exceptions for the NIOS processor,
1380          */
1381         priv->rx_dma_buf_sz = ALTERA_RXDMABUFFER_SIZE;
1382
1383         /* get default MAC address from device tree */
1384         macaddr = of_get_mac_address(pdev->dev.of_node);
1385         if (macaddr)
1386                 ether_addr_copy(ndev->dev_addr, macaddr);
1387         else
1388                 eth_hw_addr_random(ndev);
1389
1390         priv->phy_iface = of_get_phy_mode(np);
1391
1392         /* try to get PHY address from device tree, use PHY autodetection if
1393          * no valid address is given
1394          */
1395         if (of_property_read_u32(pdev->dev.of_node, "phy-addr",
1396                                  &priv->phy_addr)) {
1397                 priv->phy_addr = POLL_PHY;
1398         }
1399
1400         if (!((priv->phy_addr == POLL_PHY) ||
1401               ((priv->phy_addr >= 0) && (priv->phy_addr < PHY_MAX_ADDR)))) {
1402                 dev_err(&pdev->dev, "invalid phy-addr specified %d\n",
1403                         priv->phy_addr);
1404                 goto out_free;
1405         }
1406
1407         /* Create/attach to MDIO bus */
1408         ret = altera_tse_mdio_create(ndev,
1409                                      atomic_add_return(1, &instance_count));
1410
1411         if (ret)
1412                 goto out_free;
1413
1414         /* initialize netdev */
1415         ether_setup(ndev);
1416         ndev->mem_start = control_port->start;
1417         ndev->mem_end = control_port->end;
1418         ndev->netdev_ops = &altera_tse_netdev_ops;
1419         altera_tse_set_ethtool_ops(ndev);
1420
1421         altera_tse_netdev_ops.ndo_set_rx_mode = tse_set_rx_mode;
1422
1423         if (priv->hash_filter)
1424                 altera_tse_netdev_ops.ndo_set_rx_mode =
1425                         tse_set_rx_mode_hashfilter;
1426
1427         /* Scatter/gather IO is not supported,
1428          * so it is turned off
1429          */
1430         ndev->hw_features &= ~NETIF_F_SG;
1431         ndev->features |= ndev->hw_features | NETIF_F_HIGHDMA;
1432
1433         /* VLAN offloading of tagging, stripping and filtering is not
1434          * supported by hardware, but driver will accommodate the
1435          * extra 4-byte VLAN tag for processing by upper layers
1436          */
1437         ndev->features |= NETIF_F_HW_VLAN_CTAG_RX;
1438
1439         /* setup NAPI interface */
1440         netif_napi_add(ndev, &priv->napi, tse_poll, NAPI_POLL_WEIGHT);
1441
1442         spin_lock_init(&priv->mac_cfg_lock);
1443         spin_lock_init(&priv->tx_lock);
1444         spin_lock_init(&priv->rxdma_irq_lock);
1445
1446         ret = register_netdev(ndev);
1447         if (ret) {
1448                 dev_err(&pdev->dev, "failed to register TSE net device\n");
1449                 goto out_free_mdio;
1450         }
1451
1452         platform_set_drvdata(pdev, ndev);
1453
1454         priv->revision = ioread32(&priv->mac_dev->megacore_revision);
1455
1456         if (netif_msg_probe(priv))
1457                 dev_info(&pdev->dev, "Altera TSE MAC version %d.%d at 0x%08lx irq %d/%d\n",
1458                          (priv->revision >> 8) & 0xff,
1459                          priv->revision & 0xff,
1460                          (unsigned long) control_port->start, priv->rx_irq,
1461                          priv->tx_irq);
1462
1463         ret = init_phy(ndev);
1464         if (ret != 0) {
1465                 netdev_err(ndev, "Cannot attach to PHY (error: %d)\n", ret);
1466                 goto out_free_mdio;
1467         }
1468         return 0;
1469
1470 out_free_mdio:
1471         altera_tse_mdio_destroy(ndev);
1472 out_free:
1473         free_netdev(ndev);
1474         return ret;
1475 }
1476
1477 /* Remove Altera TSE MAC device
1478  */
1479 static int altera_tse_remove(struct platform_device *pdev)
1480 {
1481         struct net_device *ndev = platform_get_drvdata(pdev);
1482
1483         platform_set_drvdata(pdev, NULL);
1484         altera_tse_mdio_destroy(ndev);
1485         unregister_netdev(ndev);
1486         free_netdev(ndev);
1487
1488         return 0;
1489 }
1490
1491 struct altera_dmaops altera_dtype_sgdma = {
1492         .altera_dtype = ALTERA_DTYPE_SGDMA,
1493         .dmamask = 32,
1494         .reset_dma = sgdma_reset,
1495         .enable_txirq = sgdma_enable_txirq,
1496         .enable_rxirq = sgdma_enable_rxirq,
1497         .disable_txirq = sgdma_disable_txirq,
1498         .disable_rxirq = sgdma_disable_rxirq,
1499         .clear_txirq = sgdma_clear_txirq,
1500         .clear_rxirq = sgdma_clear_rxirq,
1501         .tx_buffer = sgdma_tx_buffer,
1502         .tx_completions = sgdma_tx_completions,
1503         .add_rx_desc = sgdma_add_rx_desc,
1504         .get_rx_status = sgdma_rx_status,
1505         .init_dma = sgdma_initialize,
1506         .uninit_dma = sgdma_uninitialize,
1507         .start_rxdma = sgdma_start_rxdma,
1508 };
1509
1510 struct altera_dmaops altera_dtype_msgdma = {
1511         .altera_dtype = ALTERA_DTYPE_MSGDMA,
1512         .dmamask = 64,
1513         .reset_dma = msgdma_reset,
1514         .enable_txirq = msgdma_enable_txirq,
1515         .enable_rxirq = msgdma_enable_rxirq,
1516         .disable_txirq = msgdma_disable_txirq,
1517         .disable_rxirq = msgdma_disable_rxirq,
1518         .clear_txirq = msgdma_clear_txirq,
1519         .clear_rxirq = msgdma_clear_rxirq,
1520         .tx_buffer = msgdma_tx_buffer,
1521         .tx_completions = msgdma_tx_completions,
1522         .add_rx_desc = msgdma_add_rx_desc,
1523         .get_rx_status = msgdma_rx_status,
1524         .init_dma = msgdma_initialize,
1525         .uninit_dma = msgdma_uninitialize,
1526         .start_rxdma = msgdma_start_rxdma,
1527 };
1528
1529 static struct of_device_id altera_tse_ids[] = {
1530         { .compatible = "altr,tse-msgdma-1.0", .data = &altera_dtype_msgdma, },
1531         { .compatible = "altr,tse-1.0", .data = &altera_dtype_sgdma, },
1532         { .compatible = "ALTR,tse-1.0", .data = &altera_dtype_sgdma, },
1533         {},
1534 };
1535 MODULE_DEVICE_TABLE(of, altera_tse_ids);
1536
1537 static struct platform_driver altera_tse_driver = {
1538         .probe          = altera_tse_probe,
1539         .remove         = altera_tse_remove,
1540         .suspend        = NULL,
1541         .resume         = NULL,
1542         .driver         = {
1543                 .name   = ALTERA_TSE_RESOURCE_NAME,
1544                 .owner  = THIS_MODULE,
1545                 .of_match_table = altera_tse_ids,
1546         },
1547 };
1548
1549 module_platform_driver(altera_tse_driver);
1550
1551 MODULE_AUTHOR("Altera Corporation");
1552 MODULE_DESCRIPTION("Altera Triple Speed Ethernet MAC driver");
1553 MODULE_LICENSE("GPL v2");