drivers/net/ethernet/broadcom/bcmsysport.c

   1 /*
   2  * Broadcom BCM7xxx System Port Ethernet MAC driver
   3  *
   4  * Copyright (C) 2014 Broadcom Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  12
  13 #include <linux/init.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/netdevice.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/of.h>
  21 #include <linux/of_net.h>
  22 #include <linux/of_mdio.h>
  23 #include <linux/phy.h>
  24 #include <linux/phy_fixed.h>
  25 #include <net/ip.h>
  26 #include <net/ipv6.h>
  27
  28 #include "bcmsysport.h"
  29
  30 /* I/O accessors register helpers */
  31 #define BCM_SYSPORT_IO_MACRO(name, offset) \
  32 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off)  \
  33 {                                                                       \
  34         u32 reg = __raw_readl(priv->base + offset + off);               \
  35         return reg;                                                     \
  36 }                                                                       \
  37 static inline void name##_writel(struct bcm_sysport_priv *priv,         \
  38                                   u32 val, u32 off)                     \
  39 {                                                                       \
  40         __raw_writel(val, priv->base + offset + off);                   \
  41 }                                                                       \
  42
  43 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
  44 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
  45 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
  46 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
  47 BCM_SYSPORT_IO_MACRO(rdma, SYS_PORT_RDMA_OFFSET);
  48 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
  49 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
  50 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
  51 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
  52 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
  53
  54 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
  55  * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
  56   */
  57 #define BCM_SYSPORT_INTR_L2(which)      \
  58 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
  59                                                 u32 mask)               \
  60 {                                                                       \
  61         intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR);     \
  62         priv->irq##which##_mask &= ~(mask);                             \
  63 }                                                                       \
  64 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
  65                                                 u32 mask)               \
  66 {                                                                       \
  67         intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET);      \
  68         priv->irq##which##_mask |= (mask);                              \
  69 }                                                                       \
  70
  71 BCM_SYSPORT_INTR_L2(0)
  72 BCM_SYSPORT_INTR_L2(1)
  73
  74 /* Register accesses to GISB/RBUS registers are expensive (few hundred
  75  * nanoseconds), so keep the check for 64-bits explicit here to save
  76  * one register write per-packet on 32-bits platforms.
  77  */
  78 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
  79                                      void __iomem *d,
  80                                      dma_addr_t addr)
  81 {
  82 #ifdef CONFIG_PHYS_ADDR_T_64BIT
  83         __raw_writel(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
  84                      d + DESC_ADDR_HI_STATUS_LEN);
  85 #endif
  86         __raw_writel(lower_32_bits(addr), d + DESC_ADDR_LO);
  87 }
  88
  89 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
  90                                              struct dma_desc *desc,
  91                                              unsigned int port)
  92 {
  93         /* Ports are latched, so write upper address first */
  94         tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
  95         tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
  96 }
  97
  98 /* Ethtool operations */
  99 static int bcm_sysport_set_settings(struct net_device *dev,
 100                                     struct ethtool_cmd *cmd)
 101 {
 102         struct bcm_sysport_priv *priv = netdev_priv(dev);
 103
 104         if (!netif_running(dev))
 105                 return -EINVAL;
 106
 107         return phy_ethtool_sset(priv->phydev, cmd);
 108 }
 109
 110 static int bcm_sysport_get_settings(struct net_device *dev,
 111                                     struct ethtool_cmd *cmd)
 112 {
 113         struct bcm_sysport_priv *priv = netdev_priv(dev);
 114
 115         if (!netif_running(dev))
 116                 return -EINVAL;
 117
 118         return phy_ethtool_gset(priv->phydev, cmd);
 119 }
 120
 121 static int bcm_sysport_set_rx_csum(struct net_device *dev,
 122                                    netdev_features_t wanted)
 123 {
 124         struct bcm_sysport_priv *priv = netdev_priv(dev);
 125         u32 reg;
 126
 127         priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
 128         reg = rxchk_readl(priv, RXCHK_CONTROL);
 129         if (priv->rx_chk_en)
 130                 reg |= RXCHK_EN;
 131         else
 132                 reg &= ~RXCHK_EN;
 133
 134         /* If UniMAC forwards CRC, we need to skip over it to get
 135          * a valid CHK bit to be set in the per-packet status word
 136          */
 137         if (priv->rx_chk_en && priv->crc_fwd)
 138                 reg |= RXCHK_SKIP_FCS;
 139         else
 140                 reg &= ~RXCHK_SKIP_FCS;
 141
 142         rxchk_writel(priv, reg, RXCHK_CONTROL);
 143
 144         return 0;
 145 }
 146
 147 static int bcm_sysport_set_tx_csum(struct net_device *dev,
 148                                    netdev_features_t wanted)
 149 {
 150         struct bcm_sysport_priv *priv = netdev_priv(dev);
 151         u32 reg;
 152
 153         /* Hardware transmit checksum requires us to enable the Transmit status
 154          * block prepended to the packet contents
 155          */
 156         priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
 157         reg = tdma_readl(priv, TDMA_CONTROL);
 158         if (priv->tsb_en)
 159                 reg |= TSB_EN;
 160         else
 161                 reg &= ~TSB_EN;
 162         tdma_writel(priv, reg, TDMA_CONTROL);
 163
 164         return 0;
 165 }
 166
 167 static int bcm_sysport_set_features(struct net_device *dev,
 168                                     netdev_features_t features)
 169 {
 170         netdev_features_t changed = features ^ dev->features;
 171         netdev_features_t wanted = dev->wanted_features;
 172         int ret = 0;
 173
 174         if (changed & NETIF_F_RXCSUM)
 175                 ret = bcm_sysport_set_rx_csum(dev, wanted);
 176         if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
 177                 ret = bcm_sysport_set_tx_csum(dev, wanted);
 178
 179         return ret;
 180 }
 181
 182 /* Hardware counters must be kept in sync because the order/offset
 183  * is important here (order in structure declaration = order in hardware)
 184  */
 185 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
 186         /* general stats */
 187         STAT_NETDEV(rx_packets),
 188         STAT_NETDEV(tx_packets),
 189         STAT_NETDEV(rx_bytes),
 190         STAT_NETDEV(tx_bytes),
 191         STAT_NETDEV(rx_errors),
 192         STAT_NETDEV(tx_errors),
 193         STAT_NETDEV(rx_dropped),
 194         STAT_NETDEV(tx_dropped),
 195         STAT_NETDEV(multicast),
 196         /* UniMAC RSV counters */
 197         STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
 198         STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
 199         STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
 200         STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
 201         STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
 202         STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
 203         STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
 204         STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
 205         STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
 206         STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
 207         STAT_MIB_RX("rx_pkts", mib.rx.pkt),
 208         STAT_MIB_RX("rx_bytes", mib.rx.bytes),
 209         STAT_MIB_RX("rx_multicast", mib.rx.mca),
 210         STAT_MIB_RX("rx_broadcast", mib.rx.bca),
 211         STAT_MIB_RX("rx_fcs", mib.rx.fcs),
 212         STAT_MIB_RX("rx_control", mib.rx.cf),
 213         STAT_MIB_RX("rx_pause", mib.rx.pf),
 214         STAT_MIB_RX("rx_unknown", mib.rx.uo),
 215         STAT_MIB_RX("rx_align", mib.rx.aln),
 216         STAT_MIB_RX("rx_outrange", mib.rx.flr),
 217         STAT_MIB_RX("rx_code", mib.rx.cde),
 218         STAT_MIB_RX("rx_carrier", mib.rx.fcr),
 219         STAT_MIB_RX("rx_oversize", mib.rx.ovr),
 220         STAT_MIB_RX("rx_jabber", mib.rx.jbr),
 221         STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
 222         STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
 223         STAT_MIB_RX("rx_unicast", mib.rx.uc),
 224         STAT_MIB_RX("rx_ppp", mib.rx.ppp),
 225         STAT_MIB_RX("rx_crc", mib.rx.rcrc),
 226         /* UniMAC TSV counters */
 227         STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
 228         STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
 229         STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
 230         STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
 231         STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
 232         STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
 233         STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
 234         STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
 235         STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
 236         STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
 237         STAT_MIB_TX("tx_pkts", mib.tx.pkts),
 238         STAT_MIB_TX("tx_multicast", mib.tx.mca),
 239         STAT_MIB_TX("tx_broadcast", mib.tx.bca),
 240         STAT_MIB_TX("tx_pause", mib.tx.pf),
 241         STAT_MIB_TX("tx_control", mib.tx.cf),
 242         STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
 243         STAT_MIB_TX("tx_oversize", mib.tx.ovr),
 244         STAT_MIB_TX("tx_defer", mib.tx.drf),
 245         STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
 246         STAT_MIB_TX("tx_single_col", mib.tx.scl),
 247         STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
 248         STAT_MIB_TX("tx_late_col", mib.tx.lcl),
 249         STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
 250         STAT_MIB_TX("tx_frags", mib.tx.frg),
 251         STAT_MIB_TX("tx_total_col", mib.tx.ncl),
 252         STAT_MIB_TX("tx_jabber", mib.tx.jbr),
 253         STAT_MIB_TX("tx_bytes", mib.tx.bytes),
 254         STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
 255         STAT_MIB_TX("tx_unicast", mib.tx.uc),
 256         /* UniMAC RUNT counters */
 257         STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
 258         STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
 259         STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
 260         STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
 261         /* RXCHK misc statistics */
 262         STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
 263         STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
 264                    RXCHK_OTHER_DISC_CNTR),
 265         /* RBUF misc statistics */
 266         STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
 267         STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
 268 };
 269
 270 #define BCM_SYSPORT_STATS_LEN   ARRAY_SIZE(bcm_sysport_gstrings_stats)
 271
 272 static void bcm_sysport_get_drvinfo(struct net_device *dev,
 273                                     struct ethtool_drvinfo *info)
 274 {
 275         strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
 276         strlcpy(info->version, "0.1", sizeof(info->version));
 277         strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
 278         info->n_stats = BCM_SYSPORT_STATS_LEN;
 279 }
 280
 281 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
 282 {
 283         struct bcm_sysport_priv *priv = netdev_priv(dev);
 284
 285         return priv->msg_enable;
 286 }
 287
 288 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
 289 {
 290         struct bcm_sysport_priv *priv = netdev_priv(dev);
 291
 292         priv->msg_enable = enable;
 293 }
 294
 295 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
 296 {
 297         switch (string_set) {
 298         case ETH_SS_STATS:
 299                 return BCM_SYSPORT_STATS_LEN;
 300         default:
 301                 return -EOPNOTSUPP;
 302         }
 303 }
 304
 305 static void bcm_sysport_get_strings(struct net_device *dev,
 306                                     u32 stringset, u8 *data)
 307 {
 308         int i;
 309
 310         switch (stringset) {
 311         case ETH_SS_STATS:
 312                 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 313                         memcpy(data + i * ETH_GSTRING_LEN,
 314                                bcm_sysport_gstrings_stats[i].stat_string,
 315                                ETH_GSTRING_LEN);
 316                 }
 317                 break;
 318         default:
 319                 break;
 320         }
 321 }
 322
 323 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
 324 {
 325         int i, j = 0;
 326
 327         for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 328                 const struct bcm_sysport_stats *s;
 329                 u8 offset = 0;
 330                 u32 val = 0;
 331                 char *p;
 332
 333                 s = &bcm_sysport_gstrings_stats[i];
 334                 switch (s->type) {
 335                 case BCM_SYSPORT_STAT_NETDEV:
 336                         continue;
 337                 case BCM_SYSPORT_STAT_MIB_RX:
 338                 case BCM_SYSPORT_STAT_MIB_TX:
 339                 case BCM_SYSPORT_STAT_RUNT:
 340                         if (s->type != BCM_SYSPORT_STAT_MIB_RX)
 341                                 offset = UMAC_MIB_STAT_OFFSET;
 342                         val = umac_readl(priv, UMAC_MIB_START + j + offset);
 343                         break;
 344                 case BCM_SYSPORT_STAT_RXCHK:
 345                         val = rxchk_readl(priv, s->reg_offset);
 346                         if (val == ~0)
 347                                 rxchk_writel(priv, 0, s->reg_offset);
 348                         break;
 349                 case BCM_SYSPORT_STAT_RBUF:
 350                         val = rbuf_readl(priv, s->reg_offset);
 351                         if (val == ~0)
 352                                 rbuf_writel(priv, 0, s->reg_offset);
 353                         break;
 354                 }
 355
 356                 j += s->stat_sizeof;
 357                 p = (char *)priv + s->stat_offset;
 358                 *(u32 *)p = val;
 359         }
 360
 361         netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
 362 }
 363
 364 static void bcm_sysport_get_stats(struct net_device *dev,
 365                                   struct ethtool_stats *stats, u64 *data)
 366 {
 367         struct bcm_sysport_priv *priv = netdev_priv(dev);
 368         int i;
 369
 370         if (netif_running(dev))
 371                 bcm_sysport_update_mib_counters(priv);
 372
 373         for (i =  0; i < BCM_SYSPORT_STATS_LEN; i++) {
 374                 const struct bcm_sysport_stats *s;
 375                 char *p;
 376
 377                 s = &bcm_sysport_gstrings_stats[i];
 378                 if (s->type == BCM_SYSPORT_STAT_NETDEV)
 379                         p = (char *)&dev->stats;
 380                 else
 381                         p = (char *)priv;
 382                 p += s->stat_offset;
 383                 data[i] = *(u32 *)p;
 384         }
 385 }
 386
 387 static void bcm_sysport_get_wol(struct net_device *dev,
 388                                 struct ethtool_wolinfo *wol)
 389 {
 390         struct bcm_sysport_priv *priv = netdev_priv(dev);
 391         u32 reg;
 392
 393         wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 394         wol->wolopts = priv->wolopts;
 395
 396         if (!(priv->wolopts & WAKE_MAGICSECURE))
 397                 return;
 398
 399         /* Return the programmed SecureOn password */
 400         reg = umac_readl(priv, UMAC_PSW_MS);
 401         put_unaligned_be16(reg, &wol->sopass[0]);
 402         reg = umac_readl(priv, UMAC_PSW_LS);
 403         put_unaligned_be32(reg, &wol->sopass[2]);
 404 }
 405
 406 static int bcm_sysport_set_wol(struct net_device *dev,
 407                                struct ethtool_wolinfo *wol)
 408 {
 409         struct bcm_sysport_priv *priv = netdev_priv(dev);
 410         struct device *kdev = &priv->pdev->dev;
 411         u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 412
 413         if (!device_can_wakeup(kdev))
 414                 return -ENOTSUPP;
 415
 416         if (wol->wolopts & ~supported)
 417                 return -EINVAL;
 418
 419         /* Program the SecureOn password */
 420         if (wol->wolopts & WAKE_MAGICSECURE) {
 421                 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
 422                             UMAC_PSW_MS);
 423                 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
 424                             UMAC_PSW_LS);
 425         }
 426
 427         /* Flag the device and relevant IRQ as wakeup capable */
 428         if (wol->wolopts) {
 429                 device_set_wakeup_enable(kdev, 1);
 430                 enable_irq_wake(priv->wol_irq);
 431                 priv->wol_irq_disabled = 0;
 432         } else {
 433                 device_set_wakeup_enable(kdev, 0);
 434                 /* Avoid unbalanced disable_irq_wake calls */
 435                 if (!priv->wol_irq_disabled)
 436                         disable_irq_wake(priv->wol_irq);
 437                 priv->wol_irq_disabled = 1;
 438         }
 439
 440         priv->wolopts = wol->wolopts;
 441
 442         return 0;
 443 }
 444
 445 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
 446 {
 447         dev_kfree_skb_any(cb->skb);
 448         cb->skb = NULL;
 449         dma_unmap_addr_set(cb, dma_addr, 0);
 450 }
 451
 452 static int bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
 453                                  struct bcm_sysport_cb *cb)
 454 {
 455         struct device *kdev = &priv->pdev->dev;
 456         struct net_device *ndev = priv->netdev;
 457         dma_addr_t mapping;
 458         int ret;
 459
 460         cb->skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
 461         if (!cb->skb) {
 462                 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
 463                 return -ENOMEM;
 464         }
 465
 466         mapping = dma_map_single(kdev, cb->skb->data,
 467                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 468         ret = dma_mapping_error(kdev, mapping);
 469         if (ret) {
 470                 bcm_sysport_free_cb(cb);
 471                 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
 472                 return ret;
 473         }
 474
 475         dma_unmap_addr_set(cb, dma_addr, mapping);
 476         dma_desc_set_addr(priv, priv->rx_bd_assign_ptr, mapping);
 477
 478         priv->rx_bd_assign_index++;
 479         priv->rx_bd_assign_index &= (priv->num_rx_bds - 1);
 480         priv->rx_bd_assign_ptr = priv->rx_bds +
 481                 (priv->rx_bd_assign_index * DESC_SIZE);
 482
 483         netif_dbg(priv, rx_status, ndev, "RX refill\n");
 484
 485         return 0;
 486 }
 487
 488 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
 489 {
 490         struct bcm_sysport_cb *cb;
 491         int ret = 0;
 492         unsigned int i;
 493
 494         for (i = 0; i < priv->num_rx_bds; i++) {
 495                 cb = &priv->rx_cbs[priv->rx_bd_assign_index];
 496                 if (cb->skb)
 497                         continue;
 498
 499                 ret = bcm_sysport_rx_refill(priv, cb);
 500                 if (ret)
 501                         break;
 502         }
 503
 504         return ret;
 505 }
 506
 507 /* Poll the hardware for up to budget packets to process */
 508 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
 509                                         unsigned int budget)
 510 {
 511         struct device *kdev = &priv->pdev->dev;
 512         struct net_device *ndev = priv->netdev;
 513         unsigned int processed = 0, to_process;
 514         struct bcm_sysport_cb *cb;
 515         struct sk_buff *skb;
 516         unsigned int p_index;
 517         u16 len, status;
 518         struct bcm_rsb *rsb;
 519
 520         /* Determine how much we should process since last call */
 521         p_index = rdma_readl(priv, RDMA_PROD_INDEX);
 522         p_index &= RDMA_PROD_INDEX_MASK;
 523
 524         if (p_index < priv->rx_c_index)
 525                 to_process = (RDMA_CONS_INDEX_MASK + 1) -
 526                         priv->rx_c_index + p_index;
 527         else
 528                 to_process = p_index - priv->rx_c_index;
 529
 530         netif_dbg(priv, rx_status, ndev,
 531                   "p_index=%d rx_c_index=%d to_process=%d\n",
 532                   p_index, priv->rx_c_index, to_process);
 533
 534         while ((processed < to_process) && (processed < budget)) {
 535                 cb = &priv->rx_cbs[priv->rx_read_ptr];
 536                 skb = cb->skb;
 537
 538                 processed++;
 539                 priv->rx_read_ptr++;
 540
 541                 if (priv->rx_read_ptr == priv->num_rx_bds)
 542                         priv->rx_read_ptr = 0;
 543
 544                 /* We do not have a backing SKB, so we do not a corresponding
 545                  * DMA mapping for this incoming packet since
 546                  * bcm_sysport_rx_refill always either has both skb and mapping
 547                  * or none.
 548                  */
 549                 if (unlikely(!skb)) {
 550                         netif_err(priv, rx_err, ndev, "out of memory!\n");
 551                         ndev->stats.rx_dropped++;
 552                         ndev->stats.rx_errors++;
 553                         goto refill;
 554                 }
 555
 556                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 557                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 558
 559                 /* Extract the Receive Status Block prepended */
 560                 rsb = (struct bcm_rsb *)skb->data;
 561                 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
 562                 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
 563                           DESC_STATUS_MASK;
 564
 565                 netif_dbg(priv, rx_status, ndev,
 566                           "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
 567                           p_index, priv->rx_c_index, priv->rx_read_ptr,
 568                           len, status);
 569
 570                 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
 571                         netif_err(priv, rx_status, ndev, "fragmented packet!\n");
 572                         ndev->stats.rx_dropped++;
 573                         ndev->stats.rx_errors++;
 574                         bcm_sysport_free_cb(cb);
 575                         goto refill;
 576                 }
 577
 578                 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
 579                         netif_err(priv, rx_err, ndev, "error packet\n");
 580                         if (status & RX_STATUS_OVFLOW)
 581                                 ndev->stats.rx_over_errors++;
 582                         ndev->stats.rx_dropped++;
 583                         ndev->stats.rx_errors++;
 584                         bcm_sysport_free_cb(cb);
 585                         goto refill;
 586                 }
 587
 588                 skb_put(skb, len);
 589
 590                 /* Hardware validated our checksum */
 591                 if (likely(status & DESC_L4_CSUM))
 592                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 593
 594                 /* Hardware pre-pends packets with 2bytes before Ethernet
 595                  * header plus we have the Receive Status Block, strip off all
 596                  * of this from the SKB.
 597                  */
 598                 skb_pull(skb, sizeof(*rsb) + 2);
 599                 len -= (sizeof(*rsb) + 2);
 600
 601                 /* UniMAC may forward CRC */
 602                 if (priv->crc_fwd) {
 603                         skb_trim(skb, len - ETH_FCS_LEN);
 604                         len -= ETH_FCS_LEN;
 605                 }
 606
 607                 skb->protocol = eth_type_trans(skb, ndev);
 608                 ndev->stats.rx_packets++;
 609                 ndev->stats.rx_bytes += len;
 610
 611                 napi_gro_receive(&priv->napi, skb);
 612 refill:
 613                 bcm_sysport_rx_refill(priv, cb);
 614         }
 615
 616         return processed;
 617 }
 618
 619 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_priv *priv,
 620                                        struct bcm_sysport_cb *cb,
 621                                        unsigned int *bytes_compl,
 622                                        unsigned int *pkts_compl)
 623 {
 624         struct device *kdev = &priv->pdev->dev;
 625         struct net_device *ndev = priv->netdev;
 626
 627         if (cb->skb) {
 628                 ndev->stats.tx_bytes += cb->skb->len;
 629                 *bytes_compl += cb->skb->len;
 630                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 631                                  dma_unmap_len(cb, dma_len),
 632                                  DMA_TO_DEVICE);
 633                 ndev->stats.tx_packets++;
 634                 (*pkts_compl)++;
 635                 bcm_sysport_free_cb(cb);
 636         /* SKB fragment */
 637         } else if (dma_unmap_addr(cb, dma_addr)) {
 638                 ndev->stats.tx_bytes += dma_unmap_len(cb, dma_len);
 639                 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
 640                                dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
 641                 dma_unmap_addr_set(cb, dma_addr, 0);
 642         }
 643 }
 644
 645 /* Reclaim queued SKBs for transmission completion, lockless version */
 646 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 647                                              struct bcm_sysport_tx_ring *ring)
 648 {
 649         struct net_device *ndev = priv->netdev;
 650         unsigned int c_index, last_c_index, last_tx_cn, num_tx_cbs;
 651         unsigned int pkts_compl = 0, bytes_compl = 0;
 652         struct bcm_sysport_cb *cb;
 653         struct netdev_queue *txq;
 654         u32 hw_ind;
 655
 656         txq = netdev_get_tx_queue(ndev, ring->index);
 657
 658         /* Compute how many descriptors have been processed since last call */
 659         hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
 660         c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
 661         ring->p_index = (hw_ind & RING_PROD_INDEX_MASK);
 662
 663         last_c_index = ring->c_index;
 664         num_tx_cbs = ring->size;
 665
 666         c_index &= (num_tx_cbs - 1);
 667
 668         if (c_index >= last_c_index)
 669                 last_tx_cn = c_index - last_c_index;
 670         else
 671                 last_tx_cn = num_tx_cbs - last_c_index + c_index;
 672
 673         netif_dbg(priv, tx_done, ndev,
 674                   "ring=%d c_index=%d last_tx_cn=%d last_c_index=%d\n",
 675                   ring->index, c_index, last_tx_cn, last_c_index);
 676
 677         while (last_tx_cn-- > 0) {
 678                 cb = ring->cbs + last_c_index;
 679                 bcm_sysport_tx_reclaim_one(priv, cb, &bytes_compl, &pkts_compl);
 680
 681                 ring->desc_count++;
 682                 last_c_index++;
 683                 last_c_index &= (num_tx_cbs - 1);
 684         }
 685
 686         ring->c_index = c_index;
 687
 688         if (netif_tx_queue_stopped(txq) && pkts_compl)
 689                 netif_tx_wake_queue(txq);
 690
 691         netif_dbg(priv, tx_done, ndev,
 692                   "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
 693                   ring->index, ring->c_index, pkts_compl, bytes_compl);
 694
 695         return pkts_compl;
 696 }
 697
 698 /* Locked version of the per-ring TX reclaim routine */
 699 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 700                                            struct bcm_sysport_tx_ring *ring)
 701 {
 702         unsigned int released;
 703         unsigned long flags;
 704
 705         spin_lock_irqsave(&ring->lock, flags);
 706         released = __bcm_sysport_tx_reclaim(priv, ring);
 707         spin_unlock_irqrestore(&ring->lock, flags);
 708
 709         return released;
 710 }
 711
 712 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
 713 {
 714         struct bcm_sysport_tx_ring *ring =
 715                 container_of(napi, struct bcm_sysport_tx_ring, napi);
 716         unsigned int work_done = 0;
 717
 718         work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
 719
 720         if (work_done == 0) {
 721                 napi_complete(napi);
 722                 /* re-enable TX interrupt */
 723                 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
 724         }
 725
 726         return 0;
 727 }
 728
 729 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
 730 {
 731         unsigned int q;
 732
 733         for (q = 0; q < priv->netdev->num_tx_queues; q++)
 734                 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
 735 }
 736
 737 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
 738 {
 739         struct bcm_sysport_priv *priv =
 740                 container_of(napi, struct bcm_sysport_priv, napi);
 741         unsigned int work_done = 0;
 742
 743         work_done = bcm_sysport_desc_rx(priv, budget);
 744
 745         priv->rx_c_index += work_done;
 746         priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
 747         rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
 748
 749         if (work_done < budget) {
 750                 napi_complete(napi);
 751                 /* re-enable RX interrupts */
 752                 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
 753         }
 754
 755         return work_done;
 756 }
 757
 758 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
 759 {
 760         u32 reg;
 761
 762         /* Stop monitoring MPD interrupt */
 763         intrl2_0_mask_set(priv, INTRL2_0_MPD);
 764
 765         /* Clear the MagicPacket detection logic */
 766         reg = umac_readl(priv, UMAC_MPD_CTRL);
 767         reg &= ~MPD_EN;
 768         umac_writel(priv, reg, UMAC_MPD_CTRL);
 769
 770         netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
 771 }
 772
 773 /* RX and misc interrupt routine */
 774 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
 775 {
 776         struct net_device *dev = dev_id;
 777         struct bcm_sysport_priv *priv = netdev_priv(dev);
 778
 779         priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
 780                           ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
 781         intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
 782
 783         if (unlikely(priv->irq0_stat == 0)) {
 784                 netdev_warn(priv->netdev, "spurious RX interrupt\n");
 785                 return IRQ_NONE;
 786         }
 787
 788         if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
 789                 if (likely(napi_schedule_prep(&priv->napi))) {
 790                         /* disable RX interrupts */
 791                         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
 792                         __napi_schedule(&priv->napi);
 793                 }
 794         }
 795
 796         /* TX ring is full, perform a full reclaim since we do not know
 797          * which one would trigger this interrupt
 798          */
 799         if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
 800                 bcm_sysport_tx_reclaim_all(priv);
 801
 802         if (priv->irq0_stat & INTRL2_0_MPD) {
 803                 netdev_info(priv->netdev, "Wake-on-LAN interrupt!\n");
 804                 bcm_sysport_resume_from_wol(priv);
 805         }
 806
 807         return IRQ_HANDLED;
 808 }
 809
 810 /* TX interrupt service routine */
 811 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
 812 {
 813         struct net_device *dev = dev_id;
 814         struct bcm_sysport_priv *priv = netdev_priv(dev);
 815         struct bcm_sysport_tx_ring *txr;
 816         unsigned int ring;
 817
 818         priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
 819                                 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
 820         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
 821
 822         if (unlikely(priv->irq1_stat == 0)) {
 823                 netdev_warn(priv->netdev, "spurious TX interrupt\n");
 824                 return IRQ_NONE;
 825         }
 826
 827         for (ring = 0; ring < dev->num_tx_queues; ring++) {
 828                 if (!(priv->irq1_stat & BIT(ring)))
 829                         continue;
 830
 831                 txr = &priv->tx_rings[ring];
 832
 833                 if (likely(napi_schedule_prep(&txr->napi))) {
 834                         intrl2_1_mask_set(priv, BIT(ring));
 835                         __napi_schedule(&txr->napi);
 836                 }
 837         }
 838
 839         return IRQ_HANDLED;
 840 }
 841
 842 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
 843 {
 844         struct bcm_sysport_priv *priv = dev_id;
 845
 846         pm_wakeup_event(&priv->pdev->dev, 0);
 847
 848         return IRQ_HANDLED;
 849 }
 850
 851 static int bcm_sysport_insert_tsb(struct sk_buff *skb, struct net_device *dev)
 852 {
 853         struct sk_buff *nskb;
 854         struct bcm_tsb *tsb;
 855         u32 csum_info;
 856         u8 ip_proto;
 857         u16 csum_start;
 858         u16 ip_ver;
 859
 860         /* Re-allocate SKB if needed */
 861         if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
 862                 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
 863                 dev_kfree_skb(skb);
 864                 if (!nskb) {
 865                         dev->stats.tx_errors++;
 866                         dev->stats.tx_dropped++;
 867                         return -ENOMEM;
 868                 }
 869                 skb = nskb;
 870         }
 871
 872         tsb = (struct bcm_tsb *)skb_push(skb, sizeof(*tsb));
 873         /* Zero-out TSB by default */
 874         memset(tsb, 0, sizeof(*tsb));
 875
 876         if (skb->ip_summed == CHECKSUM_PARTIAL) {
 877                 ip_ver = htons(skb->protocol);
 878                 switch (ip_ver) {
 879                 case ETH_P_IP:
 880                         ip_proto = ip_hdr(skb)->protocol;
 881                         break;
 882                 case ETH_P_IPV6:
 883                         ip_proto = ipv6_hdr(skb)->nexthdr;
 884                         break;
 885                 default:
 886                         return 0;
 887                 }
 888
 889                 /* Get the checksum offset and the L4 (transport) offset */
 890                 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
 891                 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
 892                 csum_info |= (csum_start << L4_PTR_SHIFT);
 893
 894                 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
 895                         csum_info |= L4_LENGTH_VALID;
 896                         if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
 897                                 csum_info |= L4_UDP;
 898                 } else {
 899                         csum_info = 0;
 900                 }
 901
 902                 tsb->l4_ptr_dest_map = csum_info;
 903         }
 904
 905         return 0;
 906 }
 907
 908 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
 909                                     struct net_device *dev)
 910 {
 911         struct bcm_sysport_priv *priv = netdev_priv(dev);
 912         struct device *kdev = &priv->pdev->dev;
 913         struct bcm_sysport_tx_ring *ring;
 914         struct bcm_sysport_cb *cb;
 915         struct netdev_queue *txq;
 916         struct dma_desc *desc;
 917         unsigned int skb_len;
 918         unsigned long flags;
 919         dma_addr_t mapping;
 920         u32 len_status;
 921         u16 queue;
 922         int ret;
 923
 924         queue = skb_get_queue_mapping(skb);
 925         txq = netdev_get_tx_queue(dev, queue);
 926         ring = &priv->tx_rings[queue];
 927
 928         /* lock against tx reclaim in BH context and TX ring full interrupt */
 929         spin_lock_irqsave(&ring->lock, flags);
 930         if (unlikely(ring->desc_count == 0)) {
 931                 netif_tx_stop_queue(txq);
 932                 netdev_err(dev, "queue %d awake and ring full!\n", queue);
 933                 ret = NETDEV_TX_BUSY;
 934                 goto out;
 935         }
 936
 937         /* Insert TSB and checksum infos */
 938         if (priv->tsb_en) {
 939                 ret = bcm_sysport_insert_tsb(skb, dev);
 940                 if (ret) {
 941                         ret = NETDEV_TX_OK;
 942                         goto out;
 943                 }
 944         }
 945
 946         /* The Ethernet switch we are interfaced with needs packets to be at
 947          * least 64 bytes (including FCS) otherwise they will be discarded when
 948          * they enter the switch port logic. When Broadcom tags are enabled, we
 949          * need to make sure that packets are at least 68 bytes
 950          * (including FCS and tag) because the length verification is done after
 951          * the Broadcom tag is stripped off the ingress packet.
 952          */
 953         if (skb_padto(skb, ETH_ZLEN + ENET_BRCM_TAG_LEN)) {
 954                 ret = NETDEV_TX_OK;
 955                 goto out;
 956         }
 957
 958         skb_len = skb->len < ETH_ZLEN + ENET_BRCM_TAG_LEN ?
 959                         ETH_ZLEN + ENET_BRCM_TAG_LEN : skb->len;
 960
 961         mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
 962         if (dma_mapping_error(kdev, mapping)) {
 963                 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
 964                           skb->data, skb_len);
 965                 ret = NETDEV_TX_OK;
 966                 goto out;
 967         }
 968
 969         /* Remember the SKB for future freeing */
 970         cb = &ring->cbs[ring->curr_desc];
 971         cb->skb = skb;
 972         dma_unmap_addr_set(cb, dma_addr, mapping);
 973         dma_unmap_len_set(cb, dma_len, skb_len);
 974
 975         /* Fetch a descriptor entry from our pool */
 976         desc = ring->desc_cpu;
 977
 978         desc->addr_lo = lower_32_bits(mapping);
 979         len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
 980         len_status |= (skb_len << DESC_LEN_SHIFT);
 981         len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
 982                        DESC_STATUS_SHIFT;
 983         if (skb->ip_summed == CHECKSUM_PARTIAL)
 984                 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
 985
 986         ring->curr_desc++;
 987         if (ring->curr_desc == ring->size)
 988                 ring->curr_desc = 0;
 989         ring->desc_count--;
 990
 991         /* Ensure write completion of the descriptor status/length
 992          * in DRAM before the System Port WRITE_PORT register latches
 993          * the value
 994          */
 995         wmb();
 996         desc->addr_status_len = len_status;
 997         wmb();
 998
 999         /* Write this descriptor address to the RING write port */
1000         tdma_port_write_desc_addr(priv, desc, ring->index);
1001
1002         /* Check ring space and update SW control flow */
1003         if (ring->desc_count == 0)
1004                 netif_tx_stop_queue(txq);
1005
1006         netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1007                   ring->index, ring->desc_count, ring->curr_desc);
1008
1009         ret = NETDEV_TX_OK;
1010 out:
1011         spin_unlock_irqrestore(&ring->lock, flags);
1012         return ret;
1013 }
1014
1015 static void bcm_sysport_tx_timeout(struct net_device *dev)
1016 {
1017         netdev_warn(dev, "transmit timeout!\n");
1018
1019         dev->trans_start = jiffies;
1020         dev->stats.tx_errors++;
1021
1022         netif_tx_wake_all_queues(dev);
1023 }
1024
1025 /* phylib adjust link callback */
1026 static void bcm_sysport_adj_link(struct net_device *dev)
1027 {
1028         struct bcm_sysport_priv *priv = netdev_priv(dev);
1029         struct phy_device *phydev = priv->phydev;
1030         unsigned int changed = 0;
1031         u32 cmd_bits = 0, reg;
1032
1033         if (priv->old_link != phydev->link) {
1034                 changed = 1;
1035                 priv->old_link = phydev->link;
1036         }
1037
1038         if (priv->old_duplex != phydev->duplex) {
1039                 changed = 1;
1040                 priv->old_duplex = phydev->duplex;
1041         }
1042
1043         switch (phydev->speed) {
1044         case SPEED_2500:
1045                 cmd_bits = CMD_SPEED_2500;
1046                 break;
1047         case SPEED_1000:
1048                 cmd_bits = CMD_SPEED_1000;
1049                 break;
1050         case SPEED_100:
1051                 cmd_bits = CMD_SPEED_100;
1052                 break;
1053         case SPEED_10:
1054                 cmd_bits = CMD_SPEED_10;
1055                 break;
1056         default:
1057                 break;
1058         }
1059         cmd_bits <<= CMD_SPEED_SHIFT;
1060
1061         if (phydev->duplex == DUPLEX_HALF)
1062                 cmd_bits |= CMD_HD_EN;
1063
1064         if (priv->old_pause != phydev->pause) {
1065                 changed = 1;
1066                 priv->old_pause = phydev->pause;
1067         }
1068
1069         if (!phydev->pause)
1070                 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1071
1072         if (changed) {
1073                 reg = umac_readl(priv, UMAC_CMD);
1074                 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1075                         CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1076                         CMD_TX_PAUSE_IGNORE);
1077                 reg |= cmd_bits;
1078                 umac_writel(priv, reg, UMAC_CMD);
1079
1080                 phy_print_status(priv->phydev);
1081         }
1082 }
1083
1084 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1085                                     unsigned int index)
1086 {
1087         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1088         struct device *kdev = &priv->pdev->dev;
1089         size_t size;
1090         void *p;
1091         u32 reg;
1092
1093         /* Simple descriptors partitioning for now */
1094         size = 256;
1095
1096         /* We just need one DMA descriptor which is DMA-able, since writing to
1097          * the port will allocate a new descriptor in its internal linked-list
1098          */
1099         p = dma_zalloc_coherent(kdev, 1, &ring->desc_dma, GFP_KERNEL);
1100         if (!p) {
1101                 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1102                 return -ENOMEM;
1103         }
1104
1105         ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1106         if (!ring->cbs) {
1107                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1108                 return -ENOMEM;
1109         }
1110
1111         /* Initialize SW view of the ring */
1112         spin_lock_init(&ring->lock);
1113         ring->priv = priv;
1114         netif_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1115         ring->index = index;
1116         ring->size = size;
1117         ring->alloc_size = ring->size;
1118         ring->desc_cpu = p;
1119         ring->desc_count = ring->size;
1120         ring->curr_desc = 0;
1121
1122         /* Initialize HW ring */
1123         tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1124         tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1125         tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1126         tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1127         tdma_writel(priv, RING_IGNORE_STATUS, TDMA_DESC_RING_MAPPING(index));
1128         tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1129
1130         /* Program the number of descriptors as MAX_THRESHOLD and half of
1131          * its size for the hysteresis trigger
1132          */
1133         tdma_writel(priv, ring->size |
1134                         1 << RING_HYST_THRESH_SHIFT,
1135                         TDMA_DESC_RING_MAX_HYST(index));
1136
1137         /* Enable the ring queue in the arbiter */
1138         reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1139         reg |= (1 << index);
1140         tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1141
1142         napi_enable(&ring->napi);
1143
1144         netif_dbg(priv, hw, priv->netdev,
1145                   "TDMA cfg, size=%d, desc_cpu=%p\n",
1146                   ring->size, ring->desc_cpu);
1147
1148         return 0;
1149 }
1150
1151 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1152                                      unsigned int index)
1153 {
1154         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1155         struct device *kdev = &priv->pdev->dev;
1156         u32 reg;
1157
1158         /* Caller should stop the TDMA engine */
1159         reg = tdma_readl(priv, TDMA_STATUS);
1160         if (!(reg & TDMA_DISABLED))
1161                 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1162
1163         napi_disable(&ring->napi);
1164         netif_napi_del(&ring->napi);
1165
1166         bcm_sysport_tx_reclaim(priv, ring);
1167
1168         kfree(ring->cbs);
1169         ring->cbs = NULL;
1170
1171         if (ring->desc_dma) {
1172                 dma_free_coherent(kdev, 1, ring->desc_cpu, ring->desc_dma);
1173                 ring->desc_dma = 0;
1174         }
1175         ring->size = 0;
1176         ring->alloc_size = 0;
1177
1178         netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1179 }
1180
1181 /* RDMA helper */
1182 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1183                                   unsigned int enable)
1184 {
1185         unsigned int timeout = 1000;
1186         u32 reg;
1187
1188         reg = rdma_readl(priv, RDMA_CONTROL);
1189         if (enable)
1190                 reg |= RDMA_EN;
1191         else
1192                 reg &= ~RDMA_EN;
1193         rdma_writel(priv, reg, RDMA_CONTROL);
1194
1195         /* Poll for RMDA disabling completion */
1196         do {
1197                 reg = rdma_readl(priv, RDMA_STATUS);
1198                 if (!!(reg & RDMA_DISABLED) == !enable)
1199                         return 0;
1200                 usleep_range(1000, 2000);
1201         } while (timeout-- > 0);
1202
1203         netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1204
1205         return -ETIMEDOUT;
1206 }
1207
1208 /* TDMA helper */
1209 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1210                                   unsigned int enable)
1211 {
1212         unsigned int timeout = 1000;
1213         u32 reg;
1214
1215         reg = tdma_readl(priv, TDMA_CONTROL);
1216         if (enable)
1217                 reg |= TDMA_EN;
1218         else
1219                 reg &= ~TDMA_EN;
1220         tdma_writel(priv, reg, TDMA_CONTROL);
1221
1222         /* Poll for TMDA disabling completion */
1223         do {
1224                 reg = tdma_readl(priv, TDMA_STATUS);
1225                 if (!!(reg & TDMA_DISABLED) == !enable)
1226                         return 0;
1227
1228                 usleep_range(1000, 2000);
1229         } while (timeout-- > 0);
1230
1231         netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1232
1233         return -ETIMEDOUT;
1234 }
1235
1236 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1237 {
1238         u32 reg;
1239         int ret;
1240
1241         /* Initialize SW view of the RX ring */
1242         priv->num_rx_bds = NUM_RX_DESC;
1243         priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1244         priv->rx_bd_assign_ptr = priv->rx_bds;
1245         priv->rx_bd_assign_index = 0;
1246         priv->rx_c_index = 0;
1247         priv->rx_read_ptr = 0;
1248         priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1249                                 GFP_KERNEL);
1250         if (!priv->rx_cbs) {
1251                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1252                 return -ENOMEM;
1253         }
1254
1255         ret = bcm_sysport_alloc_rx_bufs(priv);
1256         if (ret) {
1257                 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1258                 return ret;
1259         }
1260
1261         /* Initialize HW, ensure RDMA is disabled */
1262         reg = rdma_readl(priv, RDMA_STATUS);
1263         if (!(reg & RDMA_DISABLED))
1264                 rdma_enable_set(priv, 0);
1265
1266         rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1267         rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1268         rdma_writel(priv, 0, RDMA_PROD_INDEX);
1269         rdma_writel(priv, 0, RDMA_CONS_INDEX);
1270         rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1271                           RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1272         /* Operate the queue in ring mode */
1273         rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1274         rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1275         rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1276         rdma_writel(priv, NUM_HW_RX_DESC_WORDS - 1, RDMA_END_ADDR_LO);
1277
1278         rdma_writel(priv, 1, RDMA_MBDONE_INTR);
1279
1280         netif_dbg(priv, hw, priv->netdev,
1281                   "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1282                   priv->num_rx_bds, priv->rx_bds);
1283
1284         return 0;
1285 }
1286
1287 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1288 {
1289         struct bcm_sysport_cb *cb;
1290         unsigned int i;
1291         u32 reg;
1292
1293         /* Caller should ensure RDMA is disabled */
1294         reg = rdma_readl(priv, RDMA_STATUS);
1295         if (!(reg & RDMA_DISABLED))
1296                 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1297
1298         for (i = 0; i < priv->num_rx_bds; i++) {
1299                 cb = &priv->rx_cbs[i];
1300                 if (dma_unmap_addr(cb, dma_addr))
1301                         dma_unmap_single(&priv->pdev->dev,
1302                                          dma_unmap_addr(cb, dma_addr),
1303                                          RX_BUF_LENGTH, DMA_FROM_DEVICE);
1304                 bcm_sysport_free_cb(cb);
1305         }
1306
1307         kfree(priv->rx_cbs);
1308         priv->rx_cbs = NULL;
1309
1310         netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1311 }
1312
1313 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1314 {
1315         struct bcm_sysport_priv *priv = netdev_priv(dev);
1316         u32 reg;
1317
1318         reg = umac_readl(priv, UMAC_CMD);
1319         if (dev->flags & IFF_PROMISC)
1320                 reg |= CMD_PROMISC;
1321         else
1322                 reg &= ~CMD_PROMISC;
1323         umac_writel(priv, reg, UMAC_CMD);
1324
1325         /* No support for ALLMULTI */
1326         if (dev->flags & IFF_ALLMULTI)
1327                 return;
1328 }
1329
1330 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1331                                    u32 mask, unsigned int enable)
1332 {
1333         u32 reg;
1334
1335         reg = umac_readl(priv, UMAC_CMD);
1336         if (enable)
1337                 reg |= mask;
1338         else
1339                 reg &= ~mask;
1340         umac_writel(priv, reg, UMAC_CMD);
1341
1342         /* UniMAC stops on a packet boundary, wait for a full-sized packet
1343          * to be processed (1 msec).
1344          */
1345         if (enable == 0)
1346                 usleep_range(1000, 2000);
1347 }
1348
1349 static inline void umac_reset(struct bcm_sysport_priv *priv)
1350 {
1351         u32 reg;
1352
1353         reg = umac_readl(priv, UMAC_CMD);
1354         reg |= CMD_SW_RESET;
1355         umac_writel(priv, reg, UMAC_CMD);
1356         udelay(10);
1357         reg = umac_readl(priv, UMAC_CMD);
1358         reg &= ~CMD_SW_RESET;
1359         umac_writel(priv, reg, UMAC_CMD);
1360 }
1361
1362 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1363                              unsigned char *addr)
1364 {
1365         umac_writel(priv, (addr[0] << 24) | (addr[1] << 16) |
1366                         (addr[2] << 8) | addr[3], UMAC_MAC0);
1367         umac_writel(priv, (addr[4] << 8) | addr[5], UMAC_MAC1);
1368 }
1369
1370 static void topctrl_flush(struct bcm_sysport_priv *priv)
1371 {
1372         topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1373         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1374         mdelay(1);
1375         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1376         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1377 }
1378
1379 static void bcm_sysport_netif_start(struct net_device *dev)
1380 {
1381         struct bcm_sysport_priv *priv = netdev_priv(dev);
1382
1383         /* Enable NAPI */
1384         napi_enable(&priv->napi);
1385
1386         phy_start(priv->phydev);
1387
1388         /* Enable TX interrupts for the 32 TXQs */
1389         intrl2_1_mask_clear(priv, 0xffffffff);
1390
1391         /* Last call before we start the real business */
1392         netif_tx_start_all_queues(dev);
1393 }
1394
1395 static void rbuf_init(struct bcm_sysport_priv *priv)
1396 {
1397         u32 reg;
1398
1399         reg = rbuf_readl(priv, RBUF_CONTROL);
1400         reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1401         rbuf_writel(priv, reg, RBUF_CONTROL);
1402 }
1403
1404 static int bcm_sysport_open(struct net_device *dev)
1405 {
1406         struct bcm_sysport_priv *priv = netdev_priv(dev);
1407         unsigned int i;
1408         int ret;
1409
1410         /* Reset UniMAC */
1411         umac_reset(priv);
1412
1413         /* Flush TX and RX FIFOs at TOPCTRL level */
1414         topctrl_flush(priv);
1415
1416         /* Disable the UniMAC RX/TX */
1417         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1418
1419         /* Enable RBUF 2bytes alignment and Receive Status Block */
1420         rbuf_init(priv);
1421
1422         /* Set maximum frame length */
1423         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1424
1425         /* Set MAC address */
1426         umac_set_hw_addr(priv, dev->dev_addr);
1427
1428         /* Read CRC forward */
1429         priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1430
1431         priv->phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1432                                         0, priv->phy_interface);
1433         if (!priv->phydev) {
1434                 netdev_err(dev, "could not attach to PHY\n");
1435                 return -ENODEV;
1436         }
1437
1438         /* Reset house keeping link status */
1439         priv->old_duplex = -1;
1440         priv->old_link = -1;
1441         priv->old_pause = -1;
1442
1443         /* mask all interrupts and request them */
1444         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1445         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1446         intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1447         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1448         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1449         intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1450
1451         ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1452         if (ret) {
1453                 netdev_err(dev, "failed to request RX interrupt\n");
1454                 goto out_phy_disconnect;
1455         }
1456
1457         ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, dev->name, dev);
1458         if (ret) {
1459                 netdev_err(dev, "failed to request TX interrupt\n");
1460                 goto out_free_irq0;
1461         }
1462
1463         /* Initialize both hardware and software ring */
1464         for (i = 0; i < dev->num_tx_queues; i++) {
1465                 ret = bcm_sysport_init_tx_ring(priv, i);
1466                 if (ret) {
1467                         netdev_err(dev, "failed to initialize TX ring %d\n",
1468                                    i);
1469                         goto out_free_tx_ring;
1470                 }
1471         }
1472
1473         /* Initialize linked-list */
1474         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1475
1476         /* Initialize RX ring */
1477         ret = bcm_sysport_init_rx_ring(priv);
1478         if (ret) {
1479                 netdev_err(dev, "failed to initialize RX ring\n");
1480                 goto out_free_rx_ring;
1481         }
1482
1483         /* Turn on RDMA */
1484         ret = rdma_enable_set(priv, 1);
1485         if (ret)
1486                 goto out_free_rx_ring;
1487
1488         /* Enable RX interrupt and TX ring full interrupt */
1489         intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1490
1491         /* Turn on TDMA */
1492         ret = tdma_enable_set(priv, 1);
1493         if (ret)
1494                 goto out_clear_rx_int;
1495
1496         /* Turn on UniMAC TX/RX */
1497         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
1498
1499         bcm_sysport_netif_start(dev);
1500
1501         return 0;
1502
1503 out_clear_rx_int:
1504         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1505 out_free_rx_ring:
1506         bcm_sysport_fini_rx_ring(priv);
1507 out_free_tx_ring:
1508         for (i = 0; i < dev->num_tx_queues; i++)
1509                 bcm_sysport_fini_tx_ring(priv, i);
1510         free_irq(priv->irq1, dev);
1511 out_free_irq0:
1512         free_irq(priv->irq0, dev);
1513 out_phy_disconnect:
1514         phy_disconnect(priv->phydev);
1515         return ret;
1516 }
1517
1518 static void bcm_sysport_netif_stop(struct net_device *dev)
1519 {
1520         struct bcm_sysport_priv *priv = netdev_priv(dev);
1521
1522         /* stop all software from updating hardware */
1523         netif_tx_stop_all_queues(dev);
1524         napi_disable(&priv->napi);
1525         phy_stop(priv->phydev);
1526
1527         /* mask all interrupts */
1528         intrl2_0_mask_set(priv, 0xffffffff);
1529         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1530         intrl2_1_mask_set(priv, 0xffffffff);
1531         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1532 }
1533
1534 static int bcm_sysport_stop(struct net_device *dev)
1535 {
1536         struct bcm_sysport_priv *priv = netdev_priv(dev);
1537         unsigned int i;
1538         int ret;
1539
1540         bcm_sysport_netif_stop(dev);
1541
1542         /* Disable UniMAC RX */
1543         umac_enable_set(priv, CMD_RX_EN, 0);
1544
1545         ret = tdma_enable_set(priv, 0);
1546         if (ret) {
1547                 netdev_err(dev, "timeout disabling RDMA\n");
1548                 return ret;
1549         }
1550
1551         /* Wait for a maximum packet size to be drained */
1552         usleep_range(2000, 3000);
1553
1554         ret = rdma_enable_set(priv, 0);
1555         if (ret) {
1556                 netdev_err(dev, "timeout disabling TDMA\n");
1557                 return ret;
1558         }
1559
1560         /* Disable UniMAC TX */
1561         umac_enable_set(priv, CMD_TX_EN, 0);
1562
1563         /* Free RX/TX rings SW structures */
1564         for (i = 0; i < dev->num_tx_queues; i++)
1565                 bcm_sysport_fini_tx_ring(priv, i);
1566         bcm_sysport_fini_rx_ring(priv);
1567
1568         free_irq(priv->irq0, dev);
1569         free_irq(priv->irq1, dev);
1570
1571         /* Disconnect from PHY */
1572         phy_disconnect(priv->phydev);
1573
1574         return 0;
1575 }
1576
1577 static struct ethtool_ops bcm_sysport_ethtool_ops = {
1578         .get_settings           = bcm_sysport_get_settings,
1579         .set_settings           = bcm_sysport_set_settings,
1580         .get_drvinfo            = bcm_sysport_get_drvinfo,
1581         .get_msglevel           = bcm_sysport_get_msglvl,
1582         .set_msglevel           = bcm_sysport_set_msglvl,
1583         .get_link               = ethtool_op_get_link,
1584         .get_strings            = bcm_sysport_get_strings,
1585         .get_ethtool_stats      = bcm_sysport_get_stats,
1586         .get_sset_count         = bcm_sysport_get_sset_count,
1587         .get_wol                = bcm_sysport_get_wol,
1588         .set_wol                = bcm_sysport_set_wol,
1589 };
1590
1591 static const struct net_device_ops bcm_sysport_netdev_ops = {
1592         .ndo_start_xmit         = bcm_sysport_xmit,
1593         .ndo_tx_timeout         = bcm_sysport_tx_timeout,
1594         .ndo_open               = bcm_sysport_open,
1595         .ndo_stop               = bcm_sysport_stop,
1596         .ndo_set_features       = bcm_sysport_set_features,
1597         .ndo_set_rx_mode        = bcm_sysport_set_rx_mode,
1598 };
1599
1600 #define REV_FMT "v%2x.%02x"
1601
1602 static int bcm_sysport_probe(struct platform_device *pdev)
1603 {
1604         struct bcm_sysport_priv *priv;
1605         struct device_node *dn;
1606         struct net_device *dev;
1607         const void *macaddr;
1608         struct resource *r;
1609         u32 txq, rxq;
1610         int ret;
1611
1612         dn = pdev->dev.of_node;
1613         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1614
1615         /* Read the Transmit/Receive Queue properties */
1616         if (of_property_read_u32(dn, "systemport,num-txq", &txq))
1617                 txq = TDMA_NUM_RINGS;
1618         if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
1619                 rxq = 1;
1620
1621         dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
1622         if (!dev)
1623                 return -ENOMEM;
1624
1625         /* Initialize private members */
1626         priv = netdev_priv(dev);
1627
1628         priv->irq0 = platform_get_irq(pdev, 0);
1629         priv->irq1 = platform_get_irq(pdev, 1);
1630         priv->wol_irq = platform_get_irq(pdev, 2);
1631         if (priv->irq0 <= 0 || priv->irq1 <= 0) {
1632                 dev_err(&pdev->dev, "invalid interrupts\n");
1633                 ret = -EINVAL;
1634                 goto err;
1635         }
1636
1637         priv->base = devm_ioremap_resource(&pdev->dev, r);
1638         if (IS_ERR(priv->base)) {
1639                 ret = PTR_ERR(priv->base);
1640                 goto err;
1641         }
1642
1643         priv->netdev = dev;
1644         priv->pdev = pdev;
1645
1646         priv->phy_interface = of_get_phy_mode(dn);
1647         /* Default to GMII interface mode */
1648         if (priv->phy_interface < 0)
1649                 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
1650
1651         /* In the case of a fixed PHY, the DT node associated
1652          * to the PHY is the Ethernet MAC DT node.
1653          */
1654         if (of_phy_is_fixed_link(dn)) {
1655                 ret = of_phy_register_fixed_link(dn);
1656                 if (ret) {
1657                         dev_err(&pdev->dev, "failed to register fixed PHY\n");
1658                         goto err;
1659                 }
1660
1661                 priv->phy_dn = dn;
1662         }
1663
1664         /* Initialize netdevice members */
1665         macaddr = of_get_mac_address(dn);
1666         if (!macaddr || !is_valid_ether_addr(macaddr)) {
1667                 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
1668                 random_ether_addr(dev->dev_addr);
1669         } else {
1670                 ether_addr_copy(dev->dev_addr, macaddr);
1671         }
1672
1673         SET_NETDEV_DEV(dev, &pdev->dev);
1674         dev_set_drvdata(&pdev->dev, dev);
1675         dev->ethtool_ops = &bcm_sysport_ethtool_ops;
1676         dev->netdev_ops = &bcm_sysport_netdev_ops;
1677         netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
1678
1679         /* HW supported features, none enabled by default */
1680         dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
1681                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1682
1683         /* Request the WOL interrupt and advertise suspend if available */
1684         priv->wol_irq_disabled = 1;
1685         ret = devm_request_irq(&pdev->dev, priv->wol_irq,
1686                                bcm_sysport_wol_isr, 0, dev->name, priv);
1687         if (!ret)
1688                 device_set_wakeup_capable(&pdev->dev, 1);
1689
1690         /* Set the needed headroom once and for all */
1691         BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
1692         dev->needed_headroom += sizeof(struct bcm_tsb);
1693
1694         /* libphy will adjust the link state accordingly */
1695         netif_carrier_off(dev);
1696
1697         ret = register_netdev(dev);
1698         if (ret) {
1699                 dev_err(&pdev->dev, "failed to register net_device\n");
1700                 goto err;
1701         }
1702
1703         priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
1704         dev_info(&pdev->dev,
1705                  "Broadcom SYSTEMPORT" REV_FMT
1706                  " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
1707                  (priv->rev >> 8) & 0xff, priv->rev & 0xff,
1708                  priv->base, priv->irq0, priv->irq1, txq, rxq);
1709
1710         return 0;
1711 err:
1712         free_netdev(dev);
1713         return ret;
1714 }
1715
1716 static int bcm_sysport_remove(struct platform_device *pdev)
1717 {
1718         struct net_device *dev = dev_get_drvdata(&pdev->dev);
1719
1720         /* Not much to do, ndo_close has been called
1721          * and we use managed allocations
1722          */
1723         unregister_netdev(dev);
1724         free_netdev(dev);
1725         dev_set_drvdata(&pdev->dev, NULL);
1726
1727         return 0;
1728 }
1729
1730 #ifdef CONFIG_PM_SLEEP
1731 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
1732 {
1733         struct net_device *ndev = priv->netdev;
1734         unsigned int timeout = 1000;
1735         u32 reg;
1736
1737         /* Password has already been programmed */
1738         reg = umac_readl(priv, UMAC_MPD_CTRL);
1739         reg |= MPD_EN;
1740         reg &= ~PSW_EN;
1741         if (priv->wolopts & WAKE_MAGICSECURE)
1742                 reg |= PSW_EN;
1743         umac_writel(priv, reg, UMAC_MPD_CTRL);
1744
1745         /* Make sure RBUF entered WoL mode as result */
1746         do {
1747                 reg = rbuf_readl(priv, RBUF_STATUS);
1748                 if (reg & RBUF_WOL_MODE)
1749                         break;
1750
1751                 udelay(10);
1752         } while (timeout-- > 0);
1753
1754         /* Do not leave the UniMAC RBUF matching only MPD packets */
1755         if (!timeout) {
1756                 reg = umac_readl(priv, UMAC_MPD_CTRL);
1757                 reg &= ~MPD_EN;
1758                 umac_writel(priv, reg, UMAC_MPD_CTRL);
1759                 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
1760                 return -ETIMEDOUT;
1761         }
1762
1763         /* UniMAC receive needs to be turned on */
1764         umac_enable_set(priv, CMD_RX_EN, 1);
1765
1766         /* Enable the interrupt wake-up source */
1767         intrl2_0_mask_clear(priv, INTRL2_0_MPD);
1768
1769         netif_dbg(priv, wol, ndev, "entered WOL mode\n");
1770
1771         return 0;
1772 }
1773
1774 static int bcm_sysport_suspend(struct device *d)
1775 {
1776         struct net_device *dev = dev_get_drvdata(d);
1777         struct bcm_sysport_priv *priv = netdev_priv(dev);
1778         unsigned int i;
1779         int ret = 0;
1780         u32 reg;
1781
1782         if (!netif_running(dev))
1783                 return 0;
1784
1785         bcm_sysport_netif_stop(dev);
1786
1787         phy_suspend(priv->phydev);
1788
1789         netif_device_detach(dev);
1790
1791         /* Disable UniMAC RX */
1792         umac_enable_set(priv, CMD_RX_EN, 0);
1793
1794         ret = rdma_enable_set(priv, 0);
1795         if (ret) {
1796                 netdev_err(dev, "RDMA timeout!\n");
1797                 return ret;
1798         }
1799
1800         /* Disable RXCHK if enabled */
1801         if (priv->rx_chk_en) {
1802                 reg = rxchk_readl(priv, RXCHK_CONTROL);
1803                 reg &= ~RXCHK_EN;
1804                 rxchk_writel(priv, reg, RXCHK_CONTROL);
1805         }
1806
1807         /* Flush RX pipe */
1808         if (!priv->wolopts)
1809                 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1810
1811         ret = tdma_enable_set(priv, 0);
1812         if (ret) {
1813                 netdev_err(dev, "TDMA timeout!\n");
1814                 return ret;
1815         }
1816
1817         /* Wait for a packet boundary */
1818         usleep_range(2000, 3000);
1819
1820         umac_enable_set(priv, CMD_TX_EN, 0);
1821
1822         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1823
1824         /* Free RX/TX rings SW structures */
1825         for (i = 0; i < dev->num_tx_queues; i++)
1826                 bcm_sysport_fini_tx_ring(priv, i);
1827         bcm_sysport_fini_rx_ring(priv);
1828
1829         /* Get prepared for Wake-on-LAN */
1830         if (device_may_wakeup(d) && priv->wolopts)
1831                 ret = bcm_sysport_suspend_to_wol(priv);
1832
1833         return ret;
1834 }
1835
1836 static int bcm_sysport_resume(struct device *d)
1837 {
1838         struct net_device *dev = dev_get_drvdata(d);
1839         struct bcm_sysport_priv *priv = netdev_priv(dev);
1840         unsigned int i;
1841         u32 reg;
1842         int ret;
1843
1844         if (!netif_running(dev))
1845                 return 0;
1846
1847         /* We may have been suspended and never received a WOL event that
1848          * would turn off MPD detection, take care of that now
1849          */
1850         bcm_sysport_resume_from_wol(priv);
1851
1852         /* Initialize both hardware and software ring */
1853         for (i = 0; i < dev->num_tx_queues; i++) {
1854                 ret = bcm_sysport_init_tx_ring(priv, i);
1855                 if (ret) {
1856                         netdev_err(dev, "failed to initialize TX ring %d\n",
1857                                    i);
1858                         goto out_free_tx_rings;
1859                 }
1860         }
1861
1862         /* Initialize linked-list */
1863         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1864
1865         /* Initialize RX ring */
1866         ret = bcm_sysport_init_rx_ring(priv);
1867         if (ret) {
1868                 netdev_err(dev, "failed to initialize RX ring\n");
1869                 goto out_free_rx_ring;
1870         }
1871
1872         netif_device_attach(dev);
1873
1874         /* Enable RX interrupt and TX ring full interrupt */
1875         intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1876
1877         /* RX pipe enable */
1878         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1879
1880         ret = rdma_enable_set(priv, 1);
1881         if (ret) {
1882                 netdev_err(dev, "failed to enable RDMA\n");
1883                 goto out_free_rx_ring;
1884         }
1885
1886         /* Enable rxhck */
1887         if (priv->rx_chk_en) {
1888                 reg = rxchk_readl(priv, RXCHK_CONTROL);
1889                 reg |= RXCHK_EN;
1890                 rxchk_writel(priv, reg, RXCHK_CONTROL);
1891         }
1892
1893         rbuf_init(priv);
1894
1895         /* Set maximum frame length */
1896         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1897
1898         /* Set MAC address */
1899         umac_set_hw_addr(priv, dev->dev_addr);
1900
1901         umac_enable_set(priv, CMD_RX_EN, 1);
1902
1903         /* TX pipe enable */
1904         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1905
1906         umac_enable_set(priv, CMD_TX_EN, 1);
1907
1908         ret = tdma_enable_set(priv, 1);
1909         if (ret) {
1910                 netdev_err(dev, "TDMA timeout!\n");
1911                 goto out_free_rx_ring;
1912         }
1913
1914         phy_resume(priv->phydev);
1915
1916         bcm_sysport_netif_start(dev);
1917
1918         return 0;
1919
1920 out_free_rx_ring:
1921         bcm_sysport_fini_rx_ring(priv);
1922 out_free_tx_rings:
1923         for (i = 0; i < dev->num_tx_queues; i++)
1924                 bcm_sysport_fini_tx_ring(priv, i);
1925         return ret;
1926 }
1927 #endif
1928
1929 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
1930                 bcm_sysport_suspend, bcm_sysport_resume);
1931
1932 static const struct of_device_id bcm_sysport_of_match[] = {
1933         { .compatible = "brcm,systemport-v1.00" },
1934         { .compatible = "brcm,systemport" },
1935         { /* sentinel */ }
1936 };
1937
1938 static struct platform_driver bcm_sysport_driver = {
1939         .probe  = bcm_sysport_probe,
1940         .remove = bcm_sysport_remove,
1941         .driver =  {
1942                 .name = "brcm-systemport",
1943                 .owner = THIS_MODULE,
1944                 .of_match_table = bcm_sysport_of_match,
1945                 .pm = &bcm_sysport_pm_ops,
1946         },
1947 };
1948 module_platform_driver(bcm_sysport_driver);
1949
1950 MODULE_AUTHOR("Broadcom Corporation");
1951 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
1952 MODULE_ALIAS("platform:brcm-systemport");
1953 MODULE_LICENSE("GPL");