2 * Linux network driver for Brocade Converged Network Adapter.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License (GPL) Version 2 as
6 * published by the Free Software Foundation
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
21 #include <linux/rtnetlink.h>
22 #include <linux/workqueue.h>
23 #include <linux/ipv6.h>
24 #include <linux/etherdevice.h>
25 #include <linux/mutex.h>
26 #include <linux/firmware.h>
27 #include <linux/if_vlan.h>
30 #include <asm/checksum.h>
31 #include <net/ip6_checksum.h>
38 #define BNAD_TXQ_DEPTH 2048
39 #define BNAD_RXQ_DEPTH 2048
42 #define BNAD_MAX_TXQ_PER_TX 8 /* 8 priority queues */
43 #define BNAD_TXQ_NUM 1
46 #define BNAD_MAX_RXP_PER_RX 16
47 #define BNAD_MAX_RXQ_PER_RXP 2
50 * Control structure pointed to ccb->ctrl, which
51 * determines the NAPI / LRO behavior CCB
52 * There is 1:1 corres. between ccb & ctrl
58 struct napi_struct napi;
66 #define BNAD_RXMODE_PROMISC_DEFAULT BNA_RXMODE_PROMISC
69 * GLOBAL #defines (CONSTANTS)
71 #define BNAD_NAME "bna"
72 #define BNAD_NAME_LEN 64
74 #define BNAD_VERSION "3.0.2.2"
76 #define BNAD_MAILBOX_MSIX_INDEX 0
77 #define BNAD_MAILBOX_MSIX_VECTORS 1
78 #define BNAD_INTX_TX_IB_BITMASK 0x1
79 #define BNAD_INTX_RX_IB_BITMASK 0x2
81 #define BNAD_STATS_TIMER_FREQ 1000 /* in msecs */
82 #define BNAD_DIM_TIMER_FREQ 1000 /* in msecs */
84 #define BNAD_IOCETH_TIMEOUT 10000
86 #define BNAD_MAX_Q_DEPTH 0x10000
87 #define BNAD_MIN_Q_DEPTH 0x200
89 #define BNAD_MAX_RXQ_DEPTH (BNAD_MAX_Q_DEPTH / bnad_rxqs_per_cq)
90 /* keeping MAX TX and RX Q depth equal */
91 #define BNAD_MAX_TXQ_DEPTH BNAD_MAX_RXQ_DEPTH
93 #define BNAD_JUMBO_MTU 9000
95 #define BNAD_NETIF_WAKE_THRESHOLD 8
97 #define BNAD_RXQ_REFILL_THRESHOLD_SHIFT 3
99 /* Bit positions for tcb->flags */
100 #define BNAD_TXQ_FREE_SENT 0
101 #define BNAD_TXQ_TX_STARTED 1
103 /* Bit positions for rcb->flags */
104 #define BNAD_RXQ_REFILL 0
105 #define BNAD_RXQ_STARTED 1
106 #define BNAD_RXQ_POST_OK 2
108 /* Resource limits */
109 #define BNAD_NUM_TXQ (bnad->num_tx * bnad->num_txq_per_tx)
110 #define BNAD_NUM_RXP (bnad->num_rx * bnad->num_rxp_per_rx)
117 enum bnad_intr_source {
122 enum bnad_link_state {
127 struct bnad_completion {
128 struct completion ioc_comp;
129 struct completion ucast_comp;
130 struct completion mcast_comp;
131 struct completion tx_comp;
132 struct completion rx_comp;
133 struct completion stats_comp;
134 struct completion enet_comp;
135 struct completion mtu_comp;
138 u8 ucast_comp_status;
139 u8 mcast_comp_status;
142 u8 stats_comp_status;
147 /* Tx Rx Control Stats */
148 struct bnad_drv_stats {
149 u64 netif_queue_stop;
150 u64 netif_queue_wakeup;
151 u64 netif_queue_stopped;
158 u64 tx_skb_too_short;
160 u64 tx_skb_max_vectors;
161 u64 tx_skb_mss_too_long;
162 u64 tx_skb_tso_too_short;
163 u64 tx_skb_tso_prepare;
164 u64 tx_skb_non_tso_too_long;
168 u64 tx_skb_headlen_too_long;
169 u64 tx_skb_headlen_zero;
170 u64 tx_skb_frag_zero;
171 u64 tx_skb_len_mismatch;
173 u64 hw_stats_updates;
174 u64 netif_rx_dropped;
179 u64 rxp_info_alloc_failed;
180 u64 mbox_intr_disabled;
181 u64 mbox_intr_enabled;
182 u64 tx_unmap_q_alloc_failed;
183 u64 rx_unmap_q_alloc_failed;
185 u64 rxbuf_alloc_failed;
188 /* Complete driver stats */
190 struct bnad_drv_stats drv_stats;
191 struct bna_stats *bna_stats;
194 /* Tx / Rx Resources */
195 struct bnad_tx_res_info {
196 struct bna_res_info res_info[BNA_TX_RES_T_MAX];
199 struct bnad_rx_res_info {
200 struct bna_res_info res_info[BNA_RX_RES_T_MAX];
203 struct bnad_tx_info {
204 struct bna_tx *tx; /* 1:1 between tx_info & tx */
205 struct bna_tcb *tcb[BNAD_MAX_TXQ_PER_TX];
207 } ____cacheline_aligned;
209 struct bnad_rx_info {
210 struct bna_rx *rx; /* 1:1 between rx_info & rx */
212 struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXP_PER_RX];
214 } ____cacheline_aligned;
216 /* Unmap queues for Tx / Rx cleanup */
217 struct bnad_skb_unmap {
219 DEFINE_DMA_UNMAP_ADDR(dma_addr);
222 struct bnad_unmap_q {
226 /* This should be the last one */
227 struct bnad_skb_unmap unmap_array[1];
230 /* Bit mask values for bnad->cfg_flags */
231 #define BNAD_CF_DIM_ENABLED 0x01 /* DIM */
232 #define BNAD_CF_PROMISC 0x02
233 #define BNAD_CF_ALLMULTI 0x04
234 #define BNAD_CF_MSIX 0x08 /* If in MSIx mode */
236 /* Defines for run_flags bit-mask */
237 /* Set, tested & cleared using xxx_bit() functions */
238 /* Values indicated bit positions */
239 #define BNAD_RF_CEE_RUNNING 0
240 #define BNAD_RF_MTU_SET 1
241 #define BNAD_RF_MBOX_IRQ_DISABLED 2
242 #define BNAD_RF_NETDEV_REGISTERED 3
243 #define BNAD_RF_DIM_TIMER_RUNNING 4
244 #define BNAD_RF_STATS_TIMER_RUNNING 5
245 #define BNAD_RF_TX_PRIO_SET 6
248 /* Define for Fast Path flags */
249 /* Defined as bit positions */
250 #define BNAD_FP_IN_RX_PATH 0
253 struct net_device *netdev;
256 struct bnad_tx_info tx_info[BNAD_MAX_TX];
257 struct bnad_rx_info rx_info[BNAD_MAX_RX];
259 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
261 * These q numbers are global only because
262 * they are used to calculate MSIx vectors.
263 * Actually the exact # of queues are per Tx/Rx
274 u8 tx_coalescing_timeo;
275 u8 rx_coalescing_timeo;
277 struct bna_rx_config rx_config[BNAD_MAX_RX];
278 struct bna_tx_config tx_config[BNAD_MAX_TX];
280 void __iomem *bar0; /* BAR0 address */
285 unsigned long run_flags;
287 struct pci_dev *pcidev;
292 struct msix_entry *msix_table;
294 struct mutex conf_mutex;
295 spinlock_t bna_lock ____cacheline_aligned;
298 struct timer_list ioc_timer;
299 struct timer_list dim_timer;
300 struct timer_list stats_timer;
302 /* Control path resources, memory & irq */
303 struct bna_res_info res_info[BNA_RES_T_MAX];
304 struct bna_res_info mod_res_info[BNA_MOD_RES_T_MAX];
305 struct bnad_tx_res_info tx_res_info[BNAD_MAX_TX];
306 struct bnad_rx_res_info rx_res_info[BNAD_MAX_RX];
308 struct bnad_completion bnad_completions;
310 /* Burnt in MAC address */
313 struct tasklet_struct tx_free_tasklet;
316 struct bnad_stats stats;
318 struct bnad_diag *diag;
320 char adapter_name[BNAD_NAME_LEN];
321 char port_name[BNAD_NAME_LEN];
322 char mbox_irq_name[BNAD_NAME_LEN];
328 extern struct firmware *bfi_fw;
329 extern u32 bnad_rxqs_per_cq;
334 extern u32 *cna_get_firmware_buf(struct pci_dev *pdev);
335 /* Netdev entry point prototypes */
336 extern void bnad_set_rx_mode(struct net_device *netdev);
337 extern struct net_device_stats *bnad_get_netdev_stats(
338 struct net_device *netdev);
339 extern int bnad_mac_addr_set_locked(struct bnad *bnad, u8 *mac_addr);
340 extern int bnad_enable_default_bcast(struct bnad *bnad);
341 extern void bnad_restore_vlans(struct bnad *bnad, u32 rx_id);
342 extern void bnad_set_ethtool_ops(struct net_device *netdev);
344 /* Configuration & setup */
345 extern void bnad_tx_coalescing_timeo_set(struct bnad *bnad);
346 extern void bnad_rx_coalescing_timeo_set(struct bnad *bnad);
348 extern int bnad_setup_rx(struct bnad *bnad, u32 rx_id);
349 extern int bnad_setup_tx(struct bnad *bnad, u32 tx_id);
350 extern void bnad_cleanup_tx(struct bnad *bnad, u32 tx_id);
351 extern void bnad_cleanup_rx(struct bnad *bnad, u32 rx_id);
353 /* Timer start/stop protos */
354 extern void bnad_dim_timer_start(struct bnad *bnad);
357 extern void bnad_netdev_qstats_fill(struct bnad *bnad,
358 struct rtnl_link_stats64 *stats);
359 extern void bnad_netdev_hwstats_fill(struct bnad *bnad,
360 struct rtnl_link_stats64 *stats);
365 /* To set & get the stats counters */
366 #define BNAD_UPDATE_CTR(_bnad, _ctr) \
367 (((_bnad)->stats.drv_stats._ctr)++)
369 #define BNAD_GET_CTR(_bnad, _ctr) ((_bnad)->stats.drv_stats._ctr)
371 #define bnad_enable_rx_irq_unsafe(_ccb) \
373 if (likely(test_bit(BNAD_RXQ_STARTED, &(_ccb)->rcb[0]->flags))) {\
374 bna_ib_coalescing_timer_set((_ccb)->i_dbell, \
375 (_ccb)->rx_coalescing_timeo); \
376 bna_ib_ack((_ccb)->i_dbell, 0); \
380 #endif /* __BNAD_H__ */