2 * Copyright (c) 2014-2015 Hisilicon Limited.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
10 #include "hns_dsaf_mac.h"
11 #include "hns_dsaf_misc.h"
12 #include "hns_dsaf_ppe.h"
13 #include "hns_dsaf_reg.h"
16 HNS_OP_RESET_FUNC = 0x1,
17 HNS_OP_SERDES_LP_FUNC = 0x2,
18 HNS_OP_LED_SET_FUNC = 0x3,
19 HNS_OP_GET_PORT_TYPE_FUNC = 0x4,
20 HNS_OP_GET_SFP_STAT_FUNC = 0x5,
24 HNS_DSAF_RESET_FUNC = 0x1,
25 HNS_PPE_RESET_FUNC = 0x2,
26 HNS_XGE_CORE_RESET_FUNC = 0x3,
27 HNS_XGE_RESET_FUNC = 0x4,
28 HNS_GE_RESET_FUNC = 0x5,
31 const u8 hns_dsaf_acpi_dsm_uuid[] = {
32 0x1A, 0xAA, 0x85, 0x1A, 0x93, 0xE2, 0x5E, 0x41,
33 0x8E, 0x28, 0x8D, 0x69, 0x0A, 0x0F, 0x82, 0x0A
36 static void dsaf_write_sub(struct dsaf_device *dsaf_dev, u32 reg, u32 val)
38 if (dsaf_dev->sub_ctrl)
39 dsaf_write_syscon(dsaf_dev->sub_ctrl, reg, val);
41 dsaf_write_reg(dsaf_dev->sc_base, reg, val);
44 static u32 dsaf_read_sub(struct dsaf_device *dsaf_dev, u32 reg)
48 if (dsaf_dev->sub_ctrl)
49 ret = dsaf_read_syscon(dsaf_dev->sub_ctrl, reg);
51 ret = dsaf_read_reg(dsaf_dev->sc_base, reg);
56 static void hns_cpld_set_led(struct hns_mac_cb *mac_cb, int link_status,
63 pr_err("sfp_led_opt mac_dev is null!\n");
66 if (!mac_cb->cpld_ctrl) {
67 dev_err(mac_cb->dev, "mac_id=%d, cpld syscon is null !\n",
72 if (speed == MAC_SPEED_10000)
75 value = mac_cb->cpld_led_value;
78 dsaf_set_bit(value, DSAF_LED_LINK_B, link_status);
79 dsaf_set_field(value, DSAF_LED_SPEED_M,
80 DSAF_LED_SPEED_S, speed_reg);
81 dsaf_set_bit(value, DSAF_LED_DATA_B, data);
83 if (value != mac_cb->cpld_led_value) {
84 dsaf_write_syscon(mac_cb->cpld_ctrl,
85 mac_cb->cpld_ctrl_reg, value);
86 mac_cb->cpld_led_value = value;
89 value = (mac_cb->cpld_led_value) & (0x1 << DSAF_LED_ANCHOR_B);
90 dsaf_write_syscon(mac_cb->cpld_ctrl,
91 mac_cb->cpld_ctrl_reg, value);
92 mac_cb->cpld_led_value = value;
96 static void cpld_led_reset(struct hns_mac_cb *mac_cb)
98 if (!mac_cb || !mac_cb->cpld_ctrl)
101 dsaf_write_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg,
102 CPLD_LED_DEFAULT_VALUE);
103 mac_cb->cpld_led_value = CPLD_LED_DEFAULT_VALUE;
106 static int cpld_set_led_id(struct hns_mac_cb *mac_cb,
107 enum hnae_led_state status)
110 case HNAE_LED_ACTIVE:
111 mac_cb->cpld_led_value =
112 dsaf_read_syscon(mac_cb->cpld_ctrl,
113 mac_cb->cpld_ctrl_reg);
114 dsaf_set_bit(mac_cb->cpld_led_value, DSAF_LED_ANCHOR_B,
116 dsaf_write_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg,
117 mac_cb->cpld_led_value);
119 case HNAE_LED_INACTIVE:
120 dsaf_set_bit(mac_cb->cpld_led_value, DSAF_LED_ANCHOR_B,
121 CPLD_LED_DEFAULT_VALUE);
122 dsaf_write_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg,
123 mac_cb->cpld_led_value);
126 dev_err(mac_cb->dev, "invalid led state: %d!", status);
133 #define RESET_REQ_OR_DREQ 1
135 static void hns_dsaf_acpi_srst_by_port(struct dsaf_device *dsaf_dev, u8 op_type,
136 u32 port_type, u32 port, u32 val)
138 union acpi_object *obj;
139 union acpi_object obj_args[3], argv4;
141 obj_args[0].integer.type = ACPI_TYPE_INTEGER;
142 obj_args[0].integer.value = port_type;
143 obj_args[1].integer.type = ACPI_TYPE_INTEGER;
144 obj_args[1].integer.value = port;
145 obj_args[2].integer.type = ACPI_TYPE_INTEGER;
146 obj_args[2].integer.value = val;
148 argv4.type = ACPI_TYPE_PACKAGE;
149 argv4.package.count = 3;
150 argv4.package.elements = obj_args;
152 obj = acpi_evaluate_dsm(ACPI_HANDLE(dsaf_dev->dev),
153 hns_dsaf_acpi_dsm_uuid, 0, op_type, &argv4);
155 dev_warn(dsaf_dev->dev, "reset port_type%d port%d fail!",
163 static void hns_dsaf_rst(struct dsaf_device *dsaf_dev, bool dereset)
169 xbar_reg_addr = DSAF_SUB_SC_XBAR_RESET_REQ_REG;
170 nt_reg_addr = DSAF_SUB_SC_NT_RESET_REQ_REG;
172 xbar_reg_addr = DSAF_SUB_SC_XBAR_RESET_DREQ_REG;
173 nt_reg_addr = DSAF_SUB_SC_NT_RESET_DREQ_REG;
176 dsaf_write_sub(dsaf_dev, xbar_reg_addr, RESET_REQ_OR_DREQ);
177 dsaf_write_sub(dsaf_dev, nt_reg_addr, RESET_REQ_OR_DREQ);
180 static void hns_dsaf_rst_acpi(struct dsaf_device *dsaf_dev, bool dereset)
182 hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
187 static void hns_dsaf_xge_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,
193 if (port >= DSAF_XGE_NUM)
196 reg_val |= RESET_REQ_OR_DREQ;
197 reg_val |= 0x2082082 << dsaf_dev->mac_cb[port]->port_rst_off;
200 reg_addr = DSAF_SUB_SC_XGE_RESET_REQ_REG;
202 reg_addr = DSAF_SUB_SC_XGE_RESET_DREQ_REG;
204 dsaf_write_sub(dsaf_dev, reg_addr, reg_val);
207 static void hns_dsaf_xge_srst_by_port_acpi(struct dsaf_device *dsaf_dev,
208 u32 port, bool dereset)
210 hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
211 HNS_XGE_RESET_FUNC, port, dereset);
214 static void hns_dsaf_xge_core_srst_by_port(struct dsaf_device *dsaf_dev,
215 u32 port, bool dereset)
220 if (port >= DSAF_XGE_NUM)
223 reg_val |= XGMAC_TRX_CORE_SRST_M
224 << dsaf_dev->mac_cb[port]->port_rst_off;
227 reg_addr = DSAF_SUB_SC_XGE_RESET_REQ_REG;
229 reg_addr = DSAF_SUB_SC_XGE_RESET_DREQ_REG;
231 dsaf_write_sub(dsaf_dev, reg_addr, reg_val);
235 hns_dsaf_xge_core_srst_by_port_acpi(struct dsaf_device *dsaf_dev,
236 u32 port, bool dereset)
238 hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
239 HNS_XGE_CORE_RESET_FUNC, port, dereset);
242 static void hns_dsaf_ge_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,
249 if (port >= DSAF_GE_NUM)
252 if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) {
253 reg_val_1 = 0x1 << port;
254 port_rst_off = dsaf_dev->mac_cb[port]->port_rst_off;
255 /* there is difference between V1 and V2 in register.*/
256 reg_val_2 = AE_IS_VER1(dsaf_dev->dsaf_ver) ?
257 0x1041041 : 0x2082082;
258 reg_val_2 <<= port_rst_off;
261 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ1_REG,
264 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ0_REG,
267 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_DREQ0_REG,
270 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_DREQ1_REG,
275 reg_val_2 = AE_IS_VER1(dsaf_dev->dsaf_ver) ? 0x100 : 0x40;
277 reg_val_1 <<= dsaf_dev->reset_offset;
278 reg_val_2 <<= dsaf_dev->reset_offset;
281 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_REQ1_REG,
284 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_PPE_RESET_REQ_REG,
287 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_GE_RESET_DREQ1_REG,
290 dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_PPE_RESET_DREQ_REG,
296 static void hns_dsaf_ge_srst_by_port_acpi(struct dsaf_device *dsaf_dev,
297 u32 port, bool dereset)
299 hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
300 HNS_GE_RESET_FUNC, port, dereset);
303 static void hns_ppe_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,
309 reg_val |= RESET_REQ_OR_DREQ << dsaf_dev->mac_cb[port]->port_rst_off;
312 reg_addr = DSAF_SUB_SC_PPE_RESET_REQ_REG;
314 reg_addr = DSAF_SUB_SC_PPE_RESET_DREQ_REG;
316 dsaf_write_sub(dsaf_dev, reg_addr, reg_val);
320 hns_ppe_srst_by_port_acpi(struct dsaf_device *dsaf_dev, u32 port, bool dereset)
322 hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,
323 HNS_PPE_RESET_FUNC, port, dereset);
326 static void hns_ppe_com_srst(struct dsaf_device *dsaf_dev, bool dereset)
331 if (!(dev_of_node(dsaf_dev->dev)))
334 if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) {
335 reg_val = RESET_REQ_OR_DREQ;
337 reg_addr = DSAF_SUB_SC_RCB_PPE_COM_RESET_REQ_REG;
339 reg_addr = DSAF_SUB_SC_RCB_PPE_COM_RESET_DREQ_REG;
342 reg_val = 0x100 << dsaf_dev->reset_offset;
345 reg_addr = DSAF_SUB_SC_PPE_RESET_REQ_REG;
347 reg_addr = DSAF_SUB_SC_PPE_RESET_DREQ_REG;
350 dsaf_write_sub(dsaf_dev, reg_addr, reg_val);
354 * hns_mac_get_sds_mode - get phy ifterface form serdes mode
355 * @mac_cb: mac control block
356 * retuen phy interface
358 static phy_interface_t hns_mac_get_phy_if(struct hns_mac_cb *mac_cb)
362 bool is_ver1 = AE_IS_VER1(mac_cb->dsaf_dev->dsaf_ver);
363 int mac_id = mac_cb->mac_id;
364 phy_interface_t phy_if;
367 if (HNS_DSAF_IS_DEBUG(mac_cb->dsaf_dev))
368 return PHY_INTERFACE_MODE_SGMII;
370 if (mac_id >= 0 && mac_id <= 3)
371 reg = HNS_MAC_HILINK4_REG;
373 reg = HNS_MAC_HILINK3_REG;
375 if (!HNS_DSAF_IS_DEBUG(mac_cb->dsaf_dev) && mac_id <= 3)
376 reg = HNS_MAC_HILINK4V2_REG;
378 reg = HNS_MAC_HILINK3V2_REG;
381 mode = dsaf_read_sub(mac_cb->dsaf_dev, reg);
382 if (dsaf_get_bit(mode, mac_cb->port_mode_off))
383 phy_if = PHY_INTERFACE_MODE_XGMII;
385 phy_if = PHY_INTERFACE_MODE_SGMII;
390 static phy_interface_t hns_mac_get_phy_if_acpi(struct hns_mac_cb *mac_cb)
392 phy_interface_t phy_if = PHY_INTERFACE_MODE_NA;
393 union acpi_object *obj;
394 union acpi_object obj_args, argv4;
396 obj_args.integer.type = ACPI_TYPE_INTEGER;
397 obj_args.integer.value = mac_cb->mac_id;
399 argv4.type = ACPI_TYPE_PACKAGE,
400 argv4.package.count = 1,
401 argv4.package.elements = &obj_args,
403 obj = acpi_evaluate_dsm(ACPI_HANDLE(mac_cb->dev),
404 hns_dsaf_acpi_dsm_uuid, 0,
405 HNS_OP_GET_PORT_TYPE_FUNC, &argv4);
407 if (!obj || obj->type != ACPI_TYPE_INTEGER)
410 phy_if = obj->integer.value ?
411 PHY_INTERFACE_MODE_XGMII : PHY_INTERFACE_MODE_SGMII;
413 dev_dbg(mac_cb->dev, "mac_id=%d, phy_if=%d\n", mac_cb->mac_id, phy_if);
420 int hns_mac_get_sfp_prsnt(struct hns_mac_cb *mac_cb, int *sfp_prsnt)
422 if (!mac_cb->cpld_ctrl)
425 *sfp_prsnt = !dsaf_read_syscon(mac_cb->cpld_ctrl, mac_cb->cpld_ctrl_reg
426 + MAC_SFP_PORT_OFFSET);
432 * hns_mac_config_sds_loopback - set loop back for serdes
433 * @mac_cb: mac control block
434 * retuen 0 == success
436 static int hns_mac_config_sds_loopback(struct hns_mac_cb *mac_cb, bool en)
438 const u8 lane_id[] = {
439 0, /* mac 0 -> lane 0 */
440 1, /* mac 1 -> lane 1 */
441 2, /* mac 2 -> lane 2 */
442 3, /* mac 3 -> lane 3 */
443 2, /* mac 4 -> lane 2 */
444 3, /* mac 5 -> lane 3 */
445 0, /* mac 6 -> lane 0 */
446 1 /* mac 7 -> lane 1 */
448 #define RX_CSR(lane, reg) ((0x4080 + (reg) * 0x0002 + (lane) * 0x0200) * 2)
449 u64 reg_offset = RX_CSR(lane_id[mac_cb->mac_id], 0);
452 int ret = hns_mac_get_sfp_prsnt(mac_cb, &sfp_prsnt);
454 if (!mac_cb->phy_dev) {
456 pr_info("please confirm sfp is present or not\n");
459 pr_info("no sfp in this eth\n");
462 if (mac_cb->serdes_ctrl) {
465 if (!AE_IS_VER1(mac_cb->dsaf_dev->dsaf_ver)) {
466 #define HILINK_ACCESS_SEL_CFG 0x40008
467 /* hilink4 & hilink3 use the same xge training and
468 * xge u adaptor. There is a hilink access sel cfg
469 * register to select which one to be configed
471 if ((!HNS_DSAF_IS_DEBUG(mac_cb->dsaf_dev)) &&
472 (mac_cb->mac_id <= 3))
473 dsaf_write_syscon(mac_cb->serdes_ctrl,
474 HILINK_ACCESS_SEL_CFG, 0);
476 dsaf_write_syscon(mac_cb->serdes_ctrl,
477 HILINK_ACCESS_SEL_CFG, 3);
480 origin = dsaf_read_syscon(mac_cb->serdes_ctrl, reg_offset);
482 dsaf_set_field(origin, 1ull << 10, 10, en);
483 dsaf_write_syscon(mac_cb->serdes_ctrl, reg_offset, origin);
485 u8 *base_addr = (u8 *)mac_cb->serdes_vaddr +
486 (mac_cb->mac_id <= 3 ? 0x00280000 : 0x00200000);
487 dsaf_set_reg_field(base_addr, reg_offset, 1ull << 10, 10, en);
494 hns_mac_config_sds_loopback_acpi(struct hns_mac_cb *mac_cb, bool en)
496 union acpi_object *obj;
497 union acpi_object obj_args[3], argv4;
499 obj_args[0].integer.type = ACPI_TYPE_INTEGER;
500 obj_args[0].integer.value = mac_cb->mac_id;
501 obj_args[1].integer.type = ACPI_TYPE_INTEGER;
502 obj_args[1].integer.value = !!en;
504 argv4.type = ACPI_TYPE_PACKAGE;
505 argv4.package.count = 2;
506 argv4.package.elements = obj_args;
508 obj = acpi_evaluate_dsm(ACPI_HANDLE(mac_cb->dsaf_dev->dev),
509 hns_dsaf_acpi_dsm_uuid, 0,
510 HNS_OP_SERDES_LP_FUNC, &argv4);
512 dev_warn(mac_cb->dsaf_dev->dev, "set port%d serdes lp fail!",
523 struct dsaf_misc_op *hns_misc_op_get(struct dsaf_device *dsaf_dev)
525 struct dsaf_misc_op *misc_op;
527 misc_op = devm_kzalloc(dsaf_dev->dev, sizeof(*misc_op), GFP_KERNEL);
531 if (dev_of_node(dsaf_dev->dev)) {
532 misc_op->cpld_set_led = hns_cpld_set_led;
533 misc_op->cpld_reset_led = cpld_led_reset;
534 misc_op->cpld_set_led_id = cpld_set_led_id;
536 misc_op->dsaf_reset = hns_dsaf_rst;
537 misc_op->xge_srst = hns_dsaf_xge_srst_by_port;
538 misc_op->xge_core_srst = hns_dsaf_xge_core_srst_by_port;
539 misc_op->ge_srst = hns_dsaf_ge_srst_by_port;
540 misc_op->ppe_srst = hns_ppe_srst_by_port;
541 misc_op->ppe_comm_srst = hns_ppe_com_srst;
543 misc_op->get_phy_if = hns_mac_get_phy_if;
544 misc_op->get_sfp_prsnt = hns_mac_get_sfp_prsnt;
546 misc_op->cfg_serdes_loopback = hns_mac_config_sds_loopback;
547 } else if (is_acpi_node(dsaf_dev->dev->fwnode)) {
548 misc_op->cpld_set_led = hns_cpld_set_led;
549 misc_op->cpld_reset_led = cpld_led_reset;
550 misc_op->cpld_set_led_id = cpld_set_led_id;
552 misc_op->dsaf_reset = hns_dsaf_rst_acpi;
553 misc_op->xge_srst = hns_dsaf_xge_srst_by_port_acpi;
554 misc_op->xge_core_srst = hns_dsaf_xge_core_srst_by_port_acpi;
555 misc_op->ge_srst = hns_dsaf_ge_srst_by_port_acpi;
556 misc_op->ppe_srst = hns_ppe_srst_by_port_acpi;
557 misc_op->ppe_comm_srst = hns_ppe_com_srst;
559 misc_op->get_phy_if = hns_mac_get_phy_if_acpi;
560 misc_op->get_sfp_prsnt = hns_mac_get_sfp_prsnt;
562 misc_op->cfg_serdes_loopback = hns_mac_config_sds_loopback_acpi;
564 devm_kfree(dsaf_dev->dev, (void *)misc_op);
568 return (void *)misc_op;