1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 4
42 #define DRV_VERSION_BUILD 2
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
59 u16 rss_table_size, u16 rss_size);
60 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
61 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
63 /* i40e_pci_tbl - PCI Device ID Table
65 * Last entry must be all 0s
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
70 static const struct pci_device_id i40e_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
87 /* required last entry */
90 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
92 #define I40E_MAX_VF_COUNT 128
93 static int debug = -1;
94 module_param(debug, int, 0);
95 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
97 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
98 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
99 MODULE_LICENSE("GPL");
100 MODULE_VERSION(DRV_VERSION);
103 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
104 * @hw: pointer to the HW structure
105 * @mem: ptr to mem struct to fill out
106 * @size: size of memory requested
107 * @alignment: what to align the allocation to
109 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
110 u64 size, u32 alignment)
112 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
114 mem->size = ALIGN(size, alignment);
115 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
116 &mem->pa, GFP_KERNEL);
124 * i40e_free_dma_mem_d - OS specific memory free for shared code
125 * @hw: pointer to the HW structure
126 * @mem: ptr to mem struct to free
128 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
130 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
132 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
141 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
142 * @hw: pointer to the HW structure
143 * @mem: ptr to mem struct to fill out
144 * @size: size of memory requested
146 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
150 mem->va = kzalloc(size, GFP_KERNEL);
159 * i40e_free_virt_mem_d - OS specific memory free for shared code
160 * @hw: pointer to the HW structure
161 * @mem: ptr to mem struct to free
163 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
165 /* it's ok to kfree a NULL pointer */
174 * i40e_get_lump - find a lump of free generic resource
175 * @pf: board private structure
176 * @pile: the pile of resource to search
177 * @needed: the number of items needed
178 * @id: an owner id to stick on the items assigned
180 * Returns the base item index of the lump, or negative for error
182 * The search_hint trick and lack of advanced fit-finding only work
183 * because we're highly likely to have all the same size lump requests.
184 * Linear search time and any fragmentation should be minimal.
186 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
192 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
193 dev_info(&pf->pdev->dev,
194 "param err: pile=%p needed=%d id=0x%04x\n",
199 /* start the linear search with an imperfect hint */
200 i = pile->search_hint;
201 while (i < pile->num_entries) {
202 /* skip already allocated entries */
203 if (pile->list[i] & I40E_PILE_VALID_BIT) {
208 /* do we have enough in this lump? */
209 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
210 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
215 /* there was enough, so assign it to the requestor */
216 for (j = 0; j < needed; j++)
217 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
219 pile->search_hint = i + j;
223 /* not enough, so skip over it and continue looking */
231 * i40e_put_lump - return a lump of generic resource
232 * @pile: the pile of resource to search
233 * @index: the base item index
234 * @id: the owner id of the items assigned
236 * Returns the count of items in the lump
238 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
240 int valid_id = (id | I40E_PILE_VALID_BIT);
244 if (!pile || index >= pile->num_entries)
248 i < pile->num_entries && pile->list[i] == valid_id;
254 if (count && index < pile->search_hint)
255 pile->search_hint = index;
261 * i40e_find_vsi_from_id - searches for the vsi with the given id
262 * @pf - the pf structure to search for the vsi
263 * @id - id of the vsi it is searching for
265 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
269 for (i = 0; i < pf->num_alloc_vsi; i++)
270 if (pf->vsi[i] && (pf->vsi[i]->id == id))
277 * i40e_service_event_schedule - Schedule the service task to wake up
278 * @pf: board private structure
280 * If not already scheduled, this puts the task into the work queue
282 static void i40e_service_event_schedule(struct i40e_pf *pf)
284 if (!test_bit(__I40E_DOWN, &pf->state) &&
285 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
286 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
287 schedule_work(&pf->service_task);
291 * i40e_tx_timeout - Respond to a Tx Hang
292 * @netdev: network interface device structure
294 * If any port has noticed a Tx timeout, it is likely that the whole
295 * device is munged, not just the one netdev port, so go for the full
299 void i40e_tx_timeout(struct net_device *netdev)
301 static void i40e_tx_timeout(struct net_device *netdev)
304 struct i40e_netdev_priv *np = netdev_priv(netdev);
305 struct i40e_vsi *vsi = np->vsi;
306 struct i40e_pf *pf = vsi->back;
307 struct i40e_ring *tx_ring = NULL;
308 unsigned int i, hung_queue = 0;
311 pf->tx_timeout_count++;
313 /* find the stopped queue the same way the stack does */
314 for (i = 0; i < netdev->num_tx_queues; i++) {
315 struct netdev_queue *q;
316 unsigned long trans_start;
318 q = netdev_get_tx_queue(netdev, i);
319 trans_start = q->trans_start ? : netdev->trans_start;
320 if (netif_xmit_stopped(q) &&
322 (trans_start + netdev->watchdog_timeo))) {
328 if (i == netdev->num_tx_queues) {
329 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
331 /* now that we have an index, find the tx_ring struct */
332 for (i = 0; i < vsi->num_queue_pairs; i++) {
333 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
335 vsi->tx_rings[i]->queue_index) {
336 tx_ring = vsi->tx_rings[i];
343 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
344 pf->tx_timeout_recovery_level = 1; /* reset after some time */
345 else if (time_before(jiffies,
346 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
347 return; /* don't do any new action before the next timeout */
350 head = i40e_get_head(tx_ring);
351 /* Read interrupt register */
352 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
354 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
355 tx_ring->vsi->base_vector - 1));
357 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
359 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
360 vsi->seid, hung_queue, tx_ring->next_to_clean,
361 head, tx_ring->next_to_use,
362 readl(tx_ring->tail), val);
365 pf->tx_timeout_last_recovery = jiffies;
366 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
367 pf->tx_timeout_recovery_level, hung_queue);
369 switch (pf->tx_timeout_recovery_level) {
371 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
374 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
377 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
380 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
384 i40e_service_event_schedule(pf);
385 pf->tx_timeout_recovery_level++;
389 * i40e_release_rx_desc - Store the new tail and head values
390 * @rx_ring: ring to bump
391 * @val: new head index
393 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
395 rx_ring->next_to_use = val;
397 /* Force memory writes to complete before letting h/w
398 * know there are new descriptors to fetch. (Only
399 * applicable for weak-ordered memory model archs,
403 writel(val, rx_ring->tail);
407 * i40e_get_vsi_stats_struct - Get System Network Statistics
408 * @vsi: the VSI we care about
410 * Returns the address of the device statistics structure.
411 * The statistics are actually updated from the service task.
413 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
415 return &vsi->net_stats;
419 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
420 * @netdev: network interface device structure
422 * Returns the address of the device statistics structure.
423 * The statistics are actually updated from the service task.
426 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
427 struct net_device *netdev,
428 struct rtnl_link_stats64 *stats)
430 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
431 struct net_device *netdev,
432 struct rtnl_link_stats64 *stats)
435 struct i40e_netdev_priv *np = netdev_priv(netdev);
436 struct i40e_ring *tx_ring, *rx_ring;
437 struct i40e_vsi *vsi = np->vsi;
438 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
441 if (test_bit(__I40E_DOWN, &vsi->state))
448 for (i = 0; i < vsi->num_queue_pairs; i++) {
452 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
457 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
458 packets = tx_ring->stats.packets;
459 bytes = tx_ring->stats.bytes;
460 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
462 stats->tx_packets += packets;
463 stats->tx_bytes += bytes;
464 rx_ring = &tx_ring[1];
467 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
468 packets = rx_ring->stats.packets;
469 bytes = rx_ring->stats.bytes;
470 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
472 stats->rx_packets += packets;
473 stats->rx_bytes += bytes;
477 /* following stats updated by i40e_watchdog_subtask() */
478 stats->multicast = vsi_stats->multicast;
479 stats->tx_errors = vsi_stats->tx_errors;
480 stats->tx_dropped = vsi_stats->tx_dropped;
481 stats->rx_errors = vsi_stats->rx_errors;
482 stats->rx_dropped = vsi_stats->rx_dropped;
483 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
484 stats->rx_length_errors = vsi_stats->rx_length_errors;
490 * i40e_vsi_reset_stats - Resets all stats of the given vsi
491 * @vsi: the VSI to have its stats reset
493 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
495 struct rtnl_link_stats64 *ns;
501 ns = i40e_get_vsi_stats_struct(vsi);
502 memset(ns, 0, sizeof(*ns));
503 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
504 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
505 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
506 if (vsi->rx_rings && vsi->rx_rings[0]) {
507 for (i = 0; i < vsi->num_queue_pairs; i++) {
508 memset(&vsi->rx_rings[i]->stats, 0,
509 sizeof(vsi->rx_rings[i]->stats));
510 memset(&vsi->rx_rings[i]->rx_stats, 0,
511 sizeof(vsi->rx_rings[i]->rx_stats));
512 memset(&vsi->tx_rings[i]->stats, 0,
513 sizeof(vsi->tx_rings[i]->stats));
514 memset(&vsi->tx_rings[i]->tx_stats, 0,
515 sizeof(vsi->tx_rings[i]->tx_stats));
518 vsi->stat_offsets_loaded = false;
522 * i40e_pf_reset_stats - Reset all of the stats for the given PF
523 * @pf: the PF to be reset
525 void i40e_pf_reset_stats(struct i40e_pf *pf)
529 memset(&pf->stats, 0, sizeof(pf->stats));
530 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
531 pf->stat_offsets_loaded = false;
533 for (i = 0; i < I40E_MAX_VEB; i++) {
535 memset(&pf->veb[i]->stats, 0,
536 sizeof(pf->veb[i]->stats));
537 memset(&pf->veb[i]->stats_offsets, 0,
538 sizeof(pf->veb[i]->stats_offsets));
539 pf->veb[i]->stat_offsets_loaded = false;
545 * i40e_stat_update48 - read and update a 48 bit stat from the chip
546 * @hw: ptr to the hardware info
547 * @hireg: the high 32 bit reg to read
548 * @loreg: the low 32 bit reg to read
549 * @offset_loaded: has the initial offset been loaded yet
550 * @offset: ptr to current offset value
551 * @stat: ptr to the stat
553 * Since the device stats are not reset at PFReset, they likely will not
554 * be zeroed when the driver starts. We'll save the first values read
555 * and use them as offsets to be subtracted from the raw values in order
556 * to report stats that count from zero. In the process, we also manage
557 * the potential roll-over.
559 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
560 bool offset_loaded, u64 *offset, u64 *stat)
564 if (hw->device_id == I40E_DEV_ID_QEMU) {
565 new_data = rd32(hw, loreg);
566 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
568 new_data = rd64(hw, loreg);
572 if (likely(new_data >= *offset))
573 *stat = new_data - *offset;
575 *stat = (new_data + BIT_ULL(48)) - *offset;
576 *stat &= 0xFFFFFFFFFFFFULL;
580 * i40e_stat_update32 - read and update a 32 bit stat from the chip
581 * @hw: ptr to the hardware info
582 * @reg: the hw reg to read
583 * @offset_loaded: has the initial offset been loaded yet
584 * @offset: ptr to current offset value
585 * @stat: ptr to the stat
587 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
588 bool offset_loaded, u64 *offset, u64 *stat)
592 new_data = rd32(hw, reg);
595 if (likely(new_data >= *offset))
596 *stat = (u32)(new_data - *offset);
598 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
602 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
603 * @vsi: the VSI to be updated
605 void i40e_update_eth_stats(struct i40e_vsi *vsi)
607 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
608 struct i40e_pf *pf = vsi->back;
609 struct i40e_hw *hw = &pf->hw;
610 struct i40e_eth_stats *oes;
611 struct i40e_eth_stats *es; /* device's eth stats */
613 es = &vsi->eth_stats;
614 oes = &vsi->eth_stats_offsets;
616 /* Gather up the stats that the hw collects */
617 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
618 vsi->stat_offsets_loaded,
619 &oes->tx_errors, &es->tx_errors);
620 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
621 vsi->stat_offsets_loaded,
622 &oes->rx_discards, &es->rx_discards);
623 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
624 vsi->stat_offsets_loaded,
625 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
626 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
627 vsi->stat_offsets_loaded,
628 &oes->tx_errors, &es->tx_errors);
630 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
631 I40E_GLV_GORCL(stat_idx),
632 vsi->stat_offsets_loaded,
633 &oes->rx_bytes, &es->rx_bytes);
634 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
635 I40E_GLV_UPRCL(stat_idx),
636 vsi->stat_offsets_loaded,
637 &oes->rx_unicast, &es->rx_unicast);
638 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
639 I40E_GLV_MPRCL(stat_idx),
640 vsi->stat_offsets_loaded,
641 &oes->rx_multicast, &es->rx_multicast);
642 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
643 I40E_GLV_BPRCL(stat_idx),
644 vsi->stat_offsets_loaded,
645 &oes->rx_broadcast, &es->rx_broadcast);
647 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
648 I40E_GLV_GOTCL(stat_idx),
649 vsi->stat_offsets_loaded,
650 &oes->tx_bytes, &es->tx_bytes);
651 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
652 I40E_GLV_UPTCL(stat_idx),
653 vsi->stat_offsets_loaded,
654 &oes->tx_unicast, &es->tx_unicast);
655 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
656 I40E_GLV_MPTCL(stat_idx),
657 vsi->stat_offsets_loaded,
658 &oes->tx_multicast, &es->tx_multicast);
659 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
660 I40E_GLV_BPTCL(stat_idx),
661 vsi->stat_offsets_loaded,
662 &oes->tx_broadcast, &es->tx_broadcast);
663 vsi->stat_offsets_loaded = true;
667 * i40e_update_veb_stats - Update Switch component statistics
668 * @veb: the VEB being updated
670 static void i40e_update_veb_stats(struct i40e_veb *veb)
672 struct i40e_pf *pf = veb->pf;
673 struct i40e_hw *hw = &pf->hw;
674 struct i40e_eth_stats *oes;
675 struct i40e_eth_stats *es; /* device's eth stats */
676 struct i40e_veb_tc_stats *veb_oes;
677 struct i40e_veb_tc_stats *veb_es;
680 idx = veb->stats_idx;
682 oes = &veb->stats_offsets;
683 veb_es = &veb->tc_stats;
684 veb_oes = &veb->tc_stats_offsets;
686 /* Gather up the stats that the hw collects */
687 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
688 veb->stat_offsets_loaded,
689 &oes->tx_discards, &es->tx_discards);
690 if (hw->revision_id > 0)
691 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
692 veb->stat_offsets_loaded,
693 &oes->rx_unknown_protocol,
694 &es->rx_unknown_protocol);
695 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
696 veb->stat_offsets_loaded,
697 &oes->rx_bytes, &es->rx_bytes);
698 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->rx_unicast, &es->rx_unicast);
701 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
702 veb->stat_offsets_loaded,
703 &oes->rx_multicast, &es->rx_multicast);
704 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
705 veb->stat_offsets_loaded,
706 &oes->rx_broadcast, &es->rx_broadcast);
708 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
709 veb->stat_offsets_loaded,
710 &oes->tx_bytes, &es->tx_bytes);
711 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
712 veb->stat_offsets_loaded,
713 &oes->tx_unicast, &es->tx_unicast);
714 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
715 veb->stat_offsets_loaded,
716 &oes->tx_multicast, &es->tx_multicast);
717 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
718 veb->stat_offsets_loaded,
719 &oes->tx_broadcast, &es->tx_broadcast);
720 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
721 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
722 I40E_GLVEBTC_RPCL(i, idx),
723 veb->stat_offsets_loaded,
724 &veb_oes->tc_rx_packets[i],
725 &veb_es->tc_rx_packets[i]);
726 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
727 I40E_GLVEBTC_RBCL(i, idx),
728 veb->stat_offsets_loaded,
729 &veb_oes->tc_rx_bytes[i],
730 &veb_es->tc_rx_bytes[i]);
731 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
732 I40E_GLVEBTC_TPCL(i, idx),
733 veb->stat_offsets_loaded,
734 &veb_oes->tc_tx_packets[i],
735 &veb_es->tc_tx_packets[i]);
736 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
737 I40E_GLVEBTC_TBCL(i, idx),
738 veb->stat_offsets_loaded,
739 &veb_oes->tc_tx_bytes[i],
740 &veb_es->tc_tx_bytes[i]);
742 veb->stat_offsets_loaded = true;
747 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
748 * @vsi: the VSI that is capable of doing FCoE
750 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
752 struct i40e_pf *pf = vsi->back;
753 struct i40e_hw *hw = &pf->hw;
754 struct i40e_fcoe_stats *ofs;
755 struct i40e_fcoe_stats *fs; /* device's eth stats */
758 if (vsi->type != I40E_VSI_FCOE)
761 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
762 fs = &vsi->fcoe_stats;
763 ofs = &vsi->fcoe_stats_offsets;
765 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
766 vsi->fcoe_stat_offsets_loaded,
767 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
768 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
769 vsi->fcoe_stat_offsets_loaded,
770 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
771 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
772 vsi->fcoe_stat_offsets_loaded,
773 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
774 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
775 vsi->fcoe_stat_offsets_loaded,
776 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
777 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
778 vsi->fcoe_stat_offsets_loaded,
779 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
780 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
781 vsi->fcoe_stat_offsets_loaded,
782 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
783 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
784 vsi->fcoe_stat_offsets_loaded,
785 &ofs->fcoe_last_error, &fs->fcoe_last_error);
786 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
787 vsi->fcoe_stat_offsets_loaded,
788 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
790 vsi->fcoe_stat_offsets_loaded = true;
795 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
796 * @pf: the corresponding PF
798 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
800 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
802 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
803 struct i40e_hw_port_stats *nsd = &pf->stats;
804 struct i40e_hw *hw = &pf->hw;
807 if ((hw->fc.current_mode != I40E_FC_FULL) &&
808 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
811 xoff = nsd->link_xoff_rx;
812 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
813 pf->stat_offsets_loaded,
814 &osd->link_xoff_rx, &nsd->link_xoff_rx);
816 /* No new LFC xoff rx */
817 if (!(nsd->link_xoff_rx - xoff))
823 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
824 * @pf: the corresponding PF
826 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
828 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
830 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
831 struct i40e_hw_port_stats *nsd = &pf->stats;
832 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
833 struct i40e_dcbx_config *dcb_cfg;
834 struct i40e_hw *hw = &pf->hw;
838 dcb_cfg = &hw->local_dcbx_config;
840 /* Collect Link XOFF stats when PFC is disabled */
841 if (!dcb_cfg->pfc.pfcenable) {
842 i40e_update_link_xoff_rx(pf);
846 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
847 u64 prio_xoff = nsd->priority_xoff_rx[i];
849 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
850 pf->stat_offsets_loaded,
851 &osd->priority_xoff_rx[i],
852 &nsd->priority_xoff_rx[i]);
854 /* No new PFC xoff rx */
855 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
857 /* Get the TC for given priority */
858 tc = dcb_cfg->etscfg.prioritytable[i];
864 * i40e_update_vsi_stats - Update the vsi statistics counters.
865 * @vsi: the VSI to be updated
867 * There are a few instances where we store the same stat in a
868 * couple of different structs. This is partly because we have
869 * the netdev stats that need to be filled out, which is slightly
870 * different from the "eth_stats" defined by the chip and used in
871 * VF communications. We sort it out here.
873 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
875 struct i40e_pf *pf = vsi->back;
876 struct rtnl_link_stats64 *ons;
877 struct rtnl_link_stats64 *ns; /* netdev stats */
878 struct i40e_eth_stats *oes;
879 struct i40e_eth_stats *es; /* device's eth stats */
880 u32 tx_restart, tx_busy;
891 if (test_bit(__I40E_DOWN, &vsi->state) ||
892 test_bit(__I40E_CONFIG_BUSY, &pf->state))
895 ns = i40e_get_vsi_stats_struct(vsi);
896 ons = &vsi->net_stats_offsets;
897 es = &vsi->eth_stats;
898 oes = &vsi->eth_stats_offsets;
900 /* Gather up the netdev and vsi stats that the driver collects
901 * on the fly during packet processing
905 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
909 for (q = 0; q < vsi->num_queue_pairs; q++) {
911 p = ACCESS_ONCE(vsi->tx_rings[q]);
914 start = u64_stats_fetch_begin_irq(&p->syncp);
915 packets = p->stats.packets;
916 bytes = p->stats.bytes;
917 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
920 tx_restart += p->tx_stats.restart_queue;
921 tx_busy += p->tx_stats.tx_busy;
922 tx_linearize += p->tx_stats.tx_linearize;
923 tx_force_wb += p->tx_stats.tx_force_wb;
925 /* Rx queue is part of the same block as Tx queue */
928 start = u64_stats_fetch_begin_irq(&p->syncp);
929 packets = p->stats.packets;
930 bytes = p->stats.bytes;
931 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
934 rx_buf += p->rx_stats.alloc_buff_failed;
935 rx_page += p->rx_stats.alloc_page_failed;
938 vsi->tx_restart = tx_restart;
939 vsi->tx_busy = tx_busy;
940 vsi->tx_linearize = tx_linearize;
941 vsi->tx_force_wb = tx_force_wb;
942 vsi->rx_page_failed = rx_page;
943 vsi->rx_buf_failed = rx_buf;
945 ns->rx_packets = rx_p;
947 ns->tx_packets = tx_p;
950 /* update netdev stats from eth stats */
951 i40e_update_eth_stats(vsi);
952 ons->tx_errors = oes->tx_errors;
953 ns->tx_errors = es->tx_errors;
954 ons->multicast = oes->rx_multicast;
955 ns->multicast = es->rx_multicast;
956 ons->rx_dropped = oes->rx_discards;
957 ns->rx_dropped = es->rx_discards;
958 ons->tx_dropped = oes->tx_discards;
959 ns->tx_dropped = es->tx_discards;
961 /* pull in a couple PF stats if this is the main vsi */
962 if (vsi == pf->vsi[pf->lan_vsi]) {
963 ns->rx_crc_errors = pf->stats.crc_errors;
964 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
965 ns->rx_length_errors = pf->stats.rx_length_errors;
970 * i40e_update_pf_stats - Update the PF statistics counters.
971 * @pf: the PF to be updated
973 static void i40e_update_pf_stats(struct i40e_pf *pf)
975 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
976 struct i40e_hw_port_stats *nsd = &pf->stats;
977 struct i40e_hw *hw = &pf->hw;
981 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
982 I40E_GLPRT_GORCL(hw->port),
983 pf->stat_offsets_loaded,
984 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
985 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
986 I40E_GLPRT_GOTCL(hw->port),
987 pf->stat_offsets_loaded,
988 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
989 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
990 pf->stat_offsets_loaded,
991 &osd->eth.rx_discards,
992 &nsd->eth.rx_discards);
993 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
994 I40E_GLPRT_UPRCL(hw->port),
995 pf->stat_offsets_loaded,
996 &osd->eth.rx_unicast,
997 &nsd->eth.rx_unicast);
998 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
999 I40E_GLPRT_MPRCL(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->eth.rx_multicast,
1002 &nsd->eth.rx_multicast);
1003 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
1004 I40E_GLPRT_BPRCL(hw->port),
1005 pf->stat_offsets_loaded,
1006 &osd->eth.rx_broadcast,
1007 &nsd->eth.rx_broadcast);
1008 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1009 I40E_GLPRT_UPTCL(hw->port),
1010 pf->stat_offsets_loaded,
1011 &osd->eth.tx_unicast,
1012 &nsd->eth.tx_unicast);
1013 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1014 I40E_GLPRT_MPTCL(hw->port),
1015 pf->stat_offsets_loaded,
1016 &osd->eth.tx_multicast,
1017 &nsd->eth.tx_multicast);
1018 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1019 I40E_GLPRT_BPTCL(hw->port),
1020 pf->stat_offsets_loaded,
1021 &osd->eth.tx_broadcast,
1022 &nsd->eth.tx_broadcast);
1024 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->tx_dropped_link_down,
1027 &nsd->tx_dropped_link_down);
1029 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1030 pf->stat_offsets_loaded,
1031 &osd->crc_errors, &nsd->crc_errors);
1033 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1034 pf->stat_offsets_loaded,
1035 &osd->illegal_bytes, &nsd->illegal_bytes);
1037 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1038 pf->stat_offsets_loaded,
1039 &osd->mac_local_faults,
1040 &nsd->mac_local_faults);
1041 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->mac_remote_faults,
1044 &nsd->mac_remote_faults);
1046 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->rx_length_errors,
1049 &nsd->rx_length_errors);
1051 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1052 pf->stat_offsets_loaded,
1053 &osd->link_xon_rx, &nsd->link_xon_rx);
1054 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1055 pf->stat_offsets_loaded,
1056 &osd->link_xon_tx, &nsd->link_xon_tx);
1057 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1058 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1059 pf->stat_offsets_loaded,
1060 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1062 for (i = 0; i < 8; i++) {
1063 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1064 pf->stat_offsets_loaded,
1065 &osd->priority_xon_rx[i],
1066 &nsd->priority_xon_rx[i]);
1067 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1068 pf->stat_offsets_loaded,
1069 &osd->priority_xon_tx[i],
1070 &nsd->priority_xon_tx[i]);
1071 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1072 pf->stat_offsets_loaded,
1073 &osd->priority_xoff_tx[i],
1074 &nsd->priority_xoff_tx[i]);
1075 i40e_stat_update32(hw,
1076 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1077 pf->stat_offsets_loaded,
1078 &osd->priority_xon_2_xoff[i],
1079 &nsd->priority_xon_2_xoff[i]);
1082 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1083 I40E_GLPRT_PRC64L(hw->port),
1084 pf->stat_offsets_loaded,
1085 &osd->rx_size_64, &nsd->rx_size_64);
1086 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1087 I40E_GLPRT_PRC127L(hw->port),
1088 pf->stat_offsets_loaded,
1089 &osd->rx_size_127, &nsd->rx_size_127);
1090 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1091 I40E_GLPRT_PRC255L(hw->port),
1092 pf->stat_offsets_loaded,
1093 &osd->rx_size_255, &nsd->rx_size_255);
1094 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1095 I40E_GLPRT_PRC511L(hw->port),
1096 pf->stat_offsets_loaded,
1097 &osd->rx_size_511, &nsd->rx_size_511);
1098 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1099 I40E_GLPRT_PRC1023L(hw->port),
1100 pf->stat_offsets_loaded,
1101 &osd->rx_size_1023, &nsd->rx_size_1023);
1102 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1103 I40E_GLPRT_PRC1522L(hw->port),
1104 pf->stat_offsets_loaded,
1105 &osd->rx_size_1522, &nsd->rx_size_1522);
1106 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1107 I40E_GLPRT_PRC9522L(hw->port),
1108 pf->stat_offsets_loaded,
1109 &osd->rx_size_big, &nsd->rx_size_big);
1111 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1112 I40E_GLPRT_PTC64L(hw->port),
1113 pf->stat_offsets_loaded,
1114 &osd->tx_size_64, &nsd->tx_size_64);
1115 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1116 I40E_GLPRT_PTC127L(hw->port),
1117 pf->stat_offsets_loaded,
1118 &osd->tx_size_127, &nsd->tx_size_127);
1119 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1120 I40E_GLPRT_PTC255L(hw->port),
1121 pf->stat_offsets_loaded,
1122 &osd->tx_size_255, &nsd->tx_size_255);
1123 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1124 I40E_GLPRT_PTC511L(hw->port),
1125 pf->stat_offsets_loaded,
1126 &osd->tx_size_511, &nsd->tx_size_511);
1127 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1128 I40E_GLPRT_PTC1023L(hw->port),
1129 pf->stat_offsets_loaded,
1130 &osd->tx_size_1023, &nsd->tx_size_1023);
1131 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1132 I40E_GLPRT_PTC1522L(hw->port),
1133 pf->stat_offsets_loaded,
1134 &osd->tx_size_1522, &nsd->tx_size_1522);
1135 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1136 I40E_GLPRT_PTC9522L(hw->port),
1137 pf->stat_offsets_loaded,
1138 &osd->tx_size_big, &nsd->tx_size_big);
1140 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1141 pf->stat_offsets_loaded,
1142 &osd->rx_undersize, &nsd->rx_undersize);
1143 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1144 pf->stat_offsets_loaded,
1145 &osd->rx_fragments, &nsd->rx_fragments);
1146 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1147 pf->stat_offsets_loaded,
1148 &osd->rx_oversize, &nsd->rx_oversize);
1149 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1150 pf->stat_offsets_loaded,
1151 &osd->rx_jabber, &nsd->rx_jabber);
1154 i40e_stat_update32(hw,
1155 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1156 pf->stat_offsets_loaded,
1157 &osd->fd_atr_match, &nsd->fd_atr_match);
1158 i40e_stat_update32(hw,
1159 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1160 pf->stat_offsets_loaded,
1161 &osd->fd_sb_match, &nsd->fd_sb_match);
1162 i40e_stat_update32(hw,
1163 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1164 pf->stat_offsets_loaded,
1165 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1167 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1168 nsd->tx_lpi_status =
1169 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1170 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1171 nsd->rx_lpi_status =
1172 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1173 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1174 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1175 pf->stat_offsets_loaded,
1176 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1177 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1178 pf->stat_offsets_loaded,
1179 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1181 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1182 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1183 nsd->fd_sb_status = true;
1185 nsd->fd_sb_status = false;
1187 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1188 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1189 nsd->fd_atr_status = true;
1191 nsd->fd_atr_status = false;
1193 pf->stat_offsets_loaded = true;
1197 * i40e_update_stats - Update the various statistics counters.
1198 * @vsi: the VSI to be updated
1200 * Update the various stats for this VSI and its related entities.
1202 void i40e_update_stats(struct i40e_vsi *vsi)
1204 struct i40e_pf *pf = vsi->back;
1206 if (vsi == pf->vsi[pf->lan_vsi])
1207 i40e_update_pf_stats(pf);
1209 i40e_update_vsi_stats(vsi);
1211 i40e_update_fcoe_stats(vsi);
1216 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1217 * @vsi: the VSI to be searched
1218 * @macaddr: the MAC address
1220 * @is_vf: make sure its a VF filter, else doesn't matter
1221 * @is_netdev: make sure its a netdev filter, else doesn't matter
1223 * Returns ptr to the filter object or NULL
1225 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1226 u8 *macaddr, s16 vlan,
1227 bool is_vf, bool is_netdev)
1229 struct i40e_mac_filter *f;
1231 if (!vsi || !macaddr)
1234 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1235 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1236 (vlan == f->vlan) &&
1237 (!is_vf || f->is_vf) &&
1238 (!is_netdev || f->is_netdev))
1245 * i40e_find_mac - Find a mac addr in the macvlan filters list
1246 * @vsi: the VSI to be searched
1247 * @macaddr: the MAC address we are searching for
1248 * @is_vf: make sure its a VF filter, else doesn't matter
1249 * @is_netdev: make sure its a netdev filter, else doesn't matter
1251 * Returns the first filter with the provided MAC address or NULL if
1252 * MAC address was not found
1254 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1255 bool is_vf, bool is_netdev)
1257 struct i40e_mac_filter *f;
1259 if (!vsi || !macaddr)
1262 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1263 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1264 (!is_vf || f->is_vf) &&
1265 (!is_netdev || f->is_netdev))
1272 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1273 * @vsi: the VSI to be searched
1275 * Returns true if VSI is in vlan mode or false otherwise
1277 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1279 struct i40e_mac_filter *f;
1281 /* Only -1 for all the filters denotes not in vlan mode
1282 * so we have to go through all the list in order to make sure
1284 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1285 if (f->vlan >= 0 || vsi->info.pvid)
1293 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1294 * @vsi: the VSI to be searched
1295 * @macaddr: the mac address to be filtered
1296 * @is_vf: true if it is a VF
1297 * @is_netdev: true if it is a netdev
1299 * Goes through all the macvlan filters and adds a
1300 * macvlan filter for each unique vlan that already exists
1302 * Returns first filter found on success, else NULL
1304 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1305 bool is_vf, bool is_netdev)
1307 struct i40e_mac_filter *f;
1309 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1311 f->vlan = le16_to_cpu(vsi->info.pvid);
1312 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1313 is_vf, is_netdev)) {
1314 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1320 return list_first_entry_or_null(&vsi->mac_filter_list,
1321 struct i40e_mac_filter, list);
1325 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1326 * @vsi: the PF Main VSI - inappropriate for any other VSI
1327 * @macaddr: the MAC address
1329 * Some older firmware configurations set up a default promiscuous VLAN
1330 * filter that needs to be removed.
1332 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1334 struct i40e_aqc_remove_macvlan_element_data element;
1335 struct i40e_pf *pf = vsi->back;
1338 /* Only appropriate for the PF main VSI */
1339 if (vsi->type != I40E_VSI_MAIN)
1342 memset(&element, 0, sizeof(element));
1343 ether_addr_copy(element.mac_addr, macaddr);
1344 element.vlan_tag = 0;
1345 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1346 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1347 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1355 * i40e_add_filter - Add a mac/vlan filter to the VSI
1356 * @vsi: the VSI to be searched
1357 * @macaddr: the MAC address
1359 * @is_vf: make sure its a VF filter, else doesn't matter
1360 * @is_netdev: make sure its a netdev filter, else doesn't matter
1362 * Returns ptr to the filter object or NULL when no memory available.
1364 * NOTE: This function is expected to be called with mac_filter_list_lock
1367 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1368 u8 *macaddr, s16 vlan,
1369 bool is_vf, bool is_netdev)
1371 struct i40e_mac_filter *f;
1373 if (!vsi || !macaddr)
1376 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1378 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1380 goto add_filter_out;
1382 ether_addr_copy(f->macaddr, macaddr);
1386 INIT_LIST_HEAD(&f->list);
1387 list_add(&f->list, &vsi->mac_filter_list);
1390 /* increment counter and add a new flag if needed */
1396 } else if (is_netdev) {
1397 if (!f->is_netdev) {
1398 f->is_netdev = true;
1405 /* changed tells sync_filters_subtask to
1406 * push the filter down to the firmware
1409 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1410 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1418 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1419 * @vsi: the VSI to be searched
1420 * @macaddr: the MAC address
1422 * @is_vf: make sure it's a VF filter, else doesn't matter
1423 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1425 * NOTE: This function is expected to be called with mac_filter_list_lock
1428 void i40e_del_filter(struct i40e_vsi *vsi,
1429 u8 *macaddr, s16 vlan,
1430 bool is_vf, bool is_netdev)
1432 struct i40e_mac_filter *f;
1434 if (!vsi || !macaddr)
1437 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1438 if (!f || f->counter == 0)
1446 } else if (is_netdev) {
1448 f->is_netdev = false;
1452 /* make sure we don't remove a filter in use by VF or netdev */
1455 min_f += (f->is_vf ? 1 : 0);
1456 min_f += (f->is_netdev ? 1 : 0);
1458 if (f->counter > min_f)
1462 /* counter == 0 tells sync_filters_subtask to
1463 * remove the filter from the firmware's list
1465 if (f->counter == 0) {
1467 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1468 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1473 * i40e_set_mac - NDO callback to set mac address
1474 * @netdev: network interface device structure
1475 * @p: pointer to an address structure
1477 * Returns 0 on success, negative on failure
1480 int i40e_set_mac(struct net_device *netdev, void *p)
1482 static int i40e_set_mac(struct net_device *netdev, void *p)
1485 struct i40e_netdev_priv *np = netdev_priv(netdev);
1486 struct i40e_vsi *vsi = np->vsi;
1487 struct i40e_pf *pf = vsi->back;
1488 struct i40e_hw *hw = &pf->hw;
1489 struct sockaddr *addr = p;
1490 struct i40e_mac_filter *f;
1492 if (!is_valid_ether_addr(addr->sa_data))
1493 return -EADDRNOTAVAIL;
1495 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1496 netdev_info(netdev, "already using mac address %pM\n",
1501 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1502 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1503 return -EADDRNOTAVAIL;
1505 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1506 netdev_info(netdev, "returning to hw mac address %pM\n",
1509 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1511 if (vsi->type == I40E_VSI_MAIN) {
1514 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1515 I40E_AQC_WRITE_TYPE_LAA_WOL,
1516 addr->sa_data, NULL);
1519 "Addr change for Main VSI failed: %d\n",
1521 return -EADDRNOTAVAIL;
1525 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1526 struct i40e_aqc_remove_macvlan_element_data element;
1528 memset(&element, 0, sizeof(element));
1529 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1530 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1531 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1533 spin_lock_bh(&vsi->mac_filter_list_lock);
1534 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1536 spin_unlock_bh(&vsi->mac_filter_list_lock);
1539 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1540 struct i40e_aqc_add_macvlan_element_data element;
1542 memset(&element, 0, sizeof(element));
1543 ether_addr_copy(element.mac_addr, hw->mac.addr);
1544 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1545 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1547 spin_lock_bh(&vsi->mac_filter_list_lock);
1548 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1552 spin_unlock_bh(&vsi->mac_filter_list_lock);
1555 i40e_sync_vsi_filters(vsi, false);
1556 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1562 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1563 * @vsi: the VSI being setup
1564 * @ctxt: VSI context structure
1565 * @enabled_tc: Enabled TCs bitmap
1566 * @is_add: True if called before Add VSI
1568 * Setup VSI queue mapping for enabled traffic classes.
1571 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1572 struct i40e_vsi_context *ctxt,
1576 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1577 struct i40e_vsi_context *ctxt,
1582 struct i40e_pf *pf = vsi->back;
1592 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1595 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1596 /* Find numtc from enabled TC bitmap */
1597 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1598 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1602 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1606 /* At least TC0 is enabled in case of non-DCB case */
1610 vsi->tc_config.numtc = numtc;
1611 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1612 /* Number of queues per enabled TC */
1613 /* In MFP case we can have a much lower count of MSIx
1614 * vectors available and so we need to lower the used
1617 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1618 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1620 qcount = vsi->alloc_queue_pairs;
1621 num_tc_qps = qcount / numtc;
1622 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1624 /* Setup queue offset/count for all TCs for given VSI */
1625 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1626 /* See if the given TC is enabled for the given VSI */
1627 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1631 switch (vsi->type) {
1633 qcount = min_t(int, pf->rss_size, num_tc_qps);
1637 qcount = num_tc_qps;
1641 case I40E_VSI_SRIOV:
1642 case I40E_VSI_VMDQ2:
1644 qcount = num_tc_qps;
1648 vsi->tc_config.tc_info[i].qoffset = offset;
1649 vsi->tc_config.tc_info[i].qcount = qcount;
1651 /* find the next higher power-of-2 of num queue pairs */
1654 while (num_qps && (BIT_ULL(pow) < qcount)) {
1659 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1661 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1662 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1666 /* TC is not enabled so set the offset to
1667 * default queue and allocate one queue
1670 vsi->tc_config.tc_info[i].qoffset = 0;
1671 vsi->tc_config.tc_info[i].qcount = 1;
1672 vsi->tc_config.tc_info[i].netdev_tc = 0;
1676 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1679 /* Set actual Tx/Rx queue pairs */
1680 vsi->num_queue_pairs = offset;
1681 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1682 if (vsi->req_queue_pairs > 0)
1683 vsi->num_queue_pairs = vsi->req_queue_pairs;
1684 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1685 vsi->num_queue_pairs = pf->num_lan_msix;
1688 /* Scheduler section valid can only be set for ADD VSI */
1690 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1692 ctxt->info.up_enable_bits = enabled_tc;
1694 if (vsi->type == I40E_VSI_SRIOV) {
1695 ctxt->info.mapping_flags |=
1696 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1697 for (i = 0; i < vsi->num_queue_pairs; i++)
1698 ctxt->info.queue_mapping[i] =
1699 cpu_to_le16(vsi->base_queue + i);
1701 ctxt->info.mapping_flags |=
1702 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1703 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1705 ctxt->info.valid_sections |= cpu_to_le16(sections);
1709 * i40e_set_rx_mode - NDO callback to set the netdev filters
1710 * @netdev: network interface device structure
1713 void i40e_set_rx_mode(struct net_device *netdev)
1715 static void i40e_set_rx_mode(struct net_device *netdev)
1718 struct i40e_netdev_priv *np = netdev_priv(netdev);
1719 struct i40e_mac_filter *f, *ftmp;
1720 struct i40e_vsi *vsi = np->vsi;
1721 struct netdev_hw_addr *uca;
1722 struct netdev_hw_addr *mca;
1723 struct netdev_hw_addr *ha;
1725 spin_lock_bh(&vsi->mac_filter_list_lock);
1727 /* add addr if not already in the filter list */
1728 netdev_for_each_uc_addr(uca, netdev) {
1729 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1730 if (i40e_is_vsi_in_vlan(vsi))
1731 i40e_put_mac_in_vlan(vsi, uca->addr,
1734 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1739 netdev_for_each_mc_addr(mca, netdev) {
1740 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1741 if (i40e_is_vsi_in_vlan(vsi))
1742 i40e_put_mac_in_vlan(vsi, mca->addr,
1745 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1750 /* remove filter if not in netdev list */
1751 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1756 netdev_for_each_mc_addr(mca, netdev)
1757 if (ether_addr_equal(mca->addr, f->macaddr))
1758 goto bottom_of_search_loop;
1760 netdev_for_each_uc_addr(uca, netdev)
1761 if (ether_addr_equal(uca->addr, f->macaddr))
1762 goto bottom_of_search_loop;
1764 for_each_dev_addr(netdev, ha)
1765 if (ether_addr_equal(ha->addr, f->macaddr))
1766 goto bottom_of_search_loop;
1768 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1769 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1771 bottom_of_search_loop:
1774 spin_unlock_bh(&vsi->mac_filter_list_lock);
1776 /* check for other flag changes */
1777 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1778 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1779 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1784 * i40e_mac_filter_entry_clone - Clones a MAC filter entry
1785 * @src: source MAC filter entry to be clones
1787 * Returns the pointer to newly cloned MAC filter entry or NULL
1790 static struct i40e_mac_filter *i40e_mac_filter_entry_clone(
1791 struct i40e_mac_filter *src)
1793 struct i40e_mac_filter *f;
1795 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1800 INIT_LIST_HEAD(&f->list);
1806 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1807 * @vsi: pointer to vsi struct
1808 * @from: Pointer to list which contains MAC filter entries - changes to
1809 * those entries needs to be undone.
1811 * MAC filter entries from list were slated to be removed from device.
1813 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1814 struct list_head *from)
1816 struct i40e_mac_filter *f, *ftmp;
1818 list_for_each_entry_safe(f, ftmp, from, list) {
1820 /* Move the element back into MAC filter list*/
1821 list_move_tail(&f->list, &vsi->mac_filter_list);
1826 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1827 * @vsi: pointer to vsi struct
1829 * MAC filter entries from list were slated to be added from device.
1831 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi)
1833 struct i40e_mac_filter *f, *ftmp;
1835 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1836 if (!f->changed && f->counter)
1842 * i40e_cleanup_add_list - Deletes the element from add list and release
1844 * @add_list: Pointer to list which contains MAC filter entries
1846 static void i40e_cleanup_add_list(struct list_head *add_list)
1848 struct i40e_mac_filter *f, *ftmp;
1850 list_for_each_entry_safe(f, ftmp, add_list, list) {
1857 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1858 * @vsi: ptr to the VSI
1859 * @grab_rtnl: whether RTNL needs to be grabbed
1861 * Push any outstanding VSI filter changes through the AdminQ.
1863 * Returns 0 or error value
1865 int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl)
1867 struct list_head tmp_del_list, tmp_add_list;
1868 struct i40e_mac_filter *f, *ftmp, *fclone;
1869 bool promisc_forced_on = false;
1870 bool add_happened = false;
1871 int filter_list_len = 0;
1872 u32 changed_flags = 0;
1873 bool err_cond = false;
1874 i40e_status ret = 0;
1881 /* empty array typed pointers, kcalloc later */
1882 struct i40e_aqc_add_macvlan_element_data *add_list;
1883 struct i40e_aqc_remove_macvlan_element_data *del_list;
1885 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1886 usleep_range(1000, 2000);
1890 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1891 vsi->current_netdev_flags = vsi->netdev->flags;
1894 INIT_LIST_HEAD(&tmp_del_list);
1895 INIT_LIST_HEAD(&tmp_add_list);
1897 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1898 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1900 spin_lock_bh(&vsi->mac_filter_list_lock);
1901 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1905 if (f->counter != 0)
1909 /* Move the element into temporary del_list */
1910 list_move_tail(&f->list, &tmp_del_list);
1913 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1917 if (f->counter == 0)
1921 /* Clone MAC filter entry and add into temporary list */
1922 fclone = i40e_mac_filter_entry_clone(f);
1927 list_add_tail(&fclone->list, &tmp_add_list);
1930 /* if failed to clone MAC filter entry - undo */
1932 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1933 i40e_undo_add_filter_entries(vsi);
1935 spin_unlock_bh(&vsi->mac_filter_list_lock);
1938 i40e_cleanup_add_list(&tmp_add_list);
1941 /* Now process 'del_list' outside the lock */
1942 if (!list_empty(&tmp_del_list)) {
1943 filter_list_len = pf->hw.aq.asq_buf_size /
1944 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1945 del_list = kcalloc(filter_list_len,
1946 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1949 i40e_cleanup_add_list(&tmp_add_list);
1951 /* Undo VSI's MAC filter entry element updates */
1952 spin_lock_bh(&vsi->mac_filter_list_lock);
1953 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1954 i40e_undo_add_filter_entries(vsi);
1955 spin_unlock_bh(&vsi->mac_filter_list_lock);
1959 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1962 /* add to delete list */
1963 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1964 del_list[num_del].vlan_tag =
1965 cpu_to_le16((u16)(f->vlan ==
1966 I40E_VLAN_ANY ? 0 : f->vlan));
1968 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1969 del_list[num_del].flags = cmd_flags;
1972 /* flush a full buffer */
1973 if (num_del == filter_list_len) {
1974 ret = i40e_aq_remove_macvlan(&pf->hw,
1975 vsi->seid, del_list, num_del,
1977 aq_err = pf->hw.aq.asq_last_status;
1979 memset(del_list, 0, sizeof(*del_list));
1981 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1982 dev_err(&pf->pdev->dev,
1983 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1984 i40e_stat_str(&pf->hw, ret),
1985 i40e_aq_str(&pf->hw, aq_err));
1987 /* Release memory for MAC filter entries which were
1988 * synced up with HW.
1995 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1996 del_list, num_del, NULL);
1997 aq_err = pf->hw.aq.asq_last_status;
2000 if (ret && aq_err != I40E_AQ_RC_ENOENT)
2001 dev_info(&pf->pdev->dev,
2002 "ignoring delete macvlan error, err %s aq_err %s\n",
2003 i40e_stat_str(&pf->hw, ret),
2004 i40e_aq_str(&pf->hw, aq_err));
2011 if (!list_empty(&tmp_add_list)) {
2013 /* do all the adds now */
2014 filter_list_len = pf->hw.aq.asq_buf_size /
2015 sizeof(struct i40e_aqc_add_macvlan_element_data),
2016 add_list = kcalloc(filter_list_len,
2017 sizeof(struct i40e_aqc_add_macvlan_element_data),
2020 /* Purge element from temporary lists */
2021 i40e_cleanup_add_list(&tmp_add_list);
2023 /* Undo add filter entries from VSI MAC filter list */
2024 spin_lock_bh(&vsi->mac_filter_list_lock);
2025 i40e_undo_add_filter_entries(vsi);
2026 spin_unlock_bh(&vsi->mac_filter_list_lock);
2030 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2032 add_happened = true;
2035 /* add to add array */
2036 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
2037 add_list[num_add].vlan_tag =
2039 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
2040 add_list[num_add].queue_number = 0;
2042 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2043 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2046 /* flush a full buffer */
2047 if (num_add == filter_list_len) {
2048 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2051 aq_err = pf->hw.aq.asq_last_status;
2056 memset(add_list, 0, sizeof(*add_list));
2058 /* Entries from tmp_add_list were cloned from MAC
2059 * filter list, hence clean those cloned entries
2066 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2067 add_list, num_add, NULL);
2068 aq_err = pf->hw.aq.asq_last_status;
2074 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
2075 dev_info(&pf->pdev->dev,
2076 "add filter failed, err %s aq_err %s\n",
2077 i40e_stat_str(&pf->hw, ret),
2078 i40e_aq_str(&pf->hw, aq_err));
2079 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
2080 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2082 promisc_forced_on = true;
2083 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2085 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
2090 /* check for changes in promiscuous modes */
2091 if (changed_flags & IFF_ALLMULTI) {
2092 bool cur_multipromisc;
2094 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2095 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2100 dev_info(&pf->pdev->dev,
2101 "set multi promisc failed, err %s aq_err %s\n",
2102 i40e_stat_str(&pf->hw, ret),
2103 i40e_aq_str(&pf->hw,
2104 pf->hw.aq.asq_last_status));
2106 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
2109 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2110 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2112 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
2113 /* set defport ON for Main VSI instead of true promisc
2114 * this way we will get all unicast/multicast and VLAN
2115 * promisc behavior but will not get VF or VMDq traffic
2116 * replicated on the Main VSI.
2118 if (pf->cur_promisc != cur_promisc) {
2119 pf->cur_promisc = cur_promisc;
2121 i40e_do_reset_safe(pf,
2122 BIT(__I40E_PF_RESET_REQUESTED));
2125 BIT(__I40E_PF_RESET_REQUESTED));
2128 ret = i40e_aq_set_vsi_unicast_promiscuous(
2133 dev_info(&pf->pdev->dev,
2134 "set unicast promisc failed, err %d, aq_err %d\n",
2135 ret, pf->hw.aq.asq_last_status);
2136 ret = i40e_aq_set_vsi_multicast_promiscuous(
2141 dev_info(&pf->pdev->dev,
2142 "set multicast promisc failed, err %d, aq_err %d\n",
2143 ret, pf->hw.aq.asq_last_status);
2145 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2149 dev_info(&pf->pdev->dev,
2150 "set brdcast promisc failed, err %s, aq_err %s\n",
2151 i40e_stat_str(&pf->hw, ret),
2152 i40e_aq_str(&pf->hw,
2153 pf->hw.aq.asq_last_status));
2156 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2161 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2162 * @pf: board private structure
2164 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2168 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2170 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2172 for (v = 0; v < pf->num_alloc_vsi; v++) {
2174 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
2175 i40e_sync_vsi_filters(pf->vsi[v], true);
2180 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2181 * @netdev: network interface device structure
2182 * @new_mtu: new value for maximum frame size
2184 * Returns 0 on success, negative on failure
2186 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2188 struct i40e_netdev_priv *np = netdev_priv(netdev);
2189 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2190 struct i40e_vsi *vsi = np->vsi;
2192 /* MTU < 68 is an error and causes problems on some kernels */
2193 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2196 netdev_info(netdev, "changing MTU from %d to %d\n",
2197 netdev->mtu, new_mtu);
2198 netdev->mtu = new_mtu;
2199 if (netif_running(netdev))
2200 i40e_vsi_reinit_locked(vsi);
2206 * i40e_ioctl - Access the hwtstamp interface
2207 * @netdev: network interface device structure
2208 * @ifr: interface request data
2209 * @cmd: ioctl command
2211 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2213 struct i40e_netdev_priv *np = netdev_priv(netdev);
2214 struct i40e_pf *pf = np->vsi->back;
2218 return i40e_ptp_get_ts_config(pf, ifr);
2220 return i40e_ptp_set_ts_config(pf, ifr);
2227 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2228 * @vsi: the vsi being adjusted
2230 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2232 struct i40e_vsi_context ctxt;
2235 if ((vsi->info.valid_sections &
2236 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2237 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2238 return; /* already enabled */
2240 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2241 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2242 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2244 ctxt.seid = vsi->seid;
2245 ctxt.info = vsi->info;
2246 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2248 dev_info(&vsi->back->pdev->dev,
2249 "update vlan stripping failed, err %s aq_err %s\n",
2250 i40e_stat_str(&vsi->back->hw, ret),
2251 i40e_aq_str(&vsi->back->hw,
2252 vsi->back->hw.aq.asq_last_status));
2257 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2258 * @vsi: the vsi being adjusted
2260 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2262 struct i40e_vsi_context ctxt;
2265 if ((vsi->info.valid_sections &
2266 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2267 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2268 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2269 return; /* already disabled */
2271 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2272 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2273 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2275 ctxt.seid = vsi->seid;
2276 ctxt.info = vsi->info;
2277 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2279 dev_info(&vsi->back->pdev->dev,
2280 "update vlan stripping failed, err %s aq_err %s\n",
2281 i40e_stat_str(&vsi->back->hw, ret),
2282 i40e_aq_str(&vsi->back->hw,
2283 vsi->back->hw.aq.asq_last_status));
2288 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2289 * @netdev: network interface to be adjusted
2290 * @features: netdev features to test if VLAN offload is enabled or not
2292 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2294 struct i40e_netdev_priv *np = netdev_priv(netdev);
2295 struct i40e_vsi *vsi = np->vsi;
2297 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2298 i40e_vlan_stripping_enable(vsi);
2300 i40e_vlan_stripping_disable(vsi);
2304 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2305 * @vsi: the vsi being configured
2306 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2308 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2310 struct i40e_mac_filter *f, *add_f;
2311 bool is_netdev, is_vf;
2313 is_vf = (vsi->type == I40E_VSI_SRIOV);
2314 is_netdev = !!(vsi->netdev);
2316 /* Locked once because all functions invoked below iterates list*/
2317 spin_lock_bh(&vsi->mac_filter_list_lock);
2320 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2323 dev_info(&vsi->back->pdev->dev,
2324 "Could not add vlan filter %d for %pM\n",
2325 vid, vsi->netdev->dev_addr);
2326 spin_unlock_bh(&vsi->mac_filter_list_lock);
2331 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2332 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2334 dev_info(&vsi->back->pdev->dev,
2335 "Could not add vlan filter %d for %pM\n",
2337 spin_unlock_bh(&vsi->mac_filter_list_lock);
2342 /* Now if we add a vlan tag, make sure to check if it is the first
2343 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2344 * with 0, so we now accept untagged and specified tagged traffic
2345 * (and not any taged and untagged)
2348 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2350 is_vf, is_netdev)) {
2351 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2352 I40E_VLAN_ANY, is_vf, is_netdev);
2353 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2356 dev_info(&vsi->back->pdev->dev,
2357 "Could not add filter 0 for %pM\n",
2358 vsi->netdev->dev_addr);
2359 spin_unlock_bh(&vsi->mac_filter_list_lock);
2365 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2366 if (vid > 0 && !vsi->info.pvid) {
2367 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2368 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2371 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2373 add_f = i40e_add_filter(vsi, f->macaddr,
2374 0, is_vf, is_netdev);
2376 dev_info(&vsi->back->pdev->dev,
2377 "Could not add filter 0 for %pM\n",
2379 spin_unlock_bh(&vsi->mac_filter_list_lock);
2385 /* Make sure to release before sync_vsi_filter because that
2386 * function will lock/unlock as necessary
2388 spin_unlock_bh(&vsi->mac_filter_list_lock);
2390 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2391 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2394 return i40e_sync_vsi_filters(vsi, false);
2398 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2399 * @vsi: the vsi being configured
2400 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2402 * Return: 0 on success or negative otherwise
2404 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2406 struct net_device *netdev = vsi->netdev;
2407 struct i40e_mac_filter *f, *add_f;
2408 bool is_vf, is_netdev;
2409 int filter_count = 0;
2411 is_vf = (vsi->type == I40E_VSI_SRIOV);
2412 is_netdev = !!(netdev);
2414 /* Locked once because all functions invoked below iterates list */
2415 spin_lock_bh(&vsi->mac_filter_list_lock);
2418 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2420 list_for_each_entry(f, &vsi->mac_filter_list, list)
2421 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2423 /* go through all the filters for this VSI and if there is only
2424 * vid == 0 it means there are no other filters, so vid 0 must
2425 * be replaced with -1. This signifies that we should from now
2426 * on accept any traffic (with any tag present, or untagged)
2428 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2431 ether_addr_equal(netdev->dev_addr, f->macaddr))
2439 if (!filter_count && is_netdev) {
2440 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2441 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2444 dev_info(&vsi->back->pdev->dev,
2445 "Could not add filter %d for %pM\n",
2446 I40E_VLAN_ANY, netdev->dev_addr);
2447 spin_unlock_bh(&vsi->mac_filter_list_lock);
2452 if (!filter_count) {
2453 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2454 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2455 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2458 dev_info(&vsi->back->pdev->dev,
2459 "Could not add filter %d for %pM\n",
2460 I40E_VLAN_ANY, f->macaddr);
2461 spin_unlock_bh(&vsi->mac_filter_list_lock);
2467 /* Make sure to release before sync_vsi_filter because that
2468 * function with lock/unlock as necessary
2470 spin_unlock_bh(&vsi->mac_filter_list_lock);
2472 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2473 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2476 return i40e_sync_vsi_filters(vsi, false);
2480 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2481 * @netdev: network interface to be adjusted
2482 * @vid: vlan id to be added
2484 * net_device_ops implementation for adding vlan ids
2487 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2488 __always_unused __be16 proto, u16 vid)
2490 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2491 __always_unused __be16 proto, u16 vid)
2494 struct i40e_netdev_priv *np = netdev_priv(netdev);
2495 struct i40e_vsi *vsi = np->vsi;
2501 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2503 /* If the network stack called us with vid = 0 then
2504 * it is asking to receive priority tagged packets with
2505 * vlan id 0. Our HW receives them by default when configured
2506 * to receive untagged packets so there is no need to add an
2507 * extra filter for vlan 0 tagged packets.
2510 ret = i40e_vsi_add_vlan(vsi, vid);
2512 if (!ret && (vid < VLAN_N_VID))
2513 set_bit(vid, vsi->active_vlans);
2519 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2520 * @netdev: network interface to be adjusted
2521 * @vid: vlan id to be removed
2523 * net_device_ops implementation for removing vlan ids
2526 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2527 __always_unused __be16 proto, u16 vid)
2529 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2530 __always_unused __be16 proto, u16 vid)
2533 struct i40e_netdev_priv *np = netdev_priv(netdev);
2534 struct i40e_vsi *vsi = np->vsi;
2536 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2538 /* return code is ignored as there is nothing a user
2539 * can do about failure to remove and a log message was
2540 * already printed from the other function
2542 i40e_vsi_kill_vlan(vsi, vid);
2544 clear_bit(vid, vsi->active_vlans);
2550 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2551 * @vsi: the vsi being brought back up
2553 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2560 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2562 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2563 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2568 * i40e_vsi_add_pvid - Add pvid for the VSI
2569 * @vsi: the vsi being adjusted
2570 * @vid: the vlan id to set as a PVID
2572 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2574 struct i40e_vsi_context ctxt;
2577 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2578 vsi->info.pvid = cpu_to_le16(vid);
2579 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2580 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2581 I40E_AQ_VSI_PVLAN_EMOD_STR;
2583 ctxt.seid = vsi->seid;
2584 ctxt.info = vsi->info;
2585 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2587 dev_info(&vsi->back->pdev->dev,
2588 "add pvid failed, err %s aq_err %s\n",
2589 i40e_stat_str(&vsi->back->hw, ret),
2590 i40e_aq_str(&vsi->back->hw,
2591 vsi->back->hw.aq.asq_last_status));
2599 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2600 * @vsi: the vsi being adjusted
2602 * Just use the vlan_rx_register() service to put it back to normal
2604 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2606 i40e_vlan_stripping_disable(vsi);
2612 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2613 * @vsi: ptr to the VSI
2615 * If this function returns with an error, then it's possible one or
2616 * more of the rings is populated (while the rest are not). It is the
2617 * callers duty to clean those orphaned rings.
2619 * Return 0 on success, negative on failure
2621 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2625 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2626 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2632 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2633 * @vsi: ptr to the VSI
2635 * Free VSI's transmit software resources
2637 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2644 for (i = 0; i < vsi->num_queue_pairs; i++)
2645 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2646 i40e_free_tx_resources(vsi->tx_rings[i]);
2650 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2651 * @vsi: ptr to the VSI
2653 * If this function returns with an error, then it's possible one or
2654 * more of the rings is populated (while the rest are not). It is the
2655 * callers duty to clean those orphaned rings.
2657 * Return 0 on success, negative on failure
2659 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2663 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2664 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2666 i40e_fcoe_setup_ddp_resources(vsi);
2672 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2673 * @vsi: ptr to the VSI
2675 * Free all receive software resources
2677 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2684 for (i = 0; i < vsi->num_queue_pairs; i++)
2685 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2686 i40e_free_rx_resources(vsi->rx_rings[i]);
2688 i40e_fcoe_free_ddp_resources(vsi);
2693 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2694 * @ring: The Tx ring to configure
2696 * This enables/disables XPS for a given Tx descriptor ring
2697 * based on the TCs enabled for the VSI that ring belongs to.
2699 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2701 struct i40e_vsi *vsi = ring->vsi;
2704 if (!ring->q_vector || !ring->netdev)
2707 /* Single TC mode enable XPS */
2708 if (vsi->tc_config.numtc <= 1) {
2709 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2710 netif_set_xps_queue(ring->netdev,
2711 &ring->q_vector->affinity_mask,
2713 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2714 /* Disable XPS to allow selection based on TC */
2715 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2716 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2717 free_cpumask_var(mask);
2722 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2723 * @ring: The Tx ring to configure
2725 * Configure the Tx descriptor ring in the HMC context.
2727 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2729 struct i40e_vsi *vsi = ring->vsi;
2730 u16 pf_q = vsi->base_queue + ring->queue_index;
2731 struct i40e_hw *hw = &vsi->back->hw;
2732 struct i40e_hmc_obj_txq tx_ctx;
2733 i40e_status err = 0;
2736 /* some ATR related tx ring init */
2737 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2738 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2739 ring->atr_count = 0;
2741 ring->atr_sample_rate = 0;
2745 i40e_config_xps_tx_ring(ring);
2747 /* clear the context structure first */
2748 memset(&tx_ctx, 0, sizeof(tx_ctx));
2750 tx_ctx.new_context = 1;
2751 tx_ctx.base = (ring->dma / 128);
2752 tx_ctx.qlen = ring->count;
2753 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2754 I40E_FLAG_FD_ATR_ENABLED));
2756 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2758 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2759 /* FDIR VSI tx ring can still use RS bit and writebacks */
2760 if (vsi->type != I40E_VSI_FDIR)
2761 tx_ctx.head_wb_ena = 1;
2762 tx_ctx.head_wb_addr = ring->dma +
2763 (ring->count * sizeof(struct i40e_tx_desc));
2765 /* As part of VSI creation/update, FW allocates certain
2766 * Tx arbitration queue sets for each TC enabled for
2767 * the VSI. The FW returns the handles to these queue
2768 * sets as part of the response buffer to Add VSI,
2769 * Update VSI, etc. AQ commands. It is expected that
2770 * these queue set handles be associated with the Tx
2771 * queues by the driver as part of the TX queue context
2772 * initialization. This has to be done regardless of
2773 * DCB as by default everything is mapped to TC0.
2775 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2776 tx_ctx.rdylist_act = 0;
2778 /* clear the context in the HMC */
2779 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2781 dev_info(&vsi->back->pdev->dev,
2782 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2783 ring->queue_index, pf_q, err);
2787 /* set the context in the HMC */
2788 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2790 dev_info(&vsi->back->pdev->dev,
2791 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2792 ring->queue_index, pf_q, err);
2796 /* Now associate this queue with this PCI function */
2797 if (vsi->type == I40E_VSI_VMDQ2) {
2798 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2799 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2800 I40E_QTX_CTL_VFVM_INDX_MASK;
2802 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2805 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2806 I40E_QTX_CTL_PF_INDX_MASK);
2807 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2810 /* cache tail off for easier writes later */
2811 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2817 * i40e_configure_rx_ring - Configure a receive ring context
2818 * @ring: The Rx ring to configure
2820 * Configure the Rx descriptor ring in the HMC context.
2822 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2824 struct i40e_vsi *vsi = ring->vsi;
2825 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2826 u16 pf_q = vsi->base_queue + ring->queue_index;
2827 struct i40e_hw *hw = &vsi->back->hw;
2828 struct i40e_hmc_obj_rxq rx_ctx;
2829 i40e_status err = 0;
2833 /* clear the context structure first */
2834 memset(&rx_ctx, 0, sizeof(rx_ctx));
2836 ring->rx_buf_len = vsi->rx_buf_len;
2837 ring->rx_hdr_len = vsi->rx_hdr_len;
2839 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2840 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2842 rx_ctx.base = (ring->dma / 128);
2843 rx_ctx.qlen = ring->count;
2845 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2846 set_ring_16byte_desc_enabled(ring);
2852 rx_ctx.dtype = vsi->dtype;
2854 set_ring_ps_enabled(ring);
2855 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2857 I40E_RX_SPLIT_TCP_UDP |
2860 rx_ctx.hsplit_0 = 0;
2863 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2864 (chain_len * ring->rx_buf_len));
2865 if (hw->revision_id == 0)
2866 rx_ctx.lrxqthresh = 0;
2868 rx_ctx.lrxqthresh = 2;
2869 rx_ctx.crcstrip = 1;
2871 /* this controls whether VLAN is stripped from inner headers */
2874 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2876 /* set the prefena field to 1 because the manual says to */
2879 /* clear the context in the HMC */
2880 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2882 dev_info(&vsi->back->pdev->dev,
2883 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2884 ring->queue_index, pf_q, err);
2888 /* set the context in the HMC */
2889 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2891 dev_info(&vsi->back->pdev->dev,
2892 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2893 ring->queue_index, pf_q, err);
2897 /* cache tail for quicker writes, and clear the reg before use */
2898 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2899 writel(0, ring->tail);
2901 if (ring_is_ps_enabled(ring)) {
2902 i40e_alloc_rx_headers(ring);
2903 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2905 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2912 * i40e_vsi_configure_tx - Configure the VSI for Tx
2913 * @vsi: VSI structure describing this set of rings and resources
2915 * Configure the Tx VSI for operation.
2917 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2922 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2923 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2929 * i40e_vsi_configure_rx - Configure the VSI for Rx
2930 * @vsi: the VSI being configured
2932 * Configure the Rx VSI for operation.
2934 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2939 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2940 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2941 + ETH_FCS_LEN + VLAN_HLEN;
2943 vsi->max_frame = I40E_RXBUFFER_2048;
2945 /* figure out correct receive buffer length */
2946 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2947 I40E_FLAG_RX_PS_ENABLED)) {
2948 case I40E_FLAG_RX_1BUF_ENABLED:
2949 vsi->rx_hdr_len = 0;
2950 vsi->rx_buf_len = vsi->max_frame;
2951 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2953 case I40E_FLAG_RX_PS_ENABLED:
2954 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2955 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2956 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2959 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2960 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2961 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2966 /* setup rx buffer for FCoE */
2967 if ((vsi->type == I40E_VSI_FCOE) &&
2968 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2969 vsi->rx_hdr_len = 0;
2970 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2971 vsi->max_frame = I40E_RXBUFFER_3072;
2972 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2975 #endif /* I40E_FCOE */
2976 /* round up for the chip's needs */
2977 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2978 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2979 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2980 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2982 /* set up individual rings */
2983 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2984 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2990 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2991 * @vsi: ptr to the VSI
2993 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2995 struct i40e_ring *tx_ring, *rx_ring;
2996 u16 qoffset, qcount;
2999 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3000 /* Reset the TC information */
3001 for (i = 0; i < vsi->num_queue_pairs; i++) {
3002 rx_ring = vsi->rx_rings[i];
3003 tx_ring = vsi->tx_rings[i];
3004 rx_ring->dcb_tc = 0;
3005 tx_ring->dcb_tc = 0;
3009 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3010 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3013 qoffset = vsi->tc_config.tc_info[n].qoffset;
3014 qcount = vsi->tc_config.tc_info[n].qcount;
3015 for (i = qoffset; i < (qoffset + qcount); i++) {
3016 rx_ring = vsi->rx_rings[i];
3017 tx_ring = vsi->tx_rings[i];
3018 rx_ring->dcb_tc = n;
3019 tx_ring->dcb_tc = n;
3025 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3026 * @vsi: ptr to the VSI
3028 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3031 i40e_set_rx_mode(vsi->netdev);
3035 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3036 * @vsi: Pointer to the targeted VSI
3038 * This function replays the hlist on the hw where all the SB Flow Director
3039 * filters were saved.
3041 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3043 struct i40e_fdir_filter *filter;
3044 struct i40e_pf *pf = vsi->back;
3045 struct hlist_node *node;
3047 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3050 hlist_for_each_entry_safe(filter, node,
3051 &pf->fdir_filter_list, fdir_node) {
3052 i40e_add_del_fdir(vsi, filter, true);
3057 * i40e_vsi_configure - Set up the VSI for action
3058 * @vsi: the VSI being configured
3060 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3064 i40e_set_vsi_rx_mode(vsi);
3065 i40e_restore_vlan(vsi);
3066 i40e_vsi_config_dcb_rings(vsi);
3067 err = i40e_vsi_configure_tx(vsi);
3069 err = i40e_vsi_configure_rx(vsi);
3075 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3076 * @vsi: the VSI being configured
3078 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3080 struct i40e_pf *pf = vsi->back;
3081 struct i40e_hw *hw = &pf->hw;
3086 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3087 * and PFINT_LNKLSTn registers, e.g.:
3088 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3090 qp = vsi->base_queue;
3091 vector = vsi->base_vector;
3092 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3093 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3095 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3096 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3097 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3098 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3100 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3101 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3102 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3104 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3105 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3107 /* Linked list for the queuepairs assigned to this vector */
3108 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3109 for (q = 0; q < q_vector->num_ringpairs; q++) {
3112 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3113 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3114 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3115 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3117 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3119 wr32(hw, I40E_QINT_RQCTL(qp), val);
3121 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3122 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3123 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3124 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3126 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3128 /* Terminate the linked list */
3129 if (q == (q_vector->num_ringpairs - 1))
3130 val |= (I40E_QUEUE_END_OF_LIST
3131 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3133 wr32(hw, I40E_QINT_TQCTL(qp), val);
3142 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3143 * @hw: ptr to the hardware info
3145 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3147 struct i40e_hw *hw = &pf->hw;
3150 /* clear things first */
3151 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3152 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3154 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3155 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3156 I40E_PFINT_ICR0_ENA_GRST_MASK |
3157 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3158 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3159 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3160 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3161 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3163 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3164 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3166 if (pf->flags & I40E_FLAG_PTP)
3167 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3169 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3171 /* SW_ITR_IDX = 0, but don't change INTENA */
3172 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3173 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3175 /* OTHER_ITR_IDX = 0 */
3176 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3180 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3181 * @vsi: the VSI being configured
3183 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3185 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3186 struct i40e_pf *pf = vsi->back;
3187 struct i40e_hw *hw = &pf->hw;
3190 /* set the ITR configuration */
3191 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3192 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3193 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3194 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3195 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3196 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3197 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3199 i40e_enable_misc_int_causes(pf);
3201 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3202 wr32(hw, I40E_PFINT_LNKLST0, 0);
3204 /* Associate the queue pair to the vector and enable the queue int */
3205 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3206 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3207 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3209 wr32(hw, I40E_QINT_RQCTL(0), val);
3211 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3212 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3213 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3215 wr32(hw, I40E_QINT_TQCTL(0), val);
3220 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3221 * @pf: board private structure
3223 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3225 struct i40e_hw *hw = &pf->hw;
3227 wr32(hw, I40E_PFINT_DYN_CTL0,
3228 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3233 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3234 * @pf: board private structure
3236 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3238 struct i40e_hw *hw = &pf->hw;
3241 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3242 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3243 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3245 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3250 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3251 * @vsi: pointer to a vsi
3252 * @vector: disable a particular Hw Interrupt vector
3254 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3256 struct i40e_pf *pf = vsi->back;
3257 struct i40e_hw *hw = &pf->hw;
3260 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3261 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3266 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3267 * @irq: interrupt number
3268 * @data: pointer to a q_vector
3270 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3272 struct i40e_q_vector *q_vector = data;
3274 if (!q_vector->tx.ring && !q_vector->rx.ring)
3277 napi_schedule_irqoff(&q_vector->napi);
3283 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3284 * @vsi: the VSI being configured
3285 * @basename: name for the vector
3287 * Allocates MSI-X vectors and requests interrupts from the kernel.
3289 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3291 int q_vectors = vsi->num_q_vectors;
3292 struct i40e_pf *pf = vsi->back;
3293 int base = vsi->base_vector;
3298 for (vector = 0; vector < q_vectors; vector++) {
3299 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3301 if (q_vector->tx.ring && q_vector->rx.ring) {
3302 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3303 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3305 } else if (q_vector->rx.ring) {
3306 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3307 "%s-%s-%d", basename, "rx", rx_int_idx++);
3308 } else if (q_vector->tx.ring) {
3309 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3310 "%s-%s-%d", basename, "tx", tx_int_idx++);
3312 /* skip this unused q_vector */
3315 err = request_irq(pf->msix_entries[base + vector].vector,
3321 dev_info(&pf->pdev->dev,
3322 "MSIX request_irq failed, error: %d\n", err);
3323 goto free_queue_irqs;
3325 /* assign the mask for this irq */
3326 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3327 &q_vector->affinity_mask);
3330 vsi->irqs_ready = true;
3336 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3338 free_irq(pf->msix_entries[base + vector].vector,
3339 &(vsi->q_vectors[vector]));
3345 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3346 * @vsi: the VSI being un-configured
3348 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3350 struct i40e_pf *pf = vsi->back;
3351 struct i40e_hw *hw = &pf->hw;
3352 int base = vsi->base_vector;
3355 for (i = 0; i < vsi->num_queue_pairs; i++) {
3356 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3357 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3360 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3361 for (i = vsi->base_vector;
3362 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3363 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3366 for (i = 0; i < vsi->num_q_vectors; i++)
3367 synchronize_irq(pf->msix_entries[i + base].vector);
3369 /* Legacy and MSI mode - this stops all interrupt handling */
3370 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3371 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3373 synchronize_irq(pf->pdev->irq);
3378 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3379 * @vsi: the VSI being configured
3381 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3383 struct i40e_pf *pf = vsi->back;
3386 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3387 for (i = 0; i < vsi->num_q_vectors; i++)
3388 i40e_irq_dynamic_enable(vsi, i);
3390 i40e_irq_dynamic_enable_icr0(pf);
3393 i40e_flush(&pf->hw);
3398 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3399 * @pf: board private structure
3401 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3404 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3405 i40e_flush(&pf->hw);
3409 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3410 * @irq: interrupt number
3411 * @data: pointer to a q_vector
3413 * This is the handler used for all MSI/Legacy interrupts, and deals
3414 * with both queue and non-queue interrupts. This is also used in
3415 * MSIX mode to handle the non-queue interrupts.
3417 static irqreturn_t i40e_intr(int irq, void *data)
3419 struct i40e_pf *pf = (struct i40e_pf *)data;
3420 struct i40e_hw *hw = &pf->hw;
3421 irqreturn_t ret = IRQ_NONE;
3422 u32 icr0, icr0_remaining;
3425 icr0 = rd32(hw, I40E_PFINT_ICR0);
3426 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3428 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3429 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3432 /* if interrupt but no bits showing, must be SWINT */
3433 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3434 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3437 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3438 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3439 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3440 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3441 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3444 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3445 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3446 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3447 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3449 /* temporarily disable queue cause for NAPI processing */
3450 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3452 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3453 wr32(hw, I40E_QINT_RQCTL(0), qval);
3455 qval = rd32(hw, I40E_QINT_TQCTL(0));
3456 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3457 wr32(hw, I40E_QINT_TQCTL(0), qval);
3459 if (!test_bit(__I40E_DOWN, &pf->state))
3460 napi_schedule_irqoff(&q_vector->napi);
3463 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3464 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3465 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3468 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3469 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3470 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3473 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3474 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3475 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3478 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3479 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3480 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3481 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3482 val = rd32(hw, I40E_GLGEN_RSTAT);
3483 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3484 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3485 if (val == I40E_RESET_CORER) {
3487 } else if (val == I40E_RESET_GLOBR) {
3489 } else if (val == I40E_RESET_EMPR) {
3491 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3495 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3496 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3497 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3498 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3499 rd32(hw, I40E_PFHMC_ERRORINFO),
3500 rd32(hw, I40E_PFHMC_ERRORDATA));
3503 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3504 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3506 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3507 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3508 i40e_ptp_tx_hwtstamp(pf);
3512 /* If a critical error is pending we have no choice but to reset the
3514 * Report and mask out any remaining unexpected interrupts.
3516 icr0_remaining = icr0 & ena_mask;
3517 if (icr0_remaining) {
3518 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3520 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3521 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3522 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3523 dev_info(&pf->pdev->dev, "device will be reset\n");
3524 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3525 i40e_service_event_schedule(pf);
3527 ena_mask &= ~icr0_remaining;
3532 /* re-enable interrupt causes */
3533 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3534 if (!test_bit(__I40E_DOWN, &pf->state)) {
3535 i40e_service_event_schedule(pf);
3536 i40e_irq_dynamic_enable_icr0(pf);
3543 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3544 * @tx_ring: tx ring to clean
3545 * @budget: how many cleans we're allowed
3547 * Returns true if there's any budget left (e.g. the clean is finished)
3549 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3551 struct i40e_vsi *vsi = tx_ring->vsi;
3552 u16 i = tx_ring->next_to_clean;
3553 struct i40e_tx_buffer *tx_buf;
3554 struct i40e_tx_desc *tx_desc;
3556 tx_buf = &tx_ring->tx_bi[i];
3557 tx_desc = I40E_TX_DESC(tx_ring, i);
3558 i -= tx_ring->count;
3561 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3563 /* if next_to_watch is not set then there is no work pending */
3567 /* prevent any other reads prior to eop_desc */
3568 read_barrier_depends();
3570 /* if the descriptor isn't done, no work yet to do */
3571 if (!(eop_desc->cmd_type_offset_bsz &
3572 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3575 /* clear next_to_watch to prevent false hangs */
3576 tx_buf->next_to_watch = NULL;
3578 tx_desc->buffer_addr = 0;
3579 tx_desc->cmd_type_offset_bsz = 0;
3580 /* move past filter desc */
3585 i -= tx_ring->count;
3586 tx_buf = tx_ring->tx_bi;
3587 tx_desc = I40E_TX_DESC(tx_ring, 0);
3589 /* unmap skb header data */
3590 dma_unmap_single(tx_ring->dev,
3591 dma_unmap_addr(tx_buf, dma),
3592 dma_unmap_len(tx_buf, len),
3594 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3595 kfree(tx_buf->raw_buf);
3597 tx_buf->raw_buf = NULL;
3598 tx_buf->tx_flags = 0;
3599 tx_buf->next_to_watch = NULL;
3600 dma_unmap_len_set(tx_buf, len, 0);
3601 tx_desc->buffer_addr = 0;
3602 tx_desc->cmd_type_offset_bsz = 0;
3604 /* move us past the eop_desc for start of next FD desc */
3609 i -= tx_ring->count;
3610 tx_buf = tx_ring->tx_bi;
3611 tx_desc = I40E_TX_DESC(tx_ring, 0);
3614 /* update budget accounting */
3616 } while (likely(budget));
3618 i += tx_ring->count;
3619 tx_ring->next_to_clean = i;
3621 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3622 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3628 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3629 * @irq: interrupt number
3630 * @data: pointer to a q_vector
3632 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3634 struct i40e_q_vector *q_vector = data;
3635 struct i40e_vsi *vsi;
3637 if (!q_vector->tx.ring)
3640 vsi = q_vector->tx.ring->vsi;
3641 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3647 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3648 * @vsi: the VSI being configured
3649 * @v_idx: vector index
3650 * @qp_idx: queue pair index
3652 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3654 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3655 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3656 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3658 tx_ring->q_vector = q_vector;
3659 tx_ring->next = q_vector->tx.ring;
3660 q_vector->tx.ring = tx_ring;
3661 q_vector->tx.count++;
3663 rx_ring->q_vector = q_vector;
3664 rx_ring->next = q_vector->rx.ring;
3665 q_vector->rx.ring = rx_ring;
3666 q_vector->rx.count++;
3670 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3671 * @vsi: the VSI being configured
3673 * This function maps descriptor rings to the queue-specific vectors
3674 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3675 * one vector per queue pair, but on a constrained vector budget, we
3676 * group the queue pairs as "efficiently" as possible.
3678 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3680 int qp_remaining = vsi->num_queue_pairs;
3681 int q_vectors = vsi->num_q_vectors;
3686 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3687 * group them so there are multiple queues per vector.
3688 * It is also important to go through all the vectors available to be
3689 * sure that if we don't use all the vectors, that the remaining vectors
3690 * are cleared. This is especially important when decreasing the
3691 * number of queues in use.
3693 for (; v_start < q_vectors; v_start++) {
3694 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3696 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3698 q_vector->num_ringpairs = num_ringpairs;
3700 q_vector->rx.count = 0;
3701 q_vector->tx.count = 0;
3702 q_vector->rx.ring = NULL;
3703 q_vector->tx.ring = NULL;
3705 while (num_ringpairs--) {
3706 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3714 * i40e_vsi_request_irq - Request IRQ from the OS
3715 * @vsi: the VSI being configured
3716 * @basename: name for the vector
3718 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3720 struct i40e_pf *pf = vsi->back;
3723 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3724 err = i40e_vsi_request_irq_msix(vsi, basename);
3725 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3726 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3729 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3733 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3738 #ifdef CONFIG_NET_POLL_CONTROLLER
3740 * i40e_netpoll - A Polling 'interrupt'handler
3741 * @netdev: network interface device structure
3743 * This is used by netconsole to send skbs without having to re-enable
3744 * interrupts. It's not called while the normal interrupt routine is executing.
3747 void i40e_netpoll(struct net_device *netdev)
3749 static void i40e_netpoll(struct net_device *netdev)
3752 struct i40e_netdev_priv *np = netdev_priv(netdev);
3753 struct i40e_vsi *vsi = np->vsi;
3754 struct i40e_pf *pf = vsi->back;
3757 /* if interface is down do nothing */
3758 if (test_bit(__I40E_DOWN, &vsi->state))
3761 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3762 for (i = 0; i < vsi->num_q_vectors; i++)
3763 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3765 i40e_intr(pf->pdev->irq, netdev);
3771 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3772 * @pf: the PF being configured
3773 * @pf_q: the PF queue
3774 * @enable: enable or disable state of the queue
3776 * This routine will wait for the given Tx queue of the PF to reach the
3777 * enabled or disabled state.
3778 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3779 * multiple retries; else will return 0 in case of success.
3781 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3786 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3787 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3788 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3791 usleep_range(10, 20);
3793 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3800 * i40e_vsi_control_tx - Start or stop a VSI's rings
3801 * @vsi: the VSI being configured
3802 * @enable: start or stop the rings
3804 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3806 struct i40e_pf *pf = vsi->back;
3807 struct i40e_hw *hw = &pf->hw;
3808 int i, j, pf_q, ret = 0;
3811 pf_q = vsi->base_queue;
3812 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3814 /* warn the TX unit of coming changes */
3815 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3817 usleep_range(10, 20);
3819 for (j = 0; j < 50; j++) {
3820 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3821 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3822 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3824 usleep_range(1000, 2000);
3826 /* Skip if the queue is already in the requested state */
3827 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3830 /* turn on/off the queue */
3832 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3833 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3835 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3838 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3839 /* No waiting for the Tx queue to disable */
3840 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3843 /* wait for the change to finish */
3844 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3846 dev_info(&pf->pdev->dev,
3847 "VSI seid %d Tx ring %d %sable timeout\n",
3848 vsi->seid, pf_q, (enable ? "en" : "dis"));
3853 if (hw->revision_id == 0)
3859 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3860 * @pf: the PF being configured
3861 * @pf_q: the PF queue
3862 * @enable: enable or disable state of the queue
3864 * This routine will wait for the given Rx queue of the PF to reach the
3865 * enabled or disabled state.
3866 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3867 * multiple retries; else will return 0 in case of success.
3869 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3874 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3875 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3876 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3879 usleep_range(10, 20);
3881 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3888 * i40e_vsi_control_rx - Start or stop a VSI's rings
3889 * @vsi: the VSI being configured
3890 * @enable: start or stop the rings
3892 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3894 struct i40e_pf *pf = vsi->back;
3895 struct i40e_hw *hw = &pf->hw;
3896 int i, j, pf_q, ret = 0;
3899 pf_q = vsi->base_queue;
3900 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3901 for (j = 0; j < 50; j++) {
3902 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3903 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3904 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3906 usleep_range(1000, 2000);
3909 /* Skip if the queue is already in the requested state */
3910 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3913 /* turn on/off the queue */
3915 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3917 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3918 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3920 /* wait for the change to finish */
3921 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3923 dev_info(&pf->pdev->dev,
3924 "VSI seid %d Rx ring %d %sable timeout\n",
3925 vsi->seid, pf_q, (enable ? "en" : "dis"));
3934 * i40e_vsi_control_rings - Start or stop a VSI's rings
3935 * @vsi: the VSI being configured
3936 * @enable: start or stop the rings
3938 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3942 /* do rx first for enable and last for disable */
3944 ret = i40e_vsi_control_rx(vsi, request);
3947 ret = i40e_vsi_control_tx(vsi, request);
3949 /* Ignore return value, we need to shutdown whatever we can */
3950 i40e_vsi_control_tx(vsi, request);
3951 i40e_vsi_control_rx(vsi, request);
3958 * i40e_vsi_free_irq - Free the irq association with the OS
3959 * @vsi: the VSI being configured
3961 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3963 struct i40e_pf *pf = vsi->back;
3964 struct i40e_hw *hw = &pf->hw;
3965 int base = vsi->base_vector;
3969 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3970 if (!vsi->q_vectors)
3973 if (!vsi->irqs_ready)
3976 vsi->irqs_ready = false;
3977 for (i = 0; i < vsi->num_q_vectors; i++) {
3978 u16 vector = i + base;
3980 /* free only the irqs that were actually requested */
3981 if (!vsi->q_vectors[i] ||
3982 !vsi->q_vectors[i]->num_ringpairs)
3985 /* clear the affinity_mask in the IRQ descriptor */
3986 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3988 free_irq(pf->msix_entries[vector].vector,
3991 /* Tear down the interrupt queue link list
3993 * We know that they come in pairs and always
3994 * the Rx first, then the Tx. To clear the
3995 * link list, stick the EOL value into the
3996 * next_q field of the registers.
3998 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3999 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4000 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4001 val |= I40E_QUEUE_END_OF_LIST
4002 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4003 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4005 while (qp != I40E_QUEUE_END_OF_LIST) {
4008 val = rd32(hw, I40E_QINT_RQCTL(qp));
4010 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4011 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4012 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4013 I40E_QINT_RQCTL_INTEVENT_MASK);
4015 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4016 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4018 wr32(hw, I40E_QINT_RQCTL(qp), val);
4020 val = rd32(hw, I40E_QINT_TQCTL(qp));
4022 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4023 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4025 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4026 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4027 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4028 I40E_QINT_TQCTL_INTEVENT_MASK);
4030 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4031 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4033 wr32(hw, I40E_QINT_TQCTL(qp), val);
4038 free_irq(pf->pdev->irq, pf);
4040 val = rd32(hw, I40E_PFINT_LNKLST0);
4041 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4042 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4043 val |= I40E_QUEUE_END_OF_LIST
4044 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4045 wr32(hw, I40E_PFINT_LNKLST0, val);
4047 val = rd32(hw, I40E_QINT_RQCTL(qp));
4048 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4049 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4050 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4051 I40E_QINT_RQCTL_INTEVENT_MASK);
4053 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4054 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4056 wr32(hw, I40E_QINT_RQCTL(qp), val);
4058 val = rd32(hw, I40E_QINT_TQCTL(qp));
4060 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4061 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4062 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4063 I40E_QINT_TQCTL_INTEVENT_MASK);
4065 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4066 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4068 wr32(hw, I40E_QINT_TQCTL(qp), val);
4073 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4074 * @vsi: the VSI being configured
4075 * @v_idx: Index of vector to be freed
4077 * This function frees the memory allocated to the q_vector. In addition if
4078 * NAPI is enabled it will delete any references to the NAPI struct prior
4079 * to freeing the q_vector.
4081 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4083 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4084 struct i40e_ring *ring;
4089 /* disassociate q_vector from rings */
4090 i40e_for_each_ring(ring, q_vector->tx)
4091 ring->q_vector = NULL;
4093 i40e_for_each_ring(ring, q_vector->rx)
4094 ring->q_vector = NULL;
4096 /* only VSI w/ an associated netdev is set up w/ NAPI */
4098 netif_napi_del(&q_vector->napi);
4100 vsi->q_vectors[v_idx] = NULL;
4102 kfree_rcu(q_vector, rcu);
4106 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4107 * @vsi: the VSI being un-configured
4109 * This frees the memory allocated to the q_vectors and
4110 * deletes references to the NAPI struct.
4112 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4116 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4117 i40e_free_q_vector(vsi, v_idx);
4121 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4122 * @pf: board private structure
4124 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4126 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4127 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4128 pci_disable_msix(pf->pdev);
4129 kfree(pf->msix_entries);
4130 pf->msix_entries = NULL;
4131 kfree(pf->irq_pile);
4132 pf->irq_pile = NULL;
4133 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4134 pci_disable_msi(pf->pdev);
4136 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4140 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4141 * @pf: board private structure
4143 * We go through and clear interrupt specific resources and reset the structure
4144 * to pre-load conditions
4146 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4150 i40e_stop_misc_vector(pf);
4151 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4152 synchronize_irq(pf->msix_entries[0].vector);
4153 free_irq(pf->msix_entries[0].vector, pf);
4156 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4157 for (i = 0; i < pf->num_alloc_vsi; i++)
4159 i40e_vsi_free_q_vectors(pf->vsi[i]);
4160 i40e_reset_interrupt_capability(pf);
4164 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4165 * @vsi: the VSI being configured
4167 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4174 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4175 napi_enable(&vsi->q_vectors[q_idx]->napi);
4179 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4180 * @vsi: the VSI being configured
4182 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4189 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4190 napi_disable(&vsi->q_vectors[q_idx]->napi);
4194 * i40e_vsi_close - Shut down a VSI
4195 * @vsi: the vsi to be quelled
4197 static void i40e_vsi_close(struct i40e_vsi *vsi)
4199 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4201 i40e_vsi_free_irq(vsi);
4202 i40e_vsi_free_tx_resources(vsi);
4203 i40e_vsi_free_rx_resources(vsi);
4204 vsi->current_netdev_flags = 0;
4208 * i40e_quiesce_vsi - Pause a given VSI
4209 * @vsi: the VSI being paused
4211 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4213 if (test_bit(__I40E_DOWN, &vsi->state))
4216 /* No need to disable FCoE VSI when Tx suspended */
4217 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4218 vsi->type == I40E_VSI_FCOE) {
4219 dev_dbg(&vsi->back->pdev->dev,
4220 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4224 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4225 if (vsi->netdev && netif_running(vsi->netdev))
4226 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4228 i40e_vsi_close(vsi);
4232 * i40e_unquiesce_vsi - Resume a given VSI
4233 * @vsi: the VSI being resumed
4235 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4237 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4240 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4241 if (vsi->netdev && netif_running(vsi->netdev))
4242 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4244 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4248 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4251 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4255 for (v = 0; v < pf->num_alloc_vsi; v++) {
4257 i40e_quiesce_vsi(pf->vsi[v]);
4262 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4265 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4269 for (v = 0; v < pf->num_alloc_vsi; v++) {
4271 i40e_unquiesce_vsi(pf->vsi[v]);
4275 #ifdef CONFIG_I40E_DCB
4277 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4278 * @vsi: the VSI being configured
4280 * This function waits for the given VSI's Tx queues to be disabled.
4282 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4284 struct i40e_pf *pf = vsi->back;
4287 pf_q = vsi->base_queue;
4288 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4289 /* Check and wait for the disable status of the queue */
4290 ret = i40e_pf_txq_wait(pf, pf_q, false);
4292 dev_info(&pf->pdev->dev,
4293 "VSI seid %d Tx ring %d disable timeout\n",
4303 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4306 * This function waits for the Tx queues to be in disabled state for all the
4307 * VSIs that are managed by this PF.
4309 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4313 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4314 /* No need to wait for FCoE VSI queues */
4315 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4316 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4328 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4329 * @q_idx: TX queue number
4330 * @vsi: Pointer to VSI struct
4332 * This function checks specified queue for given VSI. Detects hung condition.
4333 * Sets hung bit since it is two step process. Before next run of service task
4334 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4335 * hung condition remain unchanged and during subsequent run, this function
4336 * issues SW interrupt to recover from hung condition.
4338 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4340 struct i40e_ring *tx_ring = NULL;
4342 u32 head, val, tx_pending;
4347 /* now that we have an index, find the tx_ring struct */
4348 for (i = 0; i < vsi->num_queue_pairs; i++) {
4349 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4350 if (q_idx == vsi->tx_rings[i]->queue_index) {
4351 tx_ring = vsi->tx_rings[i];
4360 /* Read interrupt register */
4361 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4363 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4364 tx_ring->vsi->base_vector - 1));
4366 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4368 head = i40e_get_head(tx_ring);
4370 tx_pending = i40e_get_tx_pending(tx_ring);
4372 /* Interrupts are disabled and TX pending is non-zero,
4373 * trigger the SW interrupt (don't wait). Worst case
4374 * there will be one extra interrupt which may result
4375 * into not cleaning any queues because queues are cleaned.
4377 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4378 i40e_force_wb(vsi, tx_ring->q_vector);
4382 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4383 * @pf: pointer to PF struct
4385 * LAN VSI has netdev and netdev has TX queues. This function is to check
4386 * each of those TX queues if they are hung, trigger recovery by issuing
4389 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4391 struct net_device *netdev;
4392 struct i40e_vsi *vsi;
4395 /* Only for LAN VSI */
4396 vsi = pf->vsi[pf->lan_vsi];
4401 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4402 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4403 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4406 /* Make sure type is MAIN VSI */
4407 if (vsi->type != I40E_VSI_MAIN)
4410 netdev = vsi->netdev;
4414 /* Bail out if netif_carrier is not OK */
4415 if (!netif_carrier_ok(netdev))
4418 /* Go thru' TX queues for netdev */
4419 for (i = 0; i < netdev->num_tx_queues; i++) {
4420 struct netdev_queue *q;
4422 q = netdev_get_tx_queue(netdev, i);
4424 i40e_detect_recover_hung_queue(i, vsi);
4429 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4430 * @pf: pointer to PF
4432 * Get TC map for ISCSI PF type that will include iSCSI TC
4435 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4437 struct i40e_dcb_app_priority_table app;
4438 struct i40e_hw *hw = &pf->hw;
4439 u8 enabled_tc = 1; /* TC0 is always enabled */
4441 /* Get the iSCSI APP TLV */
4442 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4444 for (i = 0; i < dcbcfg->numapps; i++) {
4445 app = dcbcfg->app[i];
4446 if (app.selector == I40E_APP_SEL_TCPIP &&
4447 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4448 tc = dcbcfg->etscfg.prioritytable[app.priority];
4449 enabled_tc |= BIT_ULL(tc);
4458 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4459 * @dcbcfg: the corresponding DCBx configuration structure
4461 * Return the number of TCs from given DCBx configuration
4463 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4468 /* Scan the ETS Config Priority Table to find
4469 * traffic class enabled for a given priority
4470 * and use the traffic class index to get the
4471 * number of traffic classes enabled
4473 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4474 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4475 num_tc = dcbcfg->etscfg.prioritytable[i];
4478 /* Traffic class index starts from zero so
4479 * increment to return the actual count
4485 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4486 * @dcbcfg: the corresponding DCBx configuration structure
4488 * Query the current DCB configuration and return the number of
4489 * traffic classes enabled from the given DCBX config
4491 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4493 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4497 for (i = 0; i < num_tc; i++)
4498 enabled_tc |= BIT(i);
4504 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4505 * @pf: PF being queried
4507 * Return number of traffic classes enabled for the given PF
4509 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4511 struct i40e_hw *hw = &pf->hw;
4514 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4516 /* If DCB is not enabled then always in single TC */
4517 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4520 /* SFP mode will be enabled for all TCs on port */
4521 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4522 return i40e_dcb_get_num_tc(dcbcfg);
4524 /* MFP mode return count of enabled TCs for this PF */
4525 if (pf->hw.func_caps.iscsi)
4526 enabled_tc = i40e_get_iscsi_tc_map(pf);
4528 return 1; /* Only TC0 */
4530 /* At least have TC0 */
4531 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4532 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4533 if (enabled_tc & BIT_ULL(i))
4540 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4541 * @pf: PF being queried
4543 * Return a bitmap for first enabled traffic class for this PF.
4545 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4547 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4551 return 0x1; /* TC0 */
4553 /* Find the first enabled TC */
4554 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4555 if (enabled_tc & BIT_ULL(i))
4563 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4564 * @pf: PF being queried
4566 * Return a bitmap for enabled traffic classes for this PF.
4568 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4570 /* If DCB is not enabled for this PF then just return default TC */
4571 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4572 return i40e_pf_get_default_tc(pf);
4574 /* SFP mode we want PF to be enabled for all TCs */
4575 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4576 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4578 /* MFP enabled and iSCSI PF type */
4579 if (pf->hw.func_caps.iscsi)
4580 return i40e_get_iscsi_tc_map(pf);
4582 return i40e_pf_get_default_tc(pf);
4586 * i40e_vsi_get_bw_info - Query VSI BW Information
4587 * @vsi: the VSI being queried
4589 * Returns 0 on success, negative value on failure
4591 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4593 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4594 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4595 struct i40e_pf *pf = vsi->back;
4596 struct i40e_hw *hw = &pf->hw;
4601 /* Get the VSI level BW configuration */
4602 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4604 dev_info(&pf->pdev->dev,
4605 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4606 i40e_stat_str(&pf->hw, ret),
4607 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4611 /* Get the VSI level BW configuration per TC */
4612 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4615 dev_info(&pf->pdev->dev,
4616 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4617 i40e_stat_str(&pf->hw, ret),
4618 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4622 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4623 dev_info(&pf->pdev->dev,
4624 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4625 bw_config.tc_valid_bits,
4626 bw_ets_config.tc_valid_bits);
4627 /* Still continuing */
4630 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4631 vsi->bw_max_quanta = bw_config.max_bw;
4632 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4633 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4634 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4635 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4636 vsi->bw_ets_limit_credits[i] =
4637 le16_to_cpu(bw_ets_config.credits[i]);
4638 /* 3 bits out of 4 for each TC */
4639 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4646 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4647 * @vsi: the VSI being configured
4648 * @enabled_tc: TC bitmap
4649 * @bw_credits: BW shared credits per TC
4651 * Returns 0 on success, negative value on failure
4653 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4656 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4660 bw_data.tc_valid_bits = enabled_tc;
4661 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4662 bw_data.tc_bw_credits[i] = bw_share[i];
4664 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4667 dev_info(&vsi->back->pdev->dev,
4668 "AQ command Config VSI BW allocation per TC failed = %d\n",
4669 vsi->back->hw.aq.asq_last_status);
4673 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4674 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4680 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4681 * @vsi: the VSI being configured
4682 * @enabled_tc: TC map to be enabled
4685 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4687 struct net_device *netdev = vsi->netdev;
4688 struct i40e_pf *pf = vsi->back;
4689 struct i40e_hw *hw = &pf->hw;
4692 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4698 netdev_reset_tc(netdev);
4702 /* Set up actual enabled TCs on the VSI */
4703 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4706 /* set per TC queues for the VSI */
4707 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4708 /* Only set TC queues for enabled tcs
4710 * e.g. For a VSI that has TC0 and TC3 enabled the
4711 * enabled_tc bitmap would be 0x00001001; the driver
4712 * will set the numtc for netdev as 2 that will be
4713 * referenced by the netdev layer as TC 0 and 1.
4715 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4716 netdev_set_tc_queue(netdev,
4717 vsi->tc_config.tc_info[i].netdev_tc,
4718 vsi->tc_config.tc_info[i].qcount,
4719 vsi->tc_config.tc_info[i].qoffset);
4722 /* Assign UP2TC map for the VSI */
4723 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4724 /* Get the actual TC# for the UP */
4725 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4726 /* Get the mapped netdev TC# for the UP */
4727 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4728 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4733 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4734 * @vsi: the VSI being configured
4735 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4737 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4738 struct i40e_vsi_context *ctxt)
4740 /* copy just the sections touched not the entire info
4741 * since not all sections are valid as returned by
4744 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4745 memcpy(&vsi->info.queue_mapping,
4746 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4747 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4748 sizeof(vsi->info.tc_mapping));
4752 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4753 * @vsi: VSI to be configured
4754 * @enabled_tc: TC bitmap
4756 * This configures a particular VSI for TCs that are mapped to the
4757 * given TC bitmap. It uses default bandwidth share for TCs across
4758 * VSIs to configure TC for a particular VSI.
4761 * It is expected that the VSI queues have been quisced before calling
4764 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4766 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4767 struct i40e_vsi_context ctxt;
4771 /* Check if enabled_tc is same as existing or new TCs */
4772 if (vsi->tc_config.enabled_tc == enabled_tc)
4775 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4776 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4777 if (enabled_tc & BIT_ULL(i))
4781 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4783 dev_info(&vsi->back->pdev->dev,
4784 "Failed configuring TC map %d for VSI %d\n",
4785 enabled_tc, vsi->seid);
4789 /* Update Queue Pairs Mapping for currently enabled UPs */
4790 ctxt.seid = vsi->seid;
4791 ctxt.pf_num = vsi->back->hw.pf_id;
4793 ctxt.uplink_seid = vsi->uplink_seid;
4794 ctxt.info = vsi->info;
4795 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4797 /* Update the VSI after updating the VSI queue-mapping information */
4798 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4800 dev_info(&vsi->back->pdev->dev,
4801 "Update vsi tc config failed, err %s aq_err %s\n",
4802 i40e_stat_str(&vsi->back->hw, ret),
4803 i40e_aq_str(&vsi->back->hw,
4804 vsi->back->hw.aq.asq_last_status));
4807 /* update the local VSI info with updated queue map */
4808 i40e_vsi_update_queue_map(vsi, &ctxt);
4809 vsi->info.valid_sections = 0;
4811 /* Update current VSI BW information */
4812 ret = i40e_vsi_get_bw_info(vsi);
4814 dev_info(&vsi->back->pdev->dev,
4815 "Failed updating vsi bw info, err %s aq_err %s\n",
4816 i40e_stat_str(&vsi->back->hw, ret),
4817 i40e_aq_str(&vsi->back->hw,
4818 vsi->back->hw.aq.asq_last_status));
4822 /* Update the netdev TC setup */
4823 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4829 * i40e_veb_config_tc - Configure TCs for given VEB
4831 * @enabled_tc: TC bitmap
4833 * Configures given TC bitmap for VEB (switching) element
4835 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4837 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4838 struct i40e_pf *pf = veb->pf;
4842 /* No TCs or already enabled TCs just return */
4843 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4846 bw_data.tc_valid_bits = enabled_tc;
4847 /* bw_data.absolute_credits is not set (relative) */
4849 /* Enable ETS TCs with equal BW Share for now */
4850 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4851 if (enabled_tc & BIT_ULL(i))
4852 bw_data.tc_bw_share_credits[i] = 1;
4855 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4858 dev_info(&pf->pdev->dev,
4859 "VEB bw config failed, err %s aq_err %s\n",
4860 i40e_stat_str(&pf->hw, ret),
4861 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4865 /* Update the BW information */
4866 ret = i40e_veb_get_bw_info(veb);
4868 dev_info(&pf->pdev->dev,
4869 "Failed getting veb bw config, err %s aq_err %s\n",
4870 i40e_stat_str(&pf->hw, ret),
4871 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4878 #ifdef CONFIG_I40E_DCB
4880 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4883 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4884 * the caller would've quiesce all the VSIs before calling
4887 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4893 /* Enable the TCs available on PF to all VEBs */
4894 tc_map = i40e_pf_get_tc_map(pf);
4895 for (v = 0; v < I40E_MAX_VEB; v++) {
4898 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4900 dev_info(&pf->pdev->dev,
4901 "Failed configuring TC for VEB seid=%d\n",
4903 /* Will try to configure as many components */
4907 /* Update each VSI */
4908 for (v = 0; v < pf->num_alloc_vsi; v++) {
4912 /* - Enable all TCs for the LAN VSI
4914 * - For FCoE VSI only enable the TC configured
4915 * as per the APP TLV
4917 * - For all others keep them at TC0 for now
4919 if (v == pf->lan_vsi)
4920 tc_map = i40e_pf_get_tc_map(pf);
4922 tc_map = i40e_pf_get_default_tc(pf);
4924 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4925 tc_map = i40e_get_fcoe_tc_map(pf);
4926 #endif /* #ifdef I40E_FCOE */
4928 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4930 dev_info(&pf->pdev->dev,
4931 "Failed configuring TC for VSI seid=%d\n",
4933 /* Will try to configure as many components */
4935 /* Re-configure VSI vectors based on updated TC map */
4936 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4937 if (pf->vsi[v]->netdev)
4938 i40e_dcbnl_set_all(pf->vsi[v]);
4944 * i40e_resume_port_tx - Resume port Tx
4947 * Resume a port's Tx and issue a PF reset in case of failure to
4950 static int i40e_resume_port_tx(struct i40e_pf *pf)
4952 struct i40e_hw *hw = &pf->hw;
4955 ret = i40e_aq_resume_port_tx(hw, NULL);
4957 dev_info(&pf->pdev->dev,
4958 "Resume Port Tx failed, err %s aq_err %s\n",
4959 i40e_stat_str(&pf->hw, ret),
4960 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4961 /* Schedule PF reset to recover */
4962 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4963 i40e_service_event_schedule(pf);
4970 * i40e_init_pf_dcb - Initialize DCB configuration
4971 * @pf: PF being configured
4973 * Query the current DCB configuration and cache it
4974 * in the hardware structure
4976 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4978 struct i40e_hw *hw = &pf->hw;
4981 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4982 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4983 (pf->hw.aq.fw_maj_ver < 4))
4986 /* Get the initial DCB configuration */
4987 err = i40e_init_dcb(hw);
4989 /* Device/Function is not DCBX capable */
4990 if ((!hw->func_caps.dcb) ||
4991 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4992 dev_info(&pf->pdev->dev,
4993 "DCBX offload is not supported or is disabled for this PF.\n");
4995 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4999 /* When status is not DISABLED then DCBX in FW */
5000 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5001 DCB_CAP_DCBX_VER_IEEE;
5003 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5004 /* Enable DCB tagging only when more than one TC */
5005 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5006 pf->flags |= I40E_FLAG_DCB_ENABLED;
5007 dev_dbg(&pf->pdev->dev,
5008 "DCBX offload is supported for this PF.\n");
5011 dev_info(&pf->pdev->dev,
5012 "Query for DCB configuration failed, err %s aq_err %s\n",
5013 i40e_stat_str(&pf->hw, err),
5014 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5020 #endif /* CONFIG_I40E_DCB */
5021 #define SPEED_SIZE 14
5024 * i40e_print_link_message - print link up or down
5025 * @vsi: the VSI for which link needs a message
5027 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5029 char *speed = "Unknown";
5030 char *fc = "Unknown";
5032 if (vsi->current_isup == isup)
5034 vsi->current_isup = isup;
5036 netdev_info(vsi->netdev, "NIC Link is Down\n");
5040 /* Warn user if link speed on NPAR enabled partition is not at
5043 if (vsi->back->hw.func_caps.npar_enable &&
5044 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5045 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5046 netdev_warn(vsi->netdev,
5047 "The partition detected link speed that is less than 10Gbps\n");
5049 switch (vsi->back->hw.phy.link_info.link_speed) {
5050 case I40E_LINK_SPEED_40GB:
5053 case I40E_LINK_SPEED_20GB:
5056 case I40E_LINK_SPEED_10GB:
5059 case I40E_LINK_SPEED_1GB:
5062 case I40E_LINK_SPEED_100MB:
5069 switch (vsi->back->hw.fc.current_mode) {
5073 case I40E_FC_TX_PAUSE:
5076 case I40E_FC_RX_PAUSE:
5084 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5089 * i40e_up_complete - Finish the last steps of bringing up a connection
5090 * @vsi: the VSI being configured
5092 static int i40e_up_complete(struct i40e_vsi *vsi)
5094 struct i40e_pf *pf = vsi->back;
5097 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5098 i40e_vsi_configure_msix(vsi);
5100 i40e_configure_msi_and_legacy(vsi);
5103 err = i40e_vsi_control_rings(vsi, true);
5107 clear_bit(__I40E_DOWN, &vsi->state);
5108 i40e_napi_enable_all(vsi);
5109 i40e_vsi_enable_irq(vsi);
5111 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5113 i40e_print_link_message(vsi, true);
5114 netif_tx_start_all_queues(vsi->netdev);
5115 netif_carrier_on(vsi->netdev);
5116 } else if (vsi->netdev) {
5117 i40e_print_link_message(vsi, false);
5118 /* need to check for qualified module here*/
5119 if ((pf->hw.phy.link_info.link_info &
5120 I40E_AQ_MEDIA_AVAILABLE) &&
5121 (!(pf->hw.phy.link_info.an_info &
5122 I40E_AQ_QUALIFIED_MODULE)))
5123 netdev_err(vsi->netdev,
5124 "the driver failed to link because an unqualified module was detected.");
5127 /* replay FDIR SB filters */
5128 if (vsi->type == I40E_VSI_FDIR) {
5129 /* reset fd counters */
5130 pf->fd_add_err = pf->fd_atr_cnt = 0;
5131 if (pf->fd_tcp_rule > 0) {
5132 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5133 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5134 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5135 pf->fd_tcp_rule = 0;
5137 i40e_fdir_filter_restore(vsi);
5139 i40e_service_event_schedule(pf);
5145 * i40e_vsi_reinit_locked - Reset the VSI
5146 * @vsi: the VSI being configured
5148 * Rebuild the ring structs after some configuration
5149 * has changed, e.g. MTU size.
5151 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5153 struct i40e_pf *pf = vsi->back;
5155 WARN_ON(in_interrupt());
5156 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5157 usleep_range(1000, 2000);
5160 /* Give a VF some time to respond to the reset. The
5161 * two second wait is based upon the watchdog cycle in
5164 if (vsi->type == I40E_VSI_SRIOV)
5167 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5171 * i40e_up - Bring the connection back up after being down
5172 * @vsi: the VSI being configured
5174 int i40e_up(struct i40e_vsi *vsi)
5178 err = i40e_vsi_configure(vsi);
5180 err = i40e_up_complete(vsi);
5186 * i40e_down - Shutdown the connection processing
5187 * @vsi: the VSI being stopped
5189 void i40e_down(struct i40e_vsi *vsi)
5193 /* It is assumed that the caller of this function
5194 * sets the vsi->state __I40E_DOWN bit.
5197 netif_carrier_off(vsi->netdev);
5198 netif_tx_disable(vsi->netdev);
5200 i40e_vsi_disable_irq(vsi);
5201 i40e_vsi_control_rings(vsi, false);
5202 i40e_napi_disable_all(vsi);
5204 for (i = 0; i < vsi->num_queue_pairs; i++) {
5205 i40e_clean_tx_ring(vsi->tx_rings[i]);
5206 i40e_clean_rx_ring(vsi->rx_rings[i]);
5211 * i40e_setup_tc - configure multiple traffic classes
5212 * @netdev: net device to configure
5213 * @tc: number of traffic classes to enable
5216 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5218 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5221 struct i40e_netdev_priv *np = netdev_priv(netdev);
5222 struct i40e_vsi *vsi = np->vsi;
5223 struct i40e_pf *pf = vsi->back;
5228 /* Check if DCB enabled to continue */
5229 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5230 netdev_info(netdev, "DCB is not enabled for adapter\n");
5234 /* Check if MFP enabled */
5235 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5236 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5240 /* Check whether tc count is within enabled limit */
5241 if (tc > i40e_pf_get_num_tc(pf)) {
5242 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5246 /* Generate TC map for number of tc requested */
5247 for (i = 0; i < tc; i++)
5248 enabled_tc |= BIT_ULL(i);
5250 /* Requesting same TC configuration as already enabled */
5251 if (enabled_tc == vsi->tc_config.enabled_tc)
5254 /* Quiesce VSI queues */
5255 i40e_quiesce_vsi(vsi);
5257 /* Configure VSI for enabled TCs */
5258 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5260 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5266 i40e_unquiesce_vsi(vsi);
5273 * i40e_open - Called when a network interface is made active
5274 * @netdev: network interface device structure
5276 * The open entry point is called when a network interface is made
5277 * active by the system (IFF_UP). At this point all resources needed
5278 * for transmit and receive operations are allocated, the interrupt
5279 * handler is registered with the OS, the netdev watchdog subtask is
5280 * enabled, and the stack is notified that the interface is ready.
5282 * Returns 0 on success, negative value on failure
5284 int i40e_open(struct net_device *netdev)
5286 struct i40e_netdev_priv *np = netdev_priv(netdev);
5287 struct i40e_vsi *vsi = np->vsi;
5288 struct i40e_pf *pf = vsi->back;
5291 /* disallow open during test or if eeprom is broken */
5292 if (test_bit(__I40E_TESTING, &pf->state) ||
5293 test_bit(__I40E_BAD_EEPROM, &pf->state))
5296 netif_carrier_off(netdev);
5298 err = i40e_vsi_open(vsi);
5302 /* configure global TSO hardware offload settings */
5303 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5304 TCP_FLAG_FIN) >> 16);
5305 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5307 TCP_FLAG_CWR) >> 16);
5308 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5310 #ifdef CONFIG_I40E_VXLAN
5311 vxlan_get_rx_port(netdev);
5319 * @vsi: the VSI to open
5321 * Finish initialization of the VSI.
5323 * Returns 0 on success, negative value on failure
5325 int i40e_vsi_open(struct i40e_vsi *vsi)
5327 struct i40e_pf *pf = vsi->back;
5328 char int_name[I40E_INT_NAME_STR_LEN];
5331 /* allocate descriptors */
5332 err = i40e_vsi_setup_tx_resources(vsi);
5335 err = i40e_vsi_setup_rx_resources(vsi);
5339 err = i40e_vsi_configure(vsi);
5344 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5345 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5346 err = i40e_vsi_request_irq(vsi, int_name);
5350 /* Notify the stack of the actual queue counts. */
5351 err = netif_set_real_num_tx_queues(vsi->netdev,
5352 vsi->num_queue_pairs);
5354 goto err_set_queues;
5356 err = netif_set_real_num_rx_queues(vsi->netdev,
5357 vsi->num_queue_pairs);
5359 goto err_set_queues;
5361 } else if (vsi->type == I40E_VSI_FDIR) {
5362 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5363 dev_driver_string(&pf->pdev->dev),
5364 dev_name(&pf->pdev->dev));
5365 err = i40e_vsi_request_irq(vsi, int_name);
5372 err = i40e_up_complete(vsi);
5374 goto err_up_complete;
5381 i40e_vsi_free_irq(vsi);
5383 i40e_vsi_free_rx_resources(vsi);
5385 i40e_vsi_free_tx_resources(vsi);
5386 if (vsi == pf->vsi[pf->lan_vsi])
5387 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5393 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5394 * @pf: Pointer to PF
5396 * This function destroys the hlist where all the Flow Director
5397 * filters were saved.
5399 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5401 struct i40e_fdir_filter *filter;
5402 struct hlist_node *node2;
5404 hlist_for_each_entry_safe(filter, node2,
5405 &pf->fdir_filter_list, fdir_node) {
5406 hlist_del(&filter->fdir_node);
5409 pf->fdir_pf_active_filters = 0;
5413 * i40e_close - Disables a network interface
5414 * @netdev: network interface device structure
5416 * The close entry point is called when an interface is de-activated
5417 * by the OS. The hardware is still under the driver's control, but
5418 * this netdev interface is disabled.
5420 * Returns 0, this is not allowed to fail
5423 int i40e_close(struct net_device *netdev)
5425 static int i40e_close(struct net_device *netdev)
5428 struct i40e_netdev_priv *np = netdev_priv(netdev);
5429 struct i40e_vsi *vsi = np->vsi;
5431 i40e_vsi_close(vsi);
5437 * i40e_do_reset - Start a PF or Core Reset sequence
5438 * @pf: board private structure
5439 * @reset_flags: which reset is requested
5441 * The essential difference in resets is that the PF Reset
5442 * doesn't clear the packet buffers, doesn't reset the PE
5443 * firmware, and doesn't bother the other PFs on the chip.
5445 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5449 WARN_ON(in_interrupt());
5451 if (i40e_check_asq_alive(&pf->hw))
5452 i40e_vc_notify_reset(pf);
5454 /* do the biggest reset indicated */
5455 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5457 /* Request a Global Reset
5459 * This will start the chip's countdown to the actual full
5460 * chip reset event, and a warning interrupt to be sent
5461 * to all PFs, including the requestor. Our handler
5462 * for the warning interrupt will deal with the shutdown
5463 * and recovery of the switch setup.
5465 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5466 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5467 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5468 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5470 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5472 /* Request a Core Reset
5474 * Same as Global Reset, except does *not* include the MAC/PHY
5476 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5477 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5478 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5479 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5480 i40e_flush(&pf->hw);
5482 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5484 /* Request a PF Reset
5486 * Resets only the PF-specific registers
5488 * This goes directly to the tear-down and rebuild of
5489 * the switch, since we need to do all the recovery as
5490 * for the Core Reset.
5492 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5493 i40e_handle_reset_warning(pf);
5495 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5498 /* Find the VSI(s) that requested a re-init */
5499 dev_info(&pf->pdev->dev,
5500 "VSI reinit requested\n");
5501 for (v = 0; v < pf->num_alloc_vsi; v++) {
5502 struct i40e_vsi *vsi = pf->vsi[v];
5505 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5506 i40e_vsi_reinit_locked(pf->vsi[v]);
5507 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5510 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5513 /* Find the VSI(s) that needs to be brought down */
5514 dev_info(&pf->pdev->dev, "VSI down requested\n");
5515 for (v = 0; v < pf->num_alloc_vsi; v++) {
5516 struct i40e_vsi *vsi = pf->vsi[v];
5519 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5520 set_bit(__I40E_DOWN, &vsi->state);
5522 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5526 dev_info(&pf->pdev->dev,
5527 "bad reset request 0x%08x\n", reset_flags);
5531 #ifdef CONFIG_I40E_DCB
5533 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5534 * @pf: board private structure
5535 * @old_cfg: current DCB config
5536 * @new_cfg: new DCB config
5538 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5539 struct i40e_dcbx_config *old_cfg,
5540 struct i40e_dcbx_config *new_cfg)
5542 bool need_reconfig = false;
5544 /* Check if ETS configuration has changed */
5545 if (memcmp(&new_cfg->etscfg,
5547 sizeof(new_cfg->etscfg))) {
5548 /* If Priority Table has changed reconfig is needed */
5549 if (memcmp(&new_cfg->etscfg.prioritytable,
5550 &old_cfg->etscfg.prioritytable,
5551 sizeof(new_cfg->etscfg.prioritytable))) {
5552 need_reconfig = true;
5553 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5556 if (memcmp(&new_cfg->etscfg.tcbwtable,
5557 &old_cfg->etscfg.tcbwtable,
5558 sizeof(new_cfg->etscfg.tcbwtable)))
5559 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5561 if (memcmp(&new_cfg->etscfg.tsatable,
5562 &old_cfg->etscfg.tsatable,
5563 sizeof(new_cfg->etscfg.tsatable)))
5564 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5567 /* Check if PFC configuration has changed */
5568 if (memcmp(&new_cfg->pfc,
5570 sizeof(new_cfg->pfc))) {
5571 need_reconfig = true;
5572 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5575 /* Check if APP Table has changed */
5576 if (memcmp(&new_cfg->app,
5578 sizeof(new_cfg->app))) {
5579 need_reconfig = true;
5580 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5583 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5584 return need_reconfig;
5588 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5589 * @pf: board private structure
5590 * @e: event info posted on ARQ
5592 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5593 struct i40e_arq_event_info *e)
5595 struct i40e_aqc_lldp_get_mib *mib =
5596 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5597 struct i40e_hw *hw = &pf->hw;
5598 struct i40e_dcbx_config tmp_dcbx_cfg;
5599 bool need_reconfig = false;
5603 /* Not DCB capable or capability disabled */
5604 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5607 /* Ignore if event is not for Nearest Bridge */
5608 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5609 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5610 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5611 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5614 /* Check MIB Type and return if event for Remote MIB update */
5615 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5616 dev_dbg(&pf->pdev->dev,
5617 "LLDP event mib type %s\n", type ? "remote" : "local");
5618 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5619 /* Update the remote cached instance and return */
5620 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5621 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5622 &hw->remote_dcbx_config);
5626 /* Store the old configuration */
5627 tmp_dcbx_cfg = hw->local_dcbx_config;
5629 /* Reset the old DCBx configuration data */
5630 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5631 /* Get updated DCBX data from firmware */
5632 ret = i40e_get_dcb_config(&pf->hw);
5634 dev_info(&pf->pdev->dev,
5635 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5636 i40e_stat_str(&pf->hw, ret),
5637 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5641 /* No change detected in DCBX configs */
5642 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5643 sizeof(tmp_dcbx_cfg))) {
5644 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5648 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5649 &hw->local_dcbx_config);
5651 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5656 /* Enable DCB tagging only when more than one TC */
5657 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5658 pf->flags |= I40E_FLAG_DCB_ENABLED;
5660 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5662 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5663 /* Reconfiguration needed quiesce all VSIs */
5664 i40e_pf_quiesce_all_vsi(pf);
5666 /* Changes in configuration update VEB/VSI */
5667 i40e_dcb_reconfigure(pf);
5669 ret = i40e_resume_port_tx(pf);
5671 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5672 /* In case of error no point in resuming VSIs */
5676 /* Wait for the PF's Tx queues to be disabled */
5677 ret = i40e_pf_wait_txq_disabled(pf);
5679 /* Schedule PF reset to recover */
5680 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5681 i40e_service_event_schedule(pf);
5683 i40e_pf_unquiesce_all_vsi(pf);
5689 #endif /* CONFIG_I40E_DCB */
5692 * i40e_do_reset_safe - Protected reset path for userland calls.
5693 * @pf: board private structure
5694 * @reset_flags: which reset is requested
5697 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5700 i40e_do_reset(pf, reset_flags);
5705 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5706 * @pf: board private structure
5707 * @e: event info posted on ARQ
5709 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5712 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5713 struct i40e_arq_event_info *e)
5715 struct i40e_aqc_lan_overflow *data =
5716 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5717 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5718 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5719 struct i40e_hw *hw = &pf->hw;
5723 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5726 /* Queue belongs to VF, find the VF and issue VF reset */
5727 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5728 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5729 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5730 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5731 vf_id -= hw->func_caps.vf_base_id;
5732 vf = &pf->vf[vf_id];
5733 i40e_vc_notify_vf_reset(vf);
5734 /* Allow VF to process pending reset notification */
5736 i40e_reset_vf(vf, false);
5741 * i40e_service_event_complete - Finish up the service event
5742 * @pf: board private structure
5744 static void i40e_service_event_complete(struct i40e_pf *pf)
5746 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5748 /* flush memory to make sure state is correct before next watchog */
5749 smp_mb__before_atomic();
5750 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5754 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5755 * @pf: board private structure
5757 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5761 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5762 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5767 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5768 * @pf: board private structure
5770 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5774 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5775 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5776 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5777 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5782 * i40e_get_global_fd_count - Get total FD filters programmed on device
5783 * @pf: board private structure
5785 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5789 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5790 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5791 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5792 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5797 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5798 * @pf: board private structure
5800 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5802 struct i40e_fdir_filter *filter;
5803 u32 fcnt_prog, fcnt_avail;
5804 struct hlist_node *node;
5806 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5809 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5812 fcnt_prog = i40e_get_global_fd_count(pf);
5813 fcnt_avail = pf->fdir_pf_filter_count;
5814 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5815 (pf->fd_add_err == 0) ||
5816 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5817 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5818 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5819 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5820 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5821 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5824 /* Wait for some more space to be available to turn on ATR */
5825 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5826 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5827 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5828 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5829 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5830 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5834 /* if hw had a problem adding a filter, delete it */
5835 if (pf->fd_inv > 0) {
5836 hlist_for_each_entry_safe(filter, node,
5837 &pf->fdir_filter_list, fdir_node) {
5838 if (filter->fd_id == pf->fd_inv) {
5839 hlist_del(&filter->fdir_node);
5841 pf->fdir_pf_active_filters--;
5847 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5848 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5850 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5851 * @pf: board private structure
5853 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5855 unsigned long min_flush_time;
5856 int flush_wait_retry = 50;
5857 bool disable_atr = false;
5861 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5864 if (!time_after(jiffies, pf->fd_flush_timestamp +
5865 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5868 /* If the flush is happening too quick and we have mostly SB rules we
5869 * should not re-enable ATR for some time.
5871 min_flush_time = pf->fd_flush_timestamp +
5872 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5873 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5875 if (!(time_after(jiffies, min_flush_time)) &&
5876 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5877 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5878 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5882 pf->fd_flush_timestamp = jiffies;
5883 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5884 /* flush all filters */
5885 wr32(&pf->hw, I40E_PFQF_CTL_1,
5886 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5887 i40e_flush(&pf->hw);
5891 /* Check FD flush status every 5-6msec */
5892 usleep_range(5000, 6000);
5893 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5894 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5896 } while (flush_wait_retry--);
5897 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5898 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5900 /* replay sideband filters */
5901 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5903 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5904 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5905 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5906 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5912 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5913 * @pf: board private structure
5915 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5917 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5920 /* We can see up to 256 filter programming desc in transit if the filters are
5921 * being applied really fast; before we see the first
5922 * filter miss error on Rx queue 0. Accumulating enough error messages before
5923 * reacting will make sure we don't cause flush too often.
5925 #define I40E_MAX_FD_PROGRAM_ERROR 256
5928 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5929 * @pf: board private structure
5931 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5934 /* if interface is down do nothing */
5935 if (test_bit(__I40E_DOWN, &pf->state))
5938 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5941 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5942 i40e_fdir_flush_and_replay(pf);
5944 i40e_fdir_check_and_reenable(pf);
5949 * i40e_vsi_link_event - notify VSI of a link event
5950 * @vsi: vsi to be notified
5951 * @link_up: link up or down
5953 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5955 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5958 switch (vsi->type) {
5963 if (!vsi->netdev || !vsi->netdev_registered)
5967 netif_carrier_on(vsi->netdev);
5968 netif_tx_wake_all_queues(vsi->netdev);
5970 netif_carrier_off(vsi->netdev);
5971 netif_tx_stop_all_queues(vsi->netdev);
5975 case I40E_VSI_SRIOV:
5976 case I40E_VSI_VMDQ2:
5978 case I40E_VSI_MIRROR:
5980 /* there is no notification for other VSIs */
5986 * i40e_veb_link_event - notify elements on the veb of a link event
5987 * @veb: veb to be notified
5988 * @link_up: link up or down
5990 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5995 if (!veb || !veb->pf)
5999 /* depth first... */
6000 for (i = 0; i < I40E_MAX_VEB; i++)
6001 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6002 i40e_veb_link_event(pf->veb[i], link_up);
6004 /* ... now the local VSIs */
6005 for (i = 0; i < pf->num_alloc_vsi; i++)
6006 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6007 i40e_vsi_link_event(pf->vsi[i], link_up);
6011 * i40e_link_event - Update netif_carrier status
6012 * @pf: board private structure
6014 static void i40e_link_event(struct i40e_pf *pf)
6016 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6017 u8 new_link_speed, old_link_speed;
6019 bool new_link, old_link;
6021 /* save off old link status information */
6022 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6024 /* set this to force the get_link_status call to refresh state */
6025 pf->hw.phy.get_link_info = true;
6027 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6029 status = i40e_get_link_status(&pf->hw, &new_link);
6031 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6036 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6037 new_link_speed = pf->hw.phy.link_info.link_speed;
6039 if (new_link == old_link &&
6040 new_link_speed == old_link_speed &&
6041 (test_bit(__I40E_DOWN, &vsi->state) ||
6042 new_link == netif_carrier_ok(vsi->netdev)))
6045 if (!test_bit(__I40E_DOWN, &vsi->state))
6046 i40e_print_link_message(vsi, new_link);
6048 /* Notify the base of the switch tree connected to
6049 * the link. Floating VEBs are not notified.
6051 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6052 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6054 i40e_vsi_link_event(vsi, new_link);
6057 i40e_vc_notify_link_state(pf);
6059 if (pf->flags & I40E_FLAG_PTP)
6060 i40e_ptp_set_increment(pf);
6064 * i40e_watchdog_subtask - periodic checks not using event driven response
6065 * @pf: board private structure
6067 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6071 /* if interface is down do nothing */
6072 if (test_bit(__I40E_DOWN, &pf->state) ||
6073 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6076 /* make sure we don't do these things too often */
6077 if (time_before(jiffies, (pf->service_timer_previous +
6078 pf->service_timer_period)))
6080 pf->service_timer_previous = jiffies;
6082 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6083 i40e_link_event(pf);
6085 /* Update the stats for active netdevs so the network stack
6086 * can look at updated numbers whenever it cares to
6088 for (i = 0; i < pf->num_alloc_vsi; i++)
6089 if (pf->vsi[i] && pf->vsi[i]->netdev)
6090 i40e_update_stats(pf->vsi[i]);
6092 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6093 /* Update the stats for the active switching components */
6094 for (i = 0; i < I40E_MAX_VEB; i++)
6096 i40e_update_veb_stats(pf->veb[i]);
6099 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6103 * i40e_reset_subtask - Set up for resetting the device and driver
6104 * @pf: board private structure
6106 static void i40e_reset_subtask(struct i40e_pf *pf)
6108 u32 reset_flags = 0;
6111 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6112 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
6113 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6115 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6116 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
6117 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6119 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6120 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
6121 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6123 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6124 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
6125 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6127 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6128 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
6129 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6132 /* If there's a recovery already waiting, it takes
6133 * precedence before starting a new reset sequence.
6135 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6136 i40e_handle_reset_warning(pf);
6140 /* If we're already down or resetting, just bail */
6142 !test_bit(__I40E_DOWN, &pf->state) &&
6143 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6144 i40e_do_reset(pf, reset_flags);
6151 * i40e_handle_link_event - Handle link event
6152 * @pf: board private structure
6153 * @e: event info posted on ARQ
6155 static void i40e_handle_link_event(struct i40e_pf *pf,
6156 struct i40e_arq_event_info *e)
6158 struct i40e_aqc_get_link_status *status =
6159 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6161 /* Do a new status request to re-enable LSE reporting
6162 * and load new status information into the hw struct
6163 * This completely ignores any state information
6164 * in the ARQ event info, instead choosing to always
6165 * issue the AQ update link status command.
6167 i40e_link_event(pf);
6169 /* check for unqualified module, if link is down */
6170 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6171 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6172 (!(status->link_info & I40E_AQ_LINK_UP)))
6173 dev_err(&pf->pdev->dev,
6174 "The driver failed to link because an unqualified module was detected.\n");
6178 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6179 * @pf: board private structure
6181 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6183 struct i40e_arq_event_info event;
6184 struct i40e_hw *hw = &pf->hw;
6191 /* Do not run clean AQ when PF reset fails */
6192 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6195 /* check for error indications */
6196 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6198 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6199 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6200 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6202 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6203 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6204 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6206 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6207 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6208 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6211 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6213 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6215 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6216 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6217 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6219 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6220 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6221 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6223 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6224 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6225 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6228 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6230 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6231 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6236 ret = i40e_clean_arq_element(hw, &event, &pending);
6237 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6240 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6244 opcode = le16_to_cpu(event.desc.opcode);
6247 case i40e_aqc_opc_get_link_status:
6248 i40e_handle_link_event(pf, &event);
6250 case i40e_aqc_opc_send_msg_to_pf:
6251 ret = i40e_vc_process_vf_msg(pf,
6252 le16_to_cpu(event.desc.retval),
6253 le32_to_cpu(event.desc.cookie_high),
6254 le32_to_cpu(event.desc.cookie_low),
6258 case i40e_aqc_opc_lldp_update_mib:
6259 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6260 #ifdef CONFIG_I40E_DCB
6262 ret = i40e_handle_lldp_event(pf, &event);
6264 #endif /* CONFIG_I40E_DCB */
6266 case i40e_aqc_opc_event_lan_overflow:
6267 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6268 i40e_handle_lan_overflow_event(pf, &event);
6270 case i40e_aqc_opc_send_msg_to_peer:
6271 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6273 case i40e_aqc_opc_nvm_erase:
6274 case i40e_aqc_opc_nvm_update:
6275 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6278 dev_info(&pf->pdev->dev,
6279 "ARQ Error: Unknown event 0x%04x received\n",
6283 } while (pending && (i++ < pf->adminq_work_limit));
6285 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6286 /* re-enable Admin queue interrupt cause */
6287 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6288 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6289 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6292 kfree(event.msg_buf);
6296 * i40e_verify_eeprom - make sure eeprom is good to use
6297 * @pf: board private structure
6299 static void i40e_verify_eeprom(struct i40e_pf *pf)
6303 err = i40e_diag_eeprom_test(&pf->hw);
6305 /* retry in case of garbage read */
6306 err = i40e_diag_eeprom_test(&pf->hw);
6308 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6310 set_bit(__I40E_BAD_EEPROM, &pf->state);
6314 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6315 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6316 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6321 * i40e_enable_pf_switch_lb
6322 * @pf: pointer to the PF structure
6324 * enable switch loop back or die - no point in a return value
6326 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6328 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6329 struct i40e_vsi_context ctxt;
6332 ctxt.seid = pf->main_vsi_seid;
6333 ctxt.pf_num = pf->hw.pf_id;
6335 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6337 dev_info(&pf->pdev->dev,
6338 "couldn't get PF vsi config, err %s aq_err %s\n",
6339 i40e_stat_str(&pf->hw, ret),
6340 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6343 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6344 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6345 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6347 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6349 dev_info(&pf->pdev->dev,
6350 "update vsi switch failed, err %s aq_err %s\n",
6351 i40e_stat_str(&pf->hw, ret),
6352 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6357 * i40e_disable_pf_switch_lb
6358 * @pf: pointer to the PF structure
6360 * disable switch loop back or die - no point in a return value
6362 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6364 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6365 struct i40e_vsi_context ctxt;
6368 ctxt.seid = pf->main_vsi_seid;
6369 ctxt.pf_num = pf->hw.pf_id;
6371 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6373 dev_info(&pf->pdev->dev,
6374 "couldn't get PF vsi config, err %s aq_err %s\n",
6375 i40e_stat_str(&pf->hw, ret),
6376 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6379 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6380 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6381 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6383 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6385 dev_info(&pf->pdev->dev,
6386 "update vsi switch failed, err %s aq_err %s\n",
6387 i40e_stat_str(&pf->hw, ret),
6388 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6393 * i40e_config_bridge_mode - Configure the HW bridge mode
6394 * @veb: pointer to the bridge instance
6396 * Configure the loop back mode for the LAN VSI that is downlink to the
6397 * specified HW bridge instance. It is expected this function is called
6398 * when a new HW bridge is instantiated.
6400 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6402 struct i40e_pf *pf = veb->pf;
6404 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6405 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6406 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6407 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6408 i40e_disable_pf_switch_lb(pf);
6410 i40e_enable_pf_switch_lb(pf);
6414 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6415 * @veb: pointer to the VEB instance
6417 * This is a recursive function that first builds the attached VSIs then
6418 * recurses in to build the next layer of VEB. We track the connections
6419 * through our own index numbers because the seid's from the HW could
6420 * change across the reset.
6422 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6424 struct i40e_vsi *ctl_vsi = NULL;
6425 struct i40e_pf *pf = veb->pf;
6429 /* build VSI that owns this VEB, temporarily attached to base VEB */
6430 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6432 pf->vsi[v]->veb_idx == veb->idx &&
6433 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6434 ctl_vsi = pf->vsi[v];
6439 dev_info(&pf->pdev->dev,
6440 "missing owner VSI for veb_idx %d\n", veb->idx);
6442 goto end_reconstitute;
6444 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6445 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6446 ret = i40e_add_vsi(ctl_vsi);
6448 dev_info(&pf->pdev->dev,
6449 "rebuild of veb_idx %d owner VSI failed: %d\n",
6451 goto end_reconstitute;
6453 i40e_vsi_reset_stats(ctl_vsi);
6455 /* create the VEB in the switch and move the VSI onto the VEB */
6456 ret = i40e_add_veb(veb, ctl_vsi);
6458 goto end_reconstitute;
6460 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6461 veb->bridge_mode = BRIDGE_MODE_VEB;
6463 veb->bridge_mode = BRIDGE_MODE_VEPA;
6464 i40e_config_bridge_mode(veb);
6466 /* create the remaining VSIs attached to this VEB */
6467 for (v = 0; v < pf->num_alloc_vsi; v++) {
6468 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6471 if (pf->vsi[v]->veb_idx == veb->idx) {
6472 struct i40e_vsi *vsi = pf->vsi[v];
6474 vsi->uplink_seid = veb->seid;
6475 ret = i40e_add_vsi(vsi);
6477 dev_info(&pf->pdev->dev,
6478 "rebuild of vsi_idx %d failed: %d\n",
6480 goto end_reconstitute;
6482 i40e_vsi_reset_stats(vsi);
6486 /* create any VEBs attached to this VEB - RECURSION */
6487 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6488 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6489 pf->veb[veb_idx]->uplink_seid = veb->seid;
6490 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6501 * i40e_get_capabilities - get info about the HW
6502 * @pf: the PF struct
6504 static int i40e_get_capabilities(struct i40e_pf *pf)
6506 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6511 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6513 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6517 /* this loads the data into the hw struct for us */
6518 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6520 i40e_aqc_opc_list_func_capabilities,
6522 /* data loaded, buffer no longer needed */
6525 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6526 /* retry with a larger buffer */
6527 buf_len = data_size;
6528 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6529 dev_info(&pf->pdev->dev,
6530 "capability discovery failed, err %s aq_err %s\n",
6531 i40e_stat_str(&pf->hw, err),
6532 i40e_aq_str(&pf->hw,
6533 pf->hw.aq.asq_last_status));
6538 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6539 dev_info(&pf->pdev->dev,
6540 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6541 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6542 pf->hw.func_caps.num_msix_vectors,
6543 pf->hw.func_caps.num_msix_vectors_vf,
6544 pf->hw.func_caps.fd_filters_guaranteed,
6545 pf->hw.func_caps.fd_filters_best_effort,
6546 pf->hw.func_caps.num_tx_qp,
6547 pf->hw.func_caps.num_vsis);
6549 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6550 + pf->hw.func_caps.num_vfs)
6551 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6552 dev_info(&pf->pdev->dev,
6553 "got num_vsis %d, setting num_vsis to %d\n",
6554 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6555 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6561 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6564 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6565 * @pf: board private structure
6567 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6569 struct i40e_vsi *vsi;
6572 /* quick workaround for an NVM issue that leaves a critical register
6575 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6576 static const u32 hkey[] = {
6577 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6578 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6579 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6582 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6583 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6586 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6589 /* find existing VSI and see if it needs configuring */
6591 for (i = 0; i < pf->num_alloc_vsi; i++) {
6592 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6598 /* create a new VSI if none exists */
6600 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6601 pf->vsi[pf->lan_vsi]->seid, 0);
6603 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6604 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6609 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6613 * i40e_fdir_teardown - release the Flow Director resources
6614 * @pf: board private structure
6616 static void i40e_fdir_teardown(struct i40e_pf *pf)
6620 i40e_fdir_filter_exit(pf);
6621 for (i = 0; i < pf->num_alloc_vsi; i++) {
6622 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6623 i40e_vsi_release(pf->vsi[i]);
6630 * i40e_prep_for_reset - prep for the core to reset
6631 * @pf: board private structure
6633 * Close up the VFs and other things in prep for PF Reset.
6635 static void i40e_prep_for_reset(struct i40e_pf *pf)
6637 struct i40e_hw *hw = &pf->hw;
6638 i40e_status ret = 0;
6641 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6642 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6645 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6647 /* quiesce the VSIs and their queues that are not already DOWN */
6648 i40e_pf_quiesce_all_vsi(pf);
6650 for (v = 0; v < pf->num_alloc_vsi; v++) {
6652 pf->vsi[v]->seid = 0;
6655 i40e_shutdown_adminq(&pf->hw);
6657 /* call shutdown HMC */
6658 if (hw->hmc.hmc_obj) {
6659 ret = i40e_shutdown_lan_hmc(hw);
6661 dev_warn(&pf->pdev->dev,
6662 "shutdown_lan_hmc failed: %d\n", ret);
6667 * i40e_send_version - update firmware with driver version
6670 static void i40e_send_version(struct i40e_pf *pf)
6672 struct i40e_driver_version dv;
6674 dv.major_version = DRV_VERSION_MAJOR;
6675 dv.minor_version = DRV_VERSION_MINOR;
6676 dv.build_version = DRV_VERSION_BUILD;
6677 dv.subbuild_version = 0;
6678 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6679 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6683 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6684 * @pf: board private structure
6685 * @reinit: if the Main VSI needs to re-initialized.
6687 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6689 struct i40e_hw *hw = &pf->hw;
6690 u8 set_fc_aq_fail = 0;
6695 /* Now we wait for GRST to settle out.
6696 * We don't have to delete the VEBs or VSIs from the hw switch
6697 * because the reset will make them disappear.
6699 ret = i40e_pf_reset(hw);
6701 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6702 set_bit(__I40E_RESET_FAILED, &pf->state);
6703 goto clear_recovery;
6707 if (test_bit(__I40E_DOWN, &pf->state))
6708 goto clear_recovery;
6709 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6711 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6712 ret = i40e_init_adminq(&pf->hw);
6714 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6715 i40e_stat_str(&pf->hw, ret),
6716 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6717 goto clear_recovery;
6720 /* re-verify the eeprom if we just had an EMP reset */
6721 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6722 i40e_verify_eeprom(pf);
6724 i40e_clear_pxe_mode(hw);
6725 ret = i40e_get_capabilities(pf);
6727 goto end_core_reset;
6729 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6730 hw->func_caps.num_rx_qp,
6731 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6733 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6734 goto end_core_reset;
6736 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6738 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6739 goto end_core_reset;
6742 #ifdef CONFIG_I40E_DCB
6743 ret = i40e_init_pf_dcb(pf);
6745 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6746 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6747 /* Continue without DCB enabled */
6749 #endif /* CONFIG_I40E_DCB */
6751 i40e_init_pf_fcoe(pf);
6754 /* do basic switch setup */
6755 ret = i40e_setup_pf_switch(pf, reinit);
6757 goto end_core_reset;
6759 /* driver is only interested in link up/down and module qualification
6760 * reports from firmware
6762 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6763 I40E_AQ_EVENT_LINK_UPDOWN |
6764 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6766 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6767 i40e_stat_str(&pf->hw, ret),
6768 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6770 /* make sure our flow control settings are restored */
6771 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6773 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6774 i40e_stat_str(&pf->hw, ret),
6775 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6777 /* Rebuild the VSIs and VEBs that existed before reset.
6778 * They are still in our local switch element arrays, so only
6779 * need to rebuild the switch model in the HW.
6781 * If there were VEBs but the reconstitution failed, we'll try
6782 * try to recover minimal use by getting the basic PF VSI working.
6784 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6785 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6786 /* find the one VEB connected to the MAC, and find orphans */
6787 for (v = 0; v < I40E_MAX_VEB; v++) {
6791 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6792 pf->veb[v]->uplink_seid == 0) {
6793 ret = i40e_reconstitute_veb(pf->veb[v]);
6798 /* If Main VEB failed, we're in deep doodoo,
6799 * so give up rebuilding the switch and set up
6800 * for minimal rebuild of PF VSI.
6801 * If orphan failed, we'll report the error
6802 * but try to keep going.
6804 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6805 dev_info(&pf->pdev->dev,
6806 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6808 pf->vsi[pf->lan_vsi]->uplink_seid
6811 } else if (pf->veb[v]->uplink_seid == 0) {
6812 dev_info(&pf->pdev->dev,
6813 "rebuild of orphan VEB failed: %d\n",
6820 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6821 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6822 /* no VEB, so rebuild only the Main VSI */
6823 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6825 dev_info(&pf->pdev->dev,
6826 "rebuild of Main VSI failed: %d\n", ret);
6827 goto end_core_reset;
6831 /* Reconfigure hardware for allowing smaller MSS in the case
6832 * of TSO, so that we avoid the MDD being fired and causing
6833 * a reset in the case of small MSS+TSO.
6835 #define I40E_REG_MSS 0x000E64DC
6836 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6837 #define I40E_64BYTE_MSS 0x400000
6838 val = rd32(hw, I40E_REG_MSS);
6839 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6840 val &= ~I40E_REG_MSS_MIN_MASK;
6841 val |= I40E_64BYTE_MSS;
6842 wr32(hw, I40E_REG_MSS, val);
6845 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6846 (pf->hw.aq.fw_maj_ver < 4)) {
6848 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6850 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6851 i40e_stat_str(&pf->hw, ret),
6852 i40e_aq_str(&pf->hw,
6853 pf->hw.aq.asq_last_status));
6855 /* reinit the misc interrupt */
6856 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6857 ret = i40e_setup_misc_vector(pf);
6859 /* Add a filter to drop all Flow control frames from any VSI from being
6860 * transmitted. By doing so we stop a malicious VF from sending out
6861 * PAUSE or PFC frames and potentially controlling traffic for other
6863 * The FW can still send Flow control frames if enabled.
6865 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6868 /* restart the VSIs that were rebuilt and running before the reset */
6869 i40e_pf_unquiesce_all_vsi(pf);
6871 if (pf->num_alloc_vfs) {
6872 for (v = 0; v < pf->num_alloc_vfs; v++)
6873 i40e_reset_vf(&pf->vf[v], true);
6876 /* tell the firmware that we're starting */
6877 i40e_send_version(pf);
6880 clear_bit(__I40E_RESET_FAILED, &pf->state);
6882 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6886 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6887 * @pf: board private structure
6889 * Close up the VFs and other things in prep for a Core Reset,
6890 * then get ready to rebuild the world.
6892 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6894 i40e_prep_for_reset(pf);
6895 i40e_reset_and_rebuild(pf, false);
6899 * i40e_handle_mdd_event
6900 * @pf: pointer to the PF structure
6902 * Called from the MDD irq handler to identify possibly malicious vfs
6904 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6906 struct i40e_hw *hw = &pf->hw;
6907 bool mdd_detected = false;
6908 bool pf_mdd_detected = false;
6913 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6916 /* find what triggered the MDD event */
6917 reg = rd32(hw, I40E_GL_MDET_TX);
6918 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6919 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6920 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6921 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6922 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6923 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6924 I40E_GL_MDET_TX_EVENT_SHIFT;
6925 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6926 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6927 pf->hw.func_caps.base_queue;
6928 if (netif_msg_tx_err(pf))
6929 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6930 event, queue, pf_num, vf_num);
6931 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6932 mdd_detected = true;
6934 reg = rd32(hw, I40E_GL_MDET_RX);
6935 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6936 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6937 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6938 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6939 I40E_GL_MDET_RX_EVENT_SHIFT;
6940 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6941 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6942 pf->hw.func_caps.base_queue;
6943 if (netif_msg_rx_err(pf))
6944 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6945 event, queue, func);
6946 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6947 mdd_detected = true;
6951 reg = rd32(hw, I40E_PF_MDET_TX);
6952 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6953 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6954 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6955 pf_mdd_detected = true;
6957 reg = rd32(hw, I40E_PF_MDET_RX);
6958 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6959 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6960 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6961 pf_mdd_detected = true;
6963 /* Queue belongs to the PF, initiate a reset */
6964 if (pf_mdd_detected) {
6965 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6966 i40e_service_event_schedule(pf);
6970 /* see if one of the VFs needs its hand slapped */
6971 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6973 reg = rd32(hw, I40E_VP_MDET_TX(i));
6974 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6975 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6976 vf->num_mdd_events++;
6977 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6981 reg = rd32(hw, I40E_VP_MDET_RX(i));
6982 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6983 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6984 vf->num_mdd_events++;
6985 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6989 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6990 dev_info(&pf->pdev->dev,
6991 "Too many MDD events on VF %d, disabled\n", i);
6992 dev_info(&pf->pdev->dev,
6993 "Use PF Control I/F to re-enable the VF\n");
6994 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6998 /* re-enable mdd interrupt cause */
6999 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7000 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7001 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7002 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7006 #ifdef CONFIG_I40E_VXLAN
7008 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
7009 * @pf: board private structure
7011 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
7013 struct i40e_hw *hw = &pf->hw;
7018 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
7021 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
7023 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7024 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
7025 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
7026 port = pf->vxlan_ports[i];
7028 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
7029 I40E_AQC_TUNNEL_TYPE_VXLAN,
7032 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7035 dev_info(&pf->pdev->dev,
7036 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
7037 port ? "add" : "delete",
7039 i40e_stat_str(&pf->hw, ret),
7040 i40e_aq_str(&pf->hw,
7041 pf->hw.aq.asq_last_status));
7042 pf->vxlan_ports[i] = 0;
7050 * i40e_service_task - Run the driver's async subtasks
7051 * @work: pointer to work_struct containing our data
7053 static void i40e_service_task(struct work_struct *work)
7055 struct i40e_pf *pf = container_of(work,
7058 unsigned long start_time = jiffies;
7060 /* don't bother with service tasks if a reset is in progress */
7061 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7062 i40e_service_event_complete(pf);
7066 i40e_detect_recover_hung(pf);
7067 i40e_reset_subtask(pf);
7068 i40e_handle_mdd_event(pf);
7069 i40e_vc_process_vflr_event(pf);
7070 i40e_watchdog_subtask(pf);
7071 i40e_fdir_reinit_subtask(pf);
7072 i40e_sync_filters_subtask(pf);
7073 #ifdef CONFIG_I40E_VXLAN
7074 i40e_sync_vxlan_filters_subtask(pf);
7076 i40e_clean_adminq_subtask(pf);
7078 i40e_service_event_complete(pf);
7080 /* If the tasks have taken longer than one timer cycle or there
7081 * is more work to be done, reschedule the service task now
7082 * rather than wait for the timer to tick again.
7084 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7085 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7086 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7087 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7088 i40e_service_event_schedule(pf);
7092 * i40e_service_timer - timer callback
7093 * @data: pointer to PF struct
7095 static void i40e_service_timer(unsigned long data)
7097 struct i40e_pf *pf = (struct i40e_pf *)data;
7099 mod_timer(&pf->service_timer,
7100 round_jiffies(jiffies + pf->service_timer_period));
7101 i40e_service_event_schedule(pf);
7105 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7106 * @vsi: the VSI being configured
7108 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7110 struct i40e_pf *pf = vsi->back;
7112 switch (vsi->type) {
7114 vsi->alloc_queue_pairs = pf->num_lan_qps;
7115 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7116 I40E_REQ_DESCRIPTOR_MULTIPLE);
7117 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7118 vsi->num_q_vectors = pf->num_lan_msix;
7120 vsi->num_q_vectors = 1;
7125 vsi->alloc_queue_pairs = 1;
7126 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7127 I40E_REQ_DESCRIPTOR_MULTIPLE);
7128 vsi->num_q_vectors = 1;
7131 case I40E_VSI_VMDQ2:
7132 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7133 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7134 I40E_REQ_DESCRIPTOR_MULTIPLE);
7135 vsi->num_q_vectors = pf->num_vmdq_msix;
7138 case I40E_VSI_SRIOV:
7139 vsi->alloc_queue_pairs = pf->num_vf_qps;
7140 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7141 I40E_REQ_DESCRIPTOR_MULTIPLE);
7146 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7147 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7148 I40E_REQ_DESCRIPTOR_MULTIPLE);
7149 vsi->num_q_vectors = pf->num_fcoe_msix;
7152 #endif /* I40E_FCOE */
7162 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7163 * @type: VSI pointer
7164 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7166 * On error: returns error code (negative)
7167 * On success: returns 0
7169 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7174 /* allocate memory for both Tx and Rx ring pointers */
7175 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7176 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7179 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7181 if (alloc_qvectors) {
7182 /* allocate memory for q_vector pointers */
7183 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7184 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7185 if (!vsi->q_vectors) {
7193 kfree(vsi->tx_rings);
7198 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7199 * @pf: board private structure
7200 * @type: type of VSI
7202 * On error: returns error code (negative)
7203 * On success: returns vsi index in PF (positive)
7205 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7208 struct i40e_vsi *vsi;
7212 /* Need to protect the allocation of the VSIs at the PF level */
7213 mutex_lock(&pf->switch_mutex);
7215 /* VSI list may be fragmented if VSI creation/destruction has
7216 * been happening. We can afford to do a quick scan to look
7217 * for any free VSIs in the list.
7219 * find next empty vsi slot, looping back around if necessary
7222 while (i < pf->num_alloc_vsi && pf->vsi[i])
7224 if (i >= pf->num_alloc_vsi) {
7226 while (i < pf->next_vsi && pf->vsi[i])
7230 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7231 vsi_idx = i; /* Found one! */
7234 goto unlock_pf; /* out of VSI slots! */
7238 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7245 set_bit(__I40E_DOWN, &vsi->state);
7248 vsi->rx_itr_setting = pf->rx_itr_default;
7249 vsi->tx_itr_setting = pf->tx_itr_default;
7250 vsi->int_rate_limit = 0;
7251 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7252 pf->rss_table_size : 64;
7253 vsi->netdev_registered = false;
7254 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7255 INIT_LIST_HEAD(&vsi->mac_filter_list);
7256 vsi->irqs_ready = false;
7258 ret = i40e_set_num_rings_in_vsi(vsi);
7262 ret = i40e_vsi_alloc_arrays(vsi, true);
7266 /* Setup default MSIX irq handler for VSI */
7267 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7269 /* Initialize VSI lock */
7270 spin_lock_init(&vsi->mac_filter_list_lock);
7271 pf->vsi[vsi_idx] = vsi;
7276 pf->next_vsi = i - 1;
7279 mutex_unlock(&pf->switch_mutex);
7284 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7285 * @type: VSI pointer
7286 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7288 * On error: returns error code (negative)
7289 * On success: returns 0
7291 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7293 /* free the ring and vector containers */
7294 if (free_qvectors) {
7295 kfree(vsi->q_vectors);
7296 vsi->q_vectors = NULL;
7298 kfree(vsi->tx_rings);
7299 vsi->tx_rings = NULL;
7300 vsi->rx_rings = NULL;
7304 * i40e_vsi_clear - Deallocate the VSI provided
7305 * @vsi: the VSI being un-configured
7307 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7318 mutex_lock(&pf->switch_mutex);
7319 if (!pf->vsi[vsi->idx]) {
7320 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7321 vsi->idx, vsi->idx, vsi, vsi->type);
7325 if (pf->vsi[vsi->idx] != vsi) {
7326 dev_err(&pf->pdev->dev,
7327 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7328 pf->vsi[vsi->idx]->idx,
7330 pf->vsi[vsi->idx]->type,
7331 vsi->idx, vsi, vsi->type);
7335 /* updates the PF for this cleared vsi */
7336 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7337 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7339 i40e_vsi_free_arrays(vsi, true);
7341 pf->vsi[vsi->idx] = NULL;
7342 if (vsi->idx < pf->next_vsi)
7343 pf->next_vsi = vsi->idx;
7346 mutex_unlock(&pf->switch_mutex);
7354 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7355 * @vsi: the VSI being cleaned
7357 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7361 if (vsi->tx_rings && vsi->tx_rings[0]) {
7362 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7363 kfree_rcu(vsi->tx_rings[i], rcu);
7364 vsi->tx_rings[i] = NULL;
7365 vsi->rx_rings[i] = NULL;
7371 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7372 * @vsi: the VSI being configured
7374 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7376 struct i40e_ring *tx_ring, *rx_ring;
7377 struct i40e_pf *pf = vsi->back;
7380 /* Set basic values in the rings to be used later during open() */
7381 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7382 /* allocate space for both Tx and Rx in one shot */
7383 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7387 tx_ring->queue_index = i;
7388 tx_ring->reg_idx = vsi->base_queue + i;
7389 tx_ring->ring_active = false;
7391 tx_ring->netdev = vsi->netdev;
7392 tx_ring->dev = &pf->pdev->dev;
7393 tx_ring->count = vsi->num_desc;
7395 tx_ring->dcb_tc = 0;
7396 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7397 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7398 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7399 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7400 vsi->tx_rings[i] = tx_ring;
7402 rx_ring = &tx_ring[1];
7403 rx_ring->queue_index = i;
7404 rx_ring->reg_idx = vsi->base_queue + i;
7405 rx_ring->ring_active = false;
7407 rx_ring->netdev = vsi->netdev;
7408 rx_ring->dev = &pf->pdev->dev;
7409 rx_ring->count = vsi->num_desc;
7411 rx_ring->dcb_tc = 0;
7412 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7413 set_ring_16byte_desc_enabled(rx_ring);
7415 clear_ring_16byte_desc_enabled(rx_ring);
7416 vsi->rx_rings[i] = rx_ring;
7422 i40e_vsi_clear_rings(vsi);
7427 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7428 * @pf: board private structure
7429 * @vectors: the number of MSI-X vectors to request
7431 * Returns the number of vectors reserved, or error
7433 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7435 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7436 I40E_MIN_MSIX, vectors);
7438 dev_info(&pf->pdev->dev,
7439 "MSI-X vector reservation failed: %d\n", vectors);
7447 * i40e_init_msix - Setup the MSIX capability
7448 * @pf: board private structure
7450 * Work with the OS to set up the MSIX vectors needed.
7452 * Returns the number of vectors reserved or negative on failure
7454 static int i40e_init_msix(struct i40e_pf *pf)
7456 struct i40e_hw *hw = &pf->hw;
7461 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7464 /* The number of vectors we'll request will be comprised of:
7465 * - Add 1 for "other" cause for Admin Queue events, etc.
7466 * - The number of LAN queue pairs
7467 * - Queues being used for RSS.
7468 * We don't need as many as max_rss_size vectors.
7469 * use rss_size instead in the calculation since that
7470 * is governed by number of cpus in the system.
7471 * - assumes symmetric Tx/Rx pairing
7472 * - The number of VMDq pairs
7474 * - The number of FCOE qps.
7476 * Once we count this up, try the request.
7478 * If we can't get what we want, we'll simplify to nearly nothing
7479 * and try again. If that still fails, we punt.
7481 vectors_left = hw->func_caps.num_msix_vectors;
7484 /* reserve one vector for miscellaneous handler */
7490 /* reserve vectors for the main PF traffic queues */
7491 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7492 vectors_left -= pf->num_lan_msix;
7493 v_budget += pf->num_lan_msix;
7495 /* reserve one vector for sideband flow director */
7496 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7501 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7506 /* can we reserve enough for FCoE? */
7507 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7509 pf->num_fcoe_msix = 0;
7510 else if (vectors_left >= pf->num_fcoe_qps)
7511 pf->num_fcoe_msix = pf->num_fcoe_qps;
7513 pf->num_fcoe_msix = 1;
7514 v_budget += pf->num_fcoe_msix;
7515 vectors_left -= pf->num_fcoe_msix;
7519 /* any vectors left over go for VMDq support */
7520 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7521 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7522 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7524 /* if we're short on vectors for what's desired, we limit
7525 * the queues per vmdq. If this is still more than are
7526 * available, the user will need to change the number of
7527 * queues/vectors used by the PF later with the ethtool
7530 if (vmdq_vecs < vmdq_vecs_wanted)
7531 pf->num_vmdq_qps = 1;
7532 pf->num_vmdq_msix = pf->num_vmdq_qps;
7534 v_budget += vmdq_vecs;
7535 vectors_left -= vmdq_vecs;
7538 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7540 if (!pf->msix_entries)
7543 for (i = 0; i < v_budget; i++)
7544 pf->msix_entries[i].entry = i;
7545 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7547 if (v_actual != v_budget) {
7548 /* If we have limited resources, we will start with no vectors
7549 * for the special features and then allocate vectors to some
7550 * of these features based on the policy and at the end disable
7551 * the features that did not get any vectors.
7554 pf->num_fcoe_qps = 0;
7555 pf->num_fcoe_msix = 0;
7557 pf->num_vmdq_msix = 0;
7560 if (v_actual < I40E_MIN_MSIX) {
7561 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7562 kfree(pf->msix_entries);
7563 pf->msix_entries = NULL;
7566 } else if (v_actual == I40E_MIN_MSIX) {
7567 /* Adjust for minimal MSIX use */
7568 pf->num_vmdq_vsis = 0;
7569 pf->num_vmdq_qps = 0;
7570 pf->num_lan_qps = 1;
7571 pf->num_lan_msix = 1;
7573 } else if (v_actual != v_budget) {
7576 /* reserve the misc vector */
7579 /* Scale vector usage down */
7580 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7581 pf->num_vmdq_vsis = 1;
7582 pf->num_vmdq_qps = 1;
7583 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7585 /* partition out the remaining vectors */
7588 pf->num_lan_msix = 1;
7592 /* give one vector to FCoE */
7593 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7594 pf->num_lan_msix = 1;
7595 pf->num_fcoe_msix = 1;
7598 pf->num_lan_msix = 2;
7603 /* give one vector to FCoE */
7604 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7605 pf->num_fcoe_msix = 1;
7609 /* give the rest to the PF */
7610 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7615 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7616 (pf->num_vmdq_msix == 0)) {
7617 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7618 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7622 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7623 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7624 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7631 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7632 * @vsi: the VSI being configured
7633 * @v_idx: index of the vector in the vsi struct
7635 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7637 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7639 struct i40e_q_vector *q_vector;
7641 /* allocate q_vector */
7642 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7646 q_vector->vsi = vsi;
7647 q_vector->v_idx = v_idx;
7648 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7650 netif_napi_add(vsi->netdev, &q_vector->napi,
7651 i40e_napi_poll, NAPI_POLL_WEIGHT);
7653 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7654 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7656 /* tie q_vector and vsi together */
7657 vsi->q_vectors[v_idx] = q_vector;
7663 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7664 * @vsi: the VSI being configured
7666 * We allocate one q_vector per queue interrupt. If allocation fails we
7669 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7671 struct i40e_pf *pf = vsi->back;
7672 int v_idx, num_q_vectors;
7675 /* if not MSIX, give the one vector only to the LAN VSI */
7676 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7677 num_q_vectors = vsi->num_q_vectors;
7678 else if (vsi == pf->vsi[pf->lan_vsi])
7683 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7684 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7693 i40e_free_q_vector(vsi, v_idx);
7699 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7700 * @pf: board private structure to initialize
7702 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7707 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7708 vectors = i40e_init_msix(pf);
7710 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7712 I40E_FLAG_FCOE_ENABLED |
7714 I40E_FLAG_RSS_ENABLED |
7715 I40E_FLAG_DCB_CAPABLE |
7716 I40E_FLAG_SRIOV_ENABLED |
7717 I40E_FLAG_FD_SB_ENABLED |
7718 I40E_FLAG_FD_ATR_ENABLED |
7719 I40E_FLAG_VMDQ_ENABLED);
7721 /* rework the queue expectations without MSIX */
7722 i40e_determine_queue_usage(pf);
7726 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7727 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7728 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7729 vectors = pci_enable_msi(pf->pdev);
7731 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7733 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7735 vectors = 1; /* one MSI or Legacy vector */
7738 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7739 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7741 /* set up vector assignment tracking */
7742 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7743 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7744 if (!pf->irq_pile) {
7745 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7748 pf->irq_pile->num_entries = vectors;
7749 pf->irq_pile->search_hint = 0;
7751 /* track first vector for misc interrupts, ignore return */
7752 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7758 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7759 * @pf: board private structure
7761 * This sets up the handler for MSIX 0, which is used to manage the
7762 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7763 * when in MSI or Legacy interrupt mode.
7765 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7767 struct i40e_hw *hw = &pf->hw;
7770 /* Only request the irq if this is the first time through, and
7771 * not when we're rebuilding after a Reset
7773 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7774 err = request_irq(pf->msix_entries[0].vector,
7775 i40e_intr, 0, pf->int_name, pf);
7777 dev_info(&pf->pdev->dev,
7778 "request_irq for %s failed: %d\n",
7784 i40e_enable_misc_int_causes(pf);
7786 /* associate no queues to the misc vector */
7787 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7788 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7792 i40e_irq_dynamic_enable_icr0(pf);
7798 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7799 * @vsi: vsi structure
7800 * @seed: RSS hash seed
7802 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7803 u8 *lut, u16 lut_size)
7805 struct i40e_aqc_get_set_rss_key_data rss_key;
7806 struct i40e_pf *pf = vsi->back;
7807 struct i40e_hw *hw = &pf->hw;
7808 bool pf_lut = false;
7812 memset(&rss_key, 0, sizeof(rss_key));
7813 memcpy(&rss_key, seed, sizeof(rss_key));
7815 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7819 /* Populate the LUT with max no. of queues in round robin fashion */
7820 for (i = 0; i < vsi->rss_table_size; i++)
7821 rss_lut[i] = i % vsi->rss_size;
7823 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7825 dev_info(&pf->pdev->dev,
7826 "Cannot set RSS key, err %s aq_err %s\n",
7827 i40e_stat_str(&pf->hw, ret),
7828 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7829 goto config_rss_aq_out;
7832 if (vsi->type == I40E_VSI_MAIN)
7835 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7836 vsi->rss_table_size);
7838 dev_info(&pf->pdev->dev,
7839 "Cannot set RSS lut, err %s aq_err %s\n",
7840 i40e_stat_str(&pf->hw, ret),
7841 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7849 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7850 * @vsi: VSI structure
7852 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7854 u8 seed[I40E_HKEY_ARRAY_SIZE];
7855 struct i40e_pf *pf = vsi->back;
7859 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
7862 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
7866 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
7867 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7868 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7869 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
7876 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
7877 * @vsi: Pointer to vsi structure
7878 * @seed: RSS hash seed
7879 * @lut: Lookup table
7880 * @lut_size: Lookup table size
7882 * Returns 0 on success, negative on failure
7884 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
7885 const u8 *lut, u16 lut_size)
7887 struct i40e_pf *pf = vsi->back;
7888 struct i40e_hw *hw = &pf->hw;
7891 /* Fill out hash function seed */
7893 u32 *seed_dw = (u32 *)seed;
7895 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7896 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7900 u32 *lut_dw = (u32 *)lut;
7902 if (lut_size != I40E_HLUT_ARRAY_SIZE)
7905 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
7906 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
7914 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
7915 * @vsi: Pointer to VSI structure
7916 * @seed: Buffer to store the keys
7917 * @lut: Buffer to store the lookup table entries
7918 * @lut_size: Size of buffer to store the lookup table entries
7920 * Returns 0 on success, negative on failure
7922 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
7923 u8 *lut, u16 lut_size)
7925 struct i40e_pf *pf = vsi->back;
7926 struct i40e_hw *hw = &pf->hw;
7930 u32 *seed_dw = (u32 *)seed;
7932 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7933 seed_dw[i] = rd32(hw, I40E_PFQF_HKEY(i));
7936 u32 *lut_dw = (u32 *)lut;
7938 if (lut_size != I40E_HLUT_ARRAY_SIZE)
7940 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
7941 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
7948 * i40e_config_rss - Configure RSS keys and lut
7949 * @vsi: Pointer to VSI structure
7950 * @seed: RSS hash seed
7951 * @lut: Lookup table
7952 * @lut_size: Lookup table size
7954 * Returns 0 on success, negative on failure
7956 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
7958 struct i40e_pf *pf = vsi->back;
7960 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7961 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
7963 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
7967 * i40e_get_rss - Get RSS keys and lut
7968 * @vsi: Pointer to VSI structure
7969 * @seed: Buffer to store the keys
7970 * @lut: Buffer to store the lookup table entries
7971 * lut_size: Size of buffer to store the lookup table entries
7973 * Returns 0 on success, negative on failure
7975 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
7977 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
7981 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
7982 * @pf: Pointer to board private structure
7983 * @lut: Lookup table
7984 * @rss_table_size: Lookup table size
7985 * @rss_size: Range of queue number for hashing
7987 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
7988 u16 rss_table_size, u16 rss_size)
7992 for (i = 0; i < rss_table_size; i++)
7993 lut[i] = i % rss_size;
7997 * i40e_pf_config_rss - Prepare for RSS if used
7998 * @pf: board private structure
8000 static int i40e_pf_config_rss(struct i40e_pf *pf)
8002 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8003 u8 seed[I40E_HKEY_ARRAY_SIZE];
8005 struct i40e_hw *hw = &pf->hw;
8010 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8011 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
8012 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
8013 hena |= i40e_pf_get_default_rss_hena(pf);
8015 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
8016 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8018 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
8020 /* Determine the RSS table size based on the hardware capabilities */
8021 reg_val = rd32(hw, I40E_PFQF_CTL_0);
8022 reg_val = (pf->rss_table_size == 512) ?
8023 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8024 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8025 wr32(hw, I40E_PFQF_CTL_0, reg_val);
8027 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8031 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8033 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8034 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8042 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8043 * @pf: board private structure
8044 * @queue_count: the requested queue count for rss.
8046 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8047 * count which may be different from the requested queue count.
8049 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8051 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8054 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8057 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8059 if (queue_count != vsi->num_queue_pairs) {
8060 vsi->req_queue_pairs = queue_count;
8061 i40e_prep_for_reset(pf);
8063 pf->rss_size = new_rss_size;
8065 i40e_reset_and_rebuild(pf, true);
8066 i40e_pf_config_rss(pf);
8068 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
8069 return pf->rss_size;
8073 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8074 * @pf: board private structure
8076 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8079 bool min_valid, max_valid;
8082 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8083 &min_valid, &max_valid);
8087 pf->npar_min_bw = min_bw;
8089 pf->npar_max_bw = max_bw;
8096 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8097 * @pf: board private structure
8099 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8101 struct i40e_aqc_configure_partition_bw_data bw_data;
8104 /* Set the valid bit for this PF */
8105 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8106 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8107 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8109 /* Set the new bandwidths */
8110 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8116 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8117 * @pf: board private structure
8119 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8121 /* Commit temporary BW setting to permanent NVM image */
8122 enum i40e_admin_queue_err last_aq_status;
8126 if (pf->hw.partition_id != 1) {
8127 dev_info(&pf->pdev->dev,
8128 "Commit BW only works on partition 1! This is partition %d",
8129 pf->hw.partition_id);
8130 ret = I40E_NOT_SUPPORTED;
8134 /* Acquire NVM for read access */
8135 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8136 last_aq_status = pf->hw.aq.asq_last_status;
8138 dev_info(&pf->pdev->dev,
8139 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8140 i40e_stat_str(&pf->hw, ret),
8141 i40e_aq_str(&pf->hw, last_aq_status));
8145 /* Read word 0x10 of NVM - SW compatibility word 1 */
8146 ret = i40e_aq_read_nvm(&pf->hw,
8147 I40E_SR_NVM_CONTROL_WORD,
8148 0x10, sizeof(nvm_word), &nvm_word,
8150 /* Save off last admin queue command status before releasing
8153 last_aq_status = pf->hw.aq.asq_last_status;
8154 i40e_release_nvm(&pf->hw);
8156 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8157 i40e_stat_str(&pf->hw, ret),
8158 i40e_aq_str(&pf->hw, last_aq_status));
8162 /* Wait a bit for NVM release to complete */
8165 /* Acquire NVM for write access */
8166 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8167 last_aq_status = pf->hw.aq.asq_last_status;
8169 dev_info(&pf->pdev->dev,
8170 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8171 i40e_stat_str(&pf->hw, ret),
8172 i40e_aq_str(&pf->hw, last_aq_status));
8175 /* Write it back out unchanged to initiate update NVM,
8176 * which will force a write of the shadow (alt) RAM to
8177 * the NVM - thus storing the bandwidth values permanently.
8179 ret = i40e_aq_update_nvm(&pf->hw,
8180 I40E_SR_NVM_CONTROL_WORD,
8181 0x10, sizeof(nvm_word),
8182 &nvm_word, true, NULL);
8183 /* Save off last admin queue command status before releasing
8186 last_aq_status = pf->hw.aq.asq_last_status;
8187 i40e_release_nvm(&pf->hw);
8189 dev_info(&pf->pdev->dev,
8190 "BW settings NOT SAVED, err %s aq_err %s\n",
8191 i40e_stat_str(&pf->hw, ret),
8192 i40e_aq_str(&pf->hw, last_aq_status));
8199 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8200 * @pf: board private structure to initialize
8202 * i40e_sw_init initializes the Adapter private data structure.
8203 * Fields are initialized based on PCI device information and
8204 * OS network device settings (MTU size).
8206 static int i40e_sw_init(struct i40e_pf *pf)
8211 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8212 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8213 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
8214 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8215 if (I40E_DEBUG_USER & debug)
8216 pf->hw.debug_mask = debug;
8217 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8218 I40E_DEFAULT_MSG_ENABLE);
8221 /* Set default capability flags */
8222 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8223 I40E_FLAG_MSI_ENABLED |
8224 I40E_FLAG_LINK_POLLING_ENABLED |
8225 I40E_FLAG_MSIX_ENABLED;
8227 if (iommu_present(&pci_bus_type))
8228 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
8230 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
8232 /* Set default ITR */
8233 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8234 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8236 /* Depending on PF configurations, it is possible that the RSS
8237 * maximum might end up larger than the available queues
8239 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8241 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8242 pf->rss_size_max = min_t(int, pf->rss_size_max,
8243 pf->hw.func_caps.num_tx_qp);
8244 if (pf->hw.func_caps.rss) {
8245 pf->flags |= I40E_FLAG_RSS_ENABLED;
8246 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
8249 /* MFP mode enabled */
8250 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8251 pf->flags |= I40E_FLAG_MFP_ENABLED;
8252 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8253 if (i40e_get_npar_bw_setting(pf))
8254 dev_warn(&pf->pdev->dev,
8255 "Could not get NPAR bw settings\n");
8257 dev_info(&pf->pdev->dev,
8258 "Min BW = %8.8x, Max BW = %8.8x\n",
8259 pf->npar_min_bw, pf->npar_max_bw);
8262 /* FW/NVM is not yet fixed in this regard */
8263 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8264 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8265 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8266 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8267 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8268 pf->hw.num_partitions > 1)
8269 dev_info(&pf->pdev->dev,
8270 "Flow Director Sideband mode Disabled in MFP mode\n");
8272 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8273 pf->fdir_pf_filter_count =
8274 pf->hw.func_caps.fd_filters_guaranteed;
8275 pf->hw.fdir_shared_filter_count =
8276 pf->hw.func_caps.fd_filters_best_effort;
8279 if (pf->hw.func_caps.vmdq) {
8280 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8281 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8282 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8286 i40e_init_pf_fcoe(pf);
8288 #endif /* I40E_FCOE */
8289 #ifdef CONFIG_PCI_IOV
8290 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8291 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8292 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8293 pf->num_req_vfs = min_t(int,
8294 pf->hw.func_caps.num_vfs,
8297 #endif /* CONFIG_PCI_IOV */
8298 if (pf->hw.mac.type == I40E_MAC_X722) {
8299 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8300 I40E_FLAG_128_QP_RSS_CAPABLE |
8301 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8302 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8303 I40E_FLAG_WB_ON_ITR_CAPABLE |
8304 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
8306 pf->eeprom_version = 0xDEAD;
8307 pf->lan_veb = I40E_NO_VEB;
8308 pf->lan_vsi = I40E_NO_VSI;
8310 /* By default FW has this off for performance reasons */
8311 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8313 /* set up queue assignment tracking */
8314 size = sizeof(struct i40e_lump_tracking)
8315 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8316 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8321 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8322 pf->qp_pile->search_hint = 0;
8324 pf->tx_timeout_recovery_level = 1;
8326 mutex_init(&pf->switch_mutex);
8328 /* If NPAR is enabled nudge the Tx scheduler */
8329 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8330 i40e_set_npar_bw_setting(pf);
8337 * i40e_set_ntuple - set the ntuple feature flag and take action
8338 * @pf: board private structure to initialize
8339 * @features: the feature set that the stack is suggesting
8341 * returns a bool to indicate if reset needs to happen
8343 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8345 bool need_reset = false;
8347 /* Check if Flow Director n-tuple support was enabled or disabled. If
8348 * the state changed, we need to reset.
8350 if (features & NETIF_F_NTUPLE) {
8351 /* Enable filters and mark for reset */
8352 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8354 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8356 /* turn off filters, mark for reset and clear SW filter list */
8357 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8359 i40e_fdir_filter_exit(pf);
8361 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8362 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8363 /* reset fd counters */
8364 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8365 pf->fdir_pf_active_filters = 0;
8366 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8367 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8368 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8369 /* if ATR was auto disabled it can be re-enabled. */
8370 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8371 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8372 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8378 * i40e_set_features - set the netdev feature flags
8379 * @netdev: ptr to the netdev being adjusted
8380 * @features: the feature set that the stack is suggesting
8382 static int i40e_set_features(struct net_device *netdev,
8383 netdev_features_t features)
8385 struct i40e_netdev_priv *np = netdev_priv(netdev);
8386 struct i40e_vsi *vsi = np->vsi;
8387 struct i40e_pf *pf = vsi->back;
8390 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8391 i40e_vlan_stripping_enable(vsi);
8393 i40e_vlan_stripping_disable(vsi);
8395 need_reset = i40e_set_ntuple(pf, features);
8398 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8403 #ifdef CONFIG_I40E_VXLAN
8405 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8406 * @pf: board private structure
8407 * @port: The UDP port to look up
8409 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8411 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8415 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8416 if (pf->vxlan_ports[i] == port)
8424 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8425 * @netdev: This physical port's netdev
8426 * @sa_family: Socket Family that VXLAN is notifying us about
8427 * @port: New UDP port number that VXLAN started listening to
8429 static void i40e_add_vxlan_port(struct net_device *netdev,
8430 sa_family_t sa_family, __be16 port)
8432 struct i40e_netdev_priv *np = netdev_priv(netdev);
8433 struct i40e_vsi *vsi = np->vsi;
8434 struct i40e_pf *pf = vsi->back;
8438 if (sa_family == AF_INET6)
8441 idx = i40e_get_vxlan_port_idx(pf, port);
8443 /* Check if port already exists */
8444 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8445 netdev_info(netdev, "vxlan port %d already offloaded\n",
8450 /* Now check if there is space to add the new port */
8451 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8453 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8454 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8459 /* New port: add it and mark its index in the bitmap */
8460 pf->vxlan_ports[next_idx] = port;
8461 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8462 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8466 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8467 * @netdev: This physical port's netdev
8468 * @sa_family: Socket Family that VXLAN is notifying us about
8469 * @port: UDP port number that VXLAN stopped listening to
8471 static void i40e_del_vxlan_port(struct net_device *netdev,
8472 sa_family_t sa_family, __be16 port)
8474 struct i40e_netdev_priv *np = netdev_priv(netdev);
8475 struct i40e_vsi *vsi = np->vsi;
8476 struct i40e_pf *pf = vsi->back;
8479 if (sa_family == AF_INET6)
8482 idx = i40e_get_vxlan_port_idx(pf, port);
8484 /* Check if port already exists */
8485 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8486 /* if port exists, set it to 0 (mark for deletion)
8487 * and make it pending
8489 pf->vxlan_ports[idx] = 0;
8490 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8491 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8493 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8499 static int i40e_get_phys_port_id(struct net_device *netdev,
8500 struct netdev_phys_item_id *ppid)
8502 struct i40e_netdev_priv *np = netdev_priv(netdev);
8503 struct i40e_pf *pf = np->vsi->back;
8504 struct i40e_hw *hw = &pf->hw;
8506 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8509 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8510 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8516 * i40e_ndo_fdb_add - add an entry to the hardware database
8517 * @ndm: the input from the stack
8518 * @tb: pointer to array of nladdr (unused)
8519 * @dev: the net device pointer
8520 * @addr: the MAC address entry being added
8521 * @flags: instructions from stack about fdb operation
8523 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8524 struct net_device *dev,
8525 const unsigned char *addr, u16 vid,
8528 struct i40e_netdev_priv *np = netdev_priv(dev);
8529 struct i40e_pf *pf = np->vsi->back;
8532 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8536 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8540 /* Hardware does not support aging addresses so if a
8541 * ndm_state is given only allow permanent addresses
8543 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8544 netdev_info(dev, "FDB only supports static addresses\n");
8548 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8549 err = dev_uc_add_excl(dev, addr);
8550 else if (is_multicast_ether_addr(addr))
8551 err = dev_mc_add_excl(dev, addr);
8555 /* Only return duplicate errors if NLM_F_EXCL is set */
8556 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8563 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8564 * @dev: the netdev being configured
8565 * @nlh: RTNL message
8567 * Inserts a new hardware bridge if not already created and
8568 * enables the bridging mode requested (VEB or VEPA). If the
8569 * hardware bridge has already been inserted and the request
8570 * is to change the mode then that requires a PF reset to
8571 * allow rebuild of the components with required hardware
8572 * bridge mode enabled.
8574 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8575 struct nlmsghdr *nlh,
8578 struct i40e_netdev_priv *np = netdev_priv(dev);
8579 struct i40e_vsi *vsi = np->vsi;
8580 struct i40e_pf *pf = vsi->back;
8581 struct i40e_veb *veb = NULL;
8582 struct nlattr *attr, *br_spec;
8585 /* Only for PF VSI for now */
8586 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8589 /* Find the HW bridge for PF VSI */
8590 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8591 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8595 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8597 nla_for_each_nested(attr, br_spec, rem) {
8600 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8603 mode = nla_get_u16(attr);
8604 if ((mode != BRIDGE_MODE_VEPA) &&
8605 (mode != BRIDGE_MODE_VEB))
8608 /* Insert a new HW bridge */
8610 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8611 vsi->tc_config.enabled_tc);
8613 veb->bridge_mode = mode;
8614 i40e_config_bridge_mode(veb);
8616 /* No Bridge HW offload available */
8620 } else if (mode != veb->bridge_mode) {
8621 /* Existing HW bridge but different mode needs reset */
8622 veb->bridge_mode = mode;
8623 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8624 if (mode == BRIDGE_MODE_VEB)
8625 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8627 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8628 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8637 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8640 * @seq: RTNL message seq #
8641 * @dev: the netdev being configured
8642 * @filter_mask: unused
8643 * @nlflags: netlink flags passed in
8645 * Return the mode in which the hardware bridge is operating in
8648 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8649 struct net_device *dev,
8650 u32 __always_unused filter_mask,
8653 struct i40e_netdev_priv *np = netdev_priv(dev);
8654 struct i40e_vsi *vsi = np->vsi;
8655 struct i40e_pf *pf = vsi->back;
8656 struct i40e_veb *veb = NULL;
8659 /* Only for PF VSI for now */
8660 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8663 /* Find the HW bridge for the PF VSI */
8664 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8665 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8672 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8673 nlflags, 0, 0, filter_mask, NULL);
8676 #define I40E_MAX_TUNNEL_HDR_LEN 80
8678 * i40e_features_check - Validate encapsulated packet conforms to limits
8680 * @dev: This physical port's netdev
8681 * @features: Offload features that the stack believes apply
8683 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8684 struct net_device *dev,
8685 netdev_features_t features)
8687 if (skb->encapsulation &&
8688 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8689 I40E_MAX_TUNNEL_HDR_LEN))
8690 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8695 static const struct net_device_ops i40e_netdev_ops = {
8696 .ndo_open = i40e_open,
8697 .ndo_stop = i40e_close,
8698 .ndo_start_xmit = i40e_lan_xmit_frame,
8699 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8700 .ndo_set_rx_mode = i40e_set_rx_mode,
8701 .ndo_validate_addr = eth_validate_addr,
8702 .ndo_set_mac_address = i40e_set_mac,
8703 .ndo_change_mtu = i40e_change_mtu,
8704 .ndo_do_ioctl = i40e_ioctl,
8705 .ndo_tx_timeout = i40e_tx_timeout,
8706 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8707 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8708 #ifdef CONFIG_NET_POLL_CONTROLLER
8709 .ndo_poll_controller = i40e_netpoll,
8711 .ndo_setup_tc = i40e_setup_tc,
8713 .ndo_fcoe_enable = i40e_fcoe_enable,
8714 .ndo_fcoe_disable = i40e_fcoe_disable,
8716 .ndo_set_features = i40e_set_features,
8717 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8718 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8719 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8720 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8721 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8722 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8723 #ifdef CONFIG_I40E_VXLAN
8724 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8725 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8727 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8728 .ndo_fdb_add = i40e_ndo_fdb_add,
8729 .ndo_features_check = i40e_features_check,
8730 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8731 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8735 * i40e_config_netdev - Setup the netdev flags
8736 * @vsi: the VSI being configured
8738 * Returns 0 on success, negative value on failure
8740 static int i40e_config_netdev(struct i40e_vsi *vsi)
8742 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8743 struct i40e_pf *pf = vsi->back;
8744 struct i40e_hw *hw = &pf->hw;
8745 struct i40e_netdev_priv *np;
8746 struct net_device *netdev;
8747 u8 mac_addr[ETH_ALEN];
8750 etherdev_size = sizeof(struct i40e_netdev_priv);
8751 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8755 vsi->netdev = netdev;
8756 np = netdev_priv(netdev);
8759 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8760 NETIF_F_GSO_UDP_TUNNEL |
8764 netdev->features = NETIF_F_SG |
8768 NETIF_F_GSO_UDP_TUNNEL |
8770 NETIF_F_HW_VLAN_CTAG_TX |
8771 NETIF_F_HW_VLAN_CTAG_RX |
8772 NETIF_F_HW_VLAN_CTAG_FILTER |
8781 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8782 netdev->features |= NETIF_F_NTUPLE;
8784 /* copy netdev features into list of user selectable features */
8785 netdev->hw_features |= netdev->features;
8787 if (vsi->type == I40E_VSI_MAIN) {
8788 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8789 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8790 /* The following steps are necessary to prevent reception
8791 * of tagged packets - some older NVM configurations load a
8792 * default a MAC-VLAN filter that accepts any tagged packet
8793 * which must be replaced by a normal filter.
8795 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) {
8796 spin_lock_bh(&vsi->mac_filter_list_lock);
8797 i40e_add_filter(vsi, mac_addr,
8798 I40E_VLAN_ANY, false, true);
8799 spin_unlock_bh(&vsi->mac_filter_list_lock);
8802 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8803 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8804 pf->vsi[pf->lan_vsi]->netdev->name);
8805 random_ether_addr(mac_addr);
8807 spin_lock_bh(&vsi->mac_filter_list_lock);
8808 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8809 spin_unlock_bh(&vsi->mac_filter_list_lock);
8812 spin_lock_bh(&vsi->mac_filter_list_lock);
8813 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8814 spin_unlock_bh(&vsi->mac_filter_list_lock);
8816 ether_addr_copy(netdev->dev_addr, mac_addr);
8817 ether_addr_copy(netdev->perm_addr, mac_addr);
8818 /* vlan gets same features (except vlan offload)
8819 * after any tweaks for specific VSI types
8821 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8822 NETIF_F_HW_VLAN_CTAG_RX |
8823 NETIF_F_HW_VLAN_CTAG_FILTER);
8824 netdev->priv_flags |= IFF_UNICAST_FLT;
8825 netdev->priv_flags |= IFF_SUPP_NOFCS;
8826 /* Setup netdev TC information */
8827 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8829 netdev->netdev_ops = &i40e_netdev_ops;
8830 netdev->watchdog_timeo = 5 * HZ;
8831 i40e_set_ethtool_ops(netdev);
8833 i40e_fcoe_config_netdev(netdev, vsi);
8840 * i40e_vsi_delete - Delete a VSI from the switch
8841 * @vsi: the VSI being removed
8843 * Returns 0 on success, negative value on failure
8845 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8847 /* remove default VSI is not allowed */
8848 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8851 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8855 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8856 * @vsi: the VSI being queried
8858 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8860 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8862 struct i40e_veb *veb;
8863 struct i40e_pf *pf = vsi->back;
8865 /* Uplink is not a bridge so default to VEB */
8866 if (vsi->veb_idx == I40E_NO_VEB)
8869 veb = pf->veb[vsi->veb_idx];
8871 dev_info(&pf->pdev->dev,
8872 "There is no veb associated with the bridge\n");
8876 /* Uplink is a bridge in VEPA mode */
8877 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
8880 /* Uplink is a bridge in VEB mode */
8884 /* VEPA is now default bridge, so return 0 */
8889 * i40e_add_vsi - Add a VSI to the switch
8890 * @vsi: the VSI being configured
8892 * This initializes a VSI context depending on the VSI type to be added and
8893 * passes it down to the add_vsi aq command.
8895 static int i40e_add_vsi(struct i40e_vsi *vsi)
8898 u8 laa_macaddr[ETH_ALEN];
8899 bool found_laa_mac_filter = false;
8900 struct i40e_pf *pf = vsi->back;
8901 struct i40e_hw *hw = &pf->hw;
8902 struct i40e_vsi_context ctxt;
8903 struct i40e_mac_filter *f, *ftmp;
8905 u8 enabled_tc = 0x1; /* TC0 enabled */
8908 memset(&ctxt, 0, sizeof(ctxt));
8909 switch (vsi->type) {
8911 /* The PF's main VSI is already setup as part of the
8912 * device initialization, so we'll not bother with
8913 * the add_vsi call, but we will retrieve the current
8916 ctxt.seid = pf->main_vsi_seid;
8917 ctxt.pf_num = pf->hw.pf_id;
8919 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8920 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8922 dev_info(&pf->pdev->dev,
8923 "couldn't get PF vsi config, err %s aq_err %s\n",
8924 i40e_stat_str(&pf->hw, ret),
8925 i40e_aq_str(&pf->hw,
8926 pf->hw.aq.asq_last_status));
8929 vsi->info = ctxt.info;
8930 vsi->info.valid_sections = 0;
8932 vsi->seid = ctxt.seid;
8933 vsi->id = ctxt.vsi_number;
8935 enabled_tc = i40e_pf_get_tc_map(pf);
8937 /* MFP mode setup queue map and update VSI */
8938 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8939 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8940 memset(&ctxt, 0, sizeof(ctxt));
8941 ctxt.seid = pf->main_vsi_seid;
8942 ctxt.pf_num = pf->hw.pf_id;
8944 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8945 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8947 dev_info(&pf->pdev->dev,
8948 "update vsi failed, err %s aq_err %s\n",
8949 i40e_stat_str(&pf->hw, ret),
8950 i40e_aq_str(&pf->hw,
8951 pf->hw.aq.asq_last_status));
8955 /* update the local VSI info queue map */
8956 i40e_vsi_update_queue_map(vsi, &ctxt);
8957 vsi->info.valid_sections = 0;
8959 /* Default/Main VSI is only enabled for TC0
8960 * reconfigure it to enable all TCs that are
8961 * available on the port in SFP mode.
8962 * For MFP case the iSCSI PF would use this
8963 * flow to enable LAN+iSCSI TC.
8965 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8967 dev_info(&pf->pdev->dev,
8968 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8970 i40e_stat_str(&pf->hw, ret),
8971 i40e_aq_str(&pf->hw,
8972 pf->hw.aq.asq_last_status));
8979 ctxt.pf_num = hw->pf_id;
8981 ctxt.uplink_seid = vsi->uplink_seid;
8982 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8983 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8984 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8985 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8986 ctxt.info.valid_sections |=
8987 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8988 ctxt.info.switch_id =
8989 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8991 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8994 case I40E_VSI_VMDQ2:
8995 ctxt.pf_num = hw->pf_id;
8997 ctxt.uplink_seid = vsi->uplink_seid;
8998 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8999 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9001 /* This VSI is connected to VEB so the switch_id
9002 * should be set to zero by default.
9004 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9005 ctxt.info.valid_sections |=
9006 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9007 ctxt.info.switch_id =
9008 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9011 /* Setup the VSI tx/rx queue map for TC0 only for now */
9012 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9015 case I40E_VSI_SRIOV:
9016 ctxt.pf_num = hw->pf_id;
9017 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9018 ctxt.uplink_seid = vsi->uplink_seid;
9019 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9020 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9022 /* This VSI is connected to VEB so the switch_id
9023 * should be set to zero by default.
9025 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9026 ctxt.info.valid_sections |=
9027 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9028 ctxt.info.switch_id =
9029 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9032 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9033 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9034 if (pf->vf[vsi->vf_id].spoofchk) {
9035 ctxt.info.valid_sections |=
9036 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9037 ctxt.info.sec_flags |=
9038 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9039 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9041 /* Setup the VSI tx/rx queue map for TC0 only for now */
9042 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9047 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9049 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9054 #endif /* I40E_FCOE */
9059 if (vsi->type != I40E_VSI_MAIN) {
9060 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9062 dev_info(&vsi->back->pdev->dev,
9063 "add vsi failed, err %s aq_err %s\n",
9064 i40e_stat_str(&pf->hw, ret),
9065 i40e_aq_str(&pf->hw,
9066 pf->hw.aq.asq_last_status));
9070 vsi->info = ctxt.info;
9071 vsi->info.valid_sections = 0;
9072 vsi->seid = ctxt.seid;
9073 vsi->id = ctxt.vsi_number;
9076 spin_lock_bh(&vsi->mac_filter_list_lock);
9077 /* If macvlan filters already exist, force them to get loaded */
9078 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9082 /* Expected to have only one MAC filter entry for LAA in list */
9083 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
9084 ether_addr_copy(laa_macaddr, f->macaddr);
9085 found_laa_mac_filter = true;
9088 spin_unlock_bh(&vsi->mac_filter_list_lock);
9090 if (found_laa_mac_filter) {
9091 struct i40e_aqc_remove_macvlan_element_data element;
9093 memset(&element, 0, sizeof(element));
9094 ether_addr_copy(element.mac_addr, laa_macaddr);
9095 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
9096 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
9099 /* some older FW has a different default */
9101 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
9102 i40e_aq_remove_macvlan(hw, vsi->seid,
9106 i40e_aq_mac_address_write(hw,
9107 I40E_AQC_WRITE_TYPE_LAA_WOL,
9112 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9113 pf->flags |= I40E_FLAG_FILTER_SYNC;
9116 /* Update VSI BW information */
9117 ret = i40e_vsi_get_bw_info(vsi);
9119 dev_info(&pf->pdev->dev,
9120 "couldn't get vsi bw info, err %s aq_err %s\n",
9121 i40e_stat_str(&pf->hw, ret),
9122 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9123 /* VSI is already added so not tearing that up */
9132 * i40e_vsi_release - Delete a VSI and free its resources
9133 * @vsi: the VSI being removed
9135 * Returns 0 on success or < 0 on error
9137 int i40e_vsi_release(struct i40e_vsi *vsi)
9139 struct i40e_mac_filter *f, *ftmp;
9140 struct i40e_veb *veb = NULL;
9147 /* release of a VEB-owner or last VSI is not allowed */
9148 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9149 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9150 vsi->seid, vsi->uplink_seid);
9153 if (vsi == pf->vsi[pf->lan_vsi] &&
9154 !test_bit(__I40E_DOWN, &pf->state)) {
9155 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9159 uplink_seid = vsi->uplink_seid;
9160 if (vsi->type != I40E_VSI_SRIOV) {
9161 if (vsi->netdev_registered) {
9162 vsi->netdev_registered = false;
9164 /* results in a call to i40e_close() */
9165 unregister_netdev(vsi->netdev);
9168 i40e_vsi_close(vsi);
9170 i40e_vsi_disable_irq(vsi);
9173 spin_lock_bh(&vsi->mac_filter_list_lock);
9174 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9175 i40e_del_filter(vsi, f->macaddr, f->vlan,
9176 f->is_vf, f->is_netdev);
9177 spin_unlock_bh(&vsi->mac_filter_list_lock);
9179 i40e_sync_vsi_filters(vsi, false);
9181 i40e_vsi_delete(vsi);
9182 i40e_vsi_free_q_vectors(vsi);
9184 free_netdev(vsi->netdev);
9187 i40e_vsi_clear_rings(vsi);
9188 i40e_vsi_clear(vsi);
9190 /* If this was the last thing on the VEB, except for the
9191 * controlling VSI, remove the VEB, which puts the controlling
9192 * VSI onto the next level down in the switch.
9194 * Well, okay, there's one more exception here: don't remove
9195 * the orphan VEBs yet. We'll wait for an explicit remove request
9196 * from up the network stack.
9198 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9200 pf->vsi[i]->uplink_seid == uplink_seid &&
9201 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9202 n++; /* count the VSIs */
9205 for (i = 0; i < I40E_MAX_VEB; i++) {
9208 if (pf->veb[i]->uplink_seid == uplink_seid)
9209 n++; /* count the VEBs */
9210 if (pf->veb[i]->seid == uplink_seid)
9213 if (n == 0 && veb && veb->uplink_seid != 0)
9214 i40e_veb_release(veb);
9220 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9221 * @vsi: ptr to the VSI
9223 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9224 * corresponding SW VSI structure and initializes num_queue_pairs for the
9225 * newly allocated VSI.
9227 * Returns 0 on success or negative on failure
9229 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9232 struct i40e_pf *pf = vsi->back;
9234 if (vsi->q_vectors[0]) {
9235 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9240 if (vsi->base_vector) {
9241 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9242 vsi->seid, vsi->base_vector);
9246 ret = i40e_vsi_alloc_q_vectors(vsi);
9248 dev_info(&pf->pdev->dev,
9249 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9250 vsi->num_q_vectors, vsi->seid, ret);
9251 vsi->num_q_vectors = 0;
9252 goto vector_setup_out;
9255 /* In Legacy mode, we do not have to get any other vector since we
9256 * piggyback on the misc/ICR0 for queue interrupts.
9258 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9260 if (vsi->num_q_vectors)
9261 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9262 vsi->num_q_vectors, vsi->idx);
9263 if (vsi->base_vector < 0) {
9264 dev_info(&pf->pdev->dev,
9265 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9266 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9267 i40e_vsi_free_q_vectors(vsi);
9269 goto vector_setup_out;
9277 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9278 * @vsi: pointer to the vsi.
9280 * This re-allocates a vsi's queue resources.
9282 * Returns pointer to the successfully allocated and configured VSI sw struct
9283 * on success, otherwise returns NULL on failure.
9285 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9287 struct i40e_pf *pf = vsi->back;
9291 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9292 i40e_vsi_clear_rings(vsi);
9294 i40e_vsi_free_arrays(vsi, false);
9295 i40e_set_num_rings_in_vsi(vsi);
9296 ret = i40e_vsi_alloc_arrays(vsi, false);
9300 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9302 dev_info(&pf->pdev->dev,
9303 "failed to get tracking for %d queues for VSI %d err %d\n",
9304 vsi->alloc_queue_pairs, vsi->seid, ret);
9307 vsi->base_queue = ret;
9309 /* Update the FW view of the VSI. Force a reset of TC and queue
9310 * layout configurations.
9312 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9313 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9314 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9315 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9317 /* assign it some queues */
9318 ret = i40e_alloc_rings(vsi);
9322 /* map all of the rings to the q_vectors */
9323 i40e_vsi_map_rings_to_vectors(vsi);
9327 i40e_vsi_free_q_vectors(vsi);
9328 if (vsi->netdev_registered) {
9329 vsi->netdev_registered = false;
9330 unregister_netdev(vsi->netdev);
9331 free_netdev(vsi->netdev);
9334 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9336 i40e_vsi_clear(vsi);
9341 * i40e_vsi_setup - Set up a VSI by a given type
9342 * @pf: board private structure
9344 * @uplink_seid: the switch element to link to
9345 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9347 * This allocates the sw VSI structure and its queue resources, then add a VSI
9348 * to the identified VEB.
9350 * Returns pointer to the successfully allocated and configure VSI sw struct on
9351 * success, otherwise returns NULL on failure.
9353 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9354 u16 uplink_seid, u32 param1)
9356 struct i40e_vsi *vsi = NULL;
9357 struct i40e_veb *veb = NULL;
9361 /* The requested uplink_seid must be either
9362 * - the PF's port seid
9363 * no VEB is needed because this is the PF
9364 * or this is a Flow Director special case VSI
9365 * - seid of an existing VEB
9366 * - seid of a VSI that owns an existing VEB
9367 * - seid of a VSI that doesn't own a VEB
9368 * a new VEB is created and the VSI becomes the owner
9369 * - seid of the PF VSI, which is what creates the first VEB
9370 * this is a special case of the previous
9372 * Find which uplink_seid we were given and create a new VEB if needed
9374 for (i = 0; i < I40E_MAX_VEB; i++) {
9375 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9381 if (!veb && uplink_seid != pf->mac_seid) {
9383 for (i = 0; i < pf->num_alloc_vsi; i++) {
9384 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9390 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9395 if (vsi->uplink_seid == pf->mac_seid)
9396 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9397 vsi->tc_config.enabled_tc);
9398 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9399 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9400 vsi->tc_config.enabled_tc);
9402 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9403 dev_info(&vsi->back->pdev->dev,
9404 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9407 /* We come up by default in VEPA mode if SRIOV is not
9408 * already enabled, in which case we can't force VEPA
9411 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9412 veb->bridge_mode = BRIDGE_MODE_VEPA;
9413 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9415 i40e_config_bridge_mode(veb);
9417 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9418 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9422 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9426 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9427 uplink_seid = veb->seid;
9430 /* get vsi sw struct */
9431 v_idx = i40e_vsi_mem_alloc(pf, type);
9434 vsi = pf->vsi[v_idx];
9438 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9440 if (type == I40E_VSI_MAIN)
9441 pf->lan_vsi = v_idx;
9442 else if (type == I40E_VSI_SRIOV)
9443 vsi->vf_id = param1;
9444 /* assign it some queues */
9445 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9448 dev_info(&pf->pdev->dev,
9449 "failed to get tracking for %d queues for VSI %d err=%d\n",
9450 vsi->alloc_queue_pairs, vsi->seid, ret);
9453 vsi->base_queue = ret;
9455 /* get a VSI from the hardware */
9456 vsi->uplink_seid = uplink_seid;
9457 ret = i40e_add_vsi(vsi);
9461 switch (vsi->type) {
9462 /* setup the netdev if needed */
9464 case I40E_VSI_VMDQ2:
9466 ret = i40e_config_netdev(vsi);
9469 ret = register_netdev(vsi->netdev);
9472 vsi->netdev_registered = true;
9473 netif_carrier_off(vsi->netdev);
9474 #ifdef CONFIG_I40E_DCB
9475 /* Setup DCB netlink interface */
9476 i40e_dcbnl_setup(vsi);
9477 #endif /* CONFIG_I40E_DCB */
9481 /* set up vectors and rings if needed */
9482 ret = i40e_vsi_setup_vectors(vsi);
9486 ret = i40e_alloc_rings(vsi);
9490 /* map all of the rings to the q_vectors */
9491 i40e_vsi_map_rings_to_vectors(vsi);
9493 i40e_vsi_reset_stats(vsi);
9497 /* no netdev or rings for the other VSI types */
9501 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9502 (vsi->type == I40E_VSI_VMDQ2)) {
9503 ret = i40e_vsi_config_rss(vsi);
9508 i40e_vsi_free_q_vectors(vsi);
9510 if (vsi->netdev_registered) {
9511 vsi->netdev_registered = false;
9512 unregister_netdev(vsi->netdev);
9513 free_netdev(vsi->netdev);
9517 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9519 i40e_vsi_clear(vsi);
9525 * i40e_veb_get_bw_info - Query VEB BW information
9526 * @veb: the veb to query
9528 * Query the Tx scheduler BW configuration data for given VEB
9530 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9532 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9533 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9534 struct i40e_pf *pf = veb->pf;
9535 struct i40e_hw *hw = &pf->hw;
9540 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9543 dev_info(&pf->pdev->dev,
9544 "query veb bw config failed, err %s aq_err %s\n",
9545 i40e_stat_str(&pf->hw, ret),
9546 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9550 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9553 dev_info(&pf->pdev->dev,
9554 "query veb bw ets config failed, err %s aq_err %s\n",
9555 i40e_stat_str(&pf->hw, ret),
9556 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9560 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9561 veb->bw_max_quanta = ets_data.tc_bw_max;
9562 veb->is_abs_credits = bw_data.absolute_credits_enable;
9563 veb->enabled_tc = ets_data.tc_valid_bits;
9564 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9565 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9566 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9567 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9568 veb->bw_tc_limit_credits[i] =
9569 le16_to_cpu(bw_data.tc_bw_limits[i]);
9570 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9578 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9579 * @pf: board private structure
9581 * On error: returns error code (negative)
9582 * On success: returns vsi index in PF (positive)
9584 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9587 struct i40e_veb *veb;
9590 /* Need to protect the allocation of switch elements at the PF level */
9591 mutex_lock(&pf->switch_mutex);
9593 /* VEB list may be fragmented if VEB creation/destruction has
9594 * been happening. We can afford to do a quick scan to look
9595 * for any free slots in the list.
9597 * find next empty veb slot, looping back around if necessary
9600 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9602 if (i >= I40E_MAX_VEB) {
9604 goto err_alloc_veb; /* out of VEB slots! */
9607 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9614 veb->enabled_tc = 1;
9619 mutex_unlock(&pf->switch_mutex);
9624 * i40e_switch_branch_release - Delete a branch of the switch tree
9625 * @branch: where to start deleting
9627 * This uses recursion to find the tips of the branch to be
9628 * removed, deleting until we get back to and can delete this VEB.
9630 static void i40e_switch_branch_release(struct i40e_veb *branch)
9632 struct i40e_pf *pf = branch->pf;
9633 u16 branch_seid = branch->seid;
9634 u16 veb_idx = branch->idx;
9637 /* release any VEBs on this VEB - RECURSION */
9638 for (i = 0; i < I40E_MAX_VEB; i++) {
9641 if (pf->veb[i]->uplink_seid == branch->seid)
9642 i40e_switch_branch_release(pf->veb[i]);
9645 /* Release the VSIs on this VEB, but not the owner VSI.
9647 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9648 * the VEB itself, so don't use (*branch) after this loop.
9650 for (i = 0; i < pf->num_alloc_vsi; i++) {
9653 if (pf->vsi[i]->uplink_seid == branch_seid &&
9654 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9655 i40e_vsi_release(pf->vsi[i]);
9659 /* There's one corner case where the VEB might not have been
9660 * removed, so double check it here and remove it if needed.
9661 * This case happens if the veb was created from the debugfs
9662 * commands and no VSIs were added to it.
9664 if (pf->veb[veb_idx])
9665 i40e_veb_release(pf->veb[veb_idx]);
9669 * i40e_veb_clear - remove veb struct
9670 * @veb: the veb to remove
9672 static void i40e_veb_clear(struct i40e_veb *veb)
9678 struct i40e_pf *pf = veb->pf;
9680 mutex_lock(&pf->switch_mutex);
9681 if (pf->veb[veb->idx] == veb)
9682 pf->veb[veb->idx] = NULL;
9683 mutex_unlock(&pf->switch_mutex);
9690 * i40e_veb_release - Delete a VEB and free its resources
9691 * @veb: the VEB being removed
9693 void i40e_veb_release(struct i40e_veb *veb)
9695 struct i40e_vsi *vsi = NULL;
9701 /* find the remaining VSI and check for extras */
9702 for (i = 0; i < pf->num_alloc_vsi; i++) {
9703 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9709 dev_info(&pf->pdev->dev,
9710 "can't remove VEB %d with %d VSIs left\n",
9715 /* move the remaining VSI to uplink veb */
9716 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9717 if (veb->uplink_seid) {
9718 vsi->uplink_seid = veb->uplink_seid;
9719 if (veb->uplink_seid == pf->mac_seid)
9720 vsi->veb_idx = I40E_NO_VEB;
9722 vsi->veb_idx = veb->veb_idx;
9725 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9726 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9729 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9730 i40e_veb_clear(veb);
9734 * i40e_add_veb - create the VEB in the switch
9735 * @veb: the VEB to be instantiated
9736 * @vsi: the controlling VSI
9738 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9740 struct i40e_pf *pf = veb->pf;
9741 bool is_default = veb->pf->cur_promisc;
9742 bool is_cloud = false;
9745 /* get a VEB from the hardware */
9746 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9747 veb->enabled_tc, is_default,
9748 is_cloud, &veb->seid, NULL);
9750 dev_info(&pf->pdev->dev,
9751 "couldn't add VEB, err %s aq_err %s\n",
9752 i40e_stat_str(&pf->hw, ret),
9753 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9757 /* get statistics counter */
9758 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9759 &veb->stats_idx, NULL, NULL, NULL);
9761 dev_info(&pf->pdev->dev,
9762 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9763 i40e_stat_str(&pf->hw, ret),
9764 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9767 ret = i40e_veb_get_bw_info(veb);
9769 dev_info(&pf->pdev->dev,
9770 "couldn't get VEB bw info, err %s aq_err %s\n",
9771 i40e_stat_str(&pf->hw, ret),
9772 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9773 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9777 vsi->uplink_seid = veb->seid;
9778 vsi->veb_idx = veb->idx;
9779 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9785 * i40e_veb_setup - Set up a VEB
9786 * @pf: board private structure
9787 * @flags: VEB setup flags
9788 * @uplink_seid: the switch element to link to
9789 * @vsi_seid: the initial VSI seid
9790 * @enabled_tc: Enabled TC bit-map
9792 * This allocates the sw VEB structure and links it into the switch
9793 * It is possible and legal for this to be a duplicate of an already
9794 * existing VEB. It is also possible for both uplink and vsi seids
9795 * to be zero, in order to create a floating VEB.
9797 * Returns pointer to the successfully allocated VEB sw struct on
9798 * success, otherwise returns NULL on failure.
9800 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9801 u16 uplink_seid, u16 vsi_seid,
9804 struct i40e_veb *veb, *uplink_veb = NULL;
9805 int vsi_idx, veb_idx;
9808 /* if one seid is 0, the other must be 0 to create a floating relay */
9809 if ((uplink_seid == 0 || vsi_seid == 0) &&
9810 (uplink_seid + vsi_seid != 0)) {
9811 dev_info(&pf->pdev->dev,
9812 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9813 uplink_seid, vsi_seid);
9817 /* make sure there is such a vsi and uplink */
9818 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9819 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9821 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9822 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9827 if (uplink_seid && uplink_seid != pf->mac_seid) {
9828 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9829 if (pf->veb[veb_idx] &&
9830 pf->veb[veb_idx]->seid == uplink_seid) {
9831 uplink_veb = pf->veb[veb_idx];
9836 dev_info(&pf->pdev->dev,
9837 "uplink seid %d not found\n", uplink_seid);
9842 /* get veb sw struct */
9843 veb_idx = i40e_veb_mem_alloc(pf);
9846 veb = pf->veb[veb_idx];
9848 veb->uplink_seid = uplink_seid;
9849 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9850 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9852 /* create the VEB in the switch */
9853 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9856 if (vsi_idx == pf->lan_vsi)
9857 pf->lan_veb = veb->idx;
9862 i40e_veb_clear(veb);
9868 * i40e_setup_pf_switch_element - set PF vars based on switch type
9869 * @pf: board private structure
9870 * @ele: element we are building info from
9871 * @num_reported: total number of elements
9872 * @printconfig: should we print the contents
9874 * helper function to assist in extracting a few useful SEID values.
9876 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9877 struct i40e_aqc_switch_config_element_resp *ele,
9878 u16 num_reported, bool printconfig)
9880 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9881 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9882 u8 element_type = ele->element_type;
9883 u16 seid = le16_to_cpu(ele->seid);
9886 dev_info(&pf->pdev->dev,
9887 "type=%d seid=%d uplink=%d downlink=%d\n",
9888 element_type, seid, uplink_seid, downlink_seid);
9890 switch (element_type) {
9891 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9892 pf->mac_seid = seid;
9894 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9896 if (uplink_seid != pf->mac_seid)
9898 if (pf->lan_veb == I40E_NO_VEB) {
9901 /* find existing or else empty VEB */
9902 for (v = 0; v < I40E_MAX_VEB; v++) {
9903 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9908 if (pf->lan_veb == I40E_NO_VEB) {
9909 v = i40e_veb_mem_alloc(pf);
9916 pf->veb[pf->lan_veb]->seid = seid;
9917 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9918 pf->veb[pf->lan_veb]->pf = pf;
9919 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9921 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9922 if (num_reported != 1)
9924 /* This is immediately after a reset so we can assume this is
9927 pf->mac_seid = uplink_seid;
9928 pf->pf_seid = downlink_seid;
9929 pf->main_vsi_seid = seid;
9931 dev_info(&pf->pdev->dev,
9932 "pf_seid=%d main_vsi_seid=%d\n",
9933 pf->pf_seid, pf->main_vsi_seid);
9935 case I40E_SWITCH_ELEMENT_TYPE_PF:
9936 case I40E_SWITCH_ELEMENT_TYPE_VF:
9937 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9938 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9939 case I40E_SWITCH_ELEMENT_TYPE_PE:
9940 case I40E_SWITCH_ELEMENT_TYPE_PA:
9941 /* ignore these for now */
9944 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9945 element_type, seid);
9951 * i40e_fetch_switch_configuration - Get switch config from firmware
9952 * @pf: board private structure
9953 * @printconfig: should we print the contents
9955 * Get the current switch configuration from the device and
9956 * extract a few useful SEID values.
9958 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9960 struct i40e_aqc_get_switch_config_resp *sw_config;
9966 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9970 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9972 u16 num_reported, num_total;
9974 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9978 dev_info(&pf->pdev->dev,
9979 "get switch config failed err %s aq_err %s\n",
9980 i40e_stat_str(&pf->hw, ret),
9981 i40e_aq_str(&pf->hw,
9982 pf->hw.aq.asq_last_status));
9987 num_reported = le16_to_cpu(sw_config->header.num_reported);
9988 num_total = le16_to_cpu(sw_config->header.num_total);
9991 dev_info(&pf->pdev->dev,
9992 "header: %d reported %d total\n",
9993 num_reported, num_total);
9995 for (i = 0; i < num_reported; i++) {
9996 struct i40e_aqc_switch_config_element_resp *ele =
9997 &sw_config->element[i];
9999 i40e_setup_pf_switch_element(pf, ele, num_reported,
10002 } while (next_seid != 0);
10009 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10010 * @pf: board private structure
10011 * @reinit: if the Main VSI needs to re-initialized.
10013 * Returns 0 on success, negative value on failure
10015 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10019 /* find out what's out there already */
10020 ret = i40e_fetch_switch_configuration(pf, false);
10022 dev_info(&pf->pdev->dev,
10023 "couldn't fetch switch config, err %s aq_err %s\n",
10024 i40e_stat_str(&pf->hw, ret),
10025 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10028 i40e_pf_reset_stats(pf);
10030 /* first time setup */
10031 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10032 struct i40e_vsi *vsi = NULL;
10035 /* Set up the PF VSI associated with the PF's main VSI
10036 * that is already in the HW switch
10038 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10039 uplink_seid = pf->veb[pf->lan_veb]->seid;
10041 uplink_seid = pf->mac_seid;
10042 if (pf->lan_vsi == I40E_NO_VSI)
10043 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10045 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10047 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10048 i40e_fdir_teardown(pf);
10052 /* force a reset of TC and queue layout configurations */
10053 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10055 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10056 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10057 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10059 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10061 i40e_fdir_sb_setup(pf);
10063 /* Setup static PF queue filter control settings */
10064 ret = i40e_setup_pf_filter_control(pf);
10066 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10068 /* Failure here should not stop continuing other steps */
10071 /* enable RSS in the HW, even for only one queue, as the stack can use
10074 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10075 i40e_pf_config_rss(pf);
10077 /* fill in link information and enable LSE reporting */
10078 i40e_update_link_info(&pf->hw);
10079 i40e_link_event(pf);
10081 /* Initialize user-specific link properties */
10082 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10083 I40E_AQ_AN_COMPLETED) ? true : false);
10091 * i40e_determine_queue_usage - Work out queue distribution
10092 * @pf: board private structure
10094 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10098 pf->num_lan_qps = 0;
10100 pf->num_fcoe_qps = 0;
10103 /* Find the max queues to be put into basic use. We'll always be
10104 * using TC0, whether or not DCB is running, and TC0 will get the
10107 queues_left = pf->hw.func_caps.num_tx_qp;
10109 if ((queues_left == 1) ||
10110 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10111 /* one qp for PF, no queues for anything else */
10113 pf->rss_size = pf->num_lan_qps = 1;
10115 /* make sure all the fancies are disabled */
10116 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10118 I40E_FLAG_FCOE_ENABLED |
10120 I40E_FLAG_FD_SB_ENABLED |
10121 I40E_FLAG_FD_ATR_ENABLED |
10122 I40E_FLAG_DCB_CAPABLE |
10123 I40E_FLAG_SRIOV_ENABLED |
10124 I40E_FLAG_VMDQ_ENABLED);
10125 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10126 I40E_FLAG_FD_SB_ENABLED |
10127 I40E_FLAG_FD_ATR_ENABLED |
10128 I40E_FLAG_DCB_CAPABLE))) {
10129 /* one qp for PF */
10130 pf->rss_size = pf->num_lan_qps = 1;
10131 queues_left -= pf->num_lan_qps;
10133 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10135 I40E_FLAG_FCOE_ENABLED |
10137 I40E_FLAG_FD_SB_ENABLED |
10138 I40E_FLAG_FD_ATR_ENABLED |
10139 I40E_FLAG_DCB_ENABLED |
10140 I40E_FLAG_VMDQ_ENABLED);
10142 /* Not enough queues for all TCs */
10143 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10144 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10145 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10146 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10148 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10149 num_online_cpus());
10150 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10151 pf->hw.func_caps.num_tx_qp);
10153 queues_left -= pf->num_lan_qps;
10157 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10158 if (I40E_DEFAULT_FCOE <= queues_left) {
10159 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10160 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10161 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10163 pf->num_fcoe_qps = 0;
10164 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10165 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10168 queues_left -= pf->num_fcoe_qps;
10172 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10173 if (queues_left > 1) {
10174 queues_left -= 1; /* save 1 queue for FD */
10176 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10177 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10181 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10182 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10183 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10184 (queues_left / pf->num_vf_qps));
10185 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10188 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10189 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10190 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10191 (queues_left / pf->num_vmdq_qps));
10192 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10195 pf->queues_left = queues_left;
10196 dev_dbg(&pf->pdev->dev,
10197 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10198 pf->hw.func_caps.num_tx_qp,
10199 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10200 pf->num_lan_qps, pf->rss_size, pf->num_req_vfs, pf->num_vf_qps,
10201 pf->num_vmdq_vsis, pf->num_vmdq_qps, queues_left);
10203 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10208 * i40e_setup_pf_filter_control - Setup PF static filter control
10209 * @pf: PF to be setup
10211 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10212 * settings. If PE/FCoE are enabled then it will also set the per PF
10213 * based filter sizes required for them. It also enables Flow director,
10214 * ethertype and macvlan type filter settings for the pf.
10216 * Returns 0 on success, negative on failure
10218 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10220 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10222 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10224 /* Flow Director is enabled */
10225 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10226 settings->enable_fdir = true;
10228 /* Ethtype and MACVLAN filters enabled for PF */
10229 settings->enable_ethtype = true;
10230 settings->enable_macvlan = true;
10232 if (i40e_set_filter_control(&pf->hw, settings))
10238 #define INFO_STRING_LEN 255
10239 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10240 static void i40e_print_features(struct i40e_pf *pf)
10242 struct i40e_hw *hw = &pf->hw;
10243 char *buf, *string;
10246 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
10248 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
10254 i += snprintf(&buf[i], REMAIN(i), "Features: PF-id[%d] ", hw->pf_id);
10255 #ifdef CONFIG_PCI_IOV
10256 i += snprintf(&buf[i], REMAIN(i), "VFs: %d ", pf->num_req_vfs);
10258 i += snprintf(&buf[i], REMAIN(i), "VSIs: %d QP: %d RX: %s ",
10259 pf->hw.func_caps.num_vsis,
10260 pf->vsi[pf->lan_vsi]->num_queue_pairs,
10261 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
10263 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10264 i += snprintf(&buf[i], REMAIN(i), "RSS ");
10265 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10266 i += snprintf(&buf[i], REMAIN(i), "FD_ATR ");
10267 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10268 i += snprintf(&buf[i], REMAIN(i), "FD_SB ");
10269 i += snprintf(&buf[i], REMAIN(i), "NTUPLE ");
10271 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10272 i += snprintf(&buf[i], REMAIN(i), "DCB ");
10273 #if IS_ENABLED(CONFIG_VXLAN)
10274 i += snprintf(&buf[i], REMAIN(i), "VxLAN ");
10276 if (pf->flags & I40E_FLAG_PTP)
10277 i += snprintf(&buf[i], REMAIN(i), "PTP ");
10279 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10280 i += snprintf(&buf[i], REMAIN(i), "FCOE ");
10282 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10283 i += snprintf(&buf[i], REMAIN(i), "VEPA ");
10285 buf += sprintf(buf, "VEPA ");
10287 dev_info(&pf->pdev->dev, "%s\n", string);
10289 WARN_ON(i > INFO_STRING_LEN);
10293 * i40e_probe - Device initialization routine
10294 * @pdev: PCI device information struct
10295 * @ent: entry in i40e_pci_tbl
10297 * i40e_probe initializes a PF identified by a pci_dev structure.
10298 * The OS initialization, configuring of the PF private structure,
10299 * and a hardware reset occur.
10301 * Returns 0 on success, negative on failure
10303 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10305 struct i40e_aq_get_phy_abilities_resp abilities;
10306 struct i40e_pf *pf;
10307 struct i40e_hw *hw;
10308 static u16 pfs_found;
10317 err = pci_enable_device_mem(pdev);
10321 /* set up for high or low dma */
10322 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10324 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10326 dev_err(&pdev->dev,
10327 "DMA configuration failed: 0x%x\n", err);
10332 /* set up pci connections */
10333 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
10334 IORESOURCE_MEM), i40e_driver_name);
10336 dev_info(&pdev->dev,
10337 "pci_request_selected_regions failed %d\n", err);
10341 pci_enable_pcie_error_reporting(pdev);
10342 pci_set_master(pdev);
10344 /* Now that we have a PCI connection, we need to do the
10345 * low level device setup. This is primarily setting up
10346 * the Admin Queue structures and then querying for the
10347 * device's current profile information.
10349 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10356 set_bit(__I40E_DOWN, &pf->state);
10361 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10362 I40E_MAX_CSR_SPACE);
10364 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10365 if (!hw->hw_addr) {
10367 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10368 (unsigned int)pci_resource_start(pdev, 0),
10369 pf->ioremap_len, err);
10372 hw->vendor_id = pdev->vendor;
10373 hw->device_id = pdev->device;
10374 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10375 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10376 hw->subsystem_device_id = pdev->subsystem_device;
10377 hw->bus.device = PCI_SLOT(pdev->devfn);
10378 hw->bus.func = PCI_FUNC(pdev->devfn);
10379 pf->instance = pfs_found;
10382 pf->msg_enable = pf->hw.debug_mask;
10383 pf->msg_enable = debug;
10386 /* do a special CORER for clearing PXE mode once at init */
10387 if (hw->revision_id == 0 &&
10388 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10389 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10394 i40e_clear_pxe_mode(hw);
10397 /* Reset here to make sure all is clean and to define PF 'n' */
10399 err = i40e_pf_reset(hw);
10401 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10406 hw->aq.num_arq_entries = I40E_AQ_LEN;
10407 hw->aq.num_asq_entries = I40E_AQ_LEN;
10408 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10409 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10410 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10412 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10414 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10416 err = i40e_init_shared_code(hw);
10418 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10423 /* set up a default setting for link flow control */
10424 pf->hw.fc.requested_mode = I40E_FC_NONE;
10426 err = i40e_init_adminq(hw);
10428 /* provide nvm, fw, api versions */
10429 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10430 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10431 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10432 i40e_nvm_version_str(hw));
10435 dev_info(&pdev->dev,
10436 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10440 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10441 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10442 dev_info(&pdev->dev,
10443 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10444 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10445 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10446 dev_info(&pdev->dev,
10447 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10449 i40e_verify_eeprom(pf);
10451 /* Rev 0 hardware was never productized */
10452 if (hw->revision_id < 1)
10453 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10455 i40e_clear_pxe_mode(hw);
10456 err = i40e_get_capabilities(pf);
10458 goto err_adminq_setup;
10460 err = i40e_sw_init(pf);
10462 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10466 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10467 hw->func_caps.num_rx_qp,
10468 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10470 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10471 goto err_init_lan_hmc;
10474 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10476 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10478 goto err_configure_lan_hmc;
10481 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10482 * Ignore error return codes because if it was already disabled via
10483 * hardware settings this will fail
10485 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10486 (pf->hw.aq.fw_maj_ver < 4)) {
10487 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10488 i40e_aq_stop_lldp(hw, true, NULL);
10491 i40e_get_mac_addr(hw, hw->mac.addr);
10492 if (!is_valid_ether_addr(hw->mac.addr)) {
10493 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10497 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10498 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10499 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10500 if (is_valid_ether_addr(hw->mac.port_addr))
10501 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10503 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10505 dev_info(&pdev->dev,
10506 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10507 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10508 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10510 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10512 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10513 #endif /* I40E_FCOE */
10515 pci_set_drvdata(pdev, pf);
10516 pci_save_state(pdev);
10517 #ifdef CONFIG_I40E_DCB
10518 err = i40e_init_pf_dcb(pf);
10520 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10521 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10522 /* Continue without DCB enabled */
10524 #endif /* CONFIG_I40E_DCB */
10526 /* set up periodic task facility */
10527 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10528 pf->service_timer_period = HZ;
10530 INIT_WORK(&pf->service_task, i40e_service_task);
10531 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10532 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10534 /* NVM bit on means WoL disabled for the port */
10535 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10536 if ((1 << hw->port) & wol_nvm_bits || hw->partition_id != 1)
10537 pf->wol_en = false;
10540 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10542 /* set up the main switch operations */
10543 i40e_determine_queue_usage(pf);
10544 err = i40e_init_interrupt_scheme(pf);
10546 goto err_switch_setup;
10548 /* The number of VSIs reported by the FW is the minimum guaranteed
10549 * to us; HW supports far more and we share the remaining pool with
10550 * the other PFs. We allocate space for more than the guarantee with
10551 * the understanding that we might not get them all later.
10553 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10554 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10556 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10558 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10559 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10560 pf->vsi = kzalloc(len, GFP_KERNEL);
10563 goto err_switch_setup;
10566 #ifdef CONFIG_PCI_IOV
10567 /* prep for VF support */
10568 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10569 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10570 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10571 if (pci_num_vf(pdev))
10572 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10575 err = i40e_setup_pf_switch(pf, false);
10577 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10581 /* Make sure flow control is set according to current settings */
10582 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
10583 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
10584 dev_dbg(&pf->pdev->dev,
10585 "Set fc with err %s aq_err %s on get_phy_cap\n",
10586 i40e_stat_str(hw, err),
10587 i40e_aq_str(hw, hw->aq.asq_last_status));
10588 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
10589 dev_dbg(&pf->pdev->dev,
10590 "Set fc with err %s aq_err %s on set_phy_config\n",
10591 i40e_stat_str(hw, err),
10592 i40e_aq_str(hw, hw->aq.asq_last_status));
10593 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
10594 dev_dbg(&pf->pdev->dev,
10595 "Set fc with err %s aq_err %s on get_link_info\n",
10596 i40e_stat_str(hw, err),
10597 i40e_aq_str(hw, hw->aq.asq_last_status));
10599 /* if FDIR VSI was set up, start it now */
10600 for (i = 0; i < pf->num_alloc_vsi; i++) {
10601 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10602 i40e_vsi_open(pf->vsi[i]);
10607 /* driver is only interested in link up/down and module qualification
10608 * reports from firmware
10610 err = i40e_aq_set_phy_int_mask(&pf->hw,
10611 I40E_AQ_EVENT_LINK_UPDOWN |
10612 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10614 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10615 i40e_stat_str(&pf->hw, err),
10616 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10618 /* Reconfigure hardware for allowing smaller MSS in the case
10619 * of TSO, so that we avoid the MDD being fired and causing
10620 * a reset in the case of small MSS+TSO.
10622 val = rd32(hw, I40E_REG_MSS);
10623 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10624 val &= ~I40E_REG_MSS_MIN_MASK;
10625 val |= I40E_64BYTE_MSS;
10626 wr32(hw, I40E_REG_MSS, val);
10629 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10630 (pf->hw.aq.fw_maj_ver < 4)) {
10632 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10634 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10635 i40e_stat_str(&pf->hw, err),
10636 i40e_aq_str(&pf->hw,
10637 pf->hw.aq.asq_last_status));
10639 /* The main driver is (mostly) up and happy. We need to set this state
10640 * before setting up the misc vector or we get a race and the vector
10641 * ends up disabled forever.
10643 clear_bit(__I40E_DOWN, &pf->state);
10645 /* In case of MSIX we are going to setup the misc vector right here
10646 * to handle admin queue events etc. In case of legacy and MSI
10647 * the misc functionality and queue processing is combined in
10648 * the same vector and that gets setup at open.
10650 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10651 err = i40e_setup_misc_vector(pf);
10653 dev_info(&pdev->dev,
10654 "setup of misc vector failed: %d\n", err);
10659 #ifdef CONFIG_PCI_IOV
10660 /* prep for VF support */
10661 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10662 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10663 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10666 /* disable link interrupts for VFs */
10667 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10668 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10669 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10672 if (pci_num_vf(pdev)) {
10673 dev_info(&pdev->dev,
10674 "Active VFs found, allocating resources.\n");
10675 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10677 dev_info(&pdev->dev,
10678 "Error %d allocating resources for existing VFs\n",
10682 #endif /* CONFIG_PCI_IOV */
10686 i40e_dbg_pf_init(pf);
10688 /* tell the firmware that we're starting */
10689 i40e_send_version(pf);
10691 /* since everything's happy, start the service_task timer */
10692 mod_timer(&pf->service_timer,
10693 round_jiffies(jiffies + pf->service_timer_period));
10696 /* create FCoE interface */
10697 i40e_fcoe_vsi_setup(pf);
10700 #define PCI_SPEED_SIZE 8
10701 #define PCI_WIDTH_SIZE 8
10702 /* Devices on the IOSF bus do not have this information
10703 * and will report PCI Gen 1 x 1 by default so don't bother
10706 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
10707 char speed[PCI_SPEED_SIZE] = "Unknown";
10708 char width[PCI_WIDTH_SIZE] = "Unknown";
10710 /* Get the negotiated link width and speed from PCI config
10713 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
10716 i40e_set_pci_config_data(hw, link_status);
10718 switch (hw->bus.speed) {
10719 case i40e_bus_speed_8000:
10720 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
10721 case i40e_bus_speed_5000:
10722 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
10723 case i40e_bus_speed_2500:
10724 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
10728 switch (hw->bus.width) {
10729 case i40e_bus_width_pcie_x8:
10730 strncpy(width, "8", PCI_WIDTH_SIZE); break;
10731 case i40e_bus_width_pcie_x4:
10732 strncpy(width, "4", PCI_WIDTH_SIZE); break;
10733 case i40e_bus_width_pcie_x2:
10734 strncpy(width, "2", PCI_WIDTH_SIZE); break;
10735 case i40e_bus_width_pcie_x1:
10736 strncpy(width, "1", PCI_WIDTH_SIZE); break;
10741 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
10744 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10745 hw->bus.speed < i40e_bus_speed_8000) {
10746 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10747 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10751 /* get the requested speeds from the fw */
10752 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10754 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
10755 i40e_stat_str(&pf->hw, err),
10756 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10757 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10759 /* get the supported phy types from the fw */
10760 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
10762 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
10763 i40e_stat_str(&pf->hw, err),
10764 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10765 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
10767 /* Add a filter to drop all Flow control frames from any VSI from being
10768 * transmitted. By doing so we stop a malicious VF from sending out
10769 * PAUSE or PFC frames and potentially controlling traffic for other
10771 * The FW can still send Flow control frames if enabled.
10773 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
10774 pf->main_vsi_seid);
10776 /* print a string summarizing features */
10777 i40e_print_features(pf);
10781 /* Unwind what we've done if something failed in the setup */
10783 set_bit(__I40E_DOWN, &pf->state);
10784 i40e_clear_interrupt_scheme(pf);
10787 i40e_reset_interrupt_capability(pf);
10788 del_timer_sync(&pf->service_timer);
10790 err_configure_lan_hmc:
10791 (void)i40e_shutdown_lan_hmc(hw);
10793 kfree(pf->qp_pile);
10796 (void)i40e_shutdown_adminq(hw);
10798 iounmap(hw->hw_addr);
10802 pci_disable_pcie_error_reporting(pdev);
10803 pci_release_selected_regions(pdev,
10804 pci_select_bars(pdev, IORESOURCE_MEM));
10807 pci_disable_device(pdev);
10812 * i40e_remove - Device removal routine
10813 * @pdev: PCI device information struct
10815 * i40e_remove is called by the PCI subsystem to alert the driver
10816 * that is should release a PCI device. This could be caused by a
10817 * Hot-Plug event, or because the driver is going to be removed from
10820 static void i40e_remove(struct pci_dev *pdev)
10822 struct i40e_pf *pf = pci_get_drvdata(pdev);
10823 struct i40e_hw *hw = &pf->hw;
10824 i40e_status ret_code;
10827 i40e_dbg_pf_exit(pf);
10831 /* Disable RSS in hw */
10832 wr32(hw, I40E_PFQF_HENA(0), 0);
10833 wr32(hw, I40E_PFQF_HENA(1), 0);
10835 /* no more scheduling of any task */
10836 set_bit(__I40E_DOWN, &pf->state);
10837 del_timer_sync(&pf->service_timer);
10838 cancel_work_sync(&pf->service_task);
10839 i40e_fdir_teardown(pf);
10841 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10843 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10846 i40e_fdir_teardown(pf);
10848 /* If there is a switch structure or any orphans, remove them.
10849 * This will leave only the PF's VSI remaining.
10851 for (i = 0; i < I40E_MAX_VEB; i++) {
10855 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10856 pf->veb[i]->uplink_seid == 0)
10857 i40e_switch_branch_release(pf->veb[i]);
10860 /* Now we can shutdown the PF's VSI, just before we kill
10863 if (pf->vsi[pf->lan_vsi])
10864 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10866 /* shutdown and destroy the HMC */
10867 if (pf->hw.hmc.hmc_obj) {
10868 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10870 dev_warn(&pdev->dev,
10871 "Failed to destroy the HMC resources: %d\n",
10875 /* shutdown the adminq */
10876 ret_code = i40e_shutdown_adminq(&pf->hw);
10878 dev_warn(&pdev->dev,
10879 "Failed to destroy the Admin Queue resources: %d\n",
10882 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10883 i40e_clear_interrupt_scheme(pf);
10884 for (i = 0; i < pf->num_alloc_vsi; i++) {
10886 i40e_vsi_clear_rings(pf->vsi[i]);
10887 i40e_vsi_clear(pf->vsi[i]);
10892 for (i = 0; i < I40E_MAX_VEB; i++) {
10897 kfree(pf->qp_pile);
10900 iounmap(pf->hw.hw_addr);
10902 pci_release_selected_regions(pdev,
10903 pci_select_bars(pdev, IORESOURCE_MEM));
10905 pci_disable_pcie_error_reporting(pdev);
10906 pci_disable_device(pdev);
10910 * i40e_pci_error_detected - warning that something funky happened in PCI land
10911 * @pdev: PCI device information struct
10913 * Called to warn that something happened and the error handling steps
10914 * are in progress. Allows the driver to quiesce things, be ready for
10917 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10918 enum pci_channel_state error)
10920 struct i40e_pf *pf = pci_get_drvdata(pdev);
10922 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10924 /* shutdown all operations */
10925 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10927 i40e_prep_for_reset(pf);
10931 /* Request a slot reset */
10932 return PCI_ERS_RESULT_NEED_RESET;
10936 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10937 * @pdev: PCI device information struct
10939 * Called to find if the driver can work with the device now that
10940 * the pci slot has been reset. If a basic connection seems good
10941 * (registers are readable and have sane content) then return a
10942 * happy little PCI_ERS_RESULT_xxx.
10944 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10946 struct i40e_pf *pf = pci_get_drvdata(pdev);
10947 pci_ers_result_t result;
10951 dev_dbg(&pdev->dev, "%s\n", __func__);
10952 if (pci_enable_device_mem(pdev)) {
10953 dev_info(&pdev->dev,
10954 "Cannot re-enable PCI device after reset.\n");
10955 result = PCI_ERS_RESULT_DISCONNECT;
10957 pci_set_master(pdev);
10958 pci_restore_state(pdev);
10959 pci_save_state(pdev);
10960 pci_wake_from_d3(pdev, false);
10962 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10964 result = PCI_ERS_RESULT_RECOVERED;
10966 result = PCI_ERS_RESULT_DISCONNECT;
10969 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10971 dev_info(&pdev->dev,
10972 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10974 /* non-fatal, continue */
10981 * i40e_pci_error_resume - restart operations after PCI error recovery
10982 * @pdev: PCI device information struct
10984 * Called to allow the driver to bring things back up after PCI error
10985 * and/or reset recovery has finished.
10987 static void i40e_pci_error_resume(struct pci_dev *pdev)
10989 struct i40e_pf *pf = pci_get_drvdata(pdev);
10991 dev_dbg(&pdev->dev, "%s\n", __func__);
10992 if (test_bit(__I40E_SUSPENDED, &pf->state))
10996 i40e_handle_reset_warning(pf);
11001 * i40e_shutdown - PCI callback for shutting down
11002 * @pdev: PCI device information struct
11004 static void i40e_shutdown(struct pci_dev *pdev)
11006 struct i40e_pf *pf = pci_get_drvdata(pdev);
11007 struct i40e_hw *hw = &pf->hw;
11009 set_bit(__I40E_SUSPENDED, &pf->state);
11010 set_bit(__I40E_DOWN, &pf->state);
11012 i40e_prep_for_reset(pf);
11015 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11016 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11018 del_timer_sync(&pf->service_timer);
11019 cancel_work_sync(&pf->service_task);
11020 i40e_fdir_teardown(pf);
11023 i40e_prep_for_reset(pf);
11026 wr32(hw, I40E_PFPM_APM,
11027 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11028 wr32(hw, I40E_PFPM_WUFC,
11029 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11031 i40e_clear_interrupt_scheme(pf);
11033 if (system_state == SYSTEM_POWER_OFF) {
11034 pci_wake_from_d3(pdev, pf->wol_en);
11035 pci_set_power_state(pdev, PCI_D3hot);
11041 * i40e_suspend - PCI callback for moving to D3
11042 * @pdev: PCI device information struct
11044 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11046 struct i40e_pf *pf = pci_get_drvdata(pdev);
11047 struct i40e_hw *hw = &pf->hw;
11049 set_bit(__I40E_SUSPENDED, &pf->state);
11050 set_bit(__I40E_DOWN, &pf->state);
11053 i40e_prep_for_reset(pf);
11056 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11057 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11059 pci_wake_from_d3(pdev, pf->wol_en);
11060 pci_set_power_state(pdev, PCI_D3hot);
11066 * i40e_resume - PCI callback for waking up from D3
11067 * @pdev: PCI device information struct
11069 static int i40e_resume(struct pci_dev *pdev)
11071 struct i40e_pf *pf = pci_get_drvdata(pdev);
11074 pci_set_power_state(pdev, PCI_D0);
11075 pci_restore_state(pdev);
11076 /* pci_restore_state() clears dev->state_saves, so
11077 * call pci_save_state() again to restore it.
11079 pci_save_state(pdev);
11081 err = pci_enable_device_mem(pdev);
11083 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11086 pci_set_master(pdev);
11088 /* no wakeup events while running */
11089 pci_wake_from_d3(pdev, false);
11091 /* handling the reset will rebuild the device state */
11092 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11093 clear_bit(__I40E_DOWN, &pf->state);
11095 i40e_reset_and_rebuild(pf, false);
11103 static const struct pci_error_handlers i40e_err_handler = {
11104 .error_detected = i40e_pci_error_detected,
11105 .slot_reset = i40e_pci_error_slot_reset,
11106 .resume = i40e_pci_error_resume,
11109 static struct pci_driver i40e_driver = {
11110 .name = i40e_driver_name,
11111 .id_table = i40e_pci_tbl,
11112 .probe = i40e_probe,
11113 .remove = i40e_remove,
11115 .suspend = i40e_suspend,
11116 .resume = i40e_resume,
11118 .shutdown = i40e_shutdown,
11119 .err_handler = &i40e_err_handler,
11120 .sriov_configure = i40e_pci_sriov_configure,
11124 * i40e_init_module - Driver registration routine
11126 * i40e_init_module is the first routine called when the driver is
11127 * loaded. All it does is register with the PCI subsystem.
11129 static int __init i40e_init_module(void)
11131 pr_info("%s: %s - version %s\n", i40e_driver_name,
11132 i40e_driver_string, i40e_driver_version_str);
11133 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11136 return pci_register_driver(&i40e_driver);
11138 module_init(i40e_init_module);
11141 * i40e_exit_module - Driver exit cleanup routine
11143 * i40e_exit_module is called just before the driver is removed
11146 static void __exit i40e_exit_module(void)
11148 pci_unregister_driver(&i40e_driver);
11151 module_exit(i40e_exit_module);