1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 46
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
85 /* required last entry */
88 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
90 #define I40E_MAX_VF_COUNT 128
91 static int debug = -1;
92 module_param(debug, int, 0);
93 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
95 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
96 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
97 MODULE_LICENSE("GPL");
98 MODULE_VERSION(DRV_VERSION);
101 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
102 * @hw: pointer to the HW structure
103 * @mem: ptr to mem struct to fill out
104 * @size: size of memory requested
105 * @alignment: what to align the allocation to
107 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
108 u64 size, u32 alignment)
110 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
112 mem->size = ALIGN(size, alignment);
113 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
114 &mem->pa, GFP_KERNEL);
122 * i40e_free_dma_mem_d - OS specific memory free for shared code
123 * @hw: pointer to the HW structure
124 * @mem: ptr to mem struct to free
126 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
128 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
130 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
139 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
140 * @hw: pointer to the HW structure
141 * @mem: ptr to mem struct to fill out
142 * @size: size of memory requested
144 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
148 mem->va = kzalloc(size, GFP_KERNEL);
157 * i40e_free_virt_mem_d - OS specific memory free for shared code
158 * @hw: pointer to the HW structure
159 * @mem: ptr to mem struct to free
161 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
163 /* it's ok to kfree a NULL pointer */
172 * i40e_get_lump - find a lump of free generic resource
173 * @pf: board private structure
174 * @pile: the pile of resource to search
175 * @needed: the number of items needed
176 * @id: an owner id to stick on the items assigned
178 * Returns the base item index of the lump, or negative for error
180 * The search_hint trick and lack of advanced fit-finding only work
181 * because we're highly likely to have all the same size lump requests.
182 * Linear search time and any fragmentation should be minimal.
184 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
190 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
191 dev_info(&pf->pdev->dev,
192 "param err: pile=%p needed=%d id=0x%04x\n",
197 /* start the linear search with an imperfect hint */
198 i = pile->search_hint;
199 while (i < pile->num_entries) {
200 /* skip already allocated entries */
201 if (pile->list[i] & I40E_PILE_VALID_BIT) {
206 /* do we have enough in this lump? */
207 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
208 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
213 /* there was enough, so assign it to the requestor */
214 for (j = 0; j < needed; j++)
215 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
217 pile->search_hint = i + j;
221 /* not enough, so skip over it and continue looking */
229 * i40e_put_lump - return a lump of generic resource
230 * @pile: the pile of resource to search
231 * @index: the base item index
232 * @id: the owner id of the items assigned
234 * Returns the count of items in the lump
236 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
238 int valid_id = (id | I40E_PILE_VALID_BIT);
242 if (!pile || index >= pile->num_entries)
246 i < pile->num_entries && pile->list[i] == valid_id;
252 if (count && index < pile->search_hint)
253 pile->search_hint = index;
259 * i40e_find_vsi_from_id - searches for the vsi with the given id
260 * @pf - the pf structure to search for the vsi
261 * @id - id of the vsi it is searching for
263 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
267 for (i = 0; i < pf->num_alloc_vsi; i++)
268 if (pf->vsi[i] && (pf->vsi[i]->id == id))
275 * i40e_service_event_schedule - Schedule the service task to wake up
276 * @pf: board private structure
278 * If not already scheduled, this puts the task into the work queue
280 static void i40e_service_event_schedule(struct i40e_pf *pf)
282 if (!test_bit(__I40E_DOWN, &pf->state) &&
283 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
284 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
285 schedule_work(&pf->service_task);
289 * i40e_tx_timeout - Respond to a Tx Hang
290 * @netdev: network interface device structure
292 * If any port has noticed a Tx timeout, it is likely that the whole
293 * device is munged, not just the one netdev port, so go for the full
297 void i40e_tx_timeout(struct net_device *netdev)
299 static void i40e_tx_timeout(struct net_device *netdev)
302 struct i40e_netdev_priv *np = netdev_priv(netdev);
303 struct i40e_vsi *vsi = np->vsi;
304 struct i40e_pf *pf = vsi->back;
305 struct i40e_ring *tx_ring = NULL;
306 unsigned int i, hung_queue = 0;
309 pf->tx_timeout_count++;
311 /* find the stopped queue the same way the stack does */
312 for (i = 0; i < netdev->num_tx_queues; i++) {
313 struct netdev_queue *q;
314 unsigned long trans_start;
316 q = netdev_get_tx_queue(netdev, i);
317 trans_start = q->trans_start ? : netdev->trans_start;
318 if (netif_xmit_stopped(q) &&
320 (trans_start + netdev->watchdog_timeo))) {
326 if (i == netdev->num_tx_queues) {
327 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
329 /* now that we have an index, find the tx_ring struct */
330 for (i = 0; i < vsi->num_queue_pairs; i++) {
331 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
333 vsi->tx_rings[i]->queue_index) {
334 tx_ring = vsi->tx_rings[i];
341 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
342 pf->tx_timeout_recovery_level = 1; /* reset after some time */
343 else if (time_before(jiffies,
344 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
345 return; /* don't do any new action before the next timeout */
348 head = i40e_get_head(tx_ring);
349 /* Read interrupt register */
350 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
352 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
353 tx_ring->vsi->base_vector - 1));
355 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
357 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
358 vsi->seid, hung_queue, tx_ring->next_to_clean,
359 head, tx_ring->next_to_use,
360 readl(tx_ring->tail), val);
363 pf->tx_timeout_last_recovery = jiffies;
364 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
365 pf->tx_timeout_recovery_level, hung_queue);
367 switch (pf->tx_timeout_recovery_level) {
369 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
372 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
375 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
378 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
382 i40e_service_event_schedule(pf);
383 pf->tx_timeout_recovery_level++;
387 * i40e_release_rx_desc - Store the new tail and head values
388 * @rx_ring: ring to bump
389 * @val: new head index
391 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
393 rx_ring->next_to_use = val;
395 /* Force memory writes to complete before letting h/w
396 * know there are new descriptors to fetch. (Only
397 * applicable for weak-ordered memory model archs,
401 writel(val, rx_ring->tail);
405 * i40e_get_vsi_stats_struct - Get System Network Statistics
406 * @vsi: the VSI we care about
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
411 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
413 return &vsi->net_stats;
417 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
418 * @netdev: network interface device structure
420 * Returns the address of the device statistics structure.
421 * The statistics are actually updated from the service task.
424 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
425 struct net_device *netdev,
426 struct rtnl_link_stats64 *stats)
428 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
429 struct net_device *netdev,
430 struct rtnl_link_stats64 *stats)
433 struct i40e_netdev_priv *np = netdev_priv(netdev);
434 struct i40e_ring *tx_ring, *rx_ring;
435 struct i40e_vsi *vsi = np->vsi;
436 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
439 if (test_bit(__I40E_DOWN, &vsi->state))
446 for (i = 0; i < vsi->num_queue_pairs; i++) {
450 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
455 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
456 packets = tx_ring->stats.packets;
457 bytes = tx_ring->stats.bytes;
458 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
460 stats->tx_packets += packets;
461 stats->tx_bytes += bytes;
462 rx_ring = &tx_ring[1];
465 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
466 packets = rx_ring->stats.packets;
467 bytes = rx_ring->stats.bytes;
468 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
470 stats->rx_packets += packets;
471 stats->rx_bytes += bytes;
475 /* following stats updated by i40e_watchdog_subtask() */
476 stats->multicast = vsi_stats->multicast;
477 stats->tx_errors = vsi_stats->tx_errors;
478 stats->tx_dropped = vsi_stats->tx_dropped;
479 stats->rx_errors = vsi_stats->rx_errors;
480 stats->rx_dropped = vsi_stats->rx_dropped;
481 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
482 stats->rx_length_errors = vsi_stats->rx_length_errors;
488 * i40e_vsi_reset_stats - Resets all stats of the given vsi
489 * @vsi: the VSI to have its stats reset
491 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
493 struct rtnl_link_stats64 *ns;
499 ns = i40e_get_vsi_stats_struct(vsi);
500 memset(ns, 0, sizeof(*ns));
501 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
502 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
503 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
504 if (vsi->rx_rings && vsi->rx_rings[0]) {
505 for (i = 0; i < vsi->num_queue_pairs; i++) {
506 memset(&vsi->rx_rings[i]->stats, 0,
507 sizeof(vsi->rx_rings[i]->stats));
508 memset(&vsi->rx_rings[i]->rx_stats, 0,
509 sizeof(vsi->rx_rings[i]->rx_stats));
510 memset(&vsi->tx_rings[i]->stats, 0,
511 sizeof(vsi->tx_rings[i]->stats));
512 memset(&vsi->tx_rings[i]->tx_stats, 0,
513 sizeof(vsi->tx_rings[i]->tx_stats));
516 vsi->stat_offsets_loaded = false;
520 * i40e_pf_reset_stats - Reset all of the stats for the given PF
521 * @pf: the PF to be reset
523 void i40e_pf_reset_stats(struct i40e_pf *pf)
527 memset(&pf->stats, 0, sizeof(pf->stats));
528 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
529 pf->stat_offsets_loaded = false;
531 for (i = 0; i < I40E_MAX_VEB; i++) {
533 memset(&pf->veb[i]->stats, 0,
534 sizeof(pf->veb[i]->stats));
535 memset(&pf->veb[i]->stats_offsets, 0,
536 sizeof(pf->veb[i]->stats_offsets));
537 pf->veb[i]->stat_offsets_loaded = false;
543 * i40e_stat_update48 - read and update a 48 bit stat from the chip
544 * @hw: ptr to the hardware info
545 * @hireg: the high 32 bit reg to read
546 * @loreg: the low 32 bit reg to read
547 * @offset_loaded: has the initial offset been loaded yet
548 * @offset: ptr to current offset value
549 * @stat: ptr to the stat
551 * Since the device stats are not reset at PFReset, they likely will not
552 * be zeroed when the driver starts. We'll save the first values read
553 * and use them as offsets to be subtracted from the raw values in order
554 * to report stats that count from zero. In the process, we also manage
555 * the potential roll-over.
557 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
558 bool offset_loaded, u64 *offset, u64 *stat)
562 if (hw->device_id == I40E_DEV_ID_QEMU) {
563 new_data = rd32(hw, loreg);
564 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
566 new_data = rd64(hw, loreg);
570 if (likely(new_data >= *offset))
571 *stat = new_data - *offset;
573 *stat = (new_data + BIT_ULL(48)) - *offset;
574 *stat &= 0xFFFFFFFFFFFFULL;
578 * i40e_stat_update32 - read and update a 32 bit stat from the chip
579 * @hw: ptr to the hardware info
580 * @reg: the hw reg to read
581 * @offset_loaded: has the initial offset been loaded yet
582 * @offset: ptr to current offset value
583 * @stat: ptr to the stat
585 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
586 bool offset_loaded, u64 *offset, u64 *stat)
590 new_data = rd32(hw, reg);
593 if (likely(new_data >= *offset))
594 *stat = (u32)(new_data - *offset);
596 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
600 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
601 * @vsi: the VSI to be updated
603 void i40e_update_eth_stats(struct i40e_vsi *vsi)
605 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
606 struct i40e_pf *pf = vsi->back;
607 struct i40e_hw *hw = &pf->hw;
608 struct i40e_eth_stats *oes;
609 struct i40e_eth_stats *es; /* device's eth stats */
611 es = &vsi->eth_stats;
612 oes = &vsi->eth_stats_offsets;
614 /* Gather up the stats that the hw collects */
615 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
616 vsi->stat_offsets_loaded,
617 &oes->tx_errors, &es->tx_errors);
618 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_discards, &es->rx_discards);
621 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
622 vsi->stat_offsets_loaded,
623 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
624 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->tx_errors, &es->tx_errors);
628 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
629 I40E_GLV_GORCL(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->rx_bytes, &es->rx_bytes);
632 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
633 I40E_GLV_UPRCL(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->rx_unicast, &es->rx_unicast);
636 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
637 I40E_GLV_MPRCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->rx_multicast, &es->rx_multicast);
640 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
641 I40E_GLV_BPRCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->rx_broadcast, &es->rx_broadcast);
645 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
646 I40E_GLV_GOTCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->tx_bytes, &es->tx_bytes);
649 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
650 I40E_GLV_UPTCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->tx_unicast, &es->tx_unicast);
653 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
654 I40E_GLV_MPTCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->tx_multicast, &es->tx_multicast);
657 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
658 I40E_GLV_BPTCL(stat_idx),
659 vsi->stat_offsets_loaded,
660 &oes->tx_broadcast, &es->tx_broadcast);
661 vsi->stat_offsets_loaded = true;
665 * i40e_update_veb_stats - Update Switch component statistics
666 * @veb: the VEB being updated
668 static void i40e_update_veb_stats(struct i40e_veb *veb)
670 struct i40e_pf *pf = veb->pf;
671 struct i40e_hw *hw = &pf->hw;
672 struct i40e_eth_stats *oes;
673 struct i40e_eth_stats *es; /* device's eth stats */
674 struct i40e_veb_tc_stats *veb_oes;
675 struct i40e_veb_tc_stats *veb_es;
678 idx = veb->stats_idx;
680 oes = &veb->stats_offsets;
681 veb_es = &veb->tc_stats;
682 veb_oes = &veb->tc_stats_offsets;
684 /* Gather up the stats that the hw collects */
685 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
686 veb->stat_offsets_loaded,
687 &oes->tx_discards, &es->tx_discards);
688 if (hw->revision_id > 0)
689 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
690 veb->stat_offsets_loaded,
691 &oes->rx_unknown_protocol,
692 &es->rx_unknown_protocol);
693 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
694 veb->stat_offsets_loaded,
695 &oes->rx_bytes, &es->rx_bytes);
696 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
697 veb->stat_offsets_loaded,
698 &oes->rx_unicast, &es->rx_unicast);
699 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
700 veb->stat_offsets_loaded,
701 &oes->rx_multicast, &es->rx_multicast);
702 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
703 veb->stat_offsets_loaded,
704 &oes->rx_broadcast, &es->rx_broadcast);
706 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
707 veb->stat_offsets_loaded,
708 &oes->tx_bytes, &es->tx_bytes);
709 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
710 veb->stat_offsets_loaded,
711 &oes->tx_unicast, &es->tx_unicast);
712 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
713 veb->stat_offsets_loaded,
714 &oes->tx_multicast, &es->tx_multicast);
715 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
716 veb->stat_offsets_loaded,
717 &oes->tx_broadcast, &es->tx_broadcast);
718 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
719 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
720 I40E_GLVEBTC_RPCL(i, idx),
721 veb->stat_offsets_loaded,
722 &veb_oes->tc_rx_packets[i],
723 &veb_es->tc_rx_packets[i]);
724 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
725 I40E_GLVEBTC_RBCL(i, idx),
726 veb->stat_offsets_loaded,
727 &veb_oes->tc_rx_bytes[i],
728 &veb_es->tc_rx_bytes[i]);
729 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
730 I40E_GLVEBTC_TPCL(i, idx),
731 veb->stat_offsets_loaded,
732 &veb_oes->tc_tx_packets[i],
733 &veb_es->tc_tx_packets[i]);
734 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
735 I40E_GLVEBTC_TBCL(i, idx),
736 veb->stat_offsets_loaded,
737 &veb_oes->tc_tx_bytes[i],
738 &veb_es->tc_tx_bytes[i]);
740 veb->stat_offsets_loaded = true;
745 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
746 * @vsi: the VSI that is capable of doing FCoE
748 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
750 struct i40e_pf *pf = vsi->back;
751 struct i40e_hw *hw = &pf->hw;
752 struct i40e_fcoe_stats *ofs;
753 struct i40e_fcoe_stats *fs; /* device's eth stats */
756 if (vsi->type != I40E_VSI_FCOE)
759 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
760 fs = &vsi->fcoe_stats;
761 ofs = &vsi->fcoe_stats_offsets;
763 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
764 vsi->fcoe_stat_offsets_loaded,
765 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
766 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
767 vsi->fcoe_stat_offsets_loaded,
768 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
769 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
770 vsi->fcoe_stat_offsets_loaded,
771 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
772 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
773 vsi->fcoe_stat_offsets_loaded,
774 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
775 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
776 vsi->fcoe_stat_offsets_loaded,
777 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
778 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
779 vsi->fcoe_stat_offsets_loaded,
780 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
781 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
782 vsi->fcoe_stat_offsets_loaded,
783 &ofs->fcoe_last_error, &fs->fcoe_last_error);
784 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
785 vsi->fcoe_stat_offsets_loaded,
786 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
788 vsi->fcoe_stat_offsets_loaded = true;
793 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
794 * @pf: the corresponding PF
796 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
798 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
800 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
801 struct i40e_hw_port_stats *nsd = &pf->stats;
802 struct i40e_hw *hw = &pf->hw;
805 if ((hw->fc.current_mode != I40E_FC_FULL) &&
806 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
809 xoff = nsd->link_xoff_rx;
810 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
811 pf->stat_offsets_loaded,
812 &osd->link_xoff_rx, &nsd->link_xoff_rx);
814 /* No new LFC xoff rx */
815 if (!(nsd->link_xoff_rx - xoff))
821 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
822 * @pf: the corresponding PF
824 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
826 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
828 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
829 struct i40e_hw_port_stats *nsd = &pf->stats;
830 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
831 struct i40e_dcbx_config *dcb_cfg;
832 struct i40e_hw *hw = &pf->hw;
836 dcb_cfg = &hw->local_dcbx_config;
838 /* Collect Link XOFF stats when PFC is disabled */
839 if (!dcb_cfg->pfc.pfcenable) {
840 i40e_update_link_xoff_rx(pf);
844 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
845 u64 prio_xoff = nsd->priority_xoff_rx[i];
847 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
848 pf->stat_offsets_loaded,
849 &osd->priority_xoff_rx[i],
850 &nsd->priority_xoff_rx[i]);
852 /* No new PFC xoff rx */
853 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
855 /* Get the TC for given priority */
856 tc = dcb_cfg->etscfg.prioritytable[i];
862 * i40e_update_vsi_stats - Update the vsi statistics counters.
863 * @vsi: the VSI to be updated
865 * There are a few instances where we store the same stat in a
866 * couple of different structs. This is partly because we have
867 * the netdev stats that need to be filled out, which is slightly
868 * different from the "eth_stats" defined by the chip and used in
869 * VF communications. We sort it out here.
871 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
873 struct i40e_pf *pf = vsi->back;
874 struct rtnl_link_stats64 *ons;
875 struct rtnl_link_stats64 *ns; /* netdev stats */
876 struct i40e_eth_stats *oes;
877 struct i40e_eth_stats *es; /* device's eth stats */
878 u32 tx_restart, tx_busy;
889 if (test_bit(__I40E_DOWN, &vsi->state) ||
890 test_bit(__I40E_CONFIG_BUSY, &pf->state))
893 ns = i40e_get_vsi_stats_struct(vsi);
894 ons = &vsi->net_stats_offsets;
895 es = &vsi->eth_stats;
896 oes = &vsi->eth_stats_offsets;
898 /* Gather up the netdev and vsi stats that the driver collects
899 * on the fly during packet processing
903 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
907 for (q = 0; q < vsi->num_queue_pairs; q++) {
909 p = ACCESS_ONCE(vsi->tx_rings[q]);
912 start = u64_stats_fetch_begin_irq(&p->syncp);
913 packets = p->stats.packets;
914 bytes = p->stats.bytes;
915 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
918 tx_restart += p->tx_stats.restart_queue;
919 tx_busy += p->tx_stats.tx_busy;
920 tx_linearize += p->tx_stats.tx_linearize;
921 tx_force_wb += p->tx_stats.tx_force_wb;
923 /* Rx queue is part of the same block as Tx queue */
926 start = u64_stats_fetch_begin_irq(&p->syncp);
927 packets = p->stats.packets;
928 bytes = p->stats.bytes;
929 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
932 rx_buf += p->rx_stats.alloc_buff_failed;
933 rx_page += p->rx_stats.alloc_page_failed;
936 vsi->tx_restart = tx_restart;
937 vsi->tx_busy = tx_busy;
938 vsi->tx_linearize = tx_linearize;
939 vsi->tx_force_wb = tx_force_wb;
940 vsi->rx_page_failed = rx_page;
941 vsi->rx_buf_failed = rx_buf;
943 ns->rx_packets = rx_p;
945 ns->tx_packets = tx_p;
948 /* update netdev stats from eth stats */
949 i40e_update_eth_stats(vsi);
950 ons->tx_errors = oes->tx_errors;
951 ns->tx_errors = es->tx_errors;
952 ons->multicast = oes->rx_multicast;
953 ns->multicast = es->rx_multicast;
954 ons->rx_dropped = oes->rx_discards;
955 ns->rx_dropped = es->rx_discards;
956 ons->tx_dropped = oes->tx_discards;
957 ns->tx_dropped = es->tx_discards;
959 /* pull in a couple PF stats if this is the main vsi */
960 if (vsi == pf->vsi[pf->lan_vsi]) {
961 ns->rx_crc_errors = pf->stats.crc_errors;
962 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
963 ns->rx_length_errors = pf->stats.rx_length_errors;
968 * i40e_update_pf_stats - Update the PF statistics counters.
969 * @pf: the PF to be updated
971 static void i40e_update_pf_stats(struct i40e_pf *pf)
973 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
974 struct i40e_hw_port_stats *nsd = &pf->stats;
975 struct i40e_hw *hw = &pf->hw;
979 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
980 I40E_GLPRT_GORCL(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
983 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
984 I40E_GLPRT_GOTCL(hw->port),
985 pf->stat_offsets_loaded,
986 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
987 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
988 pf->stat_offsets_loaded,
989 &osd->eth.rx_discards,
990 &nsd->eth.rx_discards);
991 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
992 I40E_GLPRT_UPRCL(hw->port),
993 pf->stat_offsets_loaded,
994 &osd->eth.rx_unicast,
995 &nsd->eth.rx_unicast);
996 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
997 I40E_GLPRT_MPRCL(hw->port),
998 pf->stat_offsets_loaded,
999 &osd->eth.rx_multicast,
1000 &nsd->eth.rx_multicast);
1001 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
1002 I40E_GLPRT_BPRCL(hw->port),
1003 pf->stat_offsets_loaded,
1004 &osd->eth.rx_broadcast,
1005 &nsd->eth.rx_broadcast);
1006 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1007 I40E_GLPRT_UPTCL(hw->port),
1008 pf->stat_offsets_loaded,
1009 &osd->eth.tx_unicast,
1010 &nsd->eth.tx_unicast);
1011 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1012 I40E_GLPRT_MPTCL(hw->port),
1013 pf->stat_offsets_loaded,
1014 &osd->eth.tx_multicast,
1015 &nsd->eth.tx_multicast);
1016 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1017 I40E_GLPRT_BPTCL(hw->port),
1018 pf->stat_offsets_loaded,
1019 &osd->eth.tx_broadcast,
1020 &nsd->eth.tx_broadcast);
1022 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1023 pf->stat_offsets_loaded,
1024 &osd->tx_dropped_link_down,
1025 &nsd->tx_dropped_link_down);
1027 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1028 pf->stat_offsets_loaded,
1029 &osd->crc_errors, &nsd->crc_errors);
1031 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1032 pf->stat_offsets_loaded,
1033 &osd->illegal_bytes, &nsd->illegal_bytes);
1035 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->mac_local_faults,
1038 &nsd->mac_local_faults);
1039 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1040 pf->stat_offsets_loaded,
1041 &osd->mac_remote_faults,
1042 &nsd->mac_remote_faults);
1044 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1045 pf->stat_offsets_loaded,
1046 &osd->rx_length_errors,
1047 &nsd->rx_length_errors);
1049 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1050 pf->stat_offsets_loaded,
1051 &osd->link_xon_rx, &nsd->link_xon_rx);
1052 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->link_xon_tx, &nsd->link_xon_tx);
1055 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1056 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1057 pf->stat_offsets_loaded,
1058 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1060 for (i = 0; i < 8; i++) {
1061 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1062 pf->stat_offsets_loaded,
1063 &osd->priority_xon_rx[i],
1064 &nsd->priority_xon_rx[i]);
1065 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1066 pf->stat_offsets_loaded,
1067 &osd->priority_xon_tx[i],
1068 &nsd->priority_xon_tx[i]);
1069 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1070 pf->stat_offsets_loaded,
1071 &osd->priority_xoff_tx[i],
1072 &nsd->priority_xoff_tx[i]);
1073 i40e_stat_update32(hw,
1074 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1075 pf->stat_offsets_loaded,
1076 &osd->priority_xon_2_xoff[i],
1077 &nsd->priority_xon_2_xoff[i]);
1080 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1081 I40E_GLPRT_PRC64L(hw->port),
1082 pf->stat_offsets_loaded,
1083 &osd->rx_size_64, &nsd->rx_size_64);
1084 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1085 I40E_GLPRT_PRC127L(hw->port),
1086 pf->stat_offsets_loaded,
1087 &osd->rx_size_127, &nsd->rx_size_127);
1088 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1089 I40E_GLPRT_PRC255L(hw->port),
1090 pf->stat_offsets_loaded,
1091 &osd->rx_size_255, &nsd->rx_size_255);
1092 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1093 I40E_GLPRT_PRC511L(hw->port),
1094 pf->stat_offsets_loaded,
1095 &osd->rx_size_511, &nsd->rx_size_511);
1096 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1097 I40E_GLPRT_PRC1023L(hw->port),
1098 pf->stat_offsets_loaded,
1099 &osd->rx_size_1023, &nsd->rx_size_1023);
1100 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1101 I40E_GLPRT_PRC1522L(hw->port),
1102 pf->stat_offsets_loaded,
1103 &osd->rx_size_1522, &nsd->rx_size_1522);
1104 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1105 I40E_GLPRT_PRC9522L(hw->port),
1106 pf->stat_offsets_loaded,
1107 &osd->rx_size_big, &nsd->rx_size_big);
1109 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1110 I40E_GLPRT_PTC64L(hw->port),
1111 pf->stat_offsets_loaded,
1112 &osd->tx_size_64, &nsd->tx_size_64);
1113 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1114 I40E_GLPRT_PTC127L(hw->port),
1115 pf->stat_offsets_loaded,
1116 &osd->tx_size_127, &nsd->tx_size_127);
1117 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1118 I40E_GLPRT_PTC255L(hw->port),
1119 pf->stat_offsets_loaded,
1120 &osd->tx_size_255, &nsd->tx_size_255);
1121 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1122 I40E_GLPRT_PTC511L(hw->port),
1123 pf->stat_offsets_loaded,
1124 &osd->tx_size_511, &nsd->tx_size_511);
1125 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1126 I40E_GLPRT_PTC1023L(hw->port),
1127 pf->stat_offsets_loaded,
1128 &osd->tx_size_1023, &nsd->tx_size_1023);
1129 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1130 I40E_GLPRT_PTC1522L(hw->port),
1131 pf->stat_offsets_loaded,
1132 &osd->tx_size_1522, &nsd->tx_size_1522);
1133 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1134 I40E_GLPRT_PTC9522L(hw->port),
1135 pf->stat_offsets_loaded,
1136 &osd->tx_size_big, &nsd->tx_size_big);
1138 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1139 pf->stat_offsets_loaded,
1140 &osd->rx_undersize, &nsd->rx_undersize);
1141 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1142 pf->stat_offsets_loaded,
1143 &osd->rx_fragments, &nsd->rx_fragments);
1144 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1145 pf->stat_offsets_loaded,
1146 &osd->rx_oversize, &nsd->rx_oversize);
1147 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1148 pf->stat_offsets_loaded,
1149 &osd->rx_jabber, &nsd->rx_jabber);
1152 i40e_stat_update32(hw,
1153 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1154 pf->stat_offsets_loaded,
1155 &osd->fd_atr_match, &nsd->fd_atr_match);
1156 i40e_stat_update32(hw,
1157 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1158 pf->stat_offsets_loaded,
1159 &osd->fd_sb_match, &nsd->fd_sb_match);
1160 i40e_stat_update32(hw,
1161 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1162 pf->stat_offsets_loaded,
1163 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1165 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1166 nsd->tx_lpi_status =
1167 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1168 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1169 nsd->rx_lpi_status =
1170 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1171 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1172 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1173 pf->stat_offsets_loaded,
1174 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1175 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1176 pf->stat_offsets_loaded,
1177 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1179 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1180 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1181 nsd->fd_sb_status = true;
1183 nsd->fd_sb_status = false;
1185 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1186 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1187 nsd->fd_atr_status = true;
1189 nsd->fd_atr_status = false;
1191 pf->stat_offsets_loaded = true;
1195 * i40e_update_stats - Update the various statistics counters.
1196 * @vsi: the VSI to be updated
1198 * Update the various stats for this VSI and its related entities.
1200 void i40e_update_stats(struct i40e_vsi *vsi)
1202 struct i40e_pf *pf = vsi->back;
1204 if (vsi == pf->vsi[pf->lan_vsi])
1205 i40e_update_pf_stats(pf);
1207 i40e_update_vsi_stats(vsi);
1209 i40e_update_fcoe_stats(vsi);
1214 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1215 * @vsi: the VSI to be searched
1216 * @macaddr: the MAC address
1218 * @is_vf: make sure its a VF filter, else doesn't matter
1219 * @is_netdev: make sure its a netdev filter, else doesn't matter
1221 * Returns ptr to the filter object or NULL
1223 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1224 u8 *macaddr, s16 vlan,
1225 bool is_vf, bool is_netdev)
1227 struct i40e_mac_filter *f;
1229 if (!vsi || !macaddr)
1232 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1233 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1234 (vlan == f->vlan) &&
1235 (!is_vf || f->is_vf) &&
1236 (!is_netdev || f->is_netdev))
1243 * i40e_find_mac - Find a mac addr in the macvlan filters list
1244 * @vsi: the VSI to be searched
1245 * @macaddr: the MAC address we are searching for
1246 * @is_vf: make sure its a VF filter, else doesn't matter
1247 * @is_netdev: make sure its a netdev filter, else doesn't matter
1249 * Returns the first filter with the provided MAC address or NULL if
1250 * MAC address was not found
1252 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1253 bool is_vf, bool is_netdev)
1255 struct i40e_mac_filter *f;
1257 if (!vsi || !macaddr)
1260 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1261 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1262 (!is_vf || f->is_vf) &&
1263 (!is_netdev || f->is_netdev))
1270 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1271 * @vsi: the VSI to be searched
1273 * Returns true if VSI is in vlan mode or false otherwise
1275 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1277 struct i40e_mac_filter *f;
1279 /* Only -1 for all the filters denotes not in vlan mode
1280 * so we have to go through all the list in order to make sure
1282 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1283 if (f->vlan >= 0 || vsi->info.pvid)
1291 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1292 * @vsi: the VSI to be searched
1293 * @macaddr: the mac address to be filtered
1294 * @is_vf: true if it is a VF
1295 * @is_netdev: true if it is a netdev
1297 * Goes through all the macvlan filters and adds a
1298 * macvlan filter for each unique vlan that already exists
1300 * Returns first filter found on success, else NULL
1302 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1303 bool is_vf, bool is_netdev)
1305 struct i40e_mac_filter *f;
1307 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1309 f->vlan = le16_to_cpu(vsi->info.pvid);
1310 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1311 is_vf, is_netdev)) {
1312 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1318 return list_first_entry_or_null(&vsi->mac_filter_list,
1319 struct i40e_mac_filter, list);
1323 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1324 * @vsi: the PF Main VSI - inappropriate for any other VSI
1325 * @macaddr: the MAC address
1327 * Some older firmware configurations set up a default promiscuous VLAN
1328 * filter that needs to be removed.
1330 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1332 struct i40e_aqc_remove_macvlan_element_data element;
1333 struct i40e_pf *pf = vsi->back;
1336 /* Only appropriate for the PF main VSI */
1337 if (vsi->type != I40E_VSI_MAIN)
1340 memset(&element, 0, sizeof(element));
1341 ether_addr_copy(element.mac_addr, macaddr);
1342 element.vlan_tag = 0;
1343 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1344 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1345 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1353 * i40e_add_filter - Add a mac/vlan filter to the VSI
1354 * @vsi: the VSI to be searched
1355 * @macaddr: the MAC address
1357 * @is_vf: make sure its a VF filter, else doesn't matter
1358 * @is_netdev: make sure its a netdev filter, else doesn't matter
1360 * Returns ptr to the filter object or NULL when no memory available.
1362 * NOTE: This function is expected to be called with mac_filter_list_lock
1365 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1366 u8 *macaddr, s16 vlan,
1367 bool is_vf, bool is_netdev)
1369 struct i40e_mac_filter *f;
1371 if (!vsi || !macaddr)
1374 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1376 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1378 goto add_filter_out;
1380 ether_addr_copy(f->macaddr, macaddr);
1384 INIT_LIST_HEAD(&f->list);
1385 list_add(&f->list, &vsi->mac_filter_list);
1388 /* increment counter and add a new flag if needed */
1394 } else if (is_netdev) {
1395 if (!f->is_netdev) {
1396 f->is_netdev = true;
1403 /* changed tells sync_filters_subtask to
1404 * push the filter down to the firmware
1407 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1408 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1416 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1417 * @vsi: the VSI to be searched
1418 * @macaddr: the MAC address
1420 * @is_vf: make sure it's a VF filter, else doesn't matter
1421 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1423 * NOTE: This function is expected to be called with mac_filter_list_lock
1426 void i40e_del_filter(struct i40e_vsi *vsi,
1427 u8 *macaddr, s16 vlan,
1428 bool is_vf, bool is_netdev)
1430 struct i40e_mac_filter *f;
1432 if (!vsi || !macaddr)
1435 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1436 if (!f || f->counter == 0)
1444 } else if (is_netdev) {
1446 f->is_netdev = false;
1450 /* make sure we don't remove a filter in use by VF or netdev */
1453 min_f += (f->is_vf ? 1 : 0);
1454 min_f += (f->is_netdev ? 1 : 0);
1456 if (f->counter > min_f)
1460 /* counter == 0 tells sync_filters_subtask to
1461 * remove the filter from the firmware's list
1463 if (f->counter == 0) {
1465 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1466 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1471 * i40e_set_mac - NDO callback to set mac address
1472 * @netdev: network interface device structure
1473 * @p: pointer to an address structure
1475 * Returns 0 on success, negative on failure
1478 int i40e_set_mac(struct net_device *netdev, void *p)
1480 static int i40e_set_mac(struct net_device *netdev, void *p)
1483 struct i40e_netdev_priv *np = netdev_priv(netdev);
1484 struct i40e_vsi *vsi = np->vsi;
1485 struct i40e_pf *pf = vsi->back;
1486 struct i40e_hw *hw = &pf->hw;
1487 struct sockaddr *addr = p;
1488 struct i40e_mac_filter *f;
1490 if (!is_valid_ether_addr(addr->sa_data))
1491 return -EADDRNOTAVAIL;
1493 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1494 netdev_info(netdev, "already using mac address %pM\n",
1499 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1500 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1501 return -EADDRNOTAVAIL;
1503 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1504 netdev_info(netdev, "returning to hw mac address %pM\n",
1507 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1509 if (vsi->type == I40E_VSI_MAIN) {
1512 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1513 I40E_AQC_WRITE_TYPE_LAA_WOL,
1514 addr->sa_data, NULL);
1517 "Addr change for Main VSI failed: %d\n",
1519 return -EADDRNOTAVAIL;
1523 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1524 struct i40e_aqc_remove_macvlan_element_data element;
1526 memset(&element, 0, sizeof(element));
1527 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1528 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1529 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1531 spin_lock_bh(&vsi->mac_filter_list_lock);
1532 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1534 spin_unlock_bh(&vsi->mac_filter_list_lock);
1537 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1538 struct i40e_aqc_add_macvlan_element_data element;
1540 memset(&element, 0, sizeof(element));
1541 ether_addr_copy(element.mac_addr, hw->mac.addr);
1542 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1543 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1545 spin_lock_bh(&vsi->mac_filter_list_lock);
1546 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1550 spin_unlock_bh(&vsi->mac_filter_list_lock);
1553 i40e_sync_vsi_filters(vsi, false);
1554 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1560 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1561 * @vsi: the VSI being setup
1562 * @ctxt: VSI context structure
1563 * @enabled_tc: Enabled TCs bitmap
1564 * @is_add: True if called before Add VSI
1566 * Setup VSI queue mapping for enabled traffic classes.
1569 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1570 struct i40e_vsi_context *ctxt,
1574 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1575 struct i40e_vsi_context *ctxt,
1580 struct i40e_pf *pf = vsi->back;
1590 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1593 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1594 /* Find numtc from enabled TC bitmap */
1595 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1596 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1600 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1604 /* At least TC0 is enabled in case of non-DCB case */
1608 vsi->tc_config.numtc = numtc;
1609 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1610 /* Number of queues per enabled TC */
1611 /* In MFP case we can have a much lower count of MSIx
1612 * vectors available and so we need to lower the used
1615 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1616 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1618 qcount = vsi->alloc_queue_pairs;
1619 num_tc_qps = qcount / numtc;
1620 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1622 /* Setup queue offset/count for all TCs for given VSI */
1623 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1624 /* See if the given TC is enabled for the given VSI */
1625 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1629 switch (vsi->type) {
1631 qcount = min_t(int, pf->rss_size, num_tc_qps);
1635 qcount = num_tc_qps;
1639 case I40E_VSI_SRIOV:
1640 case I40E_VSI_VMDQ2:
1642 qcount = num_tc_qps;
1646 vsi->tc_config.tc_info[i].qoffset = offset;
1647 vsi->tc_config.tc_info[i].qcount = qcount;
1649 /* find the next higher power-of-2 of num queue pairs */
1652 while (num_qps && (BIT_ULL(pow) < qcount)) {
1657 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1659 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1660 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1664 /* TC is not enabled so set the offset to
1665 * default queue and allocate one queue
1668 vsi->tc_config.tc_info[i].qoffset = 0;
1669 vsi->tc_config.tc_info[i].qcount = 1;
1670 vsi->tc_config.tc_info[i].netdev_tc = 0;
1674 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1677 /* Set actual Tx/Rx queue pairs */
1678 vsi->num_queue_pairs = offset;
1679 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1680 if (vsi->req_queue_pairs > 0)
1681 vsi->num_queue_pairs = vsi->req_queue_pairs;
1682 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1683 vsi->num_queue_pairs = pf->num_lan_msix;
1686 /* Scheduler section valid can only be set for ADD VSI */
1688 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1690 ctxt->info.up_enable_bits = enabled_tc;
1692 if (vsi->type == I40E_VSI_SRIOV) {
1693 ctxt->info.mapping_flags |=
1694 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1695 for (i = 0; i < vsi->num_queue_pairs; i++)
1696 ctxt->info.queue_mapping[i] =
1697 cpu_to_le16(vsi->base_queue + i);
1699 ctxt->info.mapping_flags |=
1700 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1701 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1703 ctxt->info.valid_sections |= cpu_to_le16(sections);
1707 * i40e_set_rx_mode - NDO callback to set the netdev filters
1708 * @netdev: network interface device structure
1711 void i40e_set_rx_mode(struct net_device *netdev)
1713 static void i40e_set_rx_mode(struct net_device *netdev)
1716 struct i40e_netdev_priv *np = netdev_priv(netdev);
1717 struct i40e_mac_filter *f, *ftmp;
1718 struct i40e_vsi *vsi = np->vsi;
1719 struct netdev_hw_addr *uca;
1720 struct netdev_hw_addr *mca;
1721 struct netdev_hw_addr *ha;
1723 spin_lock_bh(&vsi->mac_filter_list_lock);
1725 /* add addr if not already in the filter list */
1726 netdev_for_each_uc_addr(uca, netdev) {
1727 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1728 if (i40e_is_vsi_in_vlan(vsi))
1729 i40e_put_mac_in_vlan(vsi, uca->addr,
1732 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1737 netdev_for_each_mc_addr(mca, netdev) {
1738 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1739 if (i40e_is_vsi_in_vlan(vsi))
1740 i40e_put_mac_in_vlan(vsi, mca->addr,
1743 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1748 /* remove filter if not in netdev list */
1749 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1754 netdev_for_each_mc_addr(mca, netdev)
1755 if (ether_addr_equal(mca->addr, f->macaddr))
1756 goto bottom_of_search_loop;
1758 netdev_for_each_uc_addr(uca, netdev)
1759 if (ether_addr_equal(uca->addr, f->macaddr))
1760 goto bottom_of_search_loop;
1762 for_each_dev_addr(netdev, ha)
1763 if (ether_addr_equal(ha->addr, f->macaddr))
1764 goto bottom_of_search_loop;
1766 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1767 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1769 bottom_of_search_loop:
1772 spin_unlock_bh(&vsi->mac_filter_list_lock);
1774 /* check for other flag changes */
1775 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1776 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1777 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1782 * i40e_mac_filter_entry_clone - Clones a MAC filter entry
1783 * @src: source MAC filter entry to be clones
1785 * Returns the pointer to newly cloned MAC filter entry or NULL
1788 static struct i40e_mac_filter *i40e_mac_filter_entry_clone(
1789 struct i40e_mac_filter *src)
1791 struct i40e_mac_filter *f;
1793 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1798 INIT_LIST_HEAD(&f->list);
1804 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1805 * @vsi: pointer to vsi struct
1806 * @from: Pointer to list which contains MAC filter entries - changes to
1807 * those entries needs to be undone.
1809 * MAC filter entries from list were slated to be removed from device.
1811 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1812 struct list_head *from)
1814 struct i40e_mac_filter *f, *ftmp;
1816 list_for_each_entry_safe(f, ftmp, from, list) {
1818 /* Move the element back into MAC filter list*/
1819 list_move_tail(&f->list, &vsi->mac_filter_list);
1824 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1825 * @vsi: pointer to vsi struct
1827 * MAC filter entries from list were slated to be added from device.
1829 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi)
1831 struct i40e_mac_filter *f, *ftmp;
1833 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1834 if (!f->changed && f->counter)
1840 * i40e_cleanup_add_list - Deletes the element from add list and release
1842 * @add_list: Pointer to list which contains MAC filter entries
1844 static void i40e_cleanup_add_list(struct list_head *add_list)
1846 struct i40e_mac_filter *f, *ftmp;
1848 list_for_each_entry_safe(f, ftmp, add_list, list) {
1855 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1856 * @vsi: ptr to the VSI
1857 * @grab_rtnl: whether RTNL needs to be grabbed
1859 * Push any outstanding VSI filter changes through the AdminQ.
1861 * Returns 0 or error value
1863 int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl)
1865 struct list_head tmp_del_list, tmp_add_list;
1866 struct i40e_mac_filter *f, *ftmp, *fclone;
1867 bool promisc_forced_on = false;
1868 bool add_happened = false;
1869 int filter_list_len = 0;
1870 u32 changed_flags = 0;
1871 bool err_cond = false;
1872 i40e_status ret = 0;
1879 /* empty array typed pointers, kcalloc later */
1880 struct i40e_aqc_add_macvlan_element_data *add_list;
1881 struct i40e_aqc_remove_macvlan_element_data *del_list;
1883 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1884 usleep_range(1000, 2000);
1888 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1889 vsi->current_netdev_flags = vsi->netdev->flags;
1892 INIT_LIST_HEAD(&tmp_del_list);
1893 INIT_LIST_HEAD(&tmp_add_list);
1895 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1896 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1898 spin_lock_bh(&vsi->mac_filter_list_lock);
1899 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1903 if (f->counter != 0)
1907 /* Move the element into temporary del_list */
1908 list_move_tail(&f->list, &tmp_del_list);
1911 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1915 if (f->counter == 0)
1919 /* Clone MAC filter entry and add into temporary list */
1920 fclone = i40e_mac_filter_entry_clone(f);
1925 list_add_tail(&fclone->list, &tmp_add_list);
1928 /* if failed to clone MAC filter entry - undo */
1930 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1931 i40e_undo_add_filter_entries(vsi);
1933 spin_unlock_bh(&vsi->mac_filter_list_lock);
1936 i40e_cleanup_add_list(&tmp_add_list);
1939 /* Now process 'del_list' outside the lock */
1940 if (!list_empty(&tmp_del_list)) {
1941 filter_list_len = pf->hw.aq.asq_buf_size /
1942 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1943 del_list = kcalloc(filter_list_len,
1944 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1947 i40e_cleanup_add_list(&tmp_add_list);
1949 /* Undo VSI's MAC filter entry element updates */
1950 spin_lock_bh(&vsi->mac_filter_list_lock);
1951 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1952 i40e_undo_add_filter_entries(vsi);
1953 spin_unlock_bh(&vsi->mac_filter_list_lock);
1957 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1960 /* add to delete list */
1961 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1962 del_list[num_del].vlan_tag =
1963 cpu_to_le16((u16)(f->vlan ==
1964 I40E_VLAN_ANY ? 0 : f->vlan));
1966 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1967 del_list[num_del].flags = cmd_flags;
1970 /* flush a full buffer */
1971 if (num_del == filter_list_len) {
1972 ret = i40e_aq_remove_macvlan(&pf->hw,
1973 vsi->seid, del_list, num_del,
1975 aq_err = pf->hw.aq.asq_last_status;
1977 memset(del_list, 0, sizeof(*del_list));
1979 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1980 dev_err(&pf->pdev->dev,
1981 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1982 i40e_stat_str(&pf->hw, ret),
1983 i40e_aq_str(&pf->hw, aq_err));
1985 /* Release memory for MAC filter entries which were
1986 * synced up with HW.
1993 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1994 del_list, num_del, NULL);
1995 aq_err = pf->hw.aq.asq_last_status;
1998 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1999 dev_info(&pf->pdev->dev,
2000 "ignoring delete macvlan error, err %s aq_err %s\n",
2001 i40e_stat_str(&pf->hw, ret),
2002 i40e_aq_str(&pf->hw, aq_err));
2009 if (!list_empty(&tmp_add_list)) {
2011 /* do all the adds now */
2012 filter_list_len = pf->hw.aq.asq_buf_size /
2013 sizeof(struct i40e_aqc_add_macvlan_element_data),
2014 add_list = kcalloc(filter_list_len,
2015 sizeof(struct i40e_aqc_add_macvlan_element_data),
2018 /* Purge element from temporary lists */
2019 i40e_cleanup_add_list(&tmp_add_list);
2021 /* Undo add filter entries from VSI MAC filter list */
2022 spin_lock_bh(&vsi->mac_filter_list_lock);
2023 i40e_undo_add_filter_entries(vsi);
2024 spin_unlock_bh(&vsi->mac_filter_list_lock);
2028 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2030 add_happened = true;
2033 /* add to add array */
2034 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
2035 add_list[num_add].vlan_tag =
2037 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
2038 add_list[num_add].queue_number = 0;
2040 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2041 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2044 /* flush a full buffer */
2045 if (num_add == filter_list_len) {
2046 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2049 aq_err = pf->hw.aq.asq_last_status;
2054 memset(add_list, 0, sizeof(*add_list));
2056 /* Entries from tmp_add_list were cloned from MAC
2057 * filter list, hence clean those cloned entries
2064 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2065 add_list, num_add, NULL);
2066 aq_err = pf->hw.aq.asq_last_status;
2072 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
2073 dev_info(&pf->pdev->dev,
2074 "add filter failed, err %s aq_err %s\n",
2075 i40e_stat_str(&pf->hw, ret),
2076 i40e_aq_str(&pf->hw, aq_err));
2077 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
2078 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2080 promisc_forced_on = true;
2081 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2083 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
2088 /* check for changes in promiscuous modes */
2089 if (changed_flags & IFF_ALLMULTI) {
2090 bool cur_multipromisc;
2092 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2093 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2098 dev_info(&pf->pdev->dev,
2099 "set multi promisc failed, err %s aq_err %s\n",
2100 i40e_stat_str(&pf->hw, ret),
2101 i40e_aq_str(&pf->hw,
2102 pf->hw.aq.asq_last_status));
2104 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
2107 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2108 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2110 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
2111 /* set defport ON for Main VSI instead of true promisc
2112 * this way we will get all unicast/multicast and VLAN
2113 * promisc behavior but will not get VF or VMDq traffic
2114 * replicated on the Main VSI.
2116 if (pf->cur_promisc != cur_promisc) {
2117 pf->cur_promisc = cur_promisc;
2119 i40e_do_reset_safe(pf,
2120 BIT(__I40E_PF_RESET_REQUESTED));
2123 BIT(__I40E_PF_RESET_REQUESTED));
2126 ret = i40e_aq_set_vsi_unicast_promiscuous(
2131 dev_info(&pf->pdev->dev,
2132 "set unicast promisc failed, err %d, aq_err %d\n",
2133 ret, pf->hw.aq.asq_last_status);
2134 ret = i40e_aq_set_vsi_multicast_promiscuous(
2139 dev_info(&pf->pdev->dev,
2140 "set multicast promisc failed, err %d, aq_err %d\n",
2141 ret, pf->hw.aq.asq_last_status);
2143 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2147 dev_info(&pf->pdev->dev,
2148 "set brdcast promisc failed, err %s, aq_err %s\n",
2149 i40e_stat_str(&pf->hw, ret),
2150 i40e_aq_str(&pf->hw,
2151 pf->hw.aq.asq_last_status));
2154 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2159 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2160 * @pf: board private structure
2162 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2166 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2168 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2170 for (v = 0; v < pf->num_alloc_vsi; v++) {
2172 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
2173 i40e_sync_vsi_filters(pf->vsi[v], true);
2178 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2179 * @netdev: network interface device structure
2180 * @new_mtu: new value for maximum frame size
2182 * Returns 0 on success, negative on failure
2184 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2186 struct i40e_netdev_priv *np = netdev_priv(netdev);
2187 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2188 struct i40e_vsi *vsi = np->vsi;
2190 /* MTU < 68 is an error and causes problems on some kernels */
2191 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2194 netdev_info(netdev, "changing MTU from %d to %d\n",
2195 netdev->mtu, new_mtu);
2196 netdev->mtu = new_mtu;
2197 if (netif_running(netdev))
2198 i40e_vsi_reinit_locked(vsi);
2204 * i40e_ioctl - Access the hwtstamp interface
2205 * @netdev: network interface device structure
2206 * @ifr: interface request data
2207 * @cmd: ioctl command
2209 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2211 struct i40e_netdev_priv *np = netdev_priv(netdev);
2212 struct i40e_pf *pf = np->vsi->back;
2216 return i40e_ptp_get_ts_config(pf, ifr);
2218 return i40e_ptp_set_ts_config(pf, ifr);
2225 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2226 * @vsi: the vsi being adjusted
2228 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2230 struct i40e_vsi_context ctxt;
2233 if ((vsi->info.valid_sections &
2234 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2235 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2236 return; /* already enabled */
2238 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2239 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2240 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2242 ctxt.seid = vsi->seid;
2243 ctxt.info = vsi->info;
2244 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2246 dev_info(&vsi->back->pdev->dev,
2247 "update vlan stripping failed, err %s aq_err %s\n",
2248 i40e_stat_str(&vsi->back->hw, ret),
2249 i40e_aq_str(&vsi->back->hw,
2250 vsi->back->hw.aq.asq_last_status));
2255 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2256 * @vsi: the vsi being adjusted
2258 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2260 struct i40e_vsi_context ctxt;
2263 if ((vsi->info.valid_sections &
2264 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2265 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2266 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2267 return; /* already disabled */
2269 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2270 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2271 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2273 ctxt.seid = vsi->seid;
2274 ctxt.info = vsi->info;
2275 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2277 dev_info(&vsi->back->pdev->dev,
2278 "update vlan stripping failed, err %s aq_err %s\n",
2279 i40e_stat_str(&vsi->back->hw, ret),
2280 i40e_aq_str(&vsi->back->hw,
2281 vsi->back->hw.aq.asq_last_status));
2286 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2287 * @netdev: network interface to be adjusted
2288 * @features: netdev features to test if VLAN offload is enabled or not
2290 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2292 struct i40e_netdev_priv *np = netdev_priv(netdev);
2293 struct i40e_vsi *vsi = np->vsi;
2295 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2296 i40e_vlan_stripping_enable(vsi);
2298 i40e_vlan_stripping_disable(vsi);
2302 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2303 * @vsi: the vsi being configured
2304 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2306 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2308 struct i40e_mac_filter *f, *add_f;
2309 bool is_netdev, is_vf;
2311 is_vf = (vsi->type == I40E_VSI_SRIOV);
2312 is_netdev = !!(vsi->netdev);
2314 /* Locked once because all functions invoked below iterates list*/
2315 spin_lock_bh(&vsi->mac_filter_list_lock);
2318 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2321 dev_info(&vsi->back->pdev->dev,
2322 "Could not add vlan filter %d for %pM\n",
2323 vid, vsi->netdev->dev_addr);
2324 spin_unlock_bh(&vsi->mac_filter_list_lock);
2329 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2330 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2332 dev_info(&vsi->back->pdev->dev,
2333 "Could not add vlan filter %d for %pM\n",
2335 spin_unlock_bh(&vsi->mac_filter_list_lock);
2340 /* Now if we add a vlan tag, make sure to check if it is the first
2341 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2342 * with 0, so we now accept untagged and specified tagged traffic
2343 * (and not any taged and untagged)
2346 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2348 is_vf, is_netdev)) {
2349 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2350 I40E_VLAN_ANY, is_vf, is_netdev);
2351 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2354 dev_info(&vsi->back->pdev->dev,
2355 "Could not add filter 0 for %pM\n",
2356 vsi->netdev->dev_addr);
2357 spin_unlock_bh(&vsi->mac_filter_list_lock);
2363 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2364 if (vid > 0 && !vsi->info.pvid) {
2365 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2366 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2369 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2371 add_f = i40e_add_filter(vsi, f->macaddr,
2372 0, is_vf, is_netdev);
2374 dev_info(&vsi->back->pdev->dev,
2375 "Could not add filter 0 for %pM\n",
2377 spin_unlock_bh(&vsi->mac_filter_list_lock);
2383 /* Make sure to release before sync_vsi_filter because that
2384 * function will lock/unlock as necessary
2386 spin_unlock_bh(&vsi->mac_filter_list_lock);
2388 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2389 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2392 return i40e_sync_vsi_filters(vsi, false);
2396 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2397 * @vsi: the vsi being configured
2398 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2400 * Return: 0 on success or negative otherwise
2402 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2404 struct net_device *netdev = vsi->netdev;
2405 struct i40e_mac_filter *f, *add_f;
2406 bool is_vf, is_netdev;
2407 int filter_count = 0;
2409 is_vf = (vsi->type == I40E_VSI_SRIOV);
2410 is_netdev = !!(netdev);
2412 /* Locked once because all functions invoked below iterates list */
2413 spin_lock_bh(&vsi->mac_filter_list_lock);
2416 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2418 list_for_each_entry(f, &vsi->mac_filter_list, list)
2419 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2421 /* go through all the filters for this VSI and if there is only
2422 * vid == 0 it means there are no other filters, so vid 0 must
2423 * be replaced with -1. This signifies that we should from now
2424 * on accept any traffic (with any tag present, or untagged)
2426 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2429 ether_addr_equal(netdev->dev_addr, f->macaddr))
2437 if (!filter_count && is_netdev) {
2438 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2439 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2442 dev_info(&vsi->back->pdev->dev,
2443 "Could not add filter %d for %pM\n",
2444 I40E_VLAN_ANY, netdev->dev_addr);
2445 spin_unlock_bh(&vsi->mac_filter_list_lock);
2450 if (!filter_count) {
2451 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2452 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2453 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2456 dev_info(&vsi->back->pdev->dev,
2457 "Could not add filter %d for %pM\n",
2458 I40E_VLAN_ANY, f->macaddr);
2459 spin_unlock_bh(&vsi->mac_filter_list_lock);
2465 /* Make sure to release before sync_vsi_filter because that
2466 * function with lock/unlock as necessary
2468 spin_unlock_bh(&vsi->mac_filter_list_lock);
2470 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2471 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2474 return i40e_sync_vsi_filters(vsi, false);
2478 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2479 * @netdev: network interface to be adjusted
2480 * @vid: vlan id to be added
2482 * net_device_ops implementation for adding vlan ids
2485 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2486 __always_unused __be16 proto, u16 vid)
2488 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2489 __always_unused __be16 proto, u16 vid)
2492 struct i40e_netdev_priv *np = netdev_priv(netdev);
2493 struct i40e_vsi *vsi = np->vsi;
2499 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2501 /* If the network stack called us with vid = 0 then
2502 * it is asking to receive priority tagged packets with
2503 * vlan id 0. Our HW receives them by default when configured
2504 * to receive untagged packets so there is no need to add an
2505 * extra filter for vlan 0 tagged packets.
2508 ret = i40e_vsi_add_vlan(vsi, vid);
2510 if (!ret && (vid < VLAN_N_VID))
2511 set_bit(vid, vsi->active_vlans);
2517 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2518 * @netdev: network interface to be adjusted
2519 * @vid: vlan id to be removed
2521 * net_device_ops implementation for removing vlan ids
2524 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2525 __always_unused __be16 proto, u16 vid)
2527 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2528 __always_unused __be16 proto, u16 vid)
2531 struct i40e_netdev_priv *np = netdev_priv(netdev);
2532 struct i40e_vsi *vsi = np->vsi;
2534 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2536 /* return code is ignored as there is nothing a user
2537 * can do about failure to remove and a log message was
2538 * already printed from the other function
2540 i40e_vsi_kill_vlan(vsi, vid);
2542 clear_bit(vid, vsi->active_vlans);
2548 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2549 * @vsi: the vsi being brought back up
2551 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2558 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2560 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2561 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2566 * i40e_vsi_add_pvid - Add pvid for the VSI
2567 * @vsi: the vsi being adjusted
2568 * @vid: the vlan id to set as a PVID
2570 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2572 struct i40e_vsi_context ctxt;
2575 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2576 vsi->info.pvid = cpu_to_le16(vid);
2577 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2578 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2579 I40E_AQ_VSI_PVLAN_EMOD_STR;
2581 ctxt.seid = vsi->seid;
2582 ctxt.info = vsi->info;
2583 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2585 dev_info(&vsi->back->pdev->dev,
2586 "add pvid failed, err %s aq_err %s\n",
2587 i40e_stat_str(&vsi->back->hw, ret),
2588 i40e_aq_str(&vsi->back->hw,
2589 vsi->back->hw.aq.asq_last_status));
2597 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2598 * @vsi: the vsi being adjusted
2600 * Just use the vlan_rx_register() service to put it back to normal
2602 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2604 i40e_vlan_stripping_disable(vsi);
2610 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2611 * @vsi: ptr to the VSI
2613 * If this function returns with an error, then it's possible one or
2614 * more of the rings is populated (while the rest are not). It is the
2615 * callers duty to clean those orphaned rings.
2617 * Return 0 on success, negative on failure
2619 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2623 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2624 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2630 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2631 * @vsi: ptr to the VSI
2633 * Free VSI's transmit software resources
2635 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2642 for (i = 0; i < vsi->num_queue_pairs; i++)
2643 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2644 i40e_free_tx_resources(vsi->tx_rings[i]);
2648 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2649 * @vsi: ptr to the VSI
2651 * If this function returns with an error, then it's possible one or
2652 * more of the rings is populated (while the rest are not). It is the
2653 * callers duty to clean those orphaned rings.
2655 * Return 0 on success, negative on failure
2657 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2661 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2662 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2664 i40e_fcoe_setup_ddp_resources(vsi);
2670 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2671 * @vsi: ptr to the VSI
2673 * Free all receive software resources
2675 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2682 for (i = 0; i < vsi->num_queue_pairs; i++)
2683 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2684 i40e_free_rx_resources(vsi->rx_rings[i]);
2686 i40e_fcoe_free_ddp_resources(vsi);
2691 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2692 * @ring: The Tx ring to configure
2694 * This enables/disables XPS for a given Tx descriptor ring
2695 * based on the TCs enabled for the VSI that ring belongs to.
2697 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2699 struct i40e_vsi *vsi = ring->vsi;
2702 if (!ring->q_vector || !ring->netdev)
2705 /* Single TC mode enable XPS */
2706 if (vsi->tc_config.numtc <= 1) {
2707 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2708 netif_set_xps_queue(ring->netdev,
2709 &ring->q_vector->affinity_mask,
2711 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2712 /* Disable XPS to allow selection based on TC */
2713 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2714 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2715 free_cpumask_var(mask);
2720 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2721 * @ring: The Tx ring to configure
2723 * Configure the Tx descriptor ring in the HMC context.
2725 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2727 struct i40e_vsi *vsi = ring->vsi;
2728 u16 pf_q = vsi->base_queue + ring->queue_index;
2729 struct i40e_hw *hw = &vsi->back->hw;
2730 struct i40e_hmc_obj_txq tx_ctx;
2731 i40e_status err = 0;
2734 /* some ATR related tx ring init */
2735 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2736 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2737 ring->atr_count = 0;
2739 ring->atr_sample_rate = 0;
2743 i40e_config_xps_tx_ring(ring);
2745 /* clear the context structure first */
2746 memset(&tx_ctx, 0, sizeof(tx_ctx));
2748 tx_ctx.new_context = 1;
2749 tx_ctx.base = (ring->dma / 128);
2750 tx_ctx.qlen = ring->count;
2751 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2752 I40E_FLAG_FD_ATR_ENABLED));
2754 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2756 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2757 /* FDIR VSI tx ring can still use RS bit and writebacks */
2758 if (vsi->type != I40E_VSI_FDIR)
2759 tx_ctx.head_wb_ena = 1;
2760 tx_ctx.head_wb_addr = ring->dma +
2761 (ring->count * sizeof(struct i40e_tx_desc));
2763 /* As part of VSI creation/update, FW allocates certain
2764 * Tx arbitration queue sets for each TC enabled for
2765 * the VSI. The FW returns the handles to these queue
2766 * sets as part of the response buffer to Add VSI,
2767 * Update VSI, etc. AQ commands. It is expected that
2768 * these queue set handles be associated with the Tx
2769 * queues by the driver as part of the TX queue context
2770 * initialization. This has to be done regardless of
2771 * DCB as by default everything is mapped to TC0.
2773 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2774 tx_ctx.rdylist_act = 0;
2776 /* clear the context in the HMC */
2777 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2779 dev_info(&vsi->back->pdev->dev,
2780 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2781 ring->queue_index, pf_q, err);
2785 /* set the context in the HMC */
2786 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2788 dev_info(&vsi->back->pdev->dev,
2789 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2790 ring->queue_index, pf_q, err);
2794 /* Now associate this queue with this PCI function */
2795 if (vsi->type == I40E_VSI_VMDQ2) {
2796 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2797 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2798 I40E_QTX_CTL_VFVM_INDX_MASK;
2800 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2803 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2804 I40E_QTX_CTL_PF_INDX_MASK);
2805 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2808 /* cache tail off for easier writes later */
2809 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2815 * i40e_configure_rx_ring - Configure a receive ring context
2816 * @ring: The Rx ring to configure
2818 * Configure the Rx descriptor ring in the HMC context.
2820 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2822 struct i40e_vsi *vsi = ring->vsi;
2823 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2824 u16 pf_q = vsi->base_queue + ring->queue_index;
2825 struct i40e_hw *hw = &vsi->back->hw;
2826 struct i40e_hmc_obj_rxq rx_ctx;
2827 i40e_status err = 0;
2831 /* clear the context structure first */
2832 memset(&rx_ctx, 0, sizeof(rx_ctx));
2834 ring->rx_buf_len = vsi->rx_buf_len;
2835 ring->rx_hdr_len = vsi->rx_hdr_len;
2837 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2838 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2840 rx_ctx.base = (ring->dma / 128);
2841 rx_ctx.qlen = ring->count;
2843 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2844 set_ring_16byte_desc_enabled(ring);
2850 rx_ctx.dtype = vsi->dtype;
2852 set_ring_ps_enabled(ring);
2853 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2855 I40E_RX_SPLIT_TCP_UDP |
2858 rx_ctx.hsplit_0 = 0;
2861 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2862 (chain_len * ring->rx_buf_len));
2863 if (hw->revision_id == 0)
2864 rx_ctx.lrxqthresh = 0;
2866 rx_ctx.lrxqthresh = 2;
2867 rx_ctx.crcstrip = 1;
2869 /* this controls whether VLAN is stripped from inner headers */
2872 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2874 /* set the prefena field to 1 because the manual says to */
2877 /* clear the context in the HMC */
2878 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2880 dev_info(&vsi->back->pdev->dev,
2881 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2882 ring->queue_index, pf_q, err);
2886 /* set the context in the HMC */
2887 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2889 dev_info(&vsi->back->pdev->dev,
2890 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2891 ring->queue_index, pf_q, err);
2895 /* cache tail for quicker writes, and clear the reg before use */
2896 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2897 writel(0, ring->tail);
2899 if (ring_is_ps_enabled(ring)) {
2900 i40e_alloc_rx_headers(ring);
2901 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2903 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2910 * i40e_vsi_configure_tx - Configure the VSI for Tx
2911 * @vsi: VSI structure describing this set of rings and resources
2913 * Configure the Tx VSI for operation.
2915 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2920 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2921 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2927 * i40e_vsi_configure_rx - Configure the VSI for Rx
2928 * @vsi: the VSI being configured
2930 * Configure the Rx VSI for operation.
2932 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2937 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2938 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2939 + ETH_FCS_LEN + VLAN_HLEN;
2941 vsi->max_frame = I40E_RXBUFFER_2048;
2943 /* figure out correct receive buffer length */
2944 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2945 I40E_FLAG_RX_PS_ENABLED)) {
2946 case I40E_FLAG_RX_1BUF_ENABLED:
2947 vsi->rx_hdr_len = 0;
2948 vsi->rx_buf_len = vsi->max_frame;
2949 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2951 case I40E_FLAG_RX_PS_ENABLED:
2952 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2953 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2954 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2957 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2958 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2959 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2964 /* setup rx buffer for FCoE */
2965 if ((vsi->type == I40E_VSI_FCOE) &&
2966 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2967 vsi->rx_hdr_len = 0;
2968 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2969 vsi->max_frame = I40E_RXBUFFER_3072;
2970 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2973 #endif /* I40E_FCOE */
2974 /* round up for the chip's needs */
2975 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2976 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2977 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2978 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2980 /* set up individual rings */
2981 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2982 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2988 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2989 * @vsi: ptr to the VSI
2991 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2993 struct i40e_ring *tx_ring, *rx_ring;
2994 u16 qoffset, qcount;
2997 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2998 /* Reset the TC information */
2999 for (i = 0; i < vsi->num_queue_pairs; i++) {
3000 rx_ring = vsi->rx_rings[i];
3001 tx_ring = vsi->tx_rings[i];
3002 rx_ring->dcb_tc = 0;
3003 tx_ring->dcb_tc = 0;
3007 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3008 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3011 qoffset = vsi->tc_config.tc_info[n].qoffset;
3012 qcount = vsi->tc_config.tc_info[n].qcount;
3013 for (i = qoffset; i < (qoffset + qcount); i++) {
3014 rx_ring = vsi->rx_rings[i];
3015 tx_ring = vsi->tx_rings[i];
3016 rx_ring->dcb_tc = n;
3017 tx_ring->dcb_tc = n;
3023 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3024 * @vsi: ptr to the VSI
3026 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3029 i40e_set_rx_mode(vsi->netdev);
3033 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3034 * @vsi: Pointer to the targeted VSI
3036 * This function replays the hlist on the hw where all the SB Flow Director
3037 * filters were saved.
3039 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3041 struct i40e_fdir_filter *filter;
3042 struct i40e_pf *pf = vsi->back;
3043 struct hlist_node *node;
3045 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3048 hlist_for_each_entry_safe(filter, node,
3049 &pf->fdir_filter_list, fdir_node) {
3050 i40e_add_del_fdir(vsi, filter, true);
3055 * i40e_vsi_configure - Set up the VSI for action
3056 * @vsi: the VSI being configured
3058 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3062 i40e_set_vsi_rx_mode(vsi);
3063 i40e_restore_vlan(vsi);
3064 i40e_vsi_config_dcb_rings(vsi);
3065 err = i40e_vsi_configure_tx(vsi);
3067 err = i40e_vsi_configure_rx(vsi);
3073 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3074 * @vsi: the VSI being configured
3076 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3078 struct i40e_pf *pf = vsi->back;
3079 struct i40e_hw *hw = &pf->hw;
3084 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3085 * and PFINT_LNKLSTn registers, e.g.:
3086 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3088 qp = vsi->base_queue;
3089 vector = vsi->base_vector;
3090 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3091 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3093 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3094 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3095 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3096 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3098 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3099 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3100 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3102 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3103 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3105 /* Linked list for the queuepairs assigned to this vector */
3106 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3107 for (q = 0; q < q_vector->num_ringpairs; q++) {
3110 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3111 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3112 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3113 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3115 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3117 wr32(hw, I40E_QINT_RQCTL(qp), val);
3119 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3120 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3121 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3122 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3124 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3126 /* Terminate the linked list */
3127 if (q == (q_vector->num_ringpairs - 1))
3128 val |= (I40E_QUEUE_END_OF_LIST
3129 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3131 wr32(hw, I40E_QINT_TQCTL(qp), val);
3140 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3141 * @hw: ptr to the hardware info
3143 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3145 struct i40e_hw *hw = &pf->hw;
3148 /* clear things first */
3149 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3150 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3152 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3153 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3154 I40E_PFINT_ICR0_ENA_GRST_MASK |
3155 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3156 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3157 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3158 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3159 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3161 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3162 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3164 if (pf->flags & I40E_FLAG_PTP)
3165 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3167 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3169 /* SW_ITR_IDX = 0, but don't change INTENA */
3170 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3171 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3173 /* OTHER_ITR_IDX = 0 */
3174 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3178 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3179 * @vsi: the VSI being configured
3181 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3183 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3184 struct i40e_pf *pf = vsi->back;
3185 struct i40e_hw *hw = &pf->hw;
3188 /* set the ITR configuration */
3189 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3190 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3191 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3192 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3193 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3194 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3195 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3197 i40e_enable_misc_int_causes(pf);
3199 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3200 wr32(hw, I40E_PFINT_LNKLST0, 0);
3202 /* Associate the queue pair to the vector and enable the queue int */
3203 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3204 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3205 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3207 wr32(hw, I40E_QINT_RQCTL(0), val);
3209 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3210 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3211 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3213 wr32(hw, I40E_QINT_TQCTL(0), val);
3218 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3219 * @pf: board private structure
3221 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3223 struct i40e_hw *hw = &pf->hw;
3225 wr32(hw, I40E_PFINT_DYN_CTL0,
3226 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3231 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3232 * @pf: board private structure
3234 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3236 struct i40e_hw *hw = &pf->hw;
3239 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3240 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3241 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3243 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3248 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3249 * @vsi: pointer to a vsi
3250 * @vector: disable a particular Hw Interrupt vector
3252 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3254 struct i40e_pf *pf = vsi->back;
3255 struct i40e_hw *hw = &pf->hw;
3258 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3259 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3264 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3265 * @irq: interrupt number
3266 * @data: pointer to a q_vector
3268 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3270 struct i40e_q_vector *q_vector = data;
3272 if (!q_vector->tx.ring && !q_vector->rx.ring)
3275 napi_schedule_irqoff(&q_vector->napi);
3281 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3282 * @vsi: the VSI being configured
3283 * @basename: name for the vector
3285 * Allocates MSI-X vectors and requests interrupts from the kernel.
3287 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3289 int q_vectors = vsi->num_q_vectors;
3290 struct i40e_pf *pf = vsi->back;
3291 int base = vsi->base_vector;
3296 for (vector = 0; vector < q_vectors; vector++) {
3297 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3299 if (q_vector->tx.ring && q_vector->rx.ring) {
3300 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3301 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3303 } else if (q_vector->rx.ring) {
3304 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3305 "%s-%s-%d", basename, "rx", rx_int_idx++);
3306 } else if (q_vector->tx.ring) {
3307 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3308 "%s-%s-%d", basename, "tx", tx_int_idx++);
3310 /* skip this unused q_vector */
3313 err = request_irq(pf->msix_entries[base + vector].vector,
3319 dev_info(&pf->pdev->dev,
3320 "MSIX request_irq failed, error: %d\n", err);
3321 goto free_queue_irqs;
3323 /* assign the mask for this irq */
3324 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3325 &q_vector->affinity_mask);
3328 vsi->irqs_ready = true;
3334 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3336 free_irq(pf->msix_entries[base + vector].vector,
3337 &(vsi->q_vectors[vector]));
3343 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3344 * @vsi: the VSI being un-configured
3346 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3348 struct i40e_pf *pf = vsi->back;
3349 struct i40e_hw *hw = &pf->hw;
3350 int base = vsi->base_vector;
3353 for (i = 0; i < vsi->num_queue_pairs; i++) {
3354 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3355 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3358 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3359 for (i = vsi->base_vector;
3360 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3361 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3364 for (i = 0; i < vsi->num_q_vectors; i++)
3365 synchronize_irq(pf->msix_entries[i + base].vector);
3367 /* Legacy and MSI mode - this stops all interrupt handling */
3368 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3369 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3371 synchronize_irq(pf->pdev->irq);
3376 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3377 * @vsi: the VSI being configured
3379 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3381 struct i40e_pf *pf = vsi->back;
3384 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3385 for (i = 0; i < vsi->num_q_vectors; i++)
3386 i40e_irq_dynamic_enable(vsi, i);
3388 i40e_irq_dynamic_enable_icr0(pf);
3391 i40e_flush(&pf->hw);
3396 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3397 * @pf: board private structure
3399 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3402 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3403 i40e_flush(&pf->hw);
3407 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3408 * @irq: interrupt number
3409 * @data: pointer to a q_vector
3411 * This is the handler used for all MSI/Legacy interrupts, and deals
3412 * with both queue and non-queue interrupts. This is also used in
3413 * MSIX mode to handle the non-queue interrupts.
3415 static irqreturn_t i40e_intr(int irq, void *data)
3417 struct i40e_pf *pf = (struct i40e_pf *)data;
3418 struct i40e_hw *hw = &pf->hw;
3419 irqreturn_t ret = IRQ_NONE;
3420 u32 icr0, icr0_remaining;
3423 icr0 = rd32(hw, I40E_PFINT_ICR0);
3424 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3426 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3427 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3430 /* if interrupt but no bits showing, must be SWINT */
3431 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3432 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3435 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3436 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3437 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3438 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3439 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3442 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3443 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3444 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3445 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3447 /* temporarily disable queue cause for NAPI processing */
3448 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3450 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3451 wr32(hw, I40E_QINT_RQCTL(0), qval);
3453 qval = rd32(hw, I40E_QINT_TQCTL(0));
3454 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3455 wr32(hw, I40E_QINT_TQCTL(0), qval);
3457 if (!test_bit(__I40E_DOWN, &pf->state))
3458 napi_schedule_irqoff(&q_vector->napi);
3461 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3462 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3463 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3466 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3467 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3468 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3471 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3472 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3473 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3476 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3477 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3478 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3479 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3480 val = rd32(hw, I40E_GLGEN_RSTAT);
3481 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3482 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3483 if (val == I40E_RESET_CORER) {
3485 } else if (val == I40E_RESET_GLOBR) {
3487 } else if (val == I40E_RESET_EMPR) {
3489 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3493 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3494 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3495 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3496 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3497 rd32(hw, I40E_PFHMC_ERRORINFO),
3498 rd32(hw, I40E_PFHMC_ERRORDATA));
3501 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3502 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3504 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3505 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3506 i40e_ptp_tx_hwtstamp(pf);
3510 /* If a critical error is pending we have no choice but to reset the
3512 * Report and mask out any remaining unexpected interrupts.
3514 icr0_remaining = icr0 & ena_mask;
3515 if (icr0_remaining) {
3516 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3518 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3519 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3520 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3521 dev_info(&pf->pdev->dev, "device will be reset\n");
3522 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3523 i40e_service_event_schedule(pf);
3525 ena_mask &= ~icr0_remaining;
3530 /* re-enable interrupt causes */
3531 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3532 if (!test_bit(__I40E_DOWN, &pf->state)) {
3533 i40e_service_event_schedule(pf);
3534 i40e_irq_dynamic_enable_icr0(pf);
3541 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3542 * @tx_ring: tx ring to clean
3543 * @budget: how many cleans we're allowed
3545 * Returns true if there's any budget left (e.g. the clean is finished)
3547 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3549 struct i40e_vsi *vsi = tx_ring->vsi;
3550 u16 i = tx_ring->next_to_clean;
3551 struct i40e_tx_buffer *tx_buf;
3552 struct i40e_tx_desc *tx_desc;
3554 tx_buf = &tx_ring->tx_bi[i];
3555 tx_desc = I40E_TX_DESC(tx_ring, i);
3556 i -= tx_ring->count;
3559 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3561 /* if next_to_watch is not set then there is no work pending */
3565 /* prevent any other reads prior to eop_desc */
3566 read_barrier_depends();
3568 /* if the descriptor isn't done, no work yet to do */
3569 if (!(eop_desc->cmd_type_offset_bsz &
3570 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3573 /* clear next_to_watch to prevent false hangs */
3574 tx_buf->next_to_watch = NULL;
3576 tx_desc->buffer_addr = 0;
3577 tx_desc->cmd_type_offset_bsz = 0;
3578 /* move past filter desc */
3583 i -= tx_ring->count;
3584 tx_buf = tx_ring->tx_bi;
3585 tx_desc = I40E_TX_DESC(tx_ring, 0);
3587 /* unmap skb header data */
3588 dma_unmap_single(tx_ring->dev,
3589 dma_unmap_addr(tx_buf, dma),
3590 dma_unmap_len(tx_buf, len),
3592 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3593 kfree(tx_buf->raw_buf);
3595 tx_buf->raw_buf = NULL;
3596 tx_buf->tx_flags = 0;
3597 tx_buf->next_to_watch = NULL;
3598 dma_unmap_len_set(tx_buf, len, 0);
3599 tx_desc->buffer_addr = 0;
3600 tx_desc->cmd_type_offset_bsz = 0;
3602 /* move us past the eop_desc for start of next FD desc */
3607 i -= tx_ring->count;
3608 tx_buf = tx_ring->tx_bi;
3609 tx_desc = I40E_TX_DESC(tx_ring, 0);
3612 /* update budget accounting */
3614 } while (likely(budget));
3616 i += tx_ring->count;
3617 tx_ring->next_to_clean = i;
3619 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3620 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3626 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3627 * @irq: interrupt number
3628 * @data: pointer to a q_vector
3630 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3632 struct i40e_q_vector *q_vector = data;
3633 struct i40e_vsi *vsi;
3635 if (!q_vector->tx.ring)
3638 vsi = q_vector->tx.ring->vsi;
3639 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3645 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3646 * @vsi: the VSI being configured
3647 * @v_idx: vector index
3648 * @qp_idx: queue pair index
3650 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3652 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3653 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3654 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3656 tx_ring->q_vector = q_vector;
3657 tx_ring->next = q_vector->tx.ring;
3658 q_vector->tx.ring = tx_ring;
3659 q_vector->tx.count++;
3661 rx_ring->q_vector = q_vector;
3662 rx_ring->next = q_vector->rx.ring;
3663 q_vector->rx.ring = rx_ring;
3664 q_vector->rx.count++;
3668 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3669 * @vsi: the VSI being configured
3671 * This function maps descriptor rings to the queue-specific vectors
3672 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3673 * one vector per queue pair, but on a constrained vector budget, we
3674 * group the queue pairs as "efficiently" as possible.
3676 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3678 int qp_remaining = vsi->num_queue_pairs;
3679 int q_vectors = vsi->num_q_vectors;
3684 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3685 * group them so there are multiple queues per vector.
3686 * It is also important to go through all the vectors available to be
3687 * sure that if we don't use all the vectors, that the remaining vectors
3688 * are cleared. This is especially important when decreasing the
3689 * number of queues in use.
3691 for (; v_start < q_vectors; v_start++) {
3692 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3694 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3696 q_vector->num_ringpairs = num_ringpairs;
3698 q_vector->rx.count = 0;
3699 q_vector->tx.count = 0;
3700 q_vector->rx.ring = NULL;
3701 q_vector->tx.ring = NULL;
3703 while (num_ringpairs--) {
3704 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3712 * i40e_vsi_request_irq - Request IRQ from the OS
3713 * @vsi: the VSI being configured
3714 * @basename: name for the vector
3716 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3718 struct i40e_pf *pf = vsi->back;
3721 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3722 err = i40e_vsi_request_irq_msix(vsi, basename);
3723 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3724 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3727 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3731 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3736 #ifdef CONFIG_NET_POLL_CONTROLLER
3738 * i40e_netpoll - A Polling 'interrupt'handler
3739 * @netdev: network interface device structure
3741 * This is used by netconsole to send skbs without having to re-enable
3742 * interrupts. It's not called while the normal interrupt routine is executing.
3745 void i40e_netpoll(struct net_device *netdev)
3747 static void i40e_netpoll(struct net_device *netdev)
3750 struct i40e_netdev_priv *np = netdev_priv(netdev);
3751 struct i40e_vsi *vsi = np->vsi;
3752 struct i40e_pf *pf = vsi->back;
3755 /* if interface is down do nothing */
3756 if (test_bit(__I40E_DOWN, &vsi->state))
3759 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3760 for (i = 0; i < vsi->num_q_vectors; i++)
3761 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3763 i40e_intr(pf->pdev->irq, netdev);
3769 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3770 * @pf: the PF being configured
3771 * @pf_q: the PF queue
3772 * @enable: enable or disable state of the queue
3774 * This routine will wait for the given Tx queue of the PF to reach the
3775 * enabled or disabled state.
3776 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3777 * multiple retries; else will return 0 in case of success.
3779 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3784 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3785 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3786 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3789 usleep_range(10, 20);
3791 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3798 * i40e_vsi_control_tx - Start or stop a VSI's rings
3799 * @vsi: the VSI being configured
3800 * @enable: start or stop the rings
3802 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3804 struct i40e_pf *pf = vsi->back;
3805 struct i40e_hw *hw = &pf->hw;
3806 int i, j, pf_q, ret = 0;
3809 pf_q = vsi->base_queue;
3810 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3812 /* warn the TX unit of coming changes */
3813 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3815 usleep_range(10, 20);
3817 for (j = 0; j < 50; j++) {
3818 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3819 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3820 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3822 usleep_range(1000, 2000);
3824 /* Skip if the queue is already in the requested state */
3825 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3828 /* turn on/off the queue */
3830 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3831 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3833 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3836 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3837 /* No waiting for the Tx queue to disable */
3838 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3841 /* wait for the change to finish */
3842 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3844 dev_info(&pf->pdev->dev,
3845 "VSI seid %d Tx ring %d %sable timeout\n",
3846 vsi->seid, pf_q, (enable ? "en" : "dis"));
3851 if (hw->revision_id == 0)
3857 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3858 * @pf: the PF being configured
3859 * @pf_q: the PF queue
3860 * @enable: enable or disable state of the queue
3862 * This routine will wait for the given Rx queue of the PF to reach the
3863 * enabled or disabled state.
3864 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3865 * multiple retries; else will return 0 in case of success.
3867 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3872 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3873 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3874 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3877 usleep_range(10, 20);
3879 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3886 * i40e_vsi_control_rx - Start or stop a VSI's rings
3887 * @vsi: the VSI being configured
3888 * @enable: start or stop the rings
3890 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3892 struct i40e_pf *pf = vsi->back;
3893 struct i40e_hw *hw = &pf->hw;
3894 int i, j, pf_q, ret = 0;
3897 pf_q = vsi->base_queue;
3898 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3899 for (j = 0; j < 50; j++) {
3900 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3901 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3902 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3904 usleep_range(1000, 2000);
3907 /* Skip if the queue is already in the requested state */
3908 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3911 /* turn on/off the queue */
3913 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3915 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3916 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3918 /* wait for the change to finish */
3919 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3921 dev_info(&pf->pdev->dev,
3922 "VSI seid %d Rx ring %d %sable timeout\n",
3923 vsi->seid, pf_q, (enable ? "en" : "dis"));
3932 * i40e_vsi_control_rings - Start or stop a VSI's rings
3933 * @vsi: the VSI being configured
3934 * @enable: start or stop the rings
3936 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3940 /* do rx first for enable and last for disable */
3942 ret = i40e_vsi_control_rx(vsi, request);
3945 ret = i40e_vsi_control_tx(vsi, request);
3947 /* Ignore return value, we need to shutdown whatever we can */
3948 i40e_vsi_control_tx(vsi, request);
3949 i40e_vsi_control_rx(vsi, request);
3956 * i40e_vsi_free_irq - Free the irq association with the OS
3957 * @vsi: the VSI being configured
3959 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3961 struct i40e_pf *pf = vsi->back;
3962 struct i40e_hw *hw = &pf->hw;
3963 int base = vsi->base_vector;
3967 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3968 if (!vsi->q_vectors)
3971 if (!vsi->irqs_ready)
3974 vsi->irqs_ready = false;
3975 for (i = 0; i < vsi->num_q_vectors; i++) {
3976 u16 vector = i + base;
3978 /* free only the irqs that were actually requested */
3979 if (!vsi->q_vectors[i] ||
3980 !vsi->q_vectors[i]->num_ringpairs)
3983 /* clear the affinity_mask in the IRQ descriptor */
3984 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3986 free_irq(pf->msix_entries[vector].vector,
3989 /* Tear down the interrupt queue link list
3991 * We know that they come in pairs and always
3992 * the Rx first, then the Tx. To clear the
3993 * link list, stick the EOL value into the
3994 * next_q field of the registers.
3996 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3997 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3998 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3999 val |= I40E_QUEUE_END_OF_LIST
4000 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4001 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4003 while (qp != I40E_QUEUE_END_OF_LIST) {
4006 val = rd32(hw, I40E_QINT_RQCTL(qp));
4008 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4009 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4010 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4011 I40E_QINT_RQCTL_INTEVENT_MASK);
4013 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4014 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4016 wr32(hw, I40E_QINT_RQCTL(qp), val);
4018 val = rd32(hw, I40E_QINT_TQCTL(qp));
4020 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4021 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4023 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4024 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4025 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4026 I40E_QINT_TQCTL_INTEVENT_MASK);
4028 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4029 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4031 wr32(hw, I40E_QINT_TQCTL(qp), val);
4036 free_irq(pf->pdev->irq, pf);
4038 val = rd32(hw, I40E_PFINT_LNKLST0);
4039 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4040 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4041 val |= I40E_QUEUE_END_OF_LIST
4042 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4043 wr32(hw, I40E_PFINT_LNKLST0, val);
4045 val = rd32(hw, I40E_QINT_RQCTL(qp));
4046 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4047 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4048 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4049 I40E_QINT_RQCTL_INTEVENT_MASK);
4051 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4052 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4054 wr32(hw, I40E_QINT_RQCTL(qp), val);
4056 val = rd32(hw, I40E_QINT_TQCTL(qp));
4058 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4059 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4060 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4061 I40E_QINT_TQCTL_INTEVENT_MASK);
4063 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4064 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4066 wr32(hw, I40E_QINT_TQCTL(qp), val);
4071 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4072 * @vsi: the VSI being configured
4073 * @v_idx: Index of vector to be freed
4075 * This function frees the memory allocated to the q_vector. In addition if
4076 * NAPI is enabled it will delete any references to the NAPI struct prior
4077 * to freeing the q_vector.
4079 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4081 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4082 struct i40e_ring *ring;
4087 /* disassociate q_vector from rings */
4088 i40e_for_each_ring(ring, q_vector->tx)
4089 ring->q_vector = NULL;
4091 i40e_for_each_ring(ring, q_vector->rx)
4092 ring->q_vector = NULL;
4094 /* only VSI w/ an associated netdev is set up w/ NAPI */
4096 netif_napi_del(&q_vector->napi);
4098 vsi->q_vectors[v_idx] = NULL;
4100 kfree_rcu(q_vector, rcu);
4104 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4105 * @vsi: the VSI being un-configured
4107 * This frees the memory allocated to the q_vectors and
4108 * deletes references to the NAPI struct.
4110 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4114 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4115 i40e_free_q_vector(vsi, v_idx);
4119 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4120 * @pf: board private structure
4122 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4124 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4125 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4126 pci_disable_msix(pf->pdev);
4127 kfree(pf->msix_entries);
4128 pf->msix_entries = NULL;
4129 kfree(pf->irq_pile);
4130 pf->irq_pile = NULL;
4131 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4132 pci_disable_msi(pf->pdev);
4134 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4138 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4139 * @pf: board private structure
4141 * We go through and clear interrupt specific resources and reset the structure
4142 * to pre-load conditions
4144 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4148 i40e_stop_misc_vector(pf);
4149 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4150 synchronize_irq(pf->msix_entries[0].vector);
4151 free_irq(pf->msix_entries[0].vector, pf);
4154 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4155 for (i = 0; i < pf->num_alloc_vsi; i++)
4157 i40e_vsi_free_q_vectors(pf->vsi[i]);
4158 i40e_reset_interrupt_capability(pf);
4162 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4163 * @vsi: the VSI being configured
4165 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4172 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4173 napi_enable(&vsi->q_vectors[q_idx]->napi);
4177 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4178 * @vsi: the VSI being configured
4180 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4187 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4188 napi_disable(&vsi->q_vectors[q_idx]->napi);
4192 * i40e_vsi_close - Shut down a VSI
4193 * @vsi: the vsi to be quelled
4195 static void i40e_vsi_close(struct i40e_vsi *vsi)
4197 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4199 i40e_vsi_free_irq(vsi);
4200 i40e_vsi_free_tx_resources(vsi);
4201 i40e_vsi_free_rx_resources(vsi);
4202 vsi->current_netdev_flags = 0;
4206 * i40e_quiesce_vsi - Pause a given VSI
4207 * @vsi: the VSI being paused
4209 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4211 if (test_bit(__I40E_DOWN, &vsi->state))
4214 /* No need to disable FCoE VSI when Tx suspended */
4215 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4216 vsi->type == I40E_VSI_FCOE) {
4217 dev_dbg(&vsi->back->pdev->dev,
4218 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4222 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4223 if (vsi->netdev && netif_running(vsi->netdev))
4224 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4226 i40e_vsi_close(vsi);
4230 * i40e_unquiesce_vsi - Resume a given VSI
4231 * @vsi: the VSI being resumed
4233 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4235 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4238 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4239 if (vsi->netdev && netif_running(vsi->netdev))
4240 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4242 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4246 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4249 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4253 for (v = 0; v < pf->num_alloc_vsi; v++) {
4255 i40e_quiesce_vsi(pf->vsi[v]);
4260 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4263 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4267 for (v = 0; v < pf->num_alloc_vsi; v++) {
4269 i40e_unquiesce_vsi(pf->vsi[v]);
4273 #ifdef CONFIG_I40E_DCB
4275 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4276 * @vsi: the VSI being configured
4278 * This function waits for the given VSI's Tx queues to be disabled.
4280 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4282 struct i40e_pf *pf = vsi->back;
4285 pf_q = vsi->base_queue;
4286 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4287 /* Check and wait for the disable status of the queue */
4288 ret = i40e_pf_txq_wait(pf, pf_q, false);
4290 dev_info(&pf->pdev->dev,
4291 "VSI seid %d Tx ring %d disable timeout\n",
4301 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4304 * This function waits for the Tx queues to be in disabled state for all the
4305 * VSIs that are managed by this PF.
4307 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4311 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4312 /* No need to wait for FCoE VSI queues */
4313 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4314 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4326 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4327 * @q_idx: TX queue number
4328 * @vsi: Pointer to VSI struct
4330 * This function checks specified queue for given VSI. Detects hung condition.
4331 * Sets hung bit since it is two step process. Before next run of service task
4332 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4333 * hung condition remain unchanged and during subsequent run, this function
4334 * issues SW interrupt to recover from hung condition.
4336 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4338 struct i40e_ring *tx_ring = NULL;
4340 u32 head, val, tx_pending;
4345 /* now that we have an index, find the tx_ring struct */
4346 for (i = 0; i < vsi->num_queue_pairs; i++) {
4347 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4348 if (q_idx == vsi->tx_rings[i]->queue_index) {
4349 tx_ring = vsi->tx_rings[i];
4358 /* Read interrupt register */
4359 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4361 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4362 tx_ring->vsi->base_vector - 1));
4364 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4366 head = i40e_get_head(tx_ring);
4368 tx_pending = i40e_get_tx_pending(tx_ring);
4370 /* Interrupts are disabled and TX pending is non-zero,
4371 * trigger the SW interrupt (don't wait). Worst case
4372 * there will be one extra interrupt which may result
4373 * into not cleaning any queues because queues are cleaned.
4375 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4376 i40e_force_wb(vsi, tx_ring->q_vector);
4380 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4381 * @pf: pointer to PF struct
4383 * LAN VSI has netdev and netdev has TX queues. This function is to check
4384 * each of those TX queues if they are hung, trigger recovery by issuing
4387 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4389 struct net_device *netdev;
4390 struct i40e_vsi *vsi;
4393 /* Only for LAN VSI */
4394 vsi = pf->vsi[pf->lan_vsi];
4399 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4400 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4401 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4404 /* Make sure type is MAIN VSI */
4405 if (vsi->type != I40E_VSI_MAIN)
4408 netdev = vsi->netdev;
4412 /* Bail out if netif_carrier is not OK */
4413 if (!netif_carrier_ok(netdev))
4416 /* Go thru' TX queues for netdev */
4417 for (i = 0; i < netdev->num_tx_queues; i++) {
4418 struct netdev_queue *q;
4420 q = netdev_get_tx_queue(netdev, i);
4422 i40e_detect_recover_hung_queue(i, vsi);
4427 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4428 * @pf: pointer to PF
4430 * Get TC map for ISCSI PF type that will include iSCSI TC
4433 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4435 struct i40e_dcb_app_priority_table app;
4436 struct i40e_hw *hw = &pf->hw;
4437 u8 enabled_tc = 1; /* TC0 is always enabled */
4439 /* Get the iSCSI APP TLV */
4440 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4442 for (i = 0; i < dcbcfg->numapps; i++) {
4443 app = dcbcfg->app[i];
4444 if (app.selector == I40E_APP_SEL_TCPIP &&
4445 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4446 tc = dcbcfg->etscfg.prioritytable[app.priority];
4447 enabled_tc |= BIT_ULL(tc);
4456 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4457 * @dcbcfg: the corresponding DCBx configuration structure
4459 * Return the number of TCs from given DCBx configuration
4461 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4466 /* Scan the ETS Config Priority Table to find
4467 * traffic class enabled for a given priority
4468 * and use the traffic class index to get the
4469 * number of traffic classes enabled
4471 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4472 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4473 num_tc = dcbcfg->etscfg.prioritytable[i];
4476 /* Traffic class index starts from zero so
4477 * increment to return the actual count
4483 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4484 * @dcbcfg: the corresponding DCBx configuration structure
4486 * Query the current DCB configuration and return the number of
4487 * traffic classes enabled from the given DCBX config
4489 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4491 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4495 for (i = 0; i < num_tc; i++)
4496 enabled_tc |= BIT(i);
4502 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4503 * @pf: PF being queried
4505 * Return number of traffic classes enabled for the given PF
4507 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4509 struct i40e_hw *hw = &pf->hw;
4512 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4514 /* If DCB is not enabled then always in single TC */
4515 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4518 /* SFP mode will be enabled for all TCs on port */
4519 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4520 return i40e_dcb_get_num_tc(dcbcfg);
4522 /* MFP mode return count of enabled TCs for this PF */
4523 if (pf->hw.func_caps.iscsi)
4524 enabled_tc = i40e_get_iscsi_tc_map(pf);
4526 return 1; /* Only TC0 */
4528 /* At least have TC0 */
4529 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4530 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4531 if (enabled_tc & BIT_ULL(i))
4538 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4539 * @pf: PF being queried
4541 * Return a bitmap for first enabled traffic class for this PF.
4543 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4545 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4549 return 0x1; /* TC0 */
4551 /* Find the first enabled TC */
4552 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4553 if (enabled_tc & BIT_ULL(i))
4561 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4562 * @pf: PF being queried
4564 * Return a bitmap for enabled traffic classes for this PF.
4566 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4568 /* If DCB is not enabled for this PF then just return default TC */
4569 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4570 return i40e_pf_get_default_tc(pf);
4572 /* SFP mode we want PF to be enabled for all TCs */
4573 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4574 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4576 /* MFP enabled and iSCSI PF type */
4577 if (pf->hw.func_caps.iscsi)
4578 return i40e_get_iscsi_tc_map(pf);
4580 return i40e_pf_get_default_tc(pf);
4584 * i40e_vsi_get_bw_info - Query VSI BW Information
4585 * @vsi: the VSI being queried
4587 * Returns 0 on success, negative value on failure
4589 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4591 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4592 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4593 struct i40e_pf *pf = vsi->back;
4594 struct i40e_hw *hw = &pf->hw;
4599 /* Get the VSI level BW configuration */
4600 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4602 dev_info(&pf->pdev->dev,
4603 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4604 i40e_stat_str(&pf->hw, ret),
4605 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4609 /* Get the VSI level BW configuration per TC */
4610 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4613 dev_info(&pf->pdev->dev,
4614 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4615 i40e_stat_str(&pf->hw, ret),
4616 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4620 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4621 dev_info(&pf->pdev->dev,
4622 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4623 bw_config.tc_valid_bits,
4624 bw_ets_config.tc_valid_bits);
4625 /* Still continuing */
4628 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4629 vsi->bw_max_quanta = bw_config.max_bw;
4630 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4631 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4632 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4633 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4634 vsi->bw_ets_limit_credits[i] =
4635 le16_to_cpu(bw_ets_config.credits[i]);
4636 /* 3 bits out of 4 for each TC */
4637 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4644 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4645 * @vsi: the VSI being configured
4646 * @enabled_tc: TC bitmap
4647 * @bw_credits: BW shared credits per TC
4649 * Returns 0 on success, negative value on failure
4651 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4654 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4658 bw_data.tc_valid_bits = enabled_tc;
4659 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4660 bw_data.tc_bw_credits[i] = bw_share[i];
4662 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4665 dev_info(&vsi->back->pdev->dev,
4666 "AQ command Config VSI BW allocation per TC failed = %d\n",
4667 vsi->back->hw.aq.asq_last_status);
4671 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4672 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4678 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4679 * @vsi: the VSI being configured
4680 * @enabled_tc: TC map to be enabled
4683 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4685 struct net_device *netdev = vsi->netdev;
4686 struct i40e_pf *pf = vsi->back;
4687 struct i40e_hw *hw = &pf->hw;
4690 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4696 netdev_reset_tc(netdev);
4700 /* Set up actual enabled TCs on the VSI */
4701 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4704 /* set per TC queues for the VSI */
4705 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4706 /* Only set TC queues for enabled tcs
4708 * e.g. For a VSI that has TC0 and TC3 enabled the
4709 * enabled_tc bitmap would be 0x00001001; the driver
4710 * will set the numtc for netdev as 2 that will be
4711 * referenced by the netdev layer as TC 0 and 1.
4713 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4714 netdev_set_tc_queue(netdev,
4715 vsi->tc_config.tc_info[i].netdev_tc,
4716 vsi->tc_config.tc_info[i].qcount,
4717 vsi->tc_config.tc_info[i].qoffset);
4720 /* Assign UP2TC map for the VSI */
4721 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4722 /* Get the actual TC# for the UP */
4723 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4724 /* Get the mapped netdev TC# for the UP */
4725 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4726 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4731 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4732 * @vsi: the VSI being configured
4733 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4735 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4736 struct i40e_vsi_context *ctxt)
4738 /* copy just the sections touched not the entire info
4739 * since not all sections are valid as returned by
4742 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4743 memcpy(&vsi->info.queue_mapping,
4744 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4745 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4746 sizeof(vsi->info.tc_mapping));
4750 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4751 * @vsi: VSI to be configured
4752 * @enabled_tc: TC bitmap
4754 * This configures a particular VSI for TCs that are mapped to the
4755 * given TC bitmap. It uses default bandwidth share for TCs across
4756 * VSIs to configure TC for a particular VSI.
4759 * It is expected that the VSI queues have been quisced before calling
4762 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4764 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4765 struct i40e_vsi_context ctxt;
4769 /* Check if enabled_tc is same as existing or new TCs */
4770 if (vsi->tc_config.enabled_tc == enabled_tc)
4773 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4774 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4775 if (enabled_tc & BIT_ULL(i))
4779 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4781 dev_info(&vsi->back->pdev->dev,
4782 "Failed configuring TC map %d for VSI %d\n",
4783 enabled_tc, vsi->seid);
4787 /* Update Queue Pairs Mapping for currently enabled UPs */
4788 ctxt.seid = vsi->seid;
4789 ctxt.pf_num = vsi->back->hw.pf_id;
4791 ctxt.uplink_seid = vsi->uplink_seid;
4792 ctxt.info = vsi->info;
4793 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4795 /* Update the VSI after updating the VSI queue-mapping information */
4796 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4798 dev_info(&vsi->back->pdev->dev,
4799 "Update vsi tc config failed, err %s aq_err %s\n",
4800 i40e_stat_str(&vsi->back->hw, ret),
4801 i40e_aq_str(&vsi->back->hw,
4802 vsi->back->hw.aq.asq_last_status));
4805 /* update the local VSI info with updated queue map */
4806 i40e_vsi_update_queue_map(vsi, &ctxt);
4807 vsi->info.valid_sections = 0;
4809 /* Update current VSI BW information */
4810 ret = i40e_vsi_get_bw_info(vsi);
4812 dev_info(&vsi->back->pdev->dev,
4813 "Failed updating vsi bw info, err %s aq_err %s\n",
4814 i40e_stat_str(&vsi->back->hw, ret),
4815 i40e_aq_str(&vsi->back->hw,
4816 vsi->back->hw.aq.asq_last_status));
4820 /* Update the netdev TC setup */
4821 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4827 * i40e_veb_config_tc - Configure TCs for given VEB
4829 * @enabled_tc: TC bitmap
4831 * Configures given TC bitmap for VEB (switching) element
4833 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4835 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4836 struct i40e_pf *pf = veb->pf;
4840 /* No TCs or already enabled TCs just return */
4841 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4844 bw_data.tc_valid_bits = enabled_tc;
4845 /* bw_data.absolute_credits is not set (relative) */
4847 /* Enable ETS TCs with equal BW Share for now */
4848 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4849 if (enabled_tc & BIT_ULL(i))
4850 bw_data.tc_bw_share_credits[i] = 1;
4853 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4856 dev_info(&pf->pdev->dev,
4857 "VEB bw config failed, err %s aq_err %s\n",
4858 i40e_stat_str(&pf->hw, ret),
4859 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4863 /* Update the BW information */
4864 ret = i40e_veb_get_bw_info(veb);
4866 dev_info(&pf->pdev->dev,
4867 "Failed getting veb bw config, err %s aq_err %s\n",
4868 i40e_stat_str(&pf->hw, ret),
4869 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4876 #ifdef CONFIG_I40E_DCB
4878 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4881 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4882 * the caller would've quiesce all the VSIs before calling
4885 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4891 /* Enable the TCs available on PF to all VEBs */
4892 tc_map = i40e_pf_get_tc_map(pf);
4893 for (v = 0; v < I40E_MAX_VEB; v++) {
4896 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4898 dev_info(&pf->pdev->dev,
4899 "Failed configuring TC for VEB seid=%d\n",
4901 /* Will try to configure as many components */
4905 /* Update each VSI */
4906 for (v = 0; v < pf->num_alloc_vsi; v++) {
4910 /* - Enable all TCs for the LAN VSI
4912 * - For FCoE VSI only enable the TC configured
4913 * as per the APP TLV
4915 * - For all others keep them at TC0 for now
4917 if (v == pf->lan_vsi)
4918 tc_map = i40e_pf_get_tc_map(pf);
4920 tc_map = i40e_pf_get_default_tc(pf);
4922 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4923 tc_map = i40e_get_fcoe_tc_map(pf);
4924 #endif /* #ifdef I40E_FCOE */
4926 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4928 dev_info(&pf->pdev->dev,
4929 "Failed configuring TC for VSI seid=%d\n",
4931 /* Will try to configure as many components */
4933 /* Re-configure VSI vectors based on updated TC map */
4934 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4935 if (pf->vsi[v]->netdev)
4936 i40e_dcbnl_set_all(pf->vsi[v]);
4942 * i40e_resume_port_tx - Resume port Tx
4945 * Resume a port's Tx and issue a PF reset in case of failure to
4948 static int i40e_resume_port_tx(struct i40e_pf *pf)
4950 struct i40e_hw *hw = &pf->hw;
4953 ret = i40e_aq_resume_port_tx(hw, NULL);
4955 dev_info(&pf->pdev->dev,
4956 "Resume Port Tx failed, err %s aq_err %s\n",
4957 i40e_stat_str(&pf->hw, ret),
4958 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4959 /* Schedule PF reset to recover */
4960 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4961 i40e_service_event_schedule(pf);
4968 * i40e_init_pf_dcb - Initialize DCB configuration
4969 * @pf: PF being configured
4971 * Query the current DCB configuration and cache it
4972 * in the hardware structure
4974 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4976 struct i40e_hw *hw = &pf->hw;
4979 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4980 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4981 (pf->hw.aq.fw_maj_ver < 4))
4984 /* Get the initial DCB configuration */
4985 err = i40e_init_dcb(hw);
4987 /* Device/Function is not DCBX capable */
4988 if ((!hw->func_caps.dcb) ||
4989 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4990 dev_info(&pf->pdev->dev,
4991 "DCBX offload is not supported or is disabled for this PF.\n");
4993 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4997 /* When status is not DISABLED then DCBX in FW */
4998 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4999 DCB_CAP_DCBX_VER_IEEE;
5001 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5002 /* Enable DCB tagging only when more than one TC */
5003 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5004 pf->flags |= I40E_FLAG_DCB_ENABLED;
5005 dev_dbg(&pf->pdev->dev,
5006 "DCBX offload is supported for this PF.\n");
5009 dev_info(&pf->pdev->dev,
5010 "Query for DCB configuration failed, err %s aq_err %s\n",
5011 i40e_stat_str(&pf->hw, err),
5012 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5018 #endif /* CONFIG_I40E_DCB */
5019 #define SPEED_SIZE 14
5022 * i40e_print_link_message - print link up or down
5023 * @vsi: the VSI for which link needs a message
5025 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5027 char *speed = "Unknown";
5028 char *fc = "Unknown";
5030 if (vsi->current_isup == isup)
5032 vsi->current_isup = isup;
5034 netdev_info(vsi->netdev, "NIC Link is Down\n");
5038 /* Warn user if link speed on NPAR enabled partition is not at
5041 if (vsi->back->hw.func_caps.npar_enable &&
5042 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5043 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5044 netdev_warn(vsi->netdev,
5045 "The partition detected link speed that is less than 10Gbps\n");
5047 switch (vsi->back->hw.phy.link_info.link_speed) {
5048 case I40E_LINK_SPEED_40GB:
5051 case I40E_LINK_SPEED_20GB:
5054 case I40E_LINK_SPEED_10GB:
5057 case I40E_LINK_SPEED_1GB:
5060 case I40E_LINK_SPEED_100MB:
5067 switch (vsi->back->hw.fc.current_mode) {
5071 case I40E_FC_TX_PAUSE:
5074 case I40E_FC_RX_PAUSE:
5082 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5087 * i40e_up_complete - Finish the last steps of bringing up a connection
5088 * @vsi: the VSI being configured
5090 static int i40e_up_complete(struct i40e_vsi *vsi)
5092 struct i40e_pf *pf = vsi->back;
5095 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5096 i40e_vsi_configure_msix(vsi);
5098 i40e_configure_msi_and_legacy(vsi);
5101 err = i40e_vsi_control_rings(vsi, true);
5105 clear_bit(__I40E_DOWN, &vsi->state);
5106 i40e_napi_enable_all(vsi);
5107 i40e_vsi_enable_irq(vsi);
5109 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5111 i40e_print_link_message(vsi, true);
5112 netif_tx_start_all_queues(vsi->netdev);
5113 netif_carrier_on(vsi->netdev);
5114 } else if (vsi->netdev) {
5115 i40e_print_link_message(vsi, false);
5116 /* need to check for qualified module here*/
5117 if ((pf->hw.phy.link_info.link_info &
5118 I40E_AQ_MEDIA_AVAILABLE) &&
5119 (!(pf->hw.phy.link_info.an_info &
5120 I40E_AQ_QUALIFIED_MODULE)))
5121 netdev_err(vsi->netdev,
5122 "the driver failed to link because an unqualified module was detected.");
5125 /* replay FDIR SB filters */
5126 if (vsi->type == I40E_VSI_FDIR) {
5127 /* reset fd counters */
5128 pf->fd_add_err = pf->fd_atr_cnt = 0;
5129 if (pf->fd_tcp_rule > 0) {
5130 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5131 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5132 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5133 pf->fd_tcp_rule = 0;
5135 i40e_fdir_filter_restore(vsi);
5137 i40e_service_event_schedule(pf);
5143 * i40e_vsi_reinit_locked - Reset the VSI
5144 * @vsi: the VSI being configured
5146 * Rebuild the ring structs after some configuration
5147 * has changed, e.g. MTU size.
5149 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5151 struct i40e_pf *pf = vsi->back;
5153 WARN_ON(in_interrupt());
5154 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5155 usleep_range(1000, 2000);
5158 /* Give a VF some time to respond to the reset. The
5159 * two second wait is based upon the watchdog cycle in
5162 if (vsi->type == I40E_VSI_SRIOV)
5165 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5169 * i40e_up - Bring the connection back up after being down
5170 * @vsi: the VSI being configured
5172 int i40e_up(struct i40e_vsi *vsi)
5176 err = i40e_vsi_configure(vsi);
5178 err = i40e_up_complete(vsi);
5184 * i40e_down - Shutdown the connection processing
5185 * @vsi: the VSI being stopped
5187 void i40e_down(struct i40e_vsi *vsi)
5191 /* It is assumed that the caller of this function
5192 * sets the vsi->state __I40E_DOWN bit.
5195 netif_carrier_off(vsi->netdev);
5196 netif_tx_disable(vsi->netdev);
5198 i40e_vsi_disable_irq(vsi);
5199 i40e_vsi_control_rings(vsi, false);
5200 i40e_napi_disable_all(vsi);
5202 for (i = 0; i < vsi->num_queue_pairs; i++) {
5203 i40e_clean_tx_ring(vsi->tx_rings[i]);
5204 i40e_clean_rx_ring(vsi->rx_rings[i]);
5209 * i40e_setup_tc - configure multiple traffic classes
5210 * @netdev: net device to configure
5211 * @tc: number of traffic classes to enable
5214 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5216 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5219 struct i40e_netdev_priv *np = netdev_priv(netdev);
5220 struct i40e_vsi *vsi = np->vsi;
5221 struct i40e_pf *pf = vsi->back;
5226 /* Check if DCB enabled to continue */
5227 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5228 netdev_info(netdev, "DCB is not enabled for adapter\n");
5232 /* Check if MFP enabled */
5233 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5234 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5238 /* Check whether tc count is within enabled limit */
5239 if (tc > i40e_pf_get_num_tc(pf)) {
5240 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5244 /* Generate TC map for number of tc requested */
5245 for (i = 0; i < tc; i++)
5246 enabled_tc |= BIT_ULL(i);
5248 /* Requesting same TC configuration as already enabled */
5249 if (enabled_tc == vsi->tc_config.enabled_tc)
5252 /* Quiesce VSI queues */
5253 i40e_quiesce_vsi(vsi);
5255 /* Configure VSI for enabled TCs */
5256 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5258 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5264 i40e_unquiesce_vsi(vsi);
5271 * i40e_open - Called when a network interface is made active
5272 * @netdev: network interface device structure
5274 * The open entry point is called when a network interface is made
5275 * active by the system (IFF_UP). At this point all resources needed
5276 * for transmit and receive operations are allocated, the interrupt
5277 * handler is registered with the OS, the netdev watchdog subtask is
5278 * enabled, and the stack is notified that the interface is ready.
5280 * Returns 0 on success, negative value on failure
5282 int i40e_open(struct net_device *netdev)
5284 struct i40e_netdev_priv *np = netdev_priv(netdev);
5285 struct i40e_vsi *vsi = np->vsi;
5286 struct i40e_pf *pf = vsi->back;
5289 /* disallow open during test or if eeprom is broken */
5290 if (test_bit(__I40E_TESTING, &pf->state) ||
5291 test_bit(__I40E_BAD_EEPROM, &pf->state))
5294 netif_carrier_off(netdev);
5296 err = i40e_vsi_open(vsi);
5300 /* configure global TSO hardware offload settings */
5301 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5302 TCP_FLAG_FIN) >> 16);
5303 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5305 TCP_FLAG_CWR) >> 16);
5306 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5308 #ifdef CONFIG_I40E_VXLAN
5309 vxlan_get_rx_port(netdev);
5317 * @vsi: the VSI to open
5319 * Finish initialization of the VSI.
5321 * Returns 0 on success, negative value on failure
5323 int i40e_vsi_open(struct i40e_vsi *vsi)
5325 struct i40e_pf *pf = vsi->back;
5326 char int_name[I40E_INT_NAME_STR_LEN];
5329 /* allocate descriptors */
5330 err = i40e_vsi_setup_tx_resources(vsi);
5333 err = i40e_vsi_setup_rx_resources(vsi);
5337 err = i40e_vsi_configure(vsi);
5342 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5343 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5344 err = i40e_vsi_request_irq(vsi, int_name);
5348 /* Notify the stack of the actual queue counts. */
5349 err = netif_set_real_num_tx_queues(vsi->netdev,
5350 vsi->num_queue_pairs);
5352 goto err_set_queues;
5354 err = netif_set_real_num_rx_queues(vsi->netdev,
5355 vsi->num_queue_pairs);
5357 goto err_set_queues;
5359 } else if (vsi->type == I40E_VSI_FDIR) {
5360 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5361 dev_driver_string(&pf->pdev->dev),
5362 dev_name(&pf->pdev->dev));
5363 err = i40e_vsi_request_irq(vsi, int_name);
5370 err = i40e_up_complete(vsi);
5372 goto err_up_complete;
5379 i40e_vsi_free_irq(vsi);
5381 i40e_vsi_free_rx_resources(vsi);
5383 i40e_vsi_free_tx_resources(vsi);
5384 if (vsi == pf->vsi[pf->lan_vsi])
5385 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5391 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5392 * @pf: Pointer to PF
5394 * This function destroys the hlist where all the Flow Director
5395 * filters were saved.
5397 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5399 struct i40e_fdir_filter *filter;
5400 struct hlist_node *node2;
5402 hlist_for_each_entry_safe(filter, node2,
5403 &pf->fdir_filter_list, fdir_node) {
5404 hlist_del(&filter->fdir_node);
5407 pf->fdir_pf_active_filters = 0;
5411 * i40e_close - Disables a network interface
5412 * @netdev: network interface device structure
5414 * The close entry point is called when an interface is de-activated
5415 * by the OS. The hardware is still under the driver's control, but
5416 * this netdev interface is disabled.
5418 * Returns 0, this is not allowed to fail
5421 int i40e_close(struct net_device *netdev)
5423 static int i40e_close(struct net_device *netdev)
5426 struct i40e_netdev_priv *np = netdev_priv(netdev);
5427 struct i40e_vsi *vsi = np->vsi;
5429 i40e_vsi_close(vsi);
5435 * i40e_do_reset - Start a PF or Core Reset sequence
5436 * @pf: board private structure
5437 * @reset_flags: which reset is requested
5439 * The essential difference in resets is that the PF Reset
5440 * doesn't clear the packet buffers, doesn't reset the PE
5441 * firmware, and doesn't bother the other PFs on the chip.
5443 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5447 WARN_ON(in_interrupt());
5449 if (i40e_check_asq_alive(&pf->hw))
5450 i40e_vc_notify_reset(pf);
5452 /* do the biggest reset indicated */
5453 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5455 /* Request a Global Reset
5457 * This will start the chip's countdown to the actual full
5458 * chip reset event, and a warning interrupt to be sent
5459 * to all PFs, including the requestor. Our handler
5460 * for the warning interrupt will deal with the shutdown
5461 * and recovery of the switch setup.
5463 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5464 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5465 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5466 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5468 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5470 /* Request a Core Reset
5472 * Same as Global Reset, except does *not* include the MAC/PHY
5474 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5475 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5476 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5477 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5478 i40e_flush(&pf->hw);
5480 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5482 /* Request a PF Reset
5484 * Resets only the PF-specific registers
5486 * This goes directly to the tear-down and rebuild of
5487 * the switch, since we need to do all the recovery as
5488 * for the Core Reset.
5490 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5491 i40e_handle_reset_warning(pf);
5493 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5496 /* Find the VSI(s) that requested a re-init */
5497 dev_info(&pf->pdev->dev,
5498 "VSI reinit requested\n");
5499 for (v = 0; v < pf->num_alloc_vsi; v++) {
5500 struct i40e_vsi *vsi = pf->vsi[v];
5503 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5504 i40e_vsi_reinit_locked(pf->vsi[v]);
5505 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5508 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5511 /* Find the VSI(s) that needs to be brought down */
5512 dev_info(&pf->pdev->dev, "VSI down requested\n");
5513 for (v = 0; v < pf->num_alloc_vsi; v++) {
5514 struct i40e_vsi *vsi = pf->vsi[v];
5517 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5518 set_bit(__I40E_DOWN, &vsi->state);
5520 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5524 dev_info(&pf->pdev->dev,
5525 "bad reset request 0x%08x\n", reset_flags);
5529 #ifdef CONFIG_I40E_DCB
5531 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5532 * @pf: board private structure
5533 * @old_cfg: current DCB config
5534 * @new_cfg: new DCB config
5536 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5537 struct i40e_dcbx_config *old_cfg,
5538 struct i40e_dcbx_config *new_cfg)
5540 bool need_reconfig = false;
5542 /* Check if ETS configuration has changed */
5543 if (memcmp(&new_cfg->etscfg,
5545 sizeof(new_cfg->etscfg))) {
5546 /* If Priority Table has changed reconfig is needed */
5547 if (memcmp(&new_cfg->etscfg.prioritytable,
5548 &old_cfg->etscfg.prioritytable,
5549 sizeof(new_cfg->etscfg.prioritytable))) {
5550 need_reconfig = true;
5551 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5554 if (memcmp(&new_cfg->etscfg.tcbwtable,
5555 &old_cfg->etscfg.tcbwtable,
5556 sizeof(new_cfg->etscfg.tcbwtable)))
5557 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5559 if (memcmp(&new_cfg->etscfg.tsatable,
5560 &old_cfg->etscfg.tsatable,
5561 sizeof(new_cfg->etscfg.tsatable)))
5562 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5565 /* Check if PFC configuration has changed */
5566 if (memcmp(&new_cfg->pfc,
5568 sizeof(new_cfg->pfc))) {
5569 need_reconfig = true;
5570 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5573 /* Check if APP Table has changed */
5574 if (memcmp(&new_cfg->app,
5576 sizeof(new_cfg->app))) {
5577 need_reconfig = true;
5578 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5581 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5582 return need_reconfig;
5586 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5587 * @pf: board private structure
5588 * @e: event info posted on ARQ
5590 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5591 struct i40e_arq_event_info *e)
5593 struct i40e_aqc_lldp_get_mib *mib =
5594 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5595 struct i40e_hw *hw = &pf->hw;
5596 struct i40e_dcbx_config tmp_dcbx_cfg;
5597 bool need_reconfig = false;
5601 /* Not DCB capable or capability disabled */
5602 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5605 /* Ignore if event is not for Nearest Bridge */
5606 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5607 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5608 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5609 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5612 /* Check MIB Type and return if event for Remote MIB update */
5613 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5614 dev_dbg(&pf->pdev->dev,
5615 "LLDP event mib type %s\n", type ? "remote" : "local");
5616 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5617 /* Update the remote cached instance and return */
5618 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5619 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5620 &hw->remote_dcbx_config);
5624 /* Store the old configuration */
5625 tmp_dcbx_cfg = hw->local_dcbx_config;
5627 /* Reset the old DCBx configuration data */
5628 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5629 /* Get updated DCBX data from firmware */
5630 ret = i40e_get_dcb_config(&pf->hw);
5632 dev_info(&pf->pdev->dev,
5633 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5634 i40e_stat_str(&pf->hw, ret),
5635 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5639 /* No change detected in DCBX configs */
5640 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5641 sizeof(tmp_dcbx_cfg))) {
5642 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5646 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5647 &hw->local_dcbx_config);
5649 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5654 /* Enable DCB tagging only when more than one TC */
5655 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5656 pf->flags |= I40E_FLAG_DCB_ENABLED;
5658 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5660 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5661 /* Reconfiguration needed quiesce all VSIs */
5662 i40e_pf_quiesce_all_vsi(pf);
5664 /* Changes in configuration update VEB/VSI */
5665 i40e_dcb_reconfigure(pf);
5667 ret = i40e_resume_port_tx(pf);
5669 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5670 /* In case of error no point in resuming VSIs */
5674 /* Wait for the PF's Tx queues to be disabled */
5675 ret = i40e_pf_wait_txq_disabled(pf);
5677 /* Schedule PF reset to recover */
5678 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5679 i40e_service_event_schedule(pf);
5681 i40e_pf_unquiesce_all_vsi(pf);
5687 #endif /* CONFIG_I40E_DCB */
5690 * i40e_do_reset_safe - Protected reset path for userland calls.
5691 * @pf: board private structure
5692 * @reset_flags: which reset is requested
5695 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5698 i40e_do_reset(pf, reset_flags);
5703 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5704 * @pf: board private structure
5705 * @e: event info posted on ARQ
5707 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5710 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5711 struct i40e_arq_event_info *e)
5713 struct i40e_aqc_lan_overflow *data =
5714 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5715 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5716 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5717 struct i40e_hw *hw = &pf->hw;
5721 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5724 /* Queue belongs to VF, find the VF and issue VF reset */
5725 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5726 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5727 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5728 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5729 vf_id -= hw->func_caps.vf_base_id;
5730 vf = &pf->vf[vf_id];
5731 i40e_vc_notify_vf_reset(vf);
5732 /* Allow VF to process pending reset notification */
5734 i40e_reset_vf(vf, false);
5739 * i40e_service_event_complete - Finish up the service event
5740 * @pf: board private structure
5742 static void i40e_service_event_complete(struct i40e_pf *pf)
5744 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5746 /* flush memory to make sure state is correct before next watchog */
5747 smp_mb__before_atomic();
5748 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5752 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5753 * @pf: board private structure
5755 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5759 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5760 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5765 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5766 * @pf: board private structure
5768 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5772 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5773 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5774 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5775 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5780 * i40e_get_global_fd_count - Get total FD filters programmed on device
5781 * @pf: board private structure
5783 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5787 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5788 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5789 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5790 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5795 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5796 * @pf: board private structure
5798 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5800 struct i40e_fdir_filter *filter;
5801 u32 fcnt_prog, fcnt_avail;
5802 struct hlist_node *node;
5804 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5807 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5810 fcnt_prog = i40e_get_global_fd_count(pf);
5811 fcnt_avail = pf->fdir_pf_filter_count;
5812 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5813 (pf->fd_add_err == 0) ||
5814 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5815 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5816 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5817 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5818 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5819 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5822 /* Wait for some more space to be available to turn on ATR */
5823 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5824 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5825 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5826 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5827 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5828 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5832 /* if hw had a problem adding a filter, delete it */
5833 if (pf->fd_inv > 0) {
5834 hlist_for_each_entry_safe(filter, node,
5835 &pf->fdir_filter_list, fdir_node) {
5836 if (filter->fd_id == pf->fd_inv) {
5837 hlist_del(&filter->fdir_node);
5839 pf->fdir_pf_active_filters--;
5845 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5846 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5848 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5849 * @pf: board private structure
5851 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5853 unsigned long min_flush_time;
5854 int flush_wait_retry = 50;
5855 bool disable_atr = false;
5859 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5862 if (!time_after(jiffies, pf->fd_flush_timestamp +
5863 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5866 /* If the flush is happening too quick and we have mostly SB rules we
5867 * should not re-enable ATR for some time.
5869 min_flush_time = pf->fd_flush_timestamp +
5870 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5871 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5873 if (!(time_after(jiffies, min_flush_time)) &&
5874 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5875 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5876 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5880 pf->fd_flush_timestamp = jiffies;
5881 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5882 /* flush all filters */
5883 wr32(&pf->hw, I40E_PFQF_CTL_1,
5884 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5885 i40e_flush(&pf->hw);
5889 /* Check FD flush status every 5-6msec */
5890 usleep_range(5000, 6000);
5891 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5892 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5894 } while (flush_wait_retry--);
5895 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5896 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5898 /* replay sideband filters */
5899 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5901 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5902 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5903 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5904 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5910 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5911 * @pf: board private structure
5913 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5915 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5918 /* We can see up to 256 filter programming desc in transit if the filters are
5919 * being applied really fast; before we see the first
5920 * filter miss error on Rx queue 0. Accumulating enough error messages before
5921 * reacting will make sure we don't cause flush too often.
5923 #define I40E_MAX_FD_PROGRAM_ERROR 256
5926 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5927 * @pf: board private structure
5929 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5932 /* if interface is down do nothing */
5933 if (test_bit(__I40E_DOWN, &pf->state))
5936 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5939 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5940 i40e_fdir_flush_and_replay(pf);
5942 i40e_fdir_check_and_reenable(pf);
5947 * i40e_vsi_link_event - notify VSI of a link event
5948 * @vsi: vsi to be notified
5949 * @link_up: link up or down
5951 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5953 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5956 switch (vsi->type) {
5961 if (!vsi->netdev || !vsi->netdev_registered)
5965 netif_carrier_on(vsi->netdev);
5966 netif_tx_wake_all_queues(vsi->netdev);
5968 netif_carrier_off(vsi->netdev);
5969 netif_tx_stop_all_queues(vsi->netdev);
5973 case I40E_VSI_SRIOV:
5974 case I40E_VSI_VMDQ2:
5976 case I40E_VSI_MIRROR:
5978 /* there is no notification for other VSIs */
5984 * i40e_veb_link_event - notify elements on the veb of a link event
5985 * @veb: veb to be notified
5986 * @link_up: link up or down
5988 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5993 if (!veb || !veb->pf)
5997 /* depth first... */
5998 for (i = 0; i < I40E_MAX_VEB; i++)
5999 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6000 i40e_veb_link_event(pf->veb[i], link_up);
6002 /* ... now the local VSIs */
6003 for (i = 0; i < pf->num_alloc_vsi; i++)
6004 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6005 i40e_vsi_link_event(pf->vsi[i], link_up);
6009 * i40e_link_event - Update netif_carrier status
6010 * @pf: board private structure
6012 static void i40e_link_event(struct i40e_pf *pf)
6014 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6015 u8 new_link_speed, old_link_speed;
6017 bool new_link, old_link;
6019 /* set this to force the get_link_status call to refresh state */
6020 pf->hw.phy.get_link_info = true;
6022 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6024 status = i40e_get_link_status(&pf->hw, &new_link);
6026 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6031 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6032 new_link_speed = pf->hw.phy.link_info.link_speed;
6034 if (new_link == old_link &&
6035 new_link_speed == old_link_speed &&
6036 (test_bit(__I40E_DOWN, &vsi->state) ||
6037 new_link == netif_carrier_ok(vsi->netdev)))
6040 if (!test_bit(__I40E_DOWN, &vsi->state))
6041 i40e_print_link_message(vsi, new_link);
6043 /* Notify the base of the switch tree connected to
6044 * the link. Floating VEBs are not notified.
6046 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6047 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6049 i40e_vsi_link_event(vsi, new_link);
6052 i40e_vc_notify_link_state(pf);
6054 if (pf->flags & I40E_FLAG_PTP)
6055 i40e_ptp_set_increment(pf);
6059 * i40e_watchdog_subtask - periodic checks not using event driven response
6060 * @pf: board private structure
6062 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6066 /* if interface is down do nothing */
6067 if (test_bit(__I40E_DOWN, &pf->state) ||
6068 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6071 /* make sure we don't do these things too often */
6072 if (time_before(jiffies, (pf->service_timer_previous +
6073 pf->service_timer_period)))
6075 pf->service_timer_previous = jiffies;
6077 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6078 i40e_link_event(pf);
6080 /* Update the stats for active netdevs so the network stack
6081 * can look at updated numbers whenever it cares to
6083 for (i = 0; i < pf->num_alloc_vsi; i++)
6084 if (pf->vsi[i] && pf->vsi[i]->netdev)
6085 i40e_update_stats(pf->vsi[i]);
6087 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6088 /* Update the stats for the active switching components */
6089 for (i = 0; i < I40E_MAX_VEB; i++)
6091 i40e_update_veb_stats(pf->veb[i]);
6094 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6098 * i40e_reset_subtask - Set up for resetting the device and driver
6099 * @pf: board private structure
6101 static void i40e_reset_subtask(struct i40e_pf *pf)
6103 u32 reset_flags = 0;
6106 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6107 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
6108 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6110 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6111 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
6112 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6114 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6115 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
6116 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6118 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6119 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
6120 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6122 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6123 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
6124 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6127 /* If there's a recovery already waiting, it takes
6128 * precedence before starting a new reset sequence.
6130 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6131 i40e_handle_reset_warning(pf);
6135 /* If we're already down or resetting, just bail */
6137 !test_bit(__I40E_DOWN, &pf->state) &&
6138 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6139 i40e_do_reset(pf, reset_flags);
6146 * i40e_handle_link_event - Handle link event
6147 * @pf: board private structure
6148 * @e: event info posted on ARQ
6150 static void i40e_handle_link_event(struct i40e_pf *pf,
6151 struct i40e_arq_event_info *e)
6153 struct i40e_hw *hw = &pf->hw;
6154 struct i40e_aqc_get_link_status *status =
6155 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6157 /* save off old link status information */
6158 hw->phy.link_info_old = hw->phy.link_info;
6160 /* Do a new status request to re-enable LSE reporting
6161 * and load new status information into the hw struct
6162 * This completely ignores any state information
6163 * in the ARQ event info, instead choosing to always
6164 * issue the AQ update link status command.
6166 i40e_link_event(pf);
6168 /* check for unqualified module, if link is down */
6169 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6170 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6171 (!(status->link_info & I40E_AQ_LINK_UP)))
6172 dev_err(&pf->pdev->dev,
6173 "The driver failed to link because an unqualified module was detected.\n");
6177 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6178 * @pf: board private structure
6180 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6182 struct i40e_arq_event_info event;
6183 struct i40e_hw *hw = &pf->hw;
6190 /* Do not run clean AQ when PF reset fails */
6191 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6194 /* check for error indications */
6195 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6197 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6198 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6199 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6201 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6202 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6203 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6205 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6206 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6207 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6210 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6212 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6214 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6215 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6216 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6218 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6219 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6220 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6222 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6223 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6224 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6227 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6229 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6230 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6235 ret = i40e_clean_arq_element(hw, &event, &pending);
6236 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6239 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6243 opcode = le16_to_cpu(event.desc.opcode);
6246 case i40e_aqc_opc_get_link_status:
6247 i40e_handle_link_event(pf, &event);
6249 case i40e_aqc_opc_send_msg_to_pf:
6250 ret = i40e_vc_process_vf_msg(pf,
6251 le16_to_cpu(event.desc.retval),
6252 le32_to_cpu(event.desc.cookie_high),
6253 le32_to_cpu(event.desc.cookie_low),
6257 case i40e_aqc_opc_lldp_update_mib:
6258 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6259 #ifdef CONFIG_I40E_DCB
6261 ret = i40e_handle_lldp_event(pf, &event);
6263 #endif /* CONFIG_I40E_DCB */
6265 case i40e_aqc_opc_event_lan_overflow:
6266 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6267 i40e_handle_lan_overflow_event(pf, &event);
6269 case i40e_aqc_opc_send_msg_to_peer:
6270 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6272 case i40e_aqc_opc_nvm_erase:
6273 case i40e_aqc_opc_nvm_update:
6274 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6277 dev_info(&pf->pdev->dev,
6278 "ARQ Error: Unknown event 0x%04x received\n",
6282 } while (pending && (i++ < pf->adminq_work_limit));
6284 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6285 /* re-enable Admin queue interrupt cause */
6286 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6287 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6288 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6291 kfree(event.msg_buf);
6295 * i40e_verify_eeprom - make sure eeprom is good to use
6296 * @pf: board private structure
6298 static void i40e_verify_eeprom(struct i40e_pf *pf)
6302 err = i40e_diag_eeprom_test(&pf->hw);
6304 /* retry in case of garbage read */
6305 err = i40e_diag_eeprom_test(&pf->hw);
6307 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6309 set_bit(__I40E_BAD_EEPROM, &pf->state);
6313 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6314 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6315 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6320 * i40e_enable_pf_switch_lb
6321 * @pf: pointer to the PF structure
6323 * enable switch loop back or die - no point in a return value
6325 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6327 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6328 struct i40e_vsi_context ctxt;
6331 ctxt.seid = pf->main_vsi_seid;
6332 ctxt.pf_num = pf->hw.pf_id;
6334 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6336 dev_info(&pf->pdev->dev,
6337 "couldn't get PF vsi config, err %s aq_err %s\n",
6338 i40e_stat_str(&pf->hw, ret),
6339 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6342 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6343 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6344 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6346 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6348 dev_info(&pf->pdev->dev,
6349 "update vsi switch failed, err %s aq_err %s\n",
6350 i40e_stat_str(&pf->hw, ret),
6351 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6356 * i40e_disable_pf_switch_lb
6357 * @pf: pointer to the PF structure
6359 * disable switch loop back or die - no point in a return value
6361 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6363 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6364 struct i40e_vsi_context ctxt;
6367 ctxt.seid = pf->main_vsi_seid;
6368 ctxt.pf_num = pf->hw.pf_id;
6370 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6372 dev_info(&pf->pdev->dev,
6373 "couldn't get PF vsi config, err %s aq_err %s\n",
6374 i40e_stat_str(&pf->hw, ret),
6375 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6378 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6379 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6380 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6382 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6384 dev_info(&pf->pdev->dev,
6385 "update vsi switch failed, err %s aq_err %s\n",
6386 i40e_stat_str(&pf->hw, ret),
6387 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6392 * i40e_config_bridge_mode - Configure the HW bridge mode
6393 * @veb: pointer to the bridge instance
6395 * Configure the loop back mode for the LAN VSI that is downlink to the
6396 * specified HW bridge instance. It is expected this function is called
6397 * when a new HW bridge is instantiated.
6399 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6401 struct i40e_pf *pf = veb->pf;
6403 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6404 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6405 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6406 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6407 i40e_disable_pf_switch_lb(pf);
6409 i40e_enable_pf_switch_lb(pf);
6413 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6414 * @veb: pointer to the VEB instance
6416 * This is a recursive function that first builds the attached VSIs then
6417 * recurses in to build the next layer of VEB. We track the connections
6418 * through our own index numbers because the seid's from the HW could
6419 * change across the reset.
6421 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6423 struct i40e_vsi *ctl_vsi = NULL;
6424 struct i40e_pf *pf = veb->pf;
6428 /* build VSI that owns this VEB, temporarily attached to base VEB */
6429 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6431 pf->vsi[v]->veb_idx == veb->idx &&
6432 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6433 ctl_vsi = pf->vsi[v];
6438 dev_info(&pf->pdev->dev,
6439 "missing owner VSI for veb_idx %d\n", veb->idx);
6441 goto end_reconstitute;
6443 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6444 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6445 ret = i40e_add_vsi(ctl_vsi);
6447 dev_info(&pf->pdev->dev,
6448 "rebuild of veb_idx %d owner VSI failed: %d\n",
6450 goto end_reconstitute;
6452 i40e_vsi_reset_stats(ctl_vsi);
6454 /* create the VEB in the switch and move the VSI onto the VEB */
6455 ret = i40e_add_veb(veb, ctl_vsi);
6457 goto end_reconstitute;
6459 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6460 veb->bridge_mode = BRIDGE_MODE_VEB;
6462 veb->bridge_mode = BRIDGE_MODE_VEPA;
6463 i40e_config_bridge_mode(veb);
6465 /* create the remaining VSIs attached to this VEB */
6466 for (v = 0; v < pf->num_alloc_vsi; v++) {
6467 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6470 if (pf->vsi[v]->veb_idx == veb->idx) {
6471 struct i40e_vsi *vsi = pf->vsi[v];
6473 vsi->uplink_seid = veb->seid;
6474 ret = i40e_add_vsi(vsi);
6476 dev_info(&pf->pdev->dev,
6477 "rebuild of vsi_idx %d failed: %d\n",
6479 goto end_reconstitute;
6481 i40e_vsi_reset_stats(vsi);
6485 /* create any VEBs attached to this VEB - RECURSION */
6486 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6487 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6488 pf->veb[veb_idx]->uplink_seid = veb->seid;
6489 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6500 * i40e_get_capabilities - get info about the HW
6501 * @pf: the PF struct
6503 static int i40e_get_capabilities(struct i40e_pf *pf)
6505 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6510 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6512 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6516 /* this loads the data into the hw struct for us */
6517 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6519 i40e_aqc_opc_list_func_capabilities,
6521 /* data loaded, buffer no longer needed */
6524 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6525 /* retry with a larger buffer */
6526 buf_len = data_size;
6527 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6528 dev_info(&pf->pdev->dev,
6529 "capability discovery failed, err %s aq_err %s\n",
6530 i40e_stat_str(&pf->hw, err),
6531 i40e_aq_str(&pf->hw,
6532 pf->hw.aq.asq_last_status));
6537 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6538 dev_info(&pf->pdev->dev,
6539 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6540 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6541 pf->hw.func_caps.num_msix_vectors,
6542 pf->hw.func_caps.num_msix_vectors_vf,
6543 pf->hw.func_caps.fd_filters_guaranteed,
6544 pf->hw.func_caps.fd_filters_best_effort,
6545 pf->hw.func_caps.num_tx_qp,
6546 pf->hw.func_caps.num_vsis);
6548 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6549 + pf->hw.func_caps.num_vfs)
6550 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6551 dev_info(&pf->pdev->dev,
6552 "got num_vsis %d, setting num_vsis to %d\n",
6553 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6554 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6560 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6563 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6564 * @pf: board private structure
6566 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6568 struct i40e_vsi *vsi;
6571 /* quick workaround for an NVM issue that leaves a critical register
6574 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6575 static const u32 hkey[] = {
6576 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6577 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6578 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6581 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6582 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6585 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6588 /* find existing VSI and see if it needs configuring */
6590 for (i = 0; i < pf->num_alloc_vsi; i++) {
6591 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6597 /* create a new VSI if none exists */
6599 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6600 pf->vsi[pf->lan_vsi]->seid, 0);
6602 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6603 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6608 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6612 * i40e_fdir_teardown - release the Flow Director resources
6613 * @pf: board private structure
6615 static void i40e_fdir_teardown(struct i40e_pf *pf)
6619 i40e_fdir_filter_exit(pf);
6620 for (i = 0; i < pf->num_alloc_vsi; i++) {
6621 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6622 i40e_vsi_release(pf->vsi[i]);
6629 * i40e_prep_for_reset - prep for the core to reset
6630 * @pf: board private structure
6632 * Close up the VFs and other things in prep for PF Reset.
6634 static void i40e_prep_for_reset(struct i40e_pf *pf)
6636 struct i40e_hw *hw = &pf->hw;
6637 i40e_status ret = 0;
6640 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6641 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6644 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6646 /* quiesce the VSIs and their queues that are not already DOWN */
6647 i40e_pf_quiesce_all_vsi(pf);
6649 for (v = 0; v < pf->num_alloc_vsi; v++) {
6651 pf->vsi[v]->seid = 0;
6654 i40e_shutdown_adminq(&pf->hw);
6656 /* call shutdown HMC */
6657 if (hw->hmc.hmc_obj) {
6658 ret = i40e_shutdown_lan_hmc(hw);
6660 dev_warn(&pf->pdev->dev,
6661 "shutdown_lan_hmc failed: %d\n", ret);
6666 * i40e_send_version - update firmware with driver version
6669 static void i40e_send_version(struct i40e_pf *pf)
6671 struct i40e_driver_version dv;
6673 dv.major_version = DRV_VERSION_MAJOR;
6674 dv.minor_version = DRV_VERSION_MINOR;
6675 dv.build_version = DRV_VERSION_BUILD;
6676 dv.subbuild_version = 0;
6677 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6678 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6682 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6683 * @pf: board private structure
6684 * @reinit: if the Main VSI needs to re-initialized.
6686 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6688 struct i40e_hw *hw = &pf->hw;
6689 u8 set_fc_aq_fail = 0;
6694 /* Now we wait for GRST to settle out.
6695 * We don't have to delete the VEBs or VSIs from the hw switch
6696 * because the reset will make them disappear.
6698 ret = i40e_pf_reset(hw);
6700 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6701 set_bit(__I40E_RESET_FAILED, &pf->state);
6702 goto clear_recovery;
6706 if (test_bit(__I40E_DOWN, &pf->state))
6707 goto clear_recovery;
6708 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6710 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6711 ret = i40e_init_adminq(&pf->hw);
6713 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6714 i40e_stat_str(&pf->hw, ret),
6715 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6716 goto clear_recovery;
6719 /* re-verify the eeprom if we just had an EMP reset */
6720 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6721 i40e_verify_eeprom(pf);
6723 i40e_clear_pxe_mode(hw);
6724 ret = i40e_get_capabilities(pf);
6726 goto end_core_reset;
6728 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6729 hw->func_caps.num_rx_qp,
6730 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6732 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6733 goto end_core_reset;
6735 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6737 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6738 goto end_core_reset;
6741 #ifdef CONFIG_I40E_DCB
6742 ret = i40e_init_pf_dcb(pf);
6744 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6745 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6746 /* Continue without DCB enabled */
6748 #endif /* CONFIG_I40E_DCB */
6750 i40e_init_pf_fcoe(pf);
6753 /* do basic switch setup */
6754 ret = i40e_setup_pf_switch(pf, reinit);
6756 goto end_core_reset;
6758 /* driver is only interested in link up/down and module qualification
6759 * reports from firmware
6761 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6762 I40E_AQ_EVENT_LINK_UPDOWN |
6763 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6765 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6766 i40e_stat_str(&pf->hw, ret),
6767 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6769 /* make sure our flow control settings are restored */
6770 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6772 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6773 i40e_stat_str(&pf->hw, ret),
6774 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6776 /* Rebuild the VSIs and VEBs that existed before reset.
6777 * They are still in our local switch element arrays, so only
6778 * need to rebuild the switch model in the HW.
6780 * If there were VEBs but the reconstitution failed, we'll try
6781 * try to recover minimal use by getting the basic PF VSI working.
6783 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6784 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6785 /* find the one VEB connected to the MAC, and find orphans */
6786 for (v = 0; v < I40E_MAX_VEB; v++) {
6790 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6791 pf->veb[v]->uplink_seid == 0) {
6792 ret = i40e_reconstitute_veb(pf->veb[v]);
6797 /* If Main VEB failed, we're in deep doodoo,
6798 * so give up rebuilding the switch and set up
6799 * for minimal rebuild of PF VSI.
6800 * If orphan failed, we'll report the error
6801 * but try to keep going.
6803 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6804 dev_info(&pf->pdev->dev,
6805 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6807 pf->vsi[pf->lan_vsi]->uplink_seid
6810 } else if (pf->veb[v]->uplink_seid == 0) {
6811 dev_info(&pf->pdev->dev,
6812 "rebuild of orphan VEB failed: %d\n",
6819 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6820 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6821 /* no VEB, so rebuild only the Main VSI */
6822 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6824 dev_info(&pf->pdev->dev,
6825 "rebuild of Main VSI failed: %d\n", ret);
6826 goto end_core_reset;
6830 /* Reconfigure hardware for allowing smaller MSS in the case
6831 * of TSO, so that we avoid the MDD being fired and causing
6832 * a reset in the case of small MSS+TSO.
6834 #define I40E_REG_MSS 0x000E64DC
6835 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6836 #define I40E_64BYTE_MSS 0x400000
6837 val = rd32(hw, I40E_REG_MSS);
6838 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6839 val &= ~I40E_REG_MSS_MIN_MASK;
6840 val |= I40E_64BYTE_MSS;
6841 wr32(hw, I40E_REG_MSS, val);
6844 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6845 (pf->hw.aq.fw_maj_ver < 4)) {
6847 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6849 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6850 i40e_stat_str(&pf->hw, ret),
6851 i40e_aq_str(&pf->hw,
6852 pf->hw.aq.asq_last_status));
6854 /* reinit the misc interrupt */
6855 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6856 ret = i40e_setup_misc_vector(pf);
6858 /* Add a filter to drop all Flow control frames from any VSI from being
6859 * transmitted. By doing so we stop a malicious VF from sending out
6860 * PAUSE or PFC frames and potentially controlling traffic for other
6862 * The FW can still send Flow control frames if enabled.
6864 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6867 /* restart the VSIs that were rebuilt and running before the reset */
6868 i40e_pf_unquiesce_all_vsi(pf);
6870 if (pf->num_alloc_vfs) {
6871 for (v = 0; v < pf->num_alloc_vfs; v++)
6872 i40e_reset_vf(&pf->vf[v], true);
6875 /* tell the firmware that we're starting */
6876 i40e_send_version(pf);
6879 clear_bit(__I40E_RESET_FAILED, &pf->state);
6881 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6885 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6886 * @pf: board private structure
6888 * Close up the VFs and other things in prep for a Core Reset,
6889 * then get ready to rebuild the world.
6891 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6893 i40e_prep_for_reset(pf);
6894 i40e_reset_and_rebuild(pf, false);
6898 * i40e_handle_mdd_event
6899 * @pf: pointer to the PF structure
6901 * Called from the MDD irq handler to identify possibly malicious vfs
6903 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6905 struct i40e_hw *hw = &pf->hw;
6906 bool mdd_detected = false;
6907 bool pf_mdd_detected = false;
6912 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6915 /* find what triggered the MDD event */
6916 reg = rd32(hw, I40E_GL_MDET_TX);
6917 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6918 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6919 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6920 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6921 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6922 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6923 I40E_GL_MDET_TX_EVENT_SHIFT;
6924 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6925 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6926 pf->hw.func_caps.base_queue;
6927 if (netif_msg_tx_err(pf))
6928 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6929 event, queue, pf_num, vf_num);
6930 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6931 mdd_detected = true;
6933 reg = rd32(hw, I40E_GL_MDET_RX);
6934 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6935 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6936 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6937 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6938 I40E_GL_MDET_RX_EVENT_SHIFT;
6939 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6940 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6941 pf->hw.func_caps.base_queue;
6942 if (netif_msg_rx_err(pf))
6943 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6944 event, queue, func);
6945 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6946 mdd_detected = true;
6950 reg = rd32(hw, I40E_PF_MDET_TX);
6951 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6952 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6953 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6954 pf_mdd_detected = true;
6956 reg = rd32(hw, I40E_PF_MDET_RX);
6957 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6958 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6959 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6960 pf_mdd_detected = true;
6962 /* Queue belongs to the PF, initiate a reset */
6963 if (pf_mdd_detected) {
6964 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6965 i40e_service_event_schedule(pf);
6969 /* see if one of the VFs needs its hand slapped */
6970 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6972 reg = rd32(hw, I40E_VP_MDET_TX(i));
6973 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6974 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6975 vf->num_mdd_events++;
6976 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6980 reg = rd32(hw, I40E_VP_MDET_RX(i));
6981 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6982 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6983 vf->num_mdd_events++;
6984 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6988 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6989 dev_info(&pf->pdev->dev,
6990 "Too many MDD events on VF %d, disabled\n", i);
6991 dev_info(&pf->pdev->dev,
6992 "Use PF Control I/F to re-enable the VF\n");
6993 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6997 /* re-enable mdd interrupt cause */
6998 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6999 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7000 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7001 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7005 #ifdef CONFIG_I40E_VXLAN
7007 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
7008 * @pf: board private structure
7010 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
7012 struct i40e_hw *hw = &pf->hw;
7017 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
7020 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
7022 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7023 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
7024 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
7025 port = pf->vxlan_ports[i];
7027 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
7028 I40E_AQC_TUNNEL_TYPE_VXLAN,
7031 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7034 dev_info(&pf->pdev->dev,
7035 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
7036 port ? "add" : "delete",
7038 i40e_stat_str(&pf->hw, ret),
7039 i40e_aq_str(&pf->hw,
7040 pf->hw.aq.asq_last_status));
7041 pf->vxlan_ports[i] = 0;
7049 * i40e_service_task - Run the driver's async subtasks
7050 * @work: pointer to work_struct containing our data
7052 static void i40e_service_task(struct work_struct *work)
7054 struct i40e_pf *pf = container_of(work,
7057 unsigned long start_time = jiffies;
7059 /* don't bother with service tasks if a reset is in progress */
7060 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7061 i40e_service_event_complete(pf);
7065 i40e_detect_recover_hung(pf);
7066 i40e_reset_subtask(pf);
7067 i40e_handle_mdd_event(pf);
7068 i40e_vc_process_vflr_event(pf);
7069 i40e_watchdog_subtask(pf);
7070 i40e_fdir_reinit_subtask(pf);
7071 i40e_sync_filters_subtask(pf);
7072 #ifdef CONFIG_I40E_VXLAN
7073 i40e_sync_vxlan_filters_subtask(pf);
7075 i40e_clean_adminq_subtask(pf);
7077 i40e_service_event_complete(pf);
7079 /* If the tasks have taken longer than one timer cycle or there
7080 * is more work to be done, reschedule the service task now
7081 * rather than wait for the timer to tick again.
7083 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7084 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7085 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7086 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7087 i40e_service_event_schedule(pf);
7091 * i40e_service_timer - timer callback
7092 * @data: pointer to PF struct
7094 static void i40e_service_timer(unsigned long data)
7096 struct i40e_pf *pf = (struct i40e_pf *)data;
7098 mod_timer(&pf->service_timer,
7099 round_jiffies(jiffies + pf->service_timer_period));
7100 i40e_service_event_schedule(pf);
7104 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7105 * @vsi: the VSI being configured
7107 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7109 struct i40e_pf *pf = vsi->back;
7111 switch (vsi->type) {
7113 vsi->alloc_queue_pairs = pf->num_lan_qps;
7114 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7115 I40E_REQ_DESCRIPTOR_MULTIPLE);
7116 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7117 vsi->num_q_vectors = pf->num_lan_msix;
7119 vsi->num_q_vectors = 1;
7124 vsi->alloc_queue_pairs = 1;
7125 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7126 I40E_REQ_DESCRIPTOR_MULTIPLE);
7127 vsi->num_q_vectors = 1;
7130 case I40E_VSI_VMDQ2:
7131 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7132 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7133 I40E_REQ_DESCRIPTOR_MULTIPLE);
7134 vsi->num_q_vectors = pf->num_vmdq_msix;
7137 case I40E_VSI_SRIOV:
7138 vsi->alloc_queue_pairs = pf->num_vf_qps;
7139 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7140 I40E_REQ_DESCRIPTOR_MULTIPLE);
7145 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7146 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7147 I40E_REQ_DESCRIPTOR_MULTIPLE);
7148 vsi->num_q_vectors = pf->num_fcoe_msix;
7151 #endif /* I40E_FCOE */
7161 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7162 * @type: VSI pointer
7163 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7165 * On error: returns error code (negative)
7166 * On success: returns 0
7168 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7173 /* allocate memory for both Tx and Rx ring pointers */
7174 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7175 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7178 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7180 if (alloc_qvectors) {
7181 /* allocate memory for q_vector pointers */
7182 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7183 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7184 if (!vsi->q_vectors) {
7192 kfree(vsi->tx_rings);
7197 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7198 * @pf: board private structure
7199 * @type: type of VSI
7201 * On error: returns error code (negative)
7202 * On success: returns vsi index in PF (positive)
7204 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7207 struct i40e_vsi *vsi;
7211 /* Need to protect the allocation of the VSIs at the PF level */
7212 mutex_lock(&pf->switch_mutex);
7214 /* VSI list may be fragmented if VSI creation/destruction has
7215 * been happening. We can afford to do a quick scan to look
7216 * for any free VSIs in the list.
7218 * find next empty vsi slot, looping back around if necessary
7221 while (i < pf->num_alloc_vsi && pf->vsi[i])
7223 if (i >= pf->num_alloc_vsi) {
7225 while (i < pf->next_vsi && pf->vsi[i])
7229 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7230 vsi_idx = i; /* Found one! */
7233 goto unlock_pf; /* out of VSI slots! */
7237 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7244 set_bit(__I40E_DOWN, &vsi->state);
7247 vsi->rx_itr_setting = pf->rx_itr_default;
7248 vsi->tx_itr_setting = pf->tx_itr_default;
7249 vsi->int_rate_limit = 0;
7250 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7251 pf->rss_table_size : 64;
7252 vsi->netdev_registered = false;
7253 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7254 INIT_LIST_HEAD(&vsi->mac_filter_list);
7255 vsi->irqs_ready = false;
7257 ret = i40e_set_num_rings_in_vsi(vsi);
7261 ret = i40e_vsi_alloc_arrays(vsi, true);
7265 /* Setup default MSIX irq handler for VSI */
7266 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7268 /* Initialize VSI lock */
7269 spin_lock_init(&vsi->mac_filter_list_lock);
7270 pf->vsi[vsi_idx] = vsi;
7275 pf->next_vsi = i - 1;
7278 mutex_unlock(&pf->switch_mutex);
7283 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7284 * @type: VSI pointer
7285 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7287 * On error: returns error code (negative)
7288 * On success: returns 0
7290 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7292 /* free the ring and vector containers */
7293 if (free_qvectors) {
7294 kfree(vsi->q_vectors);
7295 vsi->q_vectors = NULL;
7297 kfree(vsi->tx_rings);
7298 vsi->tx_rings = NULL;
7299 vsi->rx_rings = NULL;
7303 * i40e_vsi_clear - Deallocate the VSI provided
7304 * @vsi: the VSI being un-configured
7306 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7317 mutex_lock(&pf->switch_mutex);
7318 if (!pf->vsi[vsi->idx]) {
7319 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7320 vsi->idx, vsi->idx, vsi, vsi->type);
7324 if (pf->vsi[vsi->idx] != vsi) {
7325 dev_err(&pf->pdev->dev,
7326 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7327 pf->vsi[vsi->idx]->idx,
7329 pf->vsi[vsi->idx]->type,
7330 vsi->idx, vsi, vsi->type);
7334 /* updates the PF for this cleared vsi */
7335 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7336 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7338 i40e_vsi_free_arrays(vsi, true);
7340 pf->vsi[vsi->idx] = NULL;
7341 if (vsi->idx < pf->next_vsi)
7342 pf->next_vsi = vsi->idx;
7345 mutex_unlock(&pf->switch_mutex);
7353 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7354 * @vsi: the VSI being cleaned
7356 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7360 if (vsi->tx_rings && vsi->tx_rings[0]) {
7361 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7362 kfree_rcu(vsi->tx_rings[i], rcu);
7363 vsi->tx_rings[i] = NULL;
7364 vsi->rx_rings[i] = NULL;
7370 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7371 * @vsi: the VSI being configured
7373 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7375 struct i40e_ring *tx_ring, *rx_ring;
7376 struct i40e_pf *pf = vsi->back;
7379 /* Set basic values in the rings to be used later during open() */
7380 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7381 /* allocate space for both Tx and Rx in one shot */
7382 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7386 tx_ring->queue_index = i;
7387 tx_ring->reg_idx = vsi->base_queue + i;
7388 tx_ring->ring_active = false;
7390 tx_ring->netdev = vsi->netdev;
7391 tx_ring->dev = &pf->pdev->dev;
7392 tx_ring->count = vsi->num_desc;
7394 tx_ring->dcb_tc = 0;
7395 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7396 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7397 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7398 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7399 vsi->tx_rings[i] = tx_ring;
7401 rx_ring = &tx_ring[1];
7402 rx_ring->queue_index = i;
7403 rx_ring->reg_idx = vsi->base_queue + i;
7404 rx_ring->ring_active = false;
7406 rx_ring->netdev = vsi->netdev;
7407 rx_ring->dev = &pf->pdev->dev;
7408 rx_ring->count = vsi->num_desc;
7410 rx_ring->dcb_tc = 0;
7411 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7412 set_ring_16byte_desc_enabled(rx_ring);
7414 clear_ring_16byte_desc_enabled(rx_ring);
7415 vsi->rx_rings[i] = rx_ring;
7421 i40e_vsi_clear_rings(vsi);
7426 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7427 * @pf: board private structure
7428 * @vectors: the number of MSI-X vectors to request
7430 * Returns the number of vectors reserved, or error
7432 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7434 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7435 I40E_MIN_MSIX, vectors);
7437 dev_info(&pf->pdev->dev,
7438 "MSI-X vector reservation failed: %d\n", vectors);
7446 * i40e_init_msix - Setup the MSIX capability
7447 * @pf: board private structure
7449 * Work with the OS to set up the MSIX vectors needed.
7451 * Returns the number of vectors reserved or negative on failure
7453 static int i40e_init_msix(struct i40e_pf *pf)
7455 struct i40e_hw *hw = &pf->hw;
7460 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7463 /* The number of vectors we'll request will be comprised of:
7464 * - Add 1 for "other" cause for Admin Queue events, etc.
7465 * - The number of LAN queue pairs
7466 * - Queues being used for RSS.
7467 * We don't need as many as max_rss_size vectors.
7468 * use rss_size instead in the calculation since that
7469 * is governed by number of cpus in the system.
7470 * - assumes symmetric Tx/Rx pairing
7471 * - The number of VMDq pairs
7473 * - The number of FCOE qps.
7475 * Once we count this up, try the request.
7477 * If we can't get what we want, we'll simplify to nearly nothing
7478 * and try again. If that still fails, we punt.
7480 vectors_left = hw->func_caps.num_msix_vectors;
7483 /* reserve one vector for miscellaneous handler */
7489 /* reserve vectors for the main PF traffic queues */
7490 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7491 vectors_left -= pf->num_lan_msix;
7492 v_budget += pf->num_lan_msix;
7494 /* reserve one vector for sideband flow director */
7495 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7500 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7505 /* can we reserve enough for FCoE? */
7506 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7508 pf->num_fcoe_msix = 0;
7509 else if (vectors_left >= pf->num_fcoe_qps)
7510 pf->num_fcoe_msix = pf->num_fcoe_qps;
7512 pf->num_fcoe_msix = 1;
7513 v_budget += pf->num_fcoe_msix;
7514 vectors_left -= pf->num_fcoe_msix;
7518 /* any vectors left over go for VMDq support */
7519 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7520 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7521 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7523 /* if we're short on vectors for what's desired, we limit
7524 * the queues per vmdq. If this is still more than are
7525 * available, the user will need to change the number of
7526 * queues/vectors used by the PF later with the ethtool
7529 if (vmdq_vecs < vmdq_vecs_wanted)
7530 pf->num_vmdq_qps = 1;
7531 pf->num_vmdq_msix = pf->num_vmdq_qps;
7533 v_budget += vmdq_vecs;
7534 vectors_left -= vmdq_vecs;
7537 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7539 if (!pf->msix_entries)
7542 for (i = 0; i < v_budget; i++)
7543 pf->msix_entries[i].entry = i;
7544 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7546 if (v_actual != v_budget) {
7547 /* If we have limited resources, we will start with no vectors
7548 * for the special features and then allocate vectors to some
7549 * of these features based on the policy and at the end disable
7550 * the features that did not get any vectors.
7553 pf->num_fcoe_qps = 0;
7554 pf->num_fcoe_msix = 0;
7556 pf->num_vmdq_msix = 0;
7559 if (v_actual < I40E_MIN_MSIX) {
7560 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7561 kfree(pf->msix_entries);
7562 pf->msix_entries = NULL;
7565 } else if (v_actual == I40E_MIN_MSIX) {
7566 /* Adjust for minimal MSIX use */
7567 pf->num_vmdq_vsis = 0;
7568 pf->num_vmdq_qps = 0;
7569 pf->num_lan_qps = 1;
7570 pf->num_lan_msix = 1;
7572 } else if (v_actual != v_budget) {
7575 /* reserve the misc vector */
7578 /* Scale vector usage down */
7579 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7580 pf->num_vmdq_vsis = 1;
7581 pf->num_vmdq_qps = 1;
7582 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7584 /* partition out the remaining vectors */
7587 pf->num_lan_msix = 1;
7591 /* give one vector to FCoE */
7592 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7593 pf->num_lan_msix = 1;
7594 pf->num_fcoe_msix = 1;
7597 pf->num_lan_msix = 2;
7602 /* give one vector to FCoE */
7603 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7604 pf->num_fcoe_msix = 1;
7608 /* give the rest to the PF */
7609 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7614 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7615 (pf->num_vmdq_msix == 0)) {
7616 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7617 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7621 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7622 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7623 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7630 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7631 * @vsi: the VSI being configured
7632 * @v_idx: index of the vector in the vsi struct
7634 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7636 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7638 struct i40e_q_vector *q_vector;
7640 /* allocate q_vector */
7641 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7645 q_vector->vsi = vsi;
7646 q_vector->v_idx = v_idx;
7647 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7649 netif_napi_add(vsi->netdev, &q_vector->napi,
7650 i40e_napi_poll, NAPI_POLL_WEIGHT);
7652 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7653 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7655 /* tie q_vector and vsi together */
7656 vsi->q_vectors[v_idx] = q_vector;
7662 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7663 * @vsi: the VSI being configured
7665 * We allocate one q_vector per queue interrupt. If allocation fails we
7668 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7670 struct i40e_pf *pf = vsi->back;
7671 int v_idx, num_q_vectors;
7674 /* if not MSIX, give the one vector only to the LAN VSI */
7675 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7676 num_q_vectors = vsi->num_q_vectors;
7677 else if (vsi == pf->vsi[pf->lan_vsi])
7682 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7683 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7692 i40e_free_q_vector(vsi, v_idx);
7698 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7699 * @pf: board private structure to initialize
7701 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7706 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7707 vectors = i40e_init_msix(pf);
7709 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7711 I40E_FLAG_FCOE_ENABLED |
7713 I40E_FLAG_RSS_ENABLED |
7714 I40E_FLAG_DCB_CAPABLE |
7715 I40E_FLAG_SRIOV_ENABLED |
7716 I40E_FLAG_FD_SB_ENABLED |
7717 I40E_FLAG_FD_ATR_ENABLED |
7718 I40E_FLAG_VMDQ_ENABLED);
7720 /* rework the queue expectations without MSIX */
7721 i40e_determine_queue_usage(pf);
7725 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7726 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7727 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7728 vectors = pci_enable_msi(pf->pdev);
7730 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7732 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7734 vectors = 1; /* one MSI or Legacy vector */
7737 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7738 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7740 /* set up vector assignment tracking */
7741 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7742 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7743 if (!pf->irq_pile) {
7744 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7747 pf->irq_pile->num_entries = vectors;
7748 pf->irq_pile->search_hint = 0;
7750 /* track first vector for misc interrupts, ignore return */
7751 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7757 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7758 * @pf: board private structure
7760 * This sets up the handler for MSIX 0, which is used to manage the
7761 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7762 * when in MSI or Legacy interrupt mode.
7764 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7766 struct i40e_hw *hw = &pf->hw;
7769 /* Only request the irq if this is the first time through, and
7770 * not when we're rebuilding after a Reset
7772 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7773 err = request_irq(pf->msix_entries[0].vector,
7774 i40e_intr, 0, pf->int_name, pf);
7776 dev_info(&pf->pdev->dev,
7777 "request_irq for %s failed: %d\n",
7783 i40e_enable_misc_int_causes(pf);
7785 /* associate no queues to the misc vector */
7786 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7787 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7791 i40e_irq_dynamic_enable_icr0(pf);
7797 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7798 * @vsi: vsi structure
7799 * @seed: RSS hash seed
7801 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7803 struct i40e_aqc_get_set_rss_key_data rss_key;
7804 struct i40e_pf *pf = vsi->back;
7805 struct i40e_hw *hw = &pf->hw;
7806 bool pf_lut = false;
7810 memset(&rss_key, 0, sizeof(rss_key));
7811 memcpy(&rss_key, seed, sizeof(rss_key));
7813 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7817 /* Populate the LUT with max no. of queues in round robin fashion */
7818 for (i = 0; i < vsi->rss_table_size; i++)
7819 rss_lut[i] = i % vsi->rss_size;
7821 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7823 dev_info(&pf->pdev->dev,
7824 "Cannot set RSS key, err %s aq_err %s\n",
7825 i40e_stat_str(&pf->hw, ret),
7826 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7827 goto config_rss_aq_out;
7830 if (vsi->type == I40E_VSI_MAIN)
7833 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7834 vsi->rss_table_size);
7836 dev_info(&pf->pdev->dev,
7837 "Cannot set RSS lut, err %s aq_err %s\n",
7838 i40e_stat_str(&pf->hw, ret),
7839 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7847 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7848 * @vsi: VSI structure
7850 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7852 u8 seed[I40E_HKEY_ARRAY_SIZE];
7853 struct i40e_pf *pf = vsi->back;
7855 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7856 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7858 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7859 return i40e_config_rss_aq(vsi, seed);
7865 * i40e_config_rss_reg - Prepare for RSS if used
7866 * @pf: board private structure
7867 * @seed: RSS hash seed
7869 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7871 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7872 struct i40e_hw *hw = &pf->hw;
7873 u32 *seed_dw = (u32 *)seed;
7874 u32 current_queue = 0;
7878 /* Fill out hash function seed */
7879 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7880 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7882 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7884 for (j = 0; j < 4; j++) {
7885 if (current_queue == vsi->rss_size)
7887 lut |= ((current_queue) << (8 * j));
7890 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7898 * i40e_config_rss - Prepare for RSS if used
7899 * @pf: board private structure
7901 static int i40e_config_rss(struct i40e_pf *pf)
7903 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7904 u8 seed[I40E_HKEY_ARRAY_SIZE];
7905 struct i40e_hw *hw = &pf->hw;
7909 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7911 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7912 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7913 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7914 hena |= i40e_pf_get_default_rss_hena(pf);
7916 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7917 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7919 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7921 /* Determine the RSS table size based on the hardware capabilities */
7922 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7923 reg_val = (pf->rss_table_size == 512) ?
7924 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7925 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7926 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7928 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7929 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7931 return i40e_config_rss_reg(pf, seed);
7935 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7936 * @pf: board private structure
7937 * @queue_count: the requested queue count for rss.
7939 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7940 * count which may be different from the requested queue count.
7942 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7944 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7947 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7950 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7952 if (queue_count != vsi->num_queue_pairs) {
7953 vsi->req_queue_pairs = queue_count;
7954 i40e_prep_for_reset(pf);
7956 pf->rss_size = new_rss_size;
7958 i40e_reset_and_rebuild(pf, true);
7959 i40e_config_rss(pf);
7961 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7962 return pf->rss_size;
7966 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7967 * @pf: board private structure
7969 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7972 bool min_valid, max_valid;
7975 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7976 &min_valid, &max_valid);
7980 pf->npar_min_bw = min_bw;
7982 pf->npar_max_bw = max_bw;
7989 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7990 * @pf: board private structure
7992 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7994 struct i40e_aqc_configure_partition_bw_data bw_data;
7997 /* Set the valid bit for this PF */
7998 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
7999 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8000 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8002 /* Set the new bandwidths */
8003 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8009 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8010 * @pf: board private structure
8012 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8014 /* Commit temporary BW setting to permanent NVM image */
8015 enum i40e_admin_queue_err last_aq_status;
8019 if (pf->hw.partition_id != 1) {
8020 dev_info(&pf->pdev->dev,
8021 "Commit BW only works on partition 1! This is partition %d",
8022 pf->hw.partition_id);
8023 ret = I40E_NOT_SUPPORTED;
8027 /* Acquire NVM for read access */
8028 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8029 last_aq_status = pf->hw.aq.asq_last_status;
8031 dev_info(&pf->pdev->dev,
8032 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8033 i40e_stat_str(&pf->hw, ret),
8034 i40e_aq_str(&pf->hw, last_aq_status));
8038 /* Read word 0x10 of NVM - SW compatibility word 1 */
8039 ret = i40e_aq_read_nvm(&pf->hw,
8040 I40E_SR_NVM_CONTROL_WORD,
8041 0x10, sizeof(nvm_word), &nvm_word,
8043 /* Save off last admin queue command status before releasing
8046 last_aq_status = pf->hw.aq.asq_last_status;
8047 i40e_release_nvm(&pf->hw);
8049 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8050 i40e_stat_str(&pf->hw, ret),
8051 i40e_aq_str(&pf->hw, last_aq_status));
8055 /* Wait a bit for NVM release to complete */
8058 /* Acquire NVM for write access */
8059 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8060 last_aq_status = pf->hw.aq.asq_last_status;
8062 dev_info(&pf->pdev->dev,
8063 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8064 i40e_stat_str(&pf->hw, ret),
8065 i40e_aq_str(&pf->hw, last_aq_status));
8068 /* Write it back out unchanged to initiate update NVM,
8069 * which will force a write of the shadow (alt) RAM to
8070 * the NVM - thus storing the bandwidth values permanently.
8072 ret = i40e_aq_update_nvm(&pf->hw,
8073 I40E_SR_NVM_CONTROL_WORD,
8074 0x10, sizeof(nvm_word),
8075 &nvm_word, true, NULL);
8076 /* Save off last admin queue command status before releasing
8079 last_aq_status = pf->hw.aq.asq_last_status;
8080 i40e_release_nvm(&pf->hw);
8082 dev_info(&pf->pdev->dev,
8083 "BW settings NOT SAVED, err %s aq_err %s\n",
8084 i40e_stat_str(&pf->hw, ret),
8085 i40e_aq_str(&pf->hw, last_aq_status));
8092 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8093 * @pf: board private structure to initialize
8095 * i40e_sw_init initializes the Adapter private data structure.
8096 * Fields are initialized based on PCI device information and
8097 * OS network device settings (MTU size).
8099 static int i40e_sw_init(struct i40e_pf *pf)
8104 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8105 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8106 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
8107 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8108 if (I40E_DEBUG_USER & debug)
8109 pf->hw.debug_mask = debug;
8110 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8111 I40E_DEFAULT_MSG_ENABLE);
8114 /* Set default capability flags */
8115 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8116 I40E_FLAG_MSI_ENABLED |
8117 I40E_FLAG_LINK_POLLING_ENABLED |
8118 I40E_FLAG_MSIX_ENABLED;
8120 if (iommu_present(&pci_bus_type))
8121 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
8123 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
8125 /* Set default ITR */
8126 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8127 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8129 /* Depending on PF configurations, it is possible that the RSS
8130 * maximum might end up larger than the available queues
8132 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8134 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8135 pf->rss_size_max = min_t(int, pf->rss_size_max,
8136 pf->hw.func_caps.num_tx_qp);
8137 if (pf->hw.func_caps.rss) {
8138 pf->flags |= I40E_FLAG_RSS_ENABLED;
8139 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
8142 /* MFP mode enabled */
8143 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8144 pf->flags |= I40E_FLAG_MFP_ENABLED;
8145 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8146 if (i40e_get_npar_bw_setting(pf))
8147 dev_warn(&pf->pdev->dev,
8148 "Could not get NPAR bw settings\n");
8150 dev_info(&pf->pdev->dev,
8151 "Min BW = %8.8x, Max BW = %8.8x\n",
8152 pf->npar_min_bw, pf->npar_max_bw);
8155 /* FW/NVM is not yet fixed in this regard */
8156 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8157 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8158 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8159 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8160 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8161 pf->hw.num_partitions > 1)
8162 dev_info(&pf->pdev->dev,
8163 "Flow Director Sideband mode Disabled in MFP mode\n");
8165 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8166 pf->fdir_pf_filter_count =
8167 pf->hw.func_caps.fd_filters_guaranteed;
8168 pf->hw.fdir_shared_filter_count =
8169 pf->hw.func_caps.fd_filters_best_effort;
8172 if (pf->hw.func_caps.vmdq) {
8173 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8174 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8175 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8179 i40e_init_pf_fcoe(pf);
8181 #endif /* I40E_FCOE */
8182 #ifdef CONFIG_PCI_IOV
8183 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8184 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8185 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8186 pf->num_req_vfs = min_t(int,
8187 pf->hw.func_caps.num_vfs,
8190 #endif /* CONFIG_PCI_IOV */
8191 if (pf->hw.mac.type == I40E_MAC_X722) {
8192 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8193 I40E_FLAG_128_QP_RSS_CAPABLE |
8194 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8195 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8196 I40E_FLAG_WB_ON_ITR_CAPABLE |
8197 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
8199 pf->eeprom_version = 0xDEAD;
8200 pf->lan_veb = I40E_NO_VEB;
8201 pf->lan_vsi = I40E_NO_VSI;
8203 /* By default FW has this off for performance reasons */
8204 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8206 /* set up queue assignment tracking */
8207 size = sizeof(struct i40e_lump_tracking)
8208 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8209 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8214 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8215 pf->qp_pile->search_hint = 0;
8217 pf->tx_timeout_recovery_level = 1;
8219 mutex_init(&pf->switch_mutex);
8221 /* If NPAR is enabled nudge the Tx scheduler */
8222 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8223 i40e_set_npar_bw_setting(pf);
8230 * i40e_set_ntuple - set the ntuple feature flag and take action
8231 * @pf: board private structure to initialize
8232 * @features: the feature set that the stack is suggesting
8234 * returns a bool to indicate if reset needs to happen
8236 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8238 bool need_reset = false;
8240 /* Check if Flow Director n-tuple support was enabled or disabled. If
8241 * the state changed, we need to reset.
8243 if (features & NETIF_F_NTUPLE) {
8244 /* Enable filters and mark for reset */
8245 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8247 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8249 /* turn off filters, mark for reset and clear SW filter list */
8250 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8252 i40e_fdir_filter_exit(pf);
8254 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8255 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8256 /* reset fd counters */
8257 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8258 pf->fdir_pf_active_filters = 0;
8259 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8260 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8261 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8262 /* if ATR was auto disabled it can be re-enabled. */
8263 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8264 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8265 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8271 * i40e_set_features - set the netdev feature flags
8272 * @netdev: ptr to the netdev being adjusted
8273 * @features: the feature set that the stack is suggesting
8275 static int i40e_set_features(struct net_device *netdev,
8276 netdev_features_t features)
8278 struct i40e_netdev_priv *np = netdev_priv(netdev);
8279 struct i40e_vsi *vsi = np->vsi;
8280 struct i40e_pf *pf = vsi->back;
8283 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8284 i40e_vlan_stripping_enable(vsi);
8286 i40e_vlan_stripping_disable(vsi);
8288 need_reset = i40e_set_ntuple(pf, features);
8291 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8296 #ifdef CONFIG_I40E_VXLAN
8298 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8299 * @pf: board private structure
8300 * @port: The UDP port to look up
8302 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8304 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8308 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8309 if (pf->vxlan_ports[i] == port)
8317 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8318 * @netdev: This physical port's netdev
8319 * @sa_family: Socket Family that VXLAN is notifying us about
8320 * @port: New UDP port number that VXLAN started listening to
8322 static void i40e_add_vxlan_port(struct net_device *netdev,
8323 sa_family_t sa_family, __be16 port)
8325 struct i40e_netdev_priv *np = netdev_priv(netdev);
8326 struct i40e_vsi *vsi = np->vsi;
8327 struct i40e_pf *pf = vsi->back;
8331 if (sa_family == AF_INET6)
8334 idx = i40e_get_vxlan_port_idx(pf, port);
8336 /* Check if port already exists */
8337 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8338 netdev_info(netdev, "vxlan port %d already offloaded\n",
8343 /* Now check if there is space to add the new port */
8344 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8346 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8347 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8352 /* New port: add it and mark its index in the bitmap */
8353 pf->vxlan_ports[next_idx] = port;
8354 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8355 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8359 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8360 * @netdev: This physical port's netdev
8361 * @sa_family: Socket Family that VXLAN is notifying us about
8362 * @port: UDP port number that VXLAN stopped listening to
8364 static void i40e_del_vxlan_port(struct net_device *netdev,
8365 sa_family_t sa_family, __be16 port)
8367 struct i40e_netdev_priv *np = netdev_priv(netdev);
8368 struct i40e_vsi *vsi = np->vsi;
8369 struct i40e_pf *pf = vsi->back;
8372 if (sa_family == AF_INET6)
8375 idx = i40e_get_vxlan_port_idx(pf, port);
8377 /* Check if port already exists */
8378 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8379 /* if port exists, set it to 0 (mark for deletion)
8380 * and make it pending
8382 pf->vxlan_ports[idx] = 0;
8383 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8384 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8386 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8392 static int i40e_get_phys_port_id(struct net_device *netdev,
8393 struct netdev_phys_item_id *ppid)
8395 struct i40e_netdev_priv *np = netdev_priv(netdev);
8396 struct i40e_pf *pf = np->vsi->back;
8397 struct i40e_hw *hw = &pf->hw;
8399 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8402 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8403 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8409 * i40e_ndo_fdb_add - add an entry to the hardware database
8410 * @ndm: the input from the stack
8411 * @tb: pointer to array of nladdr (unused)
8412 * @dev: the net device pointer
8413 * @addr: the MAC address entry being added
8414 * @flags: instructions from stack about fdb operation
8416 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8417 struct net_device *dev,
8418 const unsigned char *addr, u16 vid,
8421 struct i40e_netdev_priv *np = netdev_priv(dev);
8422 struct i40e_pf *pf = np->vsi->back;
8425 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8429 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8433 /* Hardware does not support aging addresses so if a
8434 * ndm_state is given only allow permanent addresses
8436 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8437 netdev_info(dev, "FDB only supports static addresses\n");
8441 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8442 err = dev_uc_add_excl(dev, addr);
8443 else if (is_multicast_ether_addr(addr))
8444 err = dev_mc_add_excl(dev, addr);
8448 /* Only return duplicate errors if NLM_F_EXCL is set */
8449 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8456 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8457 * @dev: the netdev being configured
8458 * @nlh: RTNL message
8460 * Inserts a new hardware bridge if not already created and
8461 * enables the bridging mode requested (VEB or VEPA). If the
8462 * hardware bridge has already been inserted and the request
8463 * is to change the mode then that requires a PF reset to
8464 * allow rebuild of the components with required hardware
8465 * bridge mode enabled.
8467 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8468 struct nlmsghdr *nlh,
8471 struct i40e_netdev_priv *np = netdev_priv(dev);
8472 struct i40e_vsi *vsi = np->vsi;
8473 struct i40e_pf *pf = vsi->back;
8474 struct i40e_veb *veb = NULL;
8475 struct nlattr *attr, *br_spec;
8478 /* Only for PF VSI for now */
8479 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8482 /* Find the HW bridge for PF VSI */
8483 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8484 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8488 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8490 nla_for_each_nested(attr, br_spec, rem) {
8493 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8496 mode = nla_get_u16(attr);
8497 if ((mode != BRIDGE_MODE_VEPA) &&
8498 (mode != BRIDGE_MODE_VEB))
8501 /* Insert a new HW bridge */
8503 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8504 vsi->tc_config.enabled_tc);
8506 veb->bridge_mode = mode;
8507 i40e_config_bridge_mode(veb);
8509 /* No Bridge HW offload available */
8513 } else if (mode != veb->bridge_mode) {
8514 /* Existing HW bridge but different mode needs reset */
8515 veb->bridge_mode = mode;
8516 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8517 if (mode == BRIDGE_MODE_VEB)
8518 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8520 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8521 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8530 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8533 * @seq: RTNL message seq #
8534 * @dev: the netdev being configured
8535 * @filter_mask: unused
8536 * @nlflags: netlink flags passed in
8538 * Return the mode in which the hardware bridge is operating in
8541 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8542 struct net_device *dev,
8543 u32 __always_unused filter_mask,
8546 struct i40e_netdev_priv *np = netdev_priv(dev);
8547 struct i40e_vsi *vsi = np->vsi;
8548 struct i40e_pf *pf = vsi->back;
8549 struct i40e_veb *veb = NULL;
8552 /* Only for PF VSI for now */
8553 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8556 /* Find the HW bridge for the PF VSI */
8557 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8558 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8565 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8566 nlflags, 0, 0, filter_mask, NULL);
8569 #define I40E_MAX_TUNNEL_HDR_LEN 80
8571 * i40e_features_check - Validate encapsulated packet conforms to limits
8573 * @dev: This physical port's netdev
8574 * @features: Offload features that the stack believes apply
8576 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8577 struct net_device *dev,
8578 netdev_features_t features)
8580 if (skb->encapsulation &&
8581 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8582 I40E_MAX_TUNNEL_HDR_LEN))
8583 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8588 static const struct net_device_ops i40e_netdev_ops = {
8589 .ndo_open = i40e_open,
8590 .ndo_stop = i40e_close,
8591 .ndo_start_xmit = i40e_lan_xmit_frame,
8592 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8593 .ndo_set_rx_mode = i40e_set_rx_mode,
8594 .ndo_validate_addr = eth_validate_addr,
8595 .ndo_set_mac_address = i40e_set_mac,
8596 .ndo_change_mtu = i40e_change_mtu,
8597 .ndo_do_ioctl = i40e_ioctl,
8598 .ndo_tx_timeout = i40e_tx_timeout,
8599 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8600 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8601 #ifdef CONFIG_NET_POLL_CONTROLLER
8602 .ndo_poll_controller = i40e_netpoll,
8604 .ndo_setup_tc = i40e_setup_tc,
8606 .ndo_fcoe_enable = i40e_fcoe_enable,
8607 .ndo_fcoe_disable = i40e_fcoe_disable,
8609 .ndo_set_features = i40e_set_features,
8610 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8611 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8612 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8613 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8614 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8615 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8616 #ifdef CONFIG_I40E_VXLAN
8617 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8618 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8620 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8621 .ndo_fdb_add = i40e_ndo_fdb_add,
8622 .ndo_features_check = i40e_features_check,
8623 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8624 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8628 * i40e_config_netdev - Setup the netdev flags
8629 * @vsi: the VSI being configured
8631 * Returns 0 on success, negative value on failure
8633 static int i40e_config_netdev(struct i40e_vsi *vsi)
8635 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8636 struct i40e_pf *pf = vsi->back;
8637 struct i40e_hw *hw = &pf->hw;
8638 struct i40e_netdev_priv *np;
8639 struct net_device *netdev;
8640 u8 mac_addr[ETH_ALEN];
8643 etherdev_size = sizeof(struct i40e_netdev_priv);
8644 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8648 vsi->netdev = netdev;
8649 np = netdev_priv(netdev);
8652 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8653 NETIF_F_GSO_UDP_TUNNEL |
8657 netdev->features = NETIF_F_SG |
8661 NETIF_F_GSO_UDP_TUNNEL |
8663 NETIF_F_HW_VLAN_CTAG_TX |
8664 NETIF_F_HW_VLAN_CTAG_RX |
8665 NETIF_F_HW_VLAN_CTAG_FILTER |
8674 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8675 netdev->features |= NETIF_F_NTUPLE;
8677 /* copy netdev features into list of user selectable features */
8678 netdev->hw_features |= netdev->features;
8680 if (vsi->type == I40E_VSI_MAIN) {
8681 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8682 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8683 /* The following steps are necessary to prevent reception
8684 * of tagged packets - some older NVM configurations load a
8685 * default a MAC-VLAN filter that accepts any tagged packet
8686 * which must be replaced by a normal filter.
8688 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) {
8689 spin_lock_bh(&vsi->mac_filter_list_lock);
8690 i40e_add_filter(vsi, mac_addr,
8691 I40E_VLAN_ANY, false, true);
8692 spin_unlock_bh(&vsi->mac_filter_list_lock);
8695 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8696 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8697 pf->vsi[pf->lan_vsi]->netdev->name);
8698 random_ether_addr(mac_addr);
8700 spin_lock_bh(&vsi->mac_filter_list_lock);
8701 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8702 spin_unlock_bh(&vsi->mac_filter_list_lock);
8705 spin_lock_bh(&vsi->mac_filter_list_lock);
8706 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8707 spin_unlock_bh(&vsi->mac_filter_list_lock);
8709 ether_addr_copy(netdev->dev_addr, mac_addr);
8710 ether_addr_copy(netdev->perm_addr, mac_addr);
8711 /* vlan gets same features (except vlan offload)
8712 * after any tweaks for specific VSI types
8714 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8715 NETIF_F_HW_VLAN_CTAG_RX |
8716 NETIF_F_HW_VLAN_CTAG_FILTER);
8717 netdev->priv_flags |= IFF_UNICAST_FLT;
8718 netdev->priv_flags |= IFF_SUPP_NOFCS;
8719 /* Setup netdev TC information */
8720 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8722 netdev->netdev_ops = &i40e_netdev_ops;
8723 netdev->watchdog_timeo = 5 * HZ;
8724 i40e_set_ethtool_ops(netdev);
8726 i40e_fcoe_config_netdev(netdev, vsi);
8733 * i40e_vsi_delete - Delete a VSI from the switch
8734 * @vsi: the VSI being removed
8736 * Returns 0 on success, negative value on failure
8738 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8740 /* remove default VSI is not allowed */
8741 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8744 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8748 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8749 * @vsi: the VSI being queried
8751 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8753 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8755 struct i40e_veb *veb;
8756 struct i40e_pf *pf = vsi->back;
8758 /* Uplink is not a bridge so default to VEB */
8759 if (vsi->veb_idx == I40E_NO_VEB)
8762 veb = pf->veb[vsi->veb_idx];
8764 dev_info(&pf->pdev->dev,
8765 "There is no veb associated with the bridge\n");
8769 /* Uplink is a bridge in VEPA mode */
8770 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
8773 /* Uplink is a bridge in VEB mode */
8777 /* VEPA is now default bridge, so return 0 */
8782 * i40e_add_vsi - Add a VSI to the switch
8783 * @vsi: the VSI being configured
8785 * This initializes a VSI context depending on the VSI type to be added and
8786 * passes it down to the add_vsi aq command.
8788 static int i40e_add_vsi(struct i40e_vsi *vsi)
8791 u8 laa_macaddr[ETH_ALEN];
8792 bool found_laa_mac_filter = false;
8793 struct i40e_pf *pf = vsi->back;
8794 struct i40e_hw *hw = &pf->hw;
8795 struct i40e_vsi_context ctxt;
8796 struct i40e_mac_filter *f, *ftmp;
8798 u8 enabled_tc = 0x1; /* TC0 enabled */
8801 memset(&ctxt, 0, sizeof(ctxt));
8802 switch (vsi->type) {
8804 /* The PF's main VSI is already setup as part of the
8805 * device initialization, so we'll not bother with
8806 * the add_vsi call, but we will retrieve the current
8809 ctxt.seid = pf->main_vsi_seid;
8810 ctxt.pf_num = pf->hw.pf_id;
8812 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8813 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8815 dev_info(&pf->pdev->dev,
8816 "couldn't get PF vsi config, err %s aq_err %s\n",
8817 i40e_stat_str(&pf->hw, ret),
8818 i40e_aq_str(&pf->hw,
8819 pf->hw.aq.asq_last_status));
8822 vsi->info = ctxt.info;
8823 vsi->info.valid_sections = 0;
8825 vsi->seid = ctxt.seid;
8826 vsi->id = ctxt.vsi_number;
8828 enabled_tc = i40e_pf_get_tc_map(pf);
8830 /* MFP mode setup queue map and update VSI */
8831 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8832 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8833 memset(&ctxt, 0, sizeof(ctxt));
8834 ctxt.seid = pf->main_vsi_seid;
8835 ctxt.pf_num = pf->hw.pf_id;
8837 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8838 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8840 dev_info(&pf->pdev->dev,
8841 "update vsi failed, err %s aq_err %s\n",
8842 i40e_stat_str(&pf->hw, ret),
8843 i40e_aq_str(&pf->hw,
8844 pf->hw.aq.asq_last_status));
8848 /* update the local VSI info queue map */
8849 i40e_vsi_update_queue_map(vsi, &ctxt);
8850 vsi->info.valid_sections = 0;
8852 /* Default/Main VSI is only enabled for TC0
8853 * reconfigure it to enable all TCs that are
8854 * available on the port in SFP mode.
8855 * For MFP case the iSCSI PF would use this
8856 * flow to enable LAN+iSCSI TC.
8858 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8860 dev_info(&pf->pdev->dev,
8861 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8863 i40e_stat_str(&pf->hw, ret),
8864 i40e_aq_str(&pf->hw,
8865 pf->hw.aq.asq_last_status));
8872 ctxt.pf_num = hw->pf_id;
8874 ctxt.uplink_seid = vsi->uplink_seid;
8875 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8876 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8877 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8878 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8879 ctxt.info.valid_sections |=
8880 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8881 ctxt.info.switch_id =
8882 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8884 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8887 case I40E_VSI_VMDQ2:
8888 ctxt.pf_num = hw->pf_id;
8890 ctxt.uplink_seid = vsi->uplink_seid;
8891 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8892 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8894 /* This VSI is connected to VEB so the switch_id
8895 * should be set to zero by default.
8897 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8898 ctxt.info.valid_sections |=
8899 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8900 ctxt.info.switch_id =
8901 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8904 /* Setup the VSI tx/rx queue map for TC0 only for now */
8905 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8908 case I40E_VSI_SRIOV:
8909 ctxt.pf_num = hw->pf_id;
8910 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8911 ctxt.uplink_seid = vsi->uplink_seid;
8912 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8913 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8915 /* This VSI is connected to VEB so the switch_id
8916 * should be set to zero by default.
8918 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8919 ctxt.info.valid_sections |=
8920 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8921 ctxt.info.switch_id =
8922 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8925 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8926 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8927 if (pf->vf[vsi->vf_id].spoofchk) {
8928 ctxt.info.valid_sections |=
8929 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8930 ctxt.info.sec_flags |=
8931 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8932 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8934 /* Setup the VSI tx/rx queue map for TC0 only for now */
8935 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8940 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8942 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8947 #endif /* I40E_FCOE */
8952 if (vsi->type != I40E_VSI_MAIN) {
8953 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8955 dev_info(&vsi->back->pdev->dev,
8956 "add vsi failed, err %s aq_err %s\n",
8957 i40e_stat_str(&pf->hw, ret),
8958 i40e_aq_str(&pf->hw,
8959 pf->hw.aq.asq_last_status));
8963 vsi->info = ctxt.info;
8964 vsi->info.valid_sections = 0;
8965 vsi->seid = ctxt.seid;
8966 vsi->id = ctxt.vsi_number;
8969 spin_lock_bh(&vsi->mac_filter_list_lock);
8970 /* If macvlan filters already exist, force them to get loaded */
8971 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8975 /* Expected to have only one MAC filter entry for LAA in list */
8976 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8977 ether_addr_copy(laa_macaddr, f->macaddr);
8978 found_laa_mac_filter = true;
8981 spin_unlock_bh(&vsi->mac_filter_list_lock);
8983 if (found_laa_mac_filter) {
8984 struct i40e_aqc_remove_macvlan_element_data element;
8986 memset(&element, 0, sizeof(element));
8987 ether_addr_copy(element.mac_addr, laa_macaddr);
8988 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8989 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8992 /* some older FW has a different default */
8994 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8995 i40e_aq_remove_macvlan(hw, vsi->seid,
8999 i40e_aq_mac_address_write(hw,
9000 I40E_AQC_WRITE_TYPE_LAA_WOL,
9005 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9006 pf->flags |= I40E_FLAG_FILTER_SYNC;
9009 /* Update VSI BW information */
9010 ret = i40e_vsi_get_bw_info(vsi);
9012 dev_info(&pf->pdev->dev,
9013 "couldn't get vsi bw info, err %s aq_err %s\n",
9014 i40e_stat_str(&pf->hw, ret),
9015 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9016 /* VSI is already added so not tearing that up */
9025 * i40e_vsi_release - Delete a VSI and free its resources
9026 * @vsi: the VSI being removed
9028 * Returns 0 on success or < 0 on error
9030 int i40e_vsi_release(struct i40e_vsi *vsi)
9032 struct i40e_mac_filter *f, *ftmp;
9033 struct i40e_veb *veb = NULL;
9040 /* release of a VEB-owner or last VSI is not allowed */
9041 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9042 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9043 vsi->seid, vsi->uplink_seid);
9046 if (vsi == pf->vsi[pf->lan_vsi] &&
9047 !test_bit(__I40E_DOWN, &pf->state)) {
9048 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9052 uplink_seid = vsi->uplink_seid;
9053 if (vsi->type != I40E_VSI_SRIOV) {
9054 if (vsi->netdev_registered) {
9055 vsi->netdev_registered = false;
9057 /* results in a call to i40e_close() */
9058 unregister_netdev(vsi->netdev);
9061 i40e_vsi_close(vsi);
9063 i40e_vsi_disable_irq(vsi);
9066 spin_lock_bh(&vsi->mac_filter_list_lock);
9067 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9068 i40e_del_filter(vsi, f->macaddr, f->vlan,
9069 f->is_vf, f->is_netdev);
9070 spin_unlock_bh(&vsi->mac_filter_list_lock);
9072 i40e_sync_vsi_filters(vsi, false);
9074 i40e_vsi_delete(vsi);
9075 i40e_vsi_free_q_vectors(vsi);
9077 free_netdev(vsi->netdev);
9080 i40e_vsi_clear_rings(vsi);
9081 i40e_vsi_clear(vsi);
9083 /* If this was the last thing on the VEB, except for the
9084 * controlling VSI, remove the VEB, which puts the controlling
9085 * VSI onto the next level down in the switch.
9087 * Well, okay, there's one more exception here: don't remove
9088 * the orphan VEBs yet. We'll wait for an explicit remove request
9089 * from up the network stack.
9091 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9093 pf->vsi[i]->uplink_seid == uplink_seid &&
9094 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9095 n++; /* count the VSIs */
9098 for (i = 0; i < I40E_MAX_VEB; i++) {
9101 if (pf->veb[i]->uplink_seid == uplink_seid)
9102 n++; /* count the VEBs */
9103 if (pf->veb[i]->seid == uplink_seid)
9106 if (n == 0 && veb && veb->uplink_seid != 0)
9107 i40e_veb_release(veb);
9113 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9114 * @vsi: ptr to the VSI
9116 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9117 * corresponding SW VSI structure and initializes num_queue_pairs for the
9118 * newly allocated VSI.
9120 * Returns 0 on success or negative on failure
9122 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9125 struct i40e_pf *pf = vsi->back;
9127 if (vsi->q_vectors[0]) {
9128 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9133 if (vsi->base_vector) {
9134 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9135 vsi->seid, vsi->base_vector);
9139 ret = i40e_vsi_alloc_q_vectors(vsi);
9141 dev_info(&pf->pdev->dev,
9142 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9143 vsi->num_q_vectors, vsi->seid, ret);
9144 vsi->num_q_vectors = 0;
9145 goto vector_setup_out;
9148 /* In Legacy mode, we do not have to get any other vector since we
9149 * piggyback on the misc/ICR0 for queue interrupts.
9151 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9153 if (vsi->num_q_vectors)
9154 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9155 vsi->num_q_vectors, vsi->idx);
9156 if (vsi->base_vector < 0) {
9157 dev_info(&pf->pdev->dev,
9158 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9159 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9160 i40e_vsi_free_q_vectors(vsi);
9162 goto vector_setup_out;
9170 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9171 * @vsi: pointer to the vsi.
9173 * This re-allocates a vsi's queue resources.
9175 * Returns pointer to the successfully allocated and configured VSI sw struct
9176 * on success, otherwise returns NULL on failure.
9178 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9180 struct i40e_pf *pf = vsi->back;
9184 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9185 i40e_vsi_clear_rings(vsi);
9187 i40e_vsi_free_arrays(vsi, false);
9188 i40e_set_num_rings_in_vsi(vsi);
9189 ret = i40e_vsi_alloc_arrays(vsi, false);
9193 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9195 dev_info(&pf->pdev->dev,
9196 "failed to get tracking for %d queues for VSI %d err %d\n",
9197 vsi->alloc_queue_pairs, vsi->seid, ret);
9200 vsi->base_queue = ret;
9202 /* Update the FW view of the VSI. Force a reset of TC and queue
9203 * layout configurations.
9205 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9206 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9207 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9208 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9210 /* assign it some queues */
9211 ret = i40e_alloc_rings(vsi);
9215 /* map all of the rings to the q_vectors */
9216 i40e_vsi_map_rings_to_vectors(vsi);
9220 i40e_vsi_free_q_vectors(vsi);
9221 if (vsi->netdev_registered) {
9222 vsi->netdev_registered = false;
9223 unregister_netdev(vsi->netdev);
9224 free_netdev(vsi->netdev);
9227 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9229 i40e_vsi_clear(vsi);
9234 * i40e_vsi_setup - Set up a VSI by a given type
9235 * @pf: board private structure
9237 * @uplink_seid: the switch element to link to
9238 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9240 * This allocates the sw VSI structure and its queue resources, then add a VSI
9241 * to the identified VEB.
9243 * Returns pointer to the successfully allocated and configure VSI sw struct on
9244 * success, otherwise returns NULL on failure.
9246 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9247 u16 uplink_seid, u32 param1)
9249 struct i40e_vsi *vsi = NULL;
9250 struct i40e_veb *veb = NULL;
9254 /* The requested uplink_seid must be either
9255 * - the PF's port seid
9256 * no VEB is needed because this is the PF
9257 * or this is a Flow Director special case VSI
9258 * - seid of an existing VEB
9259 * - seid of a VSI that owns an existing VEB
9260 * - seid of a VSI that doesn't own a VEB
9261 * a new VEB is created and the VSI becomes the owner
9262 * - seid of the PF VSI, which is what creates the first VEB
9263 * this is a special case of the previous
9265 * Find which uplink_seid we were given and create a new VEB if needed
9267 for (i = 0; i < I40E_MAX_VEB; i++) {
9268 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9274 if (!veb && uplink_seid != pf->mac_seid) {
9276 for (i = 0; i < pf->num_alloc_vsi; i++) {
9277 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9283 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9288 if (vsi->uplink_seid == pf->mac_seid)
9289 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9290 vsi->tc_config.enabled_tc);
9291 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9292 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9293 vsi->tc_config.enabled_tc);
9295 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9296 dev_info(&vsi->back->pdev->dev,
9297 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9300 /* We come up by default in VEPA mode if SRIOV is not
9301 * already enabled, in which case we can't force VEPA
9304 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9305 veb->bridge_mode = BRIDGE_MODE_VEPA;
9306 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9308 i40e_config_bridge_mode(veb);
9310 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9311 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9315 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9319 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9320 uplink_seid = veb->seid;
9323 /* get vsi sw struct */
9324 v_idx = i40e_vsi_mem_alloc(pf, type);
9327 vsi = pf->vsi[v_idx];
9331 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9333 if (type == I40E_VSI_MAIN)
9334 pf->lan_vsi = v_idx;
9335 else if (type == I40E_VSI_SRIOV)
9336 vsi->vf_id = param1;
9337 /* assign it some queues */
9338 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9341 dev_info(&pf->pdev->dev,
9342 "failed to get tracking for %d queues for VSI %d err=%d\n",
9343 vsi->alloc_queue_pairs, vsi->seid, ret);
9346 vsi->base_queue = ret;
9348 /* get a VSI from the hardware */
9349 vsi->uplink_seid = uplink_seid;
9350 ret = i40e_add_vsi(vsi);
9354 switch (vsi->type) {
9355 /* setup the netdev if needed */
9357 case I40E_VSI_VMDQ2:
9359 ret = i40e_config_netdev(vsi);
9362 ret = register_netdev(vsi->netdev);
9365 vsi->netdev_registered = true;
9366 netif_carrier_off(vsi->netdev);
9367 #ifdef CONFIG_I40E_DCB
9368 /* Setup DCB netlink interface */
9369 i40e_dcbnl_setup(vsi);
9370 #endif /* CONFIG_I40E_DCB */
9374 /* set up vectors and rings if needed */
9375 ret = i40e_vsi_setup_vectors(vsi);
9379 ret = i40e_alloc_rings(vsi);
9383 /* map all of the rings to the q_vectors */
9384 i40e_vsi_map_rings_to_vectors(vsi);
9386 i40e_vsi_reset_stats(vsi);
9390 /* no netdev or rings for the other VSI types */
9394 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9395 (vsi->type == I40E_VSI_VMDQ2)) {
9396 ret = i40e_vsi_config_rss(vsi);
9401 i40e_vsi_free_q_vectors(vsi);
9403 if (vsi->netdev_registered) {
9404 vsi->netdev_registered = false;
9405 unregister_netdev(vsi->netdev);
9406 free_netdev(vsi->netdev);
9410 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9412 i40e_vsi_clear(vsi);
9418 * i40e_veb_get_bw_info - Query VEB BW information
9419 * @veb: the veb to query
9421 * Query the Tx scheduler BW configuration data for given VEB
9423 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9425 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9426 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9427 struct i40e_pf *pf = veb->pf;
9428 struct i40e_hw *hw = &pf->hw;
9433 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9436 dev_info(&pf->pdev->dev,
9437 "query veb bw config failed, err %s aq_err %s\n",
9438 i40e_stat_str(&pf->hw, ret),
9439 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9443 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9446 dev_info(&pf->pdev->dev,
9447 "query veb bw ets config failed, err %s aq_err %s\n",
9448 i40e_stat_str(&pf->hw, ret),
9449 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9453 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9454 veb->bw_max_quanta = ets_data.tc_bw_max;
9455 veb->is_abs_credits = bw_data.absolute_credits_enable;
9456 veb->enabled_tc = ets_data.tc_valid_bits;
9457 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9458 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9459 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9460 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9461 veb->bw_tc_limit_credits[i] =
9462 le16_to_cpu(bw_data.tc_bw_limits[i]);
9463 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9471 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9472 * @pf: board private structure
9474 * On error: returns error code (negative)
9475 * On success: returns vsi index in PF (positive)
9477 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9480 struct i40e_veb *veb;
9483 /* Need to protect the allocation of switch elements at the PF level */
9484 mutex_lock(&pf->switch_mutex);
9486 /* VEB list may be fragmented if VEB creation/destruction has
9487 * been happening. We can afford to do a quick scan to look
9488 * for any free slots in the list.
9490 * find next empty veb slot, looping back around if necessary
9493 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9495 if (i >= I40E_MAX_VEB) {
9497 goto err_alloc_veb; /* out of VEB slots! */
9500 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9507 veb->enabled_tc = 1;
9512 mutex_unlock(&pf->switch_mutex);
9517 * i40e_switch_branch_release - Delete a branch of the switch tree
9518 * @branch: where to start deleting
9520 * This uses recursion to find the tips of the branch to be
9521 * removed, deleting until we get back to and can delete this VEB.
9523 static void i40e_switch_branch_release(struct i40e_veb *branch)
9525 struct i40e_pf *pf = branch->pf;
9526 u16 branch_seid = branch->seid;
9527 u16 veb_idx = branch->idx;
9530 /* release any VEBs on this VEB - RECURSION */
9531 for (i = 0; i < I40E_MAX_VEB; i++) {
9534 if (pf->veb[i]->uplink_seid == branch->seid)
9535 i40e_switch_branch_release(pf->veb[i]);
9538 /* Release the VSIs on this VEB, but not the owner VSI.
9540 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9541 * the VEB itself, so don't use (*branch) after this loop.
9543 for (i = 0; i < pf->num_alloc_vsi; i++) {
9546 if (pf->vsi[i]->uplink_seid == branch_seid &&
9547 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9548 i40e_vsi_release(pf->vsi[i]);
9552 /* There's one corner case where the VEB might not have been
9553 * removed, so double check it here and remove it if needed.
9554 * This case happens if the veb was created from the debugfs
9555 * commands and no VSIs were added to it.
9557 if (pf->veb[veb_idx])
9558 i40e_veb_release(pf->veb[veb_idx]);
9562 * i40e_veb_clear - remove veb struct
9563 * @veb: the veb to remove
9565 static void i40e_veb_clear(struct i40e_veb *veb)
9571 struct i40e_pf *pf = veb->pf;
9573 mutex_lock(&pf->switch_mutex);
9574 if (pf->veb[veb->idx] == veb)
9575 pf->veb[veb->idx] = NULL;
9576 mutex_unlock(&pf->switch_mutex);
9583 * i40e_veb_release - Delete a VEB and free its resources
9584 * @veb: the VEB being removed
9586 void i40e_veb_release(struct i40e_veb *veb)
9588 struct i40e_vsi *vsi = NULL;
9594 /* find the remaining VSI and check for extras */
9595 for (i = 0; i < pf->num_alloc_vsi; i++) {
9596 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9602 dev_info(&pf->pdev->dev,
9603 "can't remove VEB %d with %d VSIs left\n",
9608 /* move the remaining VSI to uplink veb */
9609 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9610 if (veb->uplink_seid) {
9611 vsi->uplink_seid = veb->uplink_seid;
9612 if (veb->uplink_seid == pf->mac_seid)
9613 vsi->veb_idx = I40E_NO_VEB;
9615 vsi->veb_idx = veb->veb_idx;
9618 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9619 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9622 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9623 i40e_veb_clear(veb);
9627 * i40e_add_veb - create the VEB in the switch
9628 * @veb: the VEB to be instantiated
9629 * @vsi: the controlling VSI
9631 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9633 struct i40e_pf *pf = veb->pf;
9634 bool is_default = veb->pf->cur_promisc;
9635 bool is_cloud = false;
9638 /* get a VEB from the hardware */
9639 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9640 veb->enabled_tc, is_default,
9641 is_cloud, &veb->seid, NULL);
9643 dev_info(&pf->pdev->dev,
9644 "couldn't add VEB, err %s aq_err %s\n",
9645 i40e_stat_str(&pf->hw, ret),
9646 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9650 /* get statistics counter */
9651 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9652 &veb->stats_idx, NULL, NULL, NULL);
9654 dev_info(&pf->pdev->dev,
9655 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9656 i40e_stat_str(&pf->hw, ret),
9657 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9660 ret = i40e_veb_get_bw_info(veb);
9662 dev_info(&pf->pdev->dev,
9663 "couldn't get VEB bw info, err %s aq_err %s\n",
9664 i40e_stat_str(&pf->hw, ret),
9665 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9666 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9670 vsi->uplink_seid = veb->seid;
9671 vsi->veb_idx = veb->idx;
9672 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9678 * i40e_veb_setup - Set up a VEB
9679 * @pf: board private structure
9680 * @flags: VEB setup flags
9681 * @uplink_seid: the switch element to link to
9682 * @vsi_seid: the initial VSI seid
9683 * @enabled_tc: Enabled TC bit-map
9685 * This allocates the sw VEB structure and links it into the switch
9686 * It is possible and legal for this to be a duplicate of an already
9687 * existing VEB. It is also possible for both uplink and vsi seids
9688 * to be zero, in order to create a floating VEB.
9690 * Returns pointer to the successfully allocated VEB sw struct on
9691 * success, otherwise returns NULL on failure.
9693 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9694 u16 uplink_seid, u16 vsi_seid,
9697 struct i40e_veb *veb, *uplink_veb = NULL;
9698 int vsi_idx, veb_idx;
9701 /* if one seid is 0, the other must be 0 to create a floating relay */
9702 if ((uplink_seid == 0 || vsi_seid == 0) &&
9703 (uplink_seid + vsi_seid != 0)) {
9704 dev_info(&pf->pdev->dev,
9705 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9706 uplink_seid, vsi_seid);
9710 /* make sure there is such a vsi and uplink */
9711 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9712 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9714 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9715 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9720 if (uplink_seid && uplink_seid != pf->mac_seid) {
9721 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9722 if (pf->veb[veb_idx] &&
9723 pf->veb[veb_idx]->seid == uplink_seid) {
9724 uplink_veb = pf->veb[veb_idx];
9729 dev_info(&pf->pdev->dev,
9730 "uplink seid %d not found\n", uplink_seid);
9735 /* get veb sw struct */
9736 veb_idx = i40e_veb_mem_alloc(pf);
9739 veb = pf->veb[veb_idx];
9741 veb->uplink_seid = uplink_seid;
9742 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9743 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9745 /* create the VEB in the switch */
9746 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9749 if (vsi_idx == pf->lan_vsi)
9750 pf->lan_veb = veb->idx;
9755 i40e_veb_clear(veb);
9761 * i40e_setup_pf_switch_element - set PF vars based on switch type
9762 * @pf: board private structure
9763 * @ele: element we are building info from
9764 * @num_reported: total number of elements
9765 * @printconfig: should we print the contents
9767 * helper function to assist in extracting a few useful SEID values.
9769 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9770 struct i40e_aqc_switch_config_element_resp *ele,
9771 u16 num_reported, bool printconfig)
9773 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9774 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9775 u8 element_type = ele->element_type;
9776 u16 seid = le16_to_cpu(ele->seid);
9779 dev_info(&pf->pdev->dev,
9780 "type=%d seid=%d uplink=%d downlink=%d\n",
9781 element_type, seid, uplink_seid, downlink_seid);
9783 switch (element_type) {
9784 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9785 pf->mac_seid = seid;
9787 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9789 if (uplink_seid != pf->mac_seid)
9791 if (pf->lan_veb == I40E_NO_VEB) {
9794 /* find existing or else empty VEB */
9795 for (v = 0; v < I40E_MAX_VEB; v++) {
9796 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9801 if (pf->lan_veb == I40E_NO_VEB) {
9802 v = i40e_veb_mem_alloc(pf);
9809 pf->veb[pf->lan_veb]->seid = seid;
9810 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9811 pf->veb[pf->lan_veb]->pf = pf;
9812 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9814 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9815 if (num_reported != 1)
9817 /* This is immediately after a reset so we can assume this is
9820 pf->mac_seid = uplink_seid;
9821 pf->pf_seid = downlink_seid;
9822 pf->main_vsi_seid = seid;
9824 dev_info(&pf->pdev->dev,
9825 "pf_seid=%d main_vsi_seid=%d\n",
9826 pf->pf_seid, pf->main_vsi_seid);
9828 case I40E_SWITCH_ELEMENT_TYPE_PF:
9829 case I40E_SWITCH_ELEMENT_TYPE_VF:
9830 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9831 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9832 case I40E_SWITCH_ELEMENT_TYPE_PE:
9833 case I40E_SWITCH_ELEMENT_TYPE_PA:
9834 /* ignore these for now */
9837 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9838 element_type, seid);
9844 * i40e_fetch_switch_configuration - Get switch config from firmware
9845 * @pf: board private structure
9846 * @printconfig: should we print the contents
9848 * Get the current switch configuration from the device and
9849 * extract a few useful SEID values.
9851 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9853 struct i40e_aqc_get_switch_config_resp *sw_config;
9859 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9863 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9865 u16 num_reported, num_total;
9867 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9871 dev_info(&pf->pdev->dev,
9872 "get switch config failed err %s aq_err %s\n",
9873 i40e_stat_str(&pf->hw, ret),
9874 i40e_aq_str(&pf->hw,
9875 pf->hw.aq.asq_last_status));
9880 num_reported = le16_to_cpu(sw_config->header.num_reported);
9881 num_total = le16_to_cpu(sw_config->header.num_total);
9884 dev_info(&pf->pdev->dev,
9885 "header: %d reported %d total\n",
9886 num_reported, num_total);
9888 for (i = 0; i < num_reported; i++) {
9889 struct i40e_aqc_switch_config_element_resp *ele =
9890 &sw_config->element[i];
9892 i40e_setup_pf_switch_element(pf, ele, num_reported,
9895 } while (next_seid != 0);
9902 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9903 * @pf: board private structure
9904 * @reinit: if the Main VSI needs to re-initialized.
9906 * Returns 0 on success, negative value on failure
9908 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9912 /* find out what's out there already */
9913 ret = i40e_fetch_switch_configuration(pf, false);
9915 dev_info(&pf->pdev->dev,
9916 "couldn't fetch switch config, err %s aq_err %s\n",
9917 i40e_stat_str(&pf->hw, ret),
9918 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9921 i40e_pf_reset_stats(pf);
9923 /* first time setup */
9924 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9925 struct i40e_vsi *vsi = NULL;
9928 /* Set up the PF VSI associated with the PF's main VSI
9929 * that is already in the HW switch
9931 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9932 uplink_seid = pf->veb[pf->lan_veb]->seid;
9934 uplink_seid = pf->mac_seid;
9935 if (pf->lan_vsi == I40E_NO_VSI)
9936 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9938 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9940 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9941 i40e_fdir_teardown(pf);
9945 /* force a reset of TC and queue layout configurations */
9946 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9948 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9949 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9950 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9952 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9954 i40e_fdir_sb_setup(pf);
9956 /* Setup static PF queue filter control settings */
9957 ret = i40e_setup_pf_filter_control(pf);
9959 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9961 /* Failure here should not stop continuing other steps */
9964 /* enable RSS in the HW, even for only one queue, as the stack can use
9967 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9968 i40e_config_rss(pf);
9970 /* fill in link information and enable LSE reporting */
9971 i40e_update_link_info(&pf->hw);
9972 i40e_link_event(pf);
9974 /* Initialize user-specific link properties */
9975 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9976 I40E_AQ_AN_COMPLETED) ? true : false);
9984 * i40e_determine_queue_usage - Work out queue distribution
9985 * @pf: board private structure
9987 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9991 pf->num_lan_qps = 0;
9993 pf->num_fcoe_qps = 0;
9996 /* Find the max queues to be put into basic use. We'll always be
9997 * using TC0, whether or not DCB is running, and TC0 will get the
10000 queues_left = pf->hw.func_caps.num_tx_qp;
10002 if ((queues_left == 1) ||
10003 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10004 /* one qp for PF, no queues for anything else */
10006 pf->rss_size = pf->num_lan_qps = 1;
10008 /* make sure all the fancies are disabled */
10009 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10011 I40E_FLAG_FCOE_ENABLED |
10013 I40E_FLAG_FD_SB_ENABLED |
10014 I40E_FLAG_FD_ATR_ENABLED |
10015 I40E_FLAG_DCB_CAPABLE |
10016 I40E_FLAG_SRIOV_ENABLED |
10017 I40E_FLAG_VMDQ_ENABLED);
10018 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10019 I40E_FLAG_FD_SB_ENABLED |
10020 I40E_FLAG_FD_ATR_ENABLED |
10021 I40E_FLAG_DCB_CAPABLE))) {
10022 /* one qp for PF */
10023 pf->rss_size = pf->num_lan_qps = 1;
10024 queues_left -= pf->num_lan_qps;
10026 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10028 I40E_FLAG_FCOE_ENABLED |
10030 I40E_FLAG_FD_SB_ENABLED |
10031 I40E_FLAG_FD_ATR_ENABLED |
10032 I40E_FLAG_DCB_ENABLED |
10033 I40E_FLAG_VMDQ_ENABLED);
10035 /* Not enough queues for all TCs */
10036 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10037 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10038 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10039 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10041 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10042 num_online_cpus());
10043 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10044 pf->hw.func_caps.num_tx_qp);
10046 queues_left -= pf->num_lan_qps;
10050 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10051 if (I40E_DEFAULT_FCOE <= queues_left) {
10052 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10053 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10054 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10056 pf->num_fcoe_qps = 0;
10057 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10058 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10061 queues_left -= pf->num_fcoe_qps;
10065 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10066 if (queues_left > 1) {
10067 queues_left -= 1; /* save 1 queue for FD */
10069 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10070 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10074 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10075 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10076 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10077 (queues_left / pf->num_vf_qps));
10078 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10081 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10082 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10083 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10084 (queues_left / pf->num_vmdq_qps));
10085 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10088 pf->queues_left = queues_left;
10089 dev_dbg(&pf->pdev->dev,
10090 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10091 pf->hw.func_caps.num_tx_qp,
10092 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10093 pf->num_lan_qps, pf->rss_size, pf->num_req_vfs, pf->num_vf_qps,
10094 pf->num_vmdq_vsis, pf->num_vmdq_qps, queues_left);
10096 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10101 * i40e_setup_pf_filter_control - Setup PF static filter control
10102 * @pf: PF to be setup
10104 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10105 * settings. If PE/FCoE are enabled then it will also set the per PF
10106 * based filter sizes required for them. It also enables Flow director,
10107 * ethertype and macvlan type filter settings for the pf.
10109 * Returns 0 on success, negative on failure
10111 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10113 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10115 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10117 /* Flow Director is enabled */
10118 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10119 settings->enable_fdir = true;
10121 /* Ethtype and MACVLAN filters enabled for PF */
10122 settings->enable_ethtype = true;
10123 settings->enable_macvlan = true;
10125 if (i40e_set_filter_control(&pf->hw, settings))
10131 #define INFO_STRING_LEN 255
10132 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10133 static void i40e_print_features(struct i40e_pf *pf)
10135 struct i40e_hw *hw = &pf->hw;
10136 char *buf, *string;
10139 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
10141 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
10147 i += snprintf(&buf[i], REMAIN(i), "Features: PF-id[%d] ", hw->pf_id);
10148 #ifdef CONFIG_PCI_IOV
10149 i += snprintf(&buf[i], REMAIN(i), "VFs: %d ", pf->num_req_vfs);
10151 i += snprintf(&buf[i], REMAIN(i), "VSIs: %d QP: %d RX: %s ",
10152 pf->hw.func_caps.num_vsis,
10153 pf->vsi[pf->lan_vsi]->num_queue_pairs,
10154 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
10156 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10157 i += snprintf(&buf[i], REMAIN(i), "RSS ");
10158 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10159 i += snprintf(&buf[i], REMAIN(i), "FD_ATR ");
10160 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10161 i += snprintf(&buf[i], REMAIN(i), "FD_SB ");
10162 i += snprintf(&buf[i], REMAIN(i), "NTUPLE ");
10164 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10165 i += snprintf(&buf[i], REMAIN(i), "DCB ");
10166 #if IS_ENABLED(CONFIG_VXLAN)
10167 i += snprintf(&buf[i], REMAIN(i), "VxLAN ");
10169 if (pf->flags & I40E_FLAG_PTP)
10170 i += snprintf(&buf[i], REMAIN(i), "PTP ");
10172 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10173 i += snprintf(&buf[i], REMAIN(i), "FCOE ");
10175 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10176 i += snprintf(&buf[i], REMAIN(i), "VEPA ");
10178 buf += sprintf(buf, "VEPA ");
10180 dev_info(&pf->pdev->dev, "%s\n", string);
10182 WARN_ON(i > INFO_STRING_LEN);
10186 * i40e_probe - Device initialization routine
10187 * @pdev: PCI device information struct
10188 * @ent: entry in i40e_pci_tbl
10190 * i40e_probe initializes a PF identified by a pci_dev structure.
10191 * The OS initialization, configuring of the PF private structure,
10192 * and a hardware reset occur.
10194 * Returns 0 on success, negative on failure
10196 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10198 struct i40e_aq_get_phy_abilities_resp abilities;
10199 struct i40e_pf *pf;
10200 struct i40e_hw *hw;
10201 static u16 pfs_found;
10210 err = pci_enable_device_mem(pdev);
10214 /* set up for high or low dma */
10215 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10217 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10219 dev_err(&pdev->dev,
10220 "DMA configuration failed: 0x%x\n", err);
10225 /* set up pci connections */
10226 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
10227 IORESOURCE_MEM), i40e_driver_name);
10229 dev_info(&pdev->dev,
10230 "pci_request_selected_regions failed %d\n", err);
10234 pci_enable_pcie_error_reporting(pdev);
10235 pci_set_master(pdev);
10237 /* Now that we have a PCI connection, we need to do the
10238 * low level device setup. This is primarily setting up
10239 * the Admin Queue structures and then querying for the
10240 * device's current profile information.
10242 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10249 set_bit(__I40E_DOWN, &pf->state);
10254 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10255 I40E_MAX_CSR_SPACE);
10257 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10258 if (!hw->hw_addr) {
10260 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10261 (unsigned int)pci_resource_start(pdev, 0),
10262 pf->ioremap_len, err);
10265 hw->vendor_id = pdev->vendor;
10266 hw->device_id = pdev->device;
10267 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10268 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10269 hw->subsystem_device_id = pdev->subsystem_device;
10270 hw->bus.device = PCI_SLOT(pdev->devfn);
10271 hw->bus.func = PCI_FUNC(pdev->devfn);
10272 pf->instance = pfs_found;
10275 pf->msg_enable = pf->hw.debug_mask;
10276 pf->msg_enable = debug;
10279 /* do a special CORER for clearing PXE mode once at init */
10280 if (hw->revision_id == 0 &&
10281 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10282 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10287 i40e_clear_pxe_mode(hw);
10290 /* Reset here to make sure all is clean and to define PF 'n' */
10292 err = i40e_pf_reset(hw);
10294 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10299 hw->aq.num_arq_entries = I40E_AQ_LEN;
10300 hw->aq.num_asq_entries = I40E_AQ_LEN;
10301 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10302 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10303 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10305 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10307 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10309 err = i40e_init_shared_code(hw);
10311 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10316 /* set up a default setting for link flow control */
10317 pf->hw.fc.requested_mode = I40E_FC_NONE;
10319 err = i40e_init_adminq(hw);
10321 /* provide nvm, fw, api versions */
10322 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10323 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10324 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10325 i40e_nvm_version_str(hw));
10328 dev_info(&pdev->dev,
10329 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10333 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10334 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10335 dev_info(&pdev->dev,
10336 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10337 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10338 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10339 dev_info(&pdev->dev,
10340 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10342 i40e_verify_eeprom(pf);
10344 /* Rev 0 hardware was never productized */
10345 if (hw->revision_id < 1)
10346 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10348 i40e_clear_pxe_mode(hw);
10349 err = i40e_get_capabilities(pf);
10351 goto err_adminq_setup;
10353 err = i40e_sw_init(pf);
10355 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10359 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10360 hw->func_caps.num_rx_qp,
10361 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10363 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10364 goto err_init_lan_hmc;
10367 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10369 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10371 goto err_configure_lan_hmc;
10374 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10375 * Ignore error return codes because if it was already disabled via
10376 * hardware settings this will fail
10378 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10379 (pf->hw.aq.fw_maj_ver < 4)) {
10380 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10381 i40e_aq_stop_lldp(hw, true, NULL);
10384 i40e_get_mac_addr(hw, hw->mac.addr);
10385 if (!is_valid_ether_addr(hw->mac.addr)) {
10386 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10390 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10391 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10392 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10393 if (is_valid_ether_addr(hw->mac.port_addr))
10394 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10396 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10398 dev_info(&pdev->dev,
10399 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10400 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10401 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10403 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10405 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10406 #endif /* I40E_FCOE */
10408 pci_set_drvdata(pdev, pf);
10409 pci_save_state(pdev);
10410 #ifdef CONFIG_I40E_DCB
10411 err = i40e_init_pf_dcb(pf);
10413 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10414 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10415 /* Continue without DCB enabled */
10417 #endif /* CONFIG_I40E_DCB */
10419 /* set up periodic task facility */
10420 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10421 pf->service_timer_period = HZ;
10423 INIT_WORK(&pf->service_task, i40e_service_task);
10424 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10425 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10427 /* NVM bit on means WoL disabled for the port */
10428 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10429 if ((1 << hw->port) & wol_nvm_bits || hw->partition_id != 1)
10430 pf->wol_en = false;
10433 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10435 /* set up the main switch operations */
10436 i40e_determine_queue_usage(pf);
10437 err = i40e_init_interrupt_scheme(pf);
10439 goto err_switch_setup;
10441 /* The number of VSIs reported by the FW is the minimum guaranteed
10442 * to us; HW supports far more and we share the remaining pool with
10443 * the other PFs. We allocate space for more than the guarantee with
10444 * the understanding that we might not get them all later.
10446 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10447 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10449 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10451 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10452 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10453 pf->vsi = kzalloc(len, GFP_KERNEL);
10456 goto err_switch_setup;
10459 #ifdef CONFIG_PCI_IOV
10460 /* prep for VF support */
10461 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10462 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10463 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10464 if (pci_num_vf(pdev))
10465 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10468 err = i40e_setup_pf_switch(pf, false);
10470 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10474 /* Make sure flow control is set according to current settings */
10475 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
10476 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
10477 dev_dbg(&pf->pdev->dev,
10478 "Set fc with err %s aq_err %s on get_phy_cap\n",
10479 i40e_stat_str(hw, err),
10480 i40e_aq_str(hw, hw->aq.asq_last_status));
10481 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
10482 dev_dbg(&pf->pdev->dev,
10483 "Set fc with err %s aq_err %s on set_phy_config\n",
10484 i40e_stat_str(hw, err),
10485 i40e_aq_str(hw, hw->aq.asq_last_status));
10486 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
10487 dev_dbg(&pf->pdev->dev,
10488 "Set fc with err %s aq_err %s on get_link_info\n",
10489 i40e_stat_str(hw, err),
10490 i40e_aq_str(hw, hw->aq.asq_last_status));
10492 /* if FDIR VSI was set up, start it now */
10493 for (i = 0; i < pf->num_alloc_vsi; i++) {
10494 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10495 i40e_vsi_open(pf->vsi[i]);
10500 /* driver is only interested in link up/down and module qualification
10501 * reports from firmware
10503 err = i40e_aq_set_phy_int_mask(&pf->hw,
10504 I40E_AQ_EVENT_LINK_UPDOWN |
10505 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10507 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10508 i40e_stat_str(&pf->hw, err),
10509 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10511 /* Reconfigure hardware for allowing smaller MSS in the case
10512 * of TSO, so that we avoid the MDD being fired and causing
10513 * a reset in the case of small MSS+TSO.
10515 val = rd32(hw, I40E_REG_MSS);
10516 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10517 val &= ~I40E_REG_MSS_MIN_MASK;
10518 val |= I40E_64BYTE_MSS;
10519 wr32(hw, I40E_REG_MSS, val);
10522 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10523 (pf->hw.aq.fw_maj_ver < 4)) {
10525 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10527 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10528 i40e_stat_str(&pf->hw, err),
10529 i40e_aq_str(&pf->hw,
10530 pf->hw.aq.asq_last_status));
10532 /* The main driver is (mostly) up and happy. We need to set this state
10533 * before setting up the misc vector or we get a race and the vector
10534 * ends up disabled forever.
10536 clear_bit(__I40E_DOWN, &pf->state);
10538 /* In case of MSIX we are going to setup the misc vector right here
10539 * to handle admin queue events etc. In case of legacy and MSI
10540 * the misc functionality and queue processing is combined in
10541 * the same vector and that gets setup at open.
10543 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10544 err = i40e_setup_misc_vector(pf);
10546 dev_info(&pdev->dev,
10547 "setup of misc vector failed: %d\n", err);
10552 #ifdef CONFIG_PCI_IOV
10553 /* prep for VF support */
10554 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10555 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10556 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10559 /* disable link interrupts for VFs */
10560 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10561 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10562 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10565 if (pci_num_vf(pdev)) {
10566 dev_info(&pdev->dev,
10567 "Active VFs found, allocating resources.\n");
10568 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10570 dev_info(&pdev->dev,
10571 "Error %d allocating resources for existing VFs\n",
10575 #endif /* CONFIG_PCI_IOV */
10579 i40e_dbg_pf_init(pf);
10581 /* tell the firmware that we're starting */
10582 i40e_send_version(pf);
10584 /* since everything's happy, start the service_task timer */
10585 mod_timer(&pf->service_timer,
10586 round_jiffies(jiffies + pf->service_timer_period));
10589 /* create FCoE interface */
10590 i40e_fcoe_vsi_setup(pf);
10593 #define PCI_SPEED_SIZE 8
10594 #define PCI_WIDTH_SIZE 8
10595 /* Devices on the IOSF bus do not have this information
10596 * and will report PCI Gen 1 x 1 by default so don't bother
10599 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
10600 char speed[PCI_SPEED_SIZE] = "Unknown";
10601 char width[PCI_WIDTH_SIZE] = "Unknown";
10603 /* Get the negotiated link width and speed from PCI config
10606 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
10609 i40e_set_pci_config_data(hw, link_status);
10611 switch (hw->bus.speed) {
10612 case i40e_bus_speed_8000:
10613 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
10614 case i40e_bus_speed_5000:
10615 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
10616 case i40e_bus_speed_2500:
10617 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
10621 switch (hw->bus.width) {
10622 case i40e_bus_width_pcie_x8:
10623 strncpy(width, "8", PCI_WIDTH_SIZE); break;
10624 case i40e_bus_width_pcie_x4:
10625 strncpy(width, "4", PCI_WIDTH_SIZE); break;
10626 case i40e_bus_width_pcie_x2:
10627 strncpy(width, "2", PCI_WIDTH_SIZE); break;
10628 case i40e_bus_width_pcie_x1:
10629 strncpy(width, "1", PCI_WIDTH_SIZE); break;
10634 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
10637 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10638 hw->bus.speed < i40e_bus_speed_8000) {
10639 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10640 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10644 /* get the requested speeds from the fw */
10645 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10647 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
10648 i40e_stat_str(&pf->hw, err),
10649 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10650 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10652 /* get the supported phy types from the fw */
10653 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
10655 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
10656 i40e_stat_str(&pf->hw, err),
10657 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10658 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
10660 /* Add a filter to drop all Flow control frames from any VSI from being
10661 * transmitted. By doing so we stop a malicious VF from sending out
10662 * PAUSE or PFC frames and potentially controlling traffic for other
10664 * The FW can still send Flow control frames if enabled.
10666 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
10667 pf->main_vsi_seid);
10669 /* print a string summarizing features */
10670 i40e_print_features(pf);
10674 /* Unwind what we've done if something failed in the setup */
10676 set_bit(__I40E_DOWN, &pf->state);
10677 i40e_clear_interrupt_scheme(pf);
10680 i40e_reset_interrupt_capability(pf);
10681 del_timer_sync(&pf->service_timer);
10683 err_configure_lan_hmc:
10684 (void)i40e_shutdown_lan_hmc(hw);
10686 kfree(pf->qp_pile);
10689 (void)i40e_shutdown_adminq(hw);
10691 iounmap(hw->hw_addr);
10695 pci_disable_pcie_error_reporting(pdev);
10696 pci_release_selected_regions(pdev,
10697 pci_select_bars(pdev, IORESOURCE_MEM));
10700 pci_disable_device(pdev);
10705 * i40e_remove - Device removal routine
10706 * @pdev: PCI device information struct
10708 * i40e_remove is called by the PCI subsystem to alert the driver
10709 * that is should release a PCI device. This could be caused by a
10710 * Hot-Plug event, or because the driver is going to be removed from
10713 static void i40e_remove(struct pci_dev *pdev)
10715 struct i40e_pf *pf = pci_get_drvdata(pdev);
10716 struct i40e_hw *hw = &pf->hw;
10717 i40e_status ret_code;
10720 i40e_dbg_pf_exit(pf);
10724 /* Disable RSS in hw */
10725 wr32(hw, I40E_PFQF_HENA(0), 0);
10726 wr32(hw, I40E_PFQF_HENA(1), 0);
10728 /* no more scheduling of any task */
10729 set_bit(__I40E_DOWN, &pf->state);
10730 del_timer_sync(&pf->service_timer);
10731 cancel_work_sync(&pf->service_task);
10732 i40e_fdir_teardown(pf);
10734 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10736 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10739 i40e_fdir_teardown(pf);
10741 /* If there is a switch structure or any orphans, remove them.
10742 * This will leave only the PF's VSI remaining.
10744 for (i = 0; i < I40E_MAX_VEB; i++) {
10748 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10749 pf->veb[i]->uplink_seid == 0)
10750 i40e_switch_branch_release(pf->veb[i]);
10753 /* Now we can shutdown the PF's VSI, just before we kill
10756 if (pf->vsi[pf->lan_vsi])
10757 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10759 /* shutdown and destroy the HMC */
10760 if (pf->hw.hmc.hmc_obj) {
10761 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10763 dev_warn(&pdev->dev,
10764 "Failed to destroy the HMC resources: %d\n",
10768 /* shutdown the adminq */
10769 ret_code = i40e_shutdown_adminq(&pf->hw);
10771 dev_warn(&pdev->dev,
10772 "Failed to destroy the Admin Queue resources: %d\n",
10775 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10776 i40e_clear_interrupt_scheme(pf);
10777 for (i = 0; i < pf->num_alloc_vsi; i++) {
10779 i40e_vsi_clear_rings(pf->vsi[i]);
10780 i40e_vsi_clear(pf->vsi[i]);
10785 for (i = 0; i < I40E_MAX_VEB; i++) {
10790 kfree(pf->qp_pile);
10793 iounmap(pf->hw.hw_addr);
10795 pci_release_selected_regions(pdev,
10796 pci_select_bars(pdev, IORESOURCE_MEM));
10798 pci_disable_pcie_error_reporting(pdev);
10799 pci_disable_device(pdev);
10803 * i40e_pci_error_detected - warning that something funky happened in PCI land
10804 * @pdev: PCI device information struct
10806 * Called to warn that something happened and the error handling steps
10807 * are in progress. Allows the driver to quiesce things, be ready for
10810 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10811 enum pci_channel_state error)
10813 struct i40e_pf *pf = pci_get_drvdata(pdev);
10815 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10817 /* shutdown all operations */
10818 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10820 i40e_prep_for_reset(pf);
10824 /* Request a slot reset */
10825 return PCI_ERS_RESULT_NEED_RESET;
10829 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10830 * @pdev: PCI device information struct
10832 * Called to find if the driver can work with the device now that
10833 * the pci slot has been reset. If a basic connection seems good
10834 * (registers are readable and have sane content) then return a
10835 * happy little PCI_ERS_RESULT_xxx.
10837 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10839 struct i40e_pf *pf = pci_get_drvdata(pdev);
10840 pci_ers_result_t result;
10844 dev_dbg(&pdev->dev, "%s\n", __func__);
10845 if (pci_enable_device_mem(pdev)) {
10846 dev_info(&pdev->dev,
10847 "Cannot re-enable PCI device after reset.\n");
10848 result = PCI_ERS_RESULT_DISCONNECT;
10850 pci_set_master(pdev);
10851 pci_restore_state(pdev);
10852 pci_save_state(pdev);
10853 pci_wake_from_d3(pdev, false);
10855 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10857 result = PCI_ERS_RESULT_RECOVERED;
10859 result = PCI_ERS_RESULT_DISCONNECT;
10862 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10864 dev_info(&pdev->dev,
10865 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10867 /* non-fatal, continue */
10874 * i40e_pci_error_resume - restart operations after PCI error recovery
10875 * @pdev: PCI device information struct
10877 * Called to allow the driver to bring things back up after PCI error
10878 * and/or reset recovery has finished.
10880 static void i40e_pci_error_resume(struct pci_dev *pdev)
10882 struct i40e_pf *pf = pci_get_drvdata(pdev);
10884 dev_dbg(&pdev->dev, "%s\n", __func__);
10885 if (test_bit(__I40E_SUSPENDED, &pf->state))
10889 i40e_handle_reset_warning(pf);
10894 * i40e_shutdown - PCI callback for shutting down
10895 * @pdev: PCI device information struct
10897 static void i40e_shutdown(struct pci_dev *pdev)
10899 struct i40e_pf *pf = pci_get_drvdata(pdev);
10900 struct i40e_hw *hw = &pf->hw;
10902 set_bit(__I40E_SUSPENDED, &pf->state);
10903 set_bit(__I40E_DOWN, &pf->state);
10905 i40e_prep_for_reset(pf);
10908 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10909 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10911 del_timer_sync(&pf->service_timer);
10912 cancel_work_sync(&pf->service_task);
10913 i40e_fdir_teardown(pf);
10916 i40e_prep_for_reset(pf);
10919 wr32(hw, I40E_PFPM_APM,
10920 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10921 wr32(hw, I40E_PFPM_WUFC,
10922 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10924 i40e_clear_interrupt_scheme(pf);
10926 if (system_state == SYSTEM_POWER_OFF) {
10927 pci_wake_from_d3(pdev, pf->wol_en);
10928 pci_set_power_state(pdev, PCI_D3hot);
10934 * i40e_suspend - PCI callback for moving to D3
10935 * @pdev: PCI device information struct
10937 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10939 struct i40e_pf *pf = pci_get_drvdata(pdev);
10940 struct i40e_hw *hw = &pf->hw;
10942 set_bit(__I40E_SUSPENDED, &pf->state);
10943 set_bit(__I40E_DOWN, &pf->state);
10946 i40e_prep_for_reset(pf);
10949 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10950 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10952 pci_wake_from_d3(pdev, pf->wol_en);
10953 pci_set_power_state(pdev, PCI_D3hot);
10959 * i40e_resume - PCI callback for waking up from D3
10960 * @pdev: PCI device information struct
10962 static int i40e_resume(struct pci_dev *pdev)
10964 struct i40e_pf *pf = pci_get_drvdata(pdev);
10967 pci_set_power_state(pdev, PCI_D0);
10968 pci_restore_state(pdev);
10969 /* pci_restore_state() clears dev->state_saves, so
10970 * call pci_save_state() again to restore it.
10972 pci_save_state(pdev);
10974 err = pci_enable_device_mem(pdev);
10976 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
10979 pci_set_master(pdev);
10981 /* no wakeup events while running */
10982 pci_wake_from_d3(pdev, false);
10984 /* handling the reset will rebuild the device state */
10985 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10986 clear_bit(__I40E_DOWN, &pf->state);
10988 i40e_reset_and_rebuild(pf, false);
10996 static const struct pci_error_handlers i40e_err_handler = {
10997 .error_detected = i40e_pci_error_detected,
10998 .slot_reset = i40e_pci_error_slot_reset,
10999 .resume = i40e_pci_error_resume,
11002 static struct pci_driver i40e_driver = {
11003 .name = i40e_driver_name,
11004 .id_table = i40e_pci_tbl,
11005 .probe = i40e_probe,
11006 .remove = i40e_remove,
11008 .suspend = i40e_suspend,
11009 .resume = i40e_resume,
11011 .shutdown = i40e_shutdown,
11012 .err_handler = &i40e_err_handler,
11013 .sriov_configure = i40e_pci_sriov_configure,
11017 * i40e_init_module - Driver registration routine
11019 * i40e_init_module is the first routine called when the driver is
11020 * loaded. All it does is register with the PCI subsystem.
11022 static int __init i40e_init_module(void)
11024 pr_info("%s: %s - version %s\n", i40e_driver_name,
11025 i40e_driver_string, i40e_driver_version_str);
11026 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11029 return pci_register_driver(&i40e_driver);
11031 module_init(i40e_init_module);
11034 * i40e_exit_module - Driver exit cleanup routine
11036 * i40e_exit_module is called just before the driver is removed
11039 static void __exit i40e_exit_module(void)
11041 pci_unregister_driver(&i40e_driver);
11044 module_exit(i40e_exit_module);