drivers/net/ethernet/intel/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  29
  30 #include <linux/module.h>
  31 #include <linux/types.h>
  32 #include <linux/init.h>
  33 #include <linux/bitops.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/pagemap.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/ipv6.h>
  38 #include <linux/slab.h>
  39 #include <net/checksum.h>
  40 #include <net/ip6_checksum.h>
  41 #include <linux/net_tstamp.h>
  42 #include <linux/mii.h>
  43 #include <linux/ethtool.h>
  44 #include <linux/if.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/pci.h>
  47 #include <linux/pci-aspm.h>
  48 #include <linux/delay.h>
  49 #include <linux/interrupt.h>
  50 #include <linux/ip.h>
  51 #include <linux/tcp.h>
  52 #include <linux/sctp.h>
  53 #include <linux/if_ether.h>
  54 #include <linux/aer.h>
  55 #include <linux/prefetch.h>
  56 #include <linux/pm_runtime.h>
  57 #ifdef CONFIG_IGB_DCA
  58 #include <linux/dca.h>
  59 #endif
  60 #include <linux/i2c.h>
  61 #include "igb.h"
  62
  63 #define MAJ 5
  64 #define MIN 0
  65 #define BUILD 3
  66 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  67 __stringify(BUILD) "-k"
  68 char igb_driver_name[] = "igb";
  69 char igb_driver_version[] = DRV_VERSION;
  70 static const char igb_driver_string[] =
  71                                 "Intel(R) Gigabit Ethernet Network Driver";
  72 static const char igb_copyright[] =
  73                                 "Copyright (c) 2007-2013 Intel Corporation.";
  74
  75 static const struct e1000_info *igb_info_tbl[] = {
  76         [board_82575] = &e1000_82575_info,
  77 };
  78
  79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 112         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 113         /* required last entry */
 114         {0, }
 115 };
 116
 117 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 118
 119 void igb_reset(struct igb_adapter *);
 120 static int igb_setup_all_tx_resources(struct igb_adapter *);
 121 static int igb_setup_all_rx_resources(struct igb_adapter *);
 122 static void igb_free_all_tx_resources(struct igb_adapter *);
 123 static void igb_free_all_rx_resources(struct igb_adapter *);
 124 static void igb_setup_mrqc(struct igb_adapter *);
 125 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 126 static void igb_remove(struct pci_dev *pdev);
 127 static int igb_sw_init(struct igb_adapter *);
 128 static int igb_open(struct net_device *);
 129 static int igb_close(struct net_device *);
 130 static void igb_configure(struct igb_adapter *);
 131 static void igb_configure_tx(struct igb_adapter *);
 132 static void igb_configure_rx(struct igb_adapter *);
 133 static void igb_clean_all_tx_rings(struct igb_adapter *);
 134 static void igb_clean_all_rx_rings(struct igb_adapter *);
 135 static void igb_clean_tx_ring(struct igb_ring *);
 136 static void igb_clean_rx_ring(struct igb_ring *);
 137 static void igb_set_rx_mode(struct net_device *);
 138 static void igb_update_phy_info(unsigned long);
 139 static void igb_watchdog(unsigned long);
 140 static void igb_watchdog_task(struct work_struct *);
 141 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 142 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
 143                                                  struct rtnl_link_stats64 *stats);
 144 static int igb_change_mtu(struct net_device *, int);
 145 static int igb_set_mac(struct net_device *, void *);
 146 static void igb_set_uta(struct igb_adapter *adapter);
 147 static irqreturn_t igb_intr(int irq, void *);
 148 static irqreturn_t igb_intr_msi(int irq, void *);
 149 static irqreturn_t igb_msix_other(int irq, void *);
 150 static irqreturn_t igb_msix_ring(int irq, void *);
 151 #ifdef CONFIG_IGB_DCA
 152 static void igb_update_dca(struct igb_q_vector *);
 153 static void igb_setup_dca(struct igb_adapter *);
 154 #endif /* CONFIG_IGB_DCA */
 155 static int igb_poll(struct napi_struct *, int);
 156 static bool igb_clean_tx_irq(struct igb_q_vector *);
 157 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 158 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 159 static void igb_tx_timeout(struct net_device *);
 160 static void igb_reset_task(struct work_struct *);
 161 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features);
 162 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 163 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 164 static void igb_restore_vlan(struct igb_adapter *);
 165 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 166 static void igb_ping_all_vfs(struct igb_adapter *);
 167 static void igb_msg_task(struct igb_adapter *);
 168 static void igb_vmm_control(struct igb_adapter *);
 169 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 170 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 171 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 172 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 173                                int vf, u16 vlan, u8 qos);
 174 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
 175 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 176                                    bool setting);
 177 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 178                                  struct ifla_vf_info *ivi);
 179 static void igb_check_vf_rate_limit(struct igb_adapter *);
 180
 181 #ifdef CONFIG_PCI_IOV
 182 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 183 #endif
 184
 185 #ifdef CONFIG_PM
 186 #ifdef CONFIG_PM_SLEEP
 187 static int igb_suspend(struct device *);
 188 #endif
 189 static int igb_resume(struct device *);
 190 #ifdef CONFIG_PM_RUNTIME
 191 static int igb_runtime_suspend(struct device *dev);
 192 static int igb_runtime_resume(struct device *dev);
 193 static int igb_runtime_idle(struct device *dev);
 194 #endif
 195 static const struct dev_pm_ops igb_pm_ops = {
 196         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 197         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 198                         igb_runtime_idle)
 199 };
 200 #endif
 201 static void igb_shutdown(struct pci_dev *);
 202 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 203 #ifdef CONFIG_IGB_DCA
 204 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 205 static struct notifier_block dca_notifier = {
 206         .notifier_call  = igb_notify_dca,
 207         .next           = NULL,
 208         .priority       = 0
 209 };
 210 #endif
 211 #ifdef CONFIG_NET_POLL_CONTROLLER
 212 /* for netdump / net console */
 213 static void igb_netpoll(struct net_device *);
 214 #endif
 215 #ifdef CONFIG_PCI_IOV
 216 static unsigned int max_vfs = 0;
 217 module_param(max_vfs, uint, 0);
 218 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
 219                  "per physical function");
 220 #endif /* CONFIG_PCI_IOV */
 221
 222 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 223                      pci_channel_state_t);
 224 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 225 static void igb_io_resume(struct pci_dev *);
 226
 227 static const struct pci_error_handlers igb_err_handler = {
 228         .error_detected = igb_io_error_detected,
 229         .slot_reset = igb_io_slot_reset,
 230         .resume = igb_io_resume,
 231 };
 232
 233 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 234
 235 static struct pci_driver igb_driver = {
 236         .name     = igb_driver_name,
 237         .id_table = igb_pci_tbl,
 238         .probe    = igb_probe,
 239         .remove   = igb_remove,
 240 #ifdef CONFIG_PM
 241         .driver.pm = &igb_pm_ops,
 242 #endif
 243         .shutdown = igb_shutdown,
 244         .sriov_configure = igb_pci_sriov_configure,
 245         .err_handler = &igb_err_handler
 246 };
 247
 248 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 249 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 250 MODULE_LICENSE("GPL");
 251 MODULE_VERSION(DRV_VERSION);
 252
 253 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 254 static int debug = -1;
 255 module_param(debug, int, 0);
 256 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 257
 258 struct igb_reg_info {
 259         u32 ofs;
 260         char *name;
 261 };
 262
 263 static const struct igb_reg_info igb_reg_info_tbl[] = {
 264
 265         /* General Registers */
 266         {E1000_CTRL, "CTRL"},
 267         {E1000_STATUS, "STATUS"},
 268         {E1000_CTRL_EXT, "CTRL_EXT"},
 269
 270         /* Interrupt Registers */
 271         {E1000_ICR, "ICR"},
 272
 273         /* RX Registers */
 274         {E1000_RCTL, "RCTL"},
 275         {E1000_RDLEN(0), "RDLEN"},
 276         {E1000_RDH(0), "RDH"},
 277         {E1000_RDT(0), "RDT"},
 278         {E1000_RXDCTL(0), "RXDCTL"},
 279         {E1000_RDBAL(0), "RDBAL"},
 280         {E1000_RDBAH(0), "RDBAH"},
 281
 282         /* TX Registers */
 283         {E1000_TCTL, "TCTL"},
 284         {E1000_TDBAL(0), "TDBAL"},
 285         {E1000_TDBAH(0), "TDBAH"},
 286         {E1000_TDLEN(0), "TDLEN"},
 287         {E1000_TDH(0), "TDH"},
 288         {E1000_TDT(0), "TDT"},
 289         {E1000_TXDCTL(0), "TXDCTL"},
 290         {E1000_TDFH, "TDFH"},
 291         {E1000_TDFT, "TDFT"},
 292         {E1000_TDFHS, "TDFHS"},
 293         {E1000_TDFPC, "TDFPC"},
 294
 295         /* List Terminator */
 296         {}
 297 };
 298
 299 /* igb_regdump - register printout routine */
 300 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 301 {
 302         int n = 0;
 303         char rname[16];
 304         u32 regs[8];
 305
 306         switch (reginfo->ofs) {
 307         case E1000_RDLEN(0):
 308                 for (n = 0; n < 4; n++)
 309                         regs[n] = rd32(E1000_RDLEN(n));
 310                 break;
 311         case E1000_RDH(0):
 312                 for (n = 0; n < 4; n++)
 313                         regs[n] = rd32(E1000_RDH(n));
 314                 break;
 315         case E1000_RDT(0):
 316                 for (n = 0; n < 4; n++)
 317                         regs[n] = rd32(E1000_RDT(n));
 318                 break;
 319         case E1000_RXDCTL(0):
 320                 for (n = 0; n < 4; n++)
 321                         regs[n] = rd32(E1000_RXDCTL(n));
 322                 break;
 323         case E1000_RDBAL(0):
 324                 for (n = 0; n < 4; n++)
 325                         regs[n] = rd32(E1000_RDBAL(n));
 326                 break;
 327         case E1000_RDBAH(0):
 328                 for (n = 0; n < 4; n++)
 329                         regs[n] = rd32(E1000_RDBAH(n));
 330                 break;
 331         case E1000_TDBAL(0):
 332                 for (n = 0; n < 4; n++)
 333                         regs[n] = rd32(E1000_RDBAL(n));
 334                 break;
 335         case E1000_TDBAH(0):
 336                 for (n = 0; n < 4; n++)
 337                         regs[n] = rd32(E1000_TDBAH(n));
 338                 break;
 339         case E1000_TDLEN(0):
 340                 for (n = 0; n < 4; n++)
 341                         regs[n] = rd32(E1000_TDLEN(n));
 342                 break;
 343         case E1000_TDH(0):
 344                 for (n = 0; n < 4; n++)
 345                         regs[n] = rd32(E1000_TDH(n));
 346                 break;
 347         case E1000_TDT(0):
 348                 for (n = 0; n < 4; n++)
 349                         regs[n] = rd32(E1000_TDT(n));
 350                 break;
 351         case E1000_TXDCTL(0):
 352                 for (n = 0; n < 4; n++)
 353                         regs[n] = rd32(E1000_TXDCTL(n));
 354                 break;
 355         default:
 356                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 357                 return;
 358         }
 359
 360         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 361         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 362                 regs[2], regs[3]);
 363 }
 364
 365 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 366 static void igb_dump(struct igb_adapter *adapter)
 367 {
 368         struct net_device *netdev = adapter->netdev;
 369         struct e1000_hw *hw = &adapter->hw;
 370         struct igb_reg_info *reginfo;
 371         struct igb_ring *tx_ring;
 372         union e1000_adv_tx_desc *tx_desc;
 373         struct my_u0 { u64 a; u64 b; } *u0;
 374         struct igb_ring *rx_ring;
 375         union e1000_adv_rx_desc *rx_desc;
 376         u32 staterr;
 377         u16 i, n;
 378
 379         if (!netif_msg_hw(adapter))
 380                 return;
 381
 382         /* Print netdevice Info */
 383         if (netdev) {
 384                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 385                 pr_info("Device Name     state            trans_start      "
 386                         "last_rx\n");
 387                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 388                         netdev->state, netdev->trans_start, netdev->last_rx);
 389         }
 390
 391         /* Print Registers */
 392         dev_info(&adapter->pdev->dev, "Register Dump\n");
 393         pr_info(" Register Name   Value\n");
 394         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 395              reginfo->name; reginfo++) {
 396                 igb_regdump(hw, reginfo);
 397         }
 398
 399         /* Print TX Ring Summary */
 400         if (!netdev || !netif_running(netdev))
 401                 goto exit;
 402
 403         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 404         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 405         for (n = 0; n < adapter->num_tx_queues; n++) {
 406                 struct igb_tx_buffer *buffer_info;
 407                 tx_ring = adapter->tx_ring[n];
 408                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 409                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 410                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 411                         (u64)dma_unmap_addr(buffer_info, dma),
 412                         dma_unmap_len(buffer_info, len),
 413                         buffer_info->next_to_watch,
 414                         (u64)buffer_info->time_stamp);
 415         }
 416
 417         /* Print TX Rings */
 418         if (!netif_msg_tx_done(adapter))
 419                 goto rx_ring_summary;
 420
 421         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 422
 423         /* Transmit Descriptor Formats
 424          *
 425          * Advanced Transmit Descriptor
 426          *   +--------------------------------------------------------------+
 427          * 0 |         Buffer Address [63:0]                                |
 428          *   +--------------------------------------------------------------+
 429          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 430          *   +--------------------------------------------------------------+
 431          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 432          */
 433
 434         for (n = 0; n < adapter->num_tx_queues; n++) {
 435                 tx_ring = adapter->tx_ring[n];
 436                 pr_info("------------------------------------\n");
 437                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 438                 pr_info("------------------------------------\n");
 439                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] "
 440                         "[bi->dma       ] leng  ntw timestamp        "
 441                         "bi->skb\n");
 442
 443                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 444                         const char *next_desc;
 445                         struct igb_tx_buffer *buffer_info;
 446                         tx_desc = IGB_TX_DESC(tx_ring, i);
 447                         buffer_info = &tx_ring->tx_buffer_info[i];
 448                         u0 = (struct my_u0 *)tx_desc;
 449                         if (i == tx_ring->next_to_use &&
 450                             i == tx_ring->next_to_clean)
 451                                 next_desc = " NTC/U";
 452                         else if (i == tx_ring->next_to_use)
 453                                 next_desc = " NTU";
 454                         else if (i == tx_ring->next_to_clean)
 455                                 next_desc = " NTC";
 456                         else
 457                                 next_desc = "";
 458
 459                         pr_info("T [0x%03X]    %016llX %016llX %016llX"
 460                                 " %04X  %p %016llX %p%s\n", i,
 461                                 le64_to_cpu(u0->a),
 462                                 le64_to_cpu(u0->b),
 463                                 (u64)dma_unmap_addr(buffer_info, dma),
 464                                 dma_unmap_len(buffer_info, len),
 465                                 buffer_info->next_to_watch,
 466                                 (u64)buffer_info->time_stamp,
 467                                 buffer_info->skb, next_desc);
 468
 469                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 470                                 print_hex_dump(KERN_INFO, "",
 471                                         DUMP_PREFIX_ADDRESS,
 472                                         16, 1, buffer_info->skb->data,
 473                                         dma_unmap_len(buffer_info, len),
 474                                         true);
 475                 }
 476         }
 477
 478         /* Print RX Rings Summary */
 479 rx_ring_summary:
 480         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 481         pr_info("Queue [NTU] [NTC]\n");
 482         for (n = 0; n < adapter->num_rx_queues; n++) {
 483                 rx_ring = adapter->rx_ring[n];
 484                 pr_info(" %5d %5X %5X\n",
 485                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 486         }
 487
 488         /* Print RX Rings */
 489         if (!netif_msg_rx_status(adapter))
 490                 goto exit;
 491
 492         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 493
 494         /* Advanced Receive Descriptor (Read) Format
 495          *    63                                           1        0
 496          *    +-----------------------------------------------------+
 497          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 498          *    +----------------------------------------------+------+
 499          *  8 |       Header Buffer Address [63:1]           |  DD  |
 500          *    +-----------------------------------------------------+
 501          *
 502          *
 503          * Advanced Receive Descriptor (Write-Back) Format
 504          *
 505          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 506          *   +------------------------------------------------------+
 507          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 508          *   | Checksum   Ident  |   |           |    | Type | Type |
 509          *   +------------------------------------------------------+
 510          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 511          *   +------------------------------------------------------+
 512          *   63       48 47    32 31            20 19               0
 513          */
 514
 515         for (n = 0; n < adapter->num_rx_queues; n++) {
 516                 rx_ring = adapter->rx_ring[n];
 517                 pr_info("------------------------------------\n");
 518                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 519                 pr_info("------------------------------------\n");
 520                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] "
 521                         "[bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 522                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] -----"
 523                         "----------- [bi->skb] <-- Adv Rx Write-Back format\n");
 524
 525                 for (i = 0; i < rx_ring->count; i++) {
 526                         const char *next_desc;
 527                         struct igb_rx_buffer *buffer_info;
 528                         buffer_info = &rx_ring->rx_buffer_info[i];
 529                         rx_desc = IGB_RX_DESC(rx_ring, i);
 530                         u0 = (struct my_u0 *)rx_desc;
 531                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 532
 533                         if (i == rx_ring->next_to_use)
 534                                 next_desc = " NTU";
 535                         else if (i == rx_ring->next_to_clean)
 536                                 next_desc = " NTC";
 537                         else
 538                                 next_desc = "";
 539
 540                         if (staterr & E1000_RXD_STAT_DD) {
 541                                 /* Descriptor Done */
 542                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 543                                         "RWB", i,
 544                                         le64_to_cpu(u0->a),
 545                                         le64_to_cpu(u0->b),
 546                                         next_desc);
 547                         } else {
 548                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 549                                         "R  ", i,
 550                                         le64_to_cpu(u0->a),
 551                                         le64_to_cpu(u0->b),
 552                                         (u64)buffer_info->dma,
 553                                         next_desc);
 554
 555                                 if (netif_msg_pktdata(adapter) &&
 556                                     buffer_info->dma && buffer_info->page) {
 557                                         print_hex_dump(KERN_INFO, "",
 558                                           DUMP_PREFIX_ADDRESS,
 559                                           16, 1,
 560                                           page_address(buffer_info->page) +
 561                                                       buffer_info->page_offset,
 562                                           IGB_RX_BUFSZ, true);
 563                                 }
 564                         }
 565                 }
 566         }
 567
 568 exit:
 569         return;
 570 }
 571
 572 /**
 573  *  igb_get_i2c_data - Reads the I2C SDA data bit
 574  *  @hw: pointer to hardware structure
 575  *  @i2cctl: Current value of I2CCTL register
 576  *
 577  *  Returns the I2C data bit value
 578  **/
 579 static int igb_get_i2c_data(void *data)
 580 {
 581         struct igb_adapter *adapter = (struct igb_adapter *)data;
 582         struct e1000_hw *hw = &adapter->hw;
 583         s32 i2cctl = rd32(E1000_I2CPARAMS);
 584
 585         return ((i2cctl & E1000_I2C_DATA_IN) != 0);
 586 }
 587
 588 /**
 589  *  igb_set_i2c_data - Sets the I2C data bit
 590  *  @data: pointer to hardware structure
 591  *  @state: I2C data value (0 or 1) to set
 592  *
 593  *  Sets the I2C data bit
 594  **/
 595 static void igb_set_i2c_data(void *data, int state)
 596 {
 597         struct igb_adapter *adapter = (struct igb_adapter *)data;
 598         struct e1000_hw *hw = &adapter->hw;
 599         s32 i2cctl = rd32(E1000_I2CPARAMS);
 600
 601         if (state)
 602                 i2cctl |= E1000_I2C_DATA_OUT;
 603         else
 604                 i2cctl &= ~E1000_I2C_DATA_OUT;
 605
 606         i2cctl &= ~E1000_I2C_DATA_OE_N;
 607         i2cctl |= E1000_I2C_CLK_OE_N;
 608         wr32(E1000_I2CPARAMS, i2cctl);
 609         wrfl();
 610
 611 }
 612
 613 /**
 614  *  igb_set_i2c_clk - Sets the I2C SCL clock
 615  *  @data: pointer to hardware structure
 616  *  @state: state to set clock
 617  *
 618  *  Sets the I2C clock line to state
 619  **/
 620 static void igb_set_i2c_clk(void *data, int state)
 621 {
 622         struct igb_adapter *adapter = (struct igb_adapter *)data;
 623         struct e1000_hw *hw = &adapter->hw;
 624         s32 i2cctl = rd32(E1000_I2CPARAMS);
 625
 626         if (state) {
 627                 i2cctl |= E1000_I2C_CLK_OUT;
 628                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 629         } else {
 630                 i2cctl &= ~E1000_I2C_CLK_OUT;
 631                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 632         }
 633         wr32(E1000_I2CPARAMS, i2cctl);
 634         wrfl();
 635 }
 636
 637 /**
 638  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 639  *  @data: pointer to hardware structure
 640  *
 641  *  Gets the I2C clock state
 642  **/
 643 static int igb_get_i2c_clk(void *data)
 644 {
 645         struct igb_adapter *adapter = (struct igb_adapter *)data;
 646         struct e1000_hw *hw = &adapter->hw;
 647         s32 i2cctl = rd32(E1000_I2CPARAMS);
 648
 649         return ((i2cctl & E1000_I2C_CLK_IN) != 0);
 650 }
 651
 652 static const struct i2c_algo_bit_data igb_i2c_algo = {
 653         .setsda         = igb_set_i2c_data,
 654         .setscl         = igb_set_i2c_clk,
 655         .getsda         = igb_get_i2c_data,
 656         .getscl         = igb_get_i2c_clk,
 657         .udelay         = 5,
 658         .timeout        = 20,
 659 };
 660
 661 /**
 662  *  igb_get_hw_dev - return device
 663  *  @hw: pointer to hardware structure
 664  *
 665  *  used by hardware layer to print debugging information
 666  **/
 667 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 668 {
 669         struct igb_adapter *adapter = hw->back;
 670         return adapter->netdev;
 671 }
 672
 673 /**
 674  *  igb_init_module - Driver Registration Routine
 675  *
 676  *  igb_init_module is the first routine called when the driver is
 677  *  loaded. All it does is register with the PCI subsystem.
 678  **/
 679 static int __init igb_init_module(void)
 680 {
 681         int ret;
 682         pr_info("%s - version %s\n",
 683                igb_driver_string, igb_driver_version);
 684
 685         pr_info("%s\n", igb_copyright);
 686
 687 #ifdef CONFIG_IGB_DCA
 688         dca_register_notify(&dca_notifier);
 689 #endif
 690         ret = pci_register_driver(&igb_driver);
 691         return ret;
 692 }
 693
 694 module_init(igb_init_module);
 695
 696 /**
 697  *  igb_exit_module - Driver Exit Cleanup Routine
 698  *
 699  *  igb_exit_module is called just before the driver is removed
 700  *  from memory.
 701  **/
 702 static void __exit igb_exit_module(void)
 703 {
 704 #ifdef CONFIG_IGB_DCA
 705         dca_unregister_notify(&dca_notifier);
 706 #endif
 707         pci_unregister_driver(&igb_driver);
 708 }
 709
 710 module_exit(igb_exit_module);
 711
 712 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 713 /**
 714  *  igb_cache_ring_register - Descriptor ring to register mapping
 715  *  @adapter: board private structure to initialize
 716  *
 717  *  Once we know the feature-set enabled for the device, we'll cache
 718  *  the register offset the descriptor ring is assigned to.
 719  **/
 720 static void igb_cache_ring_register(struct igb_adapter *adapter)
 721 {
 722         int i = 0, j = 0;
 723         u32 rbase_offset = adapter->vfs_allocated_count;
 724
 725         switch (adapter->hw.mac.type) {
 726         case e1000_82576:
 727                 /* The queues are allocated for virtualization such that VF 0
 728                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 729                  * In order to avoid collision we start at the first free queue
 730                  * and continue consuming queues in the same sequence
 731                  */
 732                 if (adapter->vfs_allocated_count) {
 733                         for (; i < adapter->rss_queues; i++)
 734                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 735                                                                Q_IDX_82576(i);
 736                 }
 737         case e1000_82575:
 738         case e1000_82580:
 739         case e1000_i350:
 740         case e1000_i354:
 741         case e1000_i210:
 742         case e1000_i211:
 743         default:
 744                 for (; i < adapter->num_rx_queues; i++)
 745                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 746                 for (; j < adapter->num_tx_queues; j++)
 747                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 748                 break;
 749         }
 750 }
 751
 752 /**
 753  *  igb_write_ivar - configure ivar for given MSI-X vector
 754  *  @hw: pointer to the HW structure
 755  *  @msix_vector: vector number we are allocating to a given ring
 756  *  @index: row index of IVAR register to write within IVAR table
 757  *  @offset: column offset of in IVAR, should be multiple of 8
 758  *
 759  *  This function is intended to handle the writing of the IVAR register
 760  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 761  *  each containing an cause allocation for an Rx and Tx ring, and a
 762  *  variable number of rows depending on the number of queues supported.
 763  **/
 764 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 765                            int index, int offset)
 766 {
 767         u32 ivar = array_rd32(E1000_IVAR0, index);
 768
 769         /* clear any bits that are currently set */
 770         ivar &= ~((u32)0xFF << offset);
 771
 772         /* write vector and valid bit */
 773         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 774
 775         array_wr32(E1000_IVAR0, index, ivar);
 776 }
 777
 778 #define IGB_N0_QUEUE -1
 779 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 780 {
 781         struct igb_adapter *adapter = q_vector->adapter;
 782         struct e1000_hw *hw = &adapter->hw;
 783         int rx_queue = IGB_N0_QUEUE;
 784         int tx_queue = IGB_N0_QUEUE;
 785         u32 msixbm = 0;
 786
 787         if (q_vector->rx.ring)
 788                 rx_queue = q_vector->rx.ring->reg_idx;
 789         if (q_vector->tx.ring)
 790                 tx_queue = q_vector->tx.ring->reg_idx;
 791
 792         switch (hw->mac.type) {
 793         case e1000_82575:
 794                 /* The 82575 assigns vectors using a bitmask, which matches the
 795                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 796                  * or more queues to a vector, we write the appropriate bits
 797                  * into the MSIXBM register for that vector.
 798                  */
 799                 if (rx_queue > IGB_N0_QUEUE)
 800                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 801                 if (tx_queue > IGB_N0_QUEUE)
 802                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 803                 if (!adapter->msix_entries && msix_vector == 0)
 804                         msixbm |= E1000_EIMS_OTHER;
 805                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 806                 q_vector->eims_value = msixbm;
 807                 break;
 808         case e1000_82576:
 809                 /* 82576 uses a table that essentially consists of 2 columns
 810                  * with 8 rows.  The ordering is column-major so we use the
 811                  * lower 3 bits as the row index, and the 4th bit as the
 812                  * column offset.
 813                  */
 814                 if (rx_queue > IGB_N0_QUEUE)
 815                         igb_write_ivar(hw, msix_vector,
 816                                        rx_queue & 0x7,
 817                                        (rx_queue & 0x8) << 1);
 818                 if (tx_queue > IGB_N0_QUEUE)
 819                         igb_write_ivar(hw, msix_vector,
 820                                        tx_queue & 0x7,
 821                                        ((tx_queue & 0x8) << 1) + 8);
 822                 q_vector->eims_value = 1 << msix_vector;
 823                 break;
 824         case e1000_82580:
 825         case e1000_i350:
 826         case e1000_i354:
 827         case e1000_i210:
 828         case e1000_i211:
 829                 /* On 82580 and newer adapters the scheme is similar to 82576
 830                  * however instead of ordering column-major we have things
 831                  * ordered row-major.  So we traverse the table by using
 832                  * bit 0 as the column offset, and the remaining bits as the
 833                  * row index.
 834                  */
 835                 if (rx_queue > IGB_N0_QUEUE)
 836                         igb_write_ivar(hw, msix_vector,
 837                                        rx_queue >> 1,
 838                                        (rx_queue & 0x1) << 4);
 839                 if (tx_queue > IGB_N0_QUEUE)
 840                         igb_write_ivar(hw, msix_vector,
 841                                        tx_queue >> 1,
 842                                        ((tx_queue & 0x1) << 4) + 8);
 843                 q_vector->eims_value = 1 << msix_vector;
 844                 break;
 845         default:
 846                 BUG();
 847                 break;
 848         }
 849
 850         /* add q_vector eims value to global eims_enable_mask */
 851         adapter->eims_enable_mask |= q_vector->eims_value;
 852
 853         /* configure q_vector to set itr on first interrupt */
 854         q_vector->set_itr = 1;
 855 }
 856
 857 /**
 858  *  igb_configure_msix - Configure MSI-X hardware
 859  *  @adapter: board private structure to initialize
 860  *
 861  *  igb_configure_msix sets up the hardware to properly
 862  *  generate MSI-X interrupts.
 863  **/
 864 static void igb_configure_msix(struct igb_adapter *adapter)
 865 {
 866         u32 tmp;
 867         int i, vector = 0;
 868         struct e1000_hw *hw = &adapter->hw;
 869
 870         adapter->eims_enable_mask = 0;
 871
 872         /* set vector for other causes, i.e. link changes */
 873         switch (hw->mac.type) {
 874         case e1000_82575:
 875                 tmp = rd32(E1000_CTRL_EXT);
 876                 /* enable MSI-X PBA support*/
 877                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 878
 879                 /* Auto-Mask interrupts upon ICR read. */
 880                 tmp |= E1000_CTRL_EXT_EIAME;
 881                 tmp |= E1000_CTRL_EXT_IRCA;
 882
 883                 wr32(E1000_CTRL_EXT, tmp);
 884
 885                 /* enable msix_other interrupt */
 886                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 887                 adapter->eims_other = E1000_EIMS_OTHER;
 888
 889                 break;
 890
 891         case e1000_82576:
 892         case e1000_82580:
 893         case e1000_i350:
 894         case e1000_i354:
 895         case e1000_i210:
 896         case e1000_i211:
 897                 /* Turn on MSI-X capability first, or our settings
 898                  * won't stick.  And it will take days to debug.
 899                  */
 900                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 901                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 902                      E1000_GPIE_NSICR);
 903
 904                 /* enable msix_other interrupt */
 905                 adapter->eims_other = 1 << vector;
 906                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 907
 908                 wr32(E1000_IVAR_MISC, tmp);
 909                 break;
 910         default:
 911                 /* do nothing, since nothing else supports MSI-X */
 912                 break;
 913         } /* switch (hw->mac.type) */
 914
 915         adapter->eims_enable_mask |= adapter->eims_other;
 916
 917         for (i = 0; i < adapter->num_q_vectors; i++)
 918                 igb_assign_vector(adapter->q_vector[i], vector++);
 919
 920         wrfl();
 921 }
 922
 923 /**
 924  *  igb_request_msix - Initialize MSI-X interrupts
 925  *  @adapter: board private structure to initialize
 926  *
 927  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 928  *  kernel.
 929  **/
 930 static int igb_request_msix(struct igb_adapter *adapter)
 931 {
 932         struct net_device *netdev = adapter->netdev;
 933         struct e1000_hw *hw = &adapter->hw;
 934         int i, err = 0, vector = 0, free_vector = 0;
 935
 936         err = request_irq(adapter->msix_entries[vector].vector,
 937                           igb_msix_other, 0, netdev->name, adapter);
 938         if (err)
 939                 goto err_out;
 940
 941         for (i = 0; i < adapter->num_q_vectors; i++) {
 942                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 943
 944                 vector++;
 945
 946                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 947
 948                 if (q_vector->rx.ring && q_vector->tx.ring)
 949                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 950                                 q_vector->rx.ring->queue_index);
 951                 else if (q_vector->tx.ring)
 952                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 953                                 q_vector->tx.ring->queue_index);
 954                 else if (q_vector->rx.ring)
 955                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 956                                 q_vector->rx.ring->queue_index);
 957                 else
 958                         sprintf(q_vector->name, "%s-unused", netdev->name);
 959
 960                 err = request_irq(adapter->msix_entries[vector].vector,
 961                                   igb_msix_ring, 0, q_vector->name,
 962                                   q_vector);
 963                 if (err)
 964                         goto err_free;
 965         }
 966
 967         igb_configure_msix(adapter);
 968         return 0;
 969
 970 err_free:
 971         /* free already assigned IRQs */
 972         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 973
 974         vector--;
 975         for (i = 0; i < vector; i++) {
 976                 free_irq(adapter->msix_entries[free_vector++].vector,
 977                          adapter->q_vector[i]);
 978         }
 979 err_out:
 980         return err;
 981 }
 982
 983 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 984 {
 985         if (adapter->msix_entries) {
 986                 pci_disable_msix(adapter->pdev);
 987                 kfree(adapter->msix_entries);
 988                 adapter->msix_entries = NULL;
 989         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
 990                 pci_disable_msi(adapter->pdev);
 991         }
 992 }
 993
 994 /**
 995  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
 996  *  @adapter: board private structure to initialize
 997  *  @v_idx: Index of vector to be freed
 998  *
 999  *  This function frees the memory allocated to the q_vector.  In addition if
1000  *  NAPI is enabled it will delete any references to the NAPI struct prior
1001  *  to freeing the q_vector.
1002  **/
1003 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1004 {
1005         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1006
1007         if (q_vector->tx.ring)
1008                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1009
1010         if (q_vector->rx.ring)
1011                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
1012
1013         adapter->q_vector[v_idx] = NULL;
1014         netif_napi_del(&q_vector->napi);
1015
1016         /* ixgbe_get_stats64() might access the rings on this vector,
1017          * we must wait a grace period before freeing it.
1018          */
1019         kfree_rcu(q_vector, rcu);
1020 }
1021
1022 /**
1023  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1024  *  @adapter: board private structure to initialize
1025  *
1026  *  This function frees the memory allocated to the q_vectors.  In addition if
1027  *  NAPI is enabled it will delete any references to the NAPI struct prior
1028  *  to freeing the q_vector.
1029  **/
1030 static void igb_free_q_vectors(struct igb_adapter *adapter)
1031 {
1032         int v_idx = adapter->num_q_vectors;
1033
1034         adapter->num_tx_queues = 0;
1035         adapter->num_rx_queues = 0;
1036         adapter->num_q_vectors = 0;
1037
1038         while (v_idx--)
1039                 igb_free_q_vector(adapter, v_idx);
1040 }
1041
1042 /**
1043  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1044  *  @adapter: board private structure to initialize
1045  *
1046  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1047  *  MSI-X interrupts allocated.
1048  */
1049 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1050 {
1051         igb_free_q_vectors(adapter);
1052         igb_reset_interrupt_capability(adapter);
1053 }
1054
1055 /**
1056  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1057  *  @adapter: board private structure to initialize
1058  *  @msix: boolean value of MSIX capability
1059  *
1060  *  Attempt to configure interrupts using the best available
1061  *  capabilities of the hardware and kernel.
1062  **/
1063 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1064 {
1065         int err;
1066         int numvecs, i;
1067
1068         if (!msix)
1069                 goto msi_only;
1070
1071         /* Number of supported queues. */
1072         adapter->num_rx_queues = adapter->rss_queues;
1073         if (adapter->vfs_allocated_count)
1074                 adapter->num_tx_queues = 1;
1075         else
1076                 adapter->num_tx_queues = adapter->rss_queues;
1077
1078         /* start with one vector for every Rx queue */
1079         numvecs = adapter->num_rx_queues;
1080
1081         /* if Tx handler is separate add 1 for every Tx queue */
1082         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1083                 numvecs += adapter->num_tx_queues;
1084
1085         /* store the number of vectors reserved for queues */
1086         adapter->num_q_vectors = numvecs;
1087
1088         /* add 1 vector for link status interrupts */
1089         numvecs++;
1090         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
1091                                         GFP_KERNEL);
1092
1093         if (!adapter->msix_entries)
1094                 goto msi_only;
1095
1096         for (i = 0; i < numvecs; i++)
1097                 adapter->msix_entries[i].entry = i;
1098
1099         err = pci_enable_msix(adapter->pdev,
1100                               adapter->msix_entries,
1101                               numvecs);
1102         if (err == 0)
1103                 return;
1104
1105         igb_reset_interrupt_capability(adapter);
1106
1107         /* If we can't do MSI-X, try MSI */
1108 msi_only:
1109 #ifdef CONFIG_PCI_IOV
1110         /* disable SR-IOV for non MSI-X configurations */
1111         if (adapter->vf_data) {
1112                 struct e1000_hw *hw = &adapter->hw;
1113                 /* disable iov and allow time for transactions to clear */
1114                 pci_disable_sriov(adapter->pdev);
1115                 msleep(500);
1116
1117                 kfree(adapter->vf_data);
1118                 adapter->vf_data = NULL;
1119                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1120                 wrfl();
1121                 msleep(100);
1122                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1123         }
1124 #endif
1125         adapter->vfs_allocated_count = 0;
1126         adapter->rss_queues = 1;
1127         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1128         adapter->num_rx_queues = 1;
1129         adapter->num_tx_queues = 1;
1130         adapter->num_q_vectors = 1;
1131         if (!pci_enable_msi(adapter->pdev))
1132                 adapter->flags |= IGB_FLAG_HAS_MSI;
1133 }
1134
1135 static void igb_add_ring(struct igb_ring *ring,
1136                          struct igb_ring_container *head)
1137 {
1138         head->ring = ring;
1139         head->count++;
1140 }
1141
1142 /**
1143  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1144  *  @adapter: board private structure to initialize
1145  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1146  *  @v_idx: index of vector in adapter struct
1147  *  @txr_count: total number of Tx rings to allocate
1148  *  @txr_idx: index of first Tx ring to allocate
1149  *  @rxr_count: total number of Rx rings to allocate
1150  *  @rxr_idx: index of first Rx ring to allocate
1151  *
1152  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1153  **/
1154 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1155                               int v_count, int v_idx,
1156                               int txr_count, int txr_idx,
1157                               int rxr_count, int rxr_idx)
1158 {
1159         struct igb_q_vector *q_vector;
1160         struct igb_ring *ring;
1161         int ring_count, size;
1162
1163         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1164         if (txr_count > 1 || rxr_count > 1)
1165                 return -ENOMEM;
1166
1167         ring_count = txr_count + rxr_count;
1168         size = sizeof(struct igb_q_vector) +
1169                (sizeof(struct igb_ring) * ring_count);
1170
1171         /* allocate q_vector and rings */
1172         q_vector = kzalloc(size, GFP_KERNEL);
1173         if (!q_vector)
1174                 return -ENOMEM;
1175
1176         /* initialize NAPI */
1177         netif_napi_add(adapter->netdev, &q_vector->napi,
1178                        igb_poll, 64);
1179
1180         /* tie q_vector and adapter together */
1181         adapter->q_vector[v_idx] = q_vector;
1182         q_vector->adapter = adapter;
1183
1184         /* initialize work limits */
1185         q_vector->tx.work_limit = adapter->tx_work_limit;
1186
1187         /* initialize ITR configuration */
1188         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1189         q_vector->itr_val = IGB_START_ITR;
1190
1191         /* initialize pointer to rings */
1192         ring = q_vector->ring;
1193
1194         /* intialize ITR */
1195         if (rxr_count) {
1196                 /* rx or rx/tx vector */
1197                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1198                         q_vector->itr_val = adapter->rx_itr_setting;
1199         } else {
1200                 /* tx only vector */
1201                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1202                         q_vector->itr_val = adapter->tx_itr_setting;
1203         }
1204
1205         if (txr_count) {
1206                 /* assign generic ring traits */
1207                 ring->dev = &adapter->pdev->dev;
1208                 ring->netdev = adapter->netdev;
1209
1210                 /* configure backlink on ring */
1211                 ring->q_vector = q_vector;
1212
1213                 /* update q_vector Tx values */
1214                 igb_add_ring(ring, &q_vector->tx);
1215
1216                 /* For 82575, context index must be unique per ring. */
1217                 if (adapter->hw.mac.type == e1000_82575)
1218                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1219
1220                 /* apply Tx specific ring traits */
1221                 ring->count = adapter->tx_ring_count;
1222                 ring->queue_index = txr_idx;
1223
1224                 /* assign ring to adapter */
1225                 adapter->tx_ring[txr_idx] = ring;
1226
1227                 /* push pointer to next ring */
1228                 ring++;
1229         }
1230
1231         if (rxr_count) {
1232                 /* assign generic ring traits */
1233                 ring->dev = &adapter->pdev->dev;
1234                 ring->netdev = adapter->netdev;
1235
1236                 /* configure backlink on ring */
1237                 ring->q_vector = q_vector;
1238
1239                 /* update q_vector Rx values */
1240                 igb_add_ring(ring, &q_vector->rx);
1241
1242                 /* set flag indicating ring supports SCTP checksum offload */
1243                 if (adapter->hw.mac.type >= e1000_82576)
1244                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1245
1246                 /*
1247                  * On i350, i354, i210, and i211, loopback VLAN packets
1248                  * have the tag byte-swapped.
1249                  */
1250                 if (adapter->hw.mac.type >= e1000_i350)
1251                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1252
1253                 /* apply Rx specific ring traits */
1254                 ring->count = adapter->rx_ring_count;
1255                 ring->queue_index = rxr_idx;
1256
1257                 /* assign ring to adapter */
1258                 adapter->rx_ring[rxr_idx] = ring;
1259         }
1260
1261         return 0;
1262 }
1263
1264
1265 /**
1266  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1267  *  @adapter: board private structure to initialize
1268  *
1269  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1270  *  return -ENOMEM.
1271  **/
1272 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1273 {
1274         int q_vectors = adapter->num_q_vectors;
1275         int rxr_remaining = adapter->num_rx_queues;
1276         int txr_remaining = adapter->num_tx_queues;
1277         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1278         int err;
1279
1280         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1281                 for (; rxr_remaining; v_idx++) {
1282                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1283                                                  0, 0, 1, rxr_idx);
1284
1285                         if (err)
1286                                 goto err_out;
1287
1288                         /* update counts and index */
1289                         rxr_remaining--;
1290                         rxr_idx++;
1291                 }
1292         }
1293
1294         for (; v_idx < q_vectors; v_idx++) {
1295                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1296                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1297                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1298                                          tqpv, txr_idx, rqpv, rxr_idx);
1299
1300                 if (err)
1301                         goto err_out;
1302
1303                 /* update counts and index */
1304                 rxr_remaining -= rqpv;
1305                 txr_remaining -= tqpv;
1306                 rxr_idx++;
1307                 txr_idx++;
1308         }
1309
1310         return 0;
1311
1312 err_out:
1313         adapter->num_tx_queues = 0;
1314         adapter->num_rx_queues = 0;
1315         adapter->num_q_vectors = 0;
1316
1317         while (v_idx--)
1318                 igb_free_q_vector(adapter, v_idx);
1319
1320         return -ENOMEM;
1321 }
1322
1323 /**
1324  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1325  *  @adapter: board private structure to initialize
1326  *  @msix: boolean value of MSIX capability
1327  *
1328  *  This function initializes the interrupts and allocates all of the queues.
1329  **/
1330 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1331 {
1332         struct pci_dev *pdev = adapter->pdev;
1333         int err;
1334
1335         igb_set_interrupt_capability(adapter, msix);
1336
1337         err = igb_alloc_q_vectors(adapter);
1338         if (err) {
1339                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1340                 goto err_alloc_q_vectors;
1341         }
1342
1343         igb_cache_ring_register(adapter);
1344
1345         return 0;
1346
1347 err_alloc_q_vectors:
1348         igb_reset_interrupt_capability(adapter);
1349         return err;
1350 }
1351
1352 /**
1353  *  igb_request_irq - initialize interrupts
1354  *  @adapter: board private structure to initialize
1355  *
1356  *  Attempts to configure interrupts using the best available
1357  *  capabilities of the hardware and kernel.
1358  **/
1359 static int igb_request_irq(struct igb_adapter *adapter)
1360 {
1361         struct net_device *netdev = adapter->netdev;
1362         struct pci_dev *pdev = adapter->pdev;
1363         int err = 0;
1364
1365         if (adapter->msix_entries) {
1366                 err = igb_request_msix(adapter);
1367                 if (!err)
1368                         goto request_done;
1369                 /* fall back to MSI */
1370                 igb_free_all_tx_resources(adapter);
1371                 igb_free_all_rx_resources(adapter);
1372
1373                 igb_clear_interrupt_scheme(adapter);
1374                 err = igb_init_interrupt_scheme(adapter, false);
1375                 if (err)
1376                         goto request_done;
1377
1378                 igb_setup_all_tx_resources(adapter);
1379                 igb_setup_all_rx_resources(adapter);
1380                 igb_configure(adapter);
1381         }
1382
1383         igb_assign_vector(adapter->q_vector[0], 0);
1384
1385         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1386                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1387                                   netdev->name, adapter);
1388                 if (!err)
1389                         goto request_done;
1390
1391                 /* fall back to legacy interrupts */
1392                 igb_reset_interrupt_capability(adapter);
1393                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1394         }
1395
1396         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1397                           netdev->name, adapter);
1398
1399         if (err)
1400                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1401                         err);
1402
1403 request_done:
1404         return err;
1405 }
1406
1407 static void igb_free_irq(struct igb_adapter *adapter)
1408 {
1409         if (adapter->msix_entries) {
1410                 int vector = 0, i;
1411
1412                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1413
1414                 for (i = 0; i < adapter->num_q_vectors; i++)
1415                         free_irq(adapter->msix_entries[vector++].vector,
1416                                  adapter->q_vector[i]);
1417         } else {
1418                 free_irq(adapter->pdev->irq, adapter);
1419         }
1420 }
1421
1422 /**
1423  *  igb_irq_disable - Mask off interrupt generation on the NIC
1424  *  @adapter: board private structure
1425  **/
1426 static void igb_irq_disable(struct igb_adapter *adapter)
1427 {
1428         struct e1000_hw *hw = &adapter->hw;
1429
1430         /* we need to be careful when disabling interrupts.  The VFs are also
1431          * mapped into these registers and so clearing the bits can cause
1432          * issues on the VF drivers so we only need to clear what we set
1433          */
1434         if (adapter->msix_entries) {
1435                 u32 regval = rd32(E1000_EIAM);
1436                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1437                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1438                 regval = rd32(E1000_EIAC);
1439                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1440         }
1441
1442         wr32(E1000_IAM, 0);
1443         wr32(E1000_IMC, ~0);
1444         wrfl();
1445         if (adapter->msix_entries) {
1446                 int i;
1447                 for (i = 0; i < adapter->num_q_vectors; i++)
1448                         synchronize_irq(adapter->msix_entries[i].vector);
1449         } else {
1450                 synchronize_irq(adapter->pdev->irq);
1451         }
1452 }
1453
1454 /**
1455  *  igb_irq_enable - Enable default interrupt generation settings
1456  *  @adapter: board private structure
1457  **/
1458 static void igb_irq_enable(struct igb_adapter *adapter)
1459 {
1460         struct e1000_hw *hw = &adapter->hw;
1461
1462         if (adapter->msix_entries) {
1463                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1464                 u32 regval = rd32(E1000_EIAC);
1465                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1466                 regval = rd32(E1000_EIAM);
1467                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1468                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1469                 if (adapter->vfs_allocated_count) {
1470                         wr32(E1000_MBVFIMR, 0xFF);
1471                         ims |= E1000_IMS_VMMB;
1472                 }
1473                 wr32(E1000_IMS, ims);
1474         } else {
1475                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1476                                 E1000_IMS_DRSTA);
1477                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1478                                 E1000_IMS_DRSTA);
1479         }
1480 }
1481
1482 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1483 {
1484         struct e1000_hw *hw = &adapter->hw;
1485         u16 vid = adapter->hw.mng_cookie.vlan_id;
1486         u16 old_vid = adapter->mng_vlan_id;
1487
1488         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1489                 /* add VID to filter table */
1490                 igb_vfta_set(hw, vid, true);
1491                 adapter->mng_vlan_id = vid;
1492         } else {
1493                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1494         }
1495
1496         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1497             (vid != old_vid) &&
1498             !test_bit(old_vid, adapter->active_vlans)) {
1499                 /* remove VID from filter table */
1500                 igb_vfta_set(hw, old_vid, false);
1501         }
1502 }
1503
1504 /**
1505  *  igb_release_hw_control - release control of the h/w to f/w
1506  *  @adapter: address of board private structure
1507  *
1508  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1509  *  For ASF and Pass Through versions of f/w this means that the
1510  *  driver is no longer loaded.
1511  **/
1512 static void igb_release_hw_control(struct igb_adapter *adapter)
1513 {
1514         struct e1000_hw *hw = &adapter->hw;
1515         u32 ctrl_ext;
1516
1517         /* Let firmware take over control of h/w */
1518         ctrl_ext = rd32(E1000_CTRL_EXT);
1519         wr32(E1000_CTRL_EXT,
1520                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1521 }
1522
1523 /**
1524  *  igb_get_hw_control - get control of the h/w from f/w
1525  *  @adapter: address of board private structure
1526  *
1527  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1528  *  For ASF and Pass Through versions of f/w this means that
1529  *  the driver is loaded.
1530  **/
1531 static void igb_get_hw_control(struct igb_adapter *adapter)
1532 {
1533         struct e1000_hw *hw = &adapter->hw;
1534         u32 ctrl_ext;
1535
1536         /* Let firmware know the driver has taken over */
1537         ctrl_ext = rd32(E1000_CTRL_EXT);
1538         wr32(E1000_CTRL_EXT,
1539                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1540 }
1541
1542 /**
1543  *  igb_configure - configure the hardware for RX and TX
1544  *  @adapter: private board structure
1545  **/
1546 static void igb_configure(struct igb_adapter *adapter)
1547 {
1548         struct net_device *netdev = adapter->netdev;
1549         int i;
1550
1551         igb_get_hw_control(adapter);
1552         igb_set_rx_mode(netdev);
1553
1554         igb_restore_vlan(adapter);
1555
1556         igb_setup_tctl(adapter);
1557         igb_setup_mrqc(adapter);
1558         igb_setup_rctl(adapter);
1559
1560         igb_configure_tx(adapter);
1561         igb_configure_rx(adapter);
1562
1563         igb_rx_fifo_flush_82575(&adapter->hw);
1564
1565         /* call igb_desc_unused which always leaves
1566          * at least 1 descriptor unused to make sure
1567          * next_to_use != next_to_clean
1568          */
1569         for (i = 0; i < adapter->num_rx_queues; i++) {
1570                 struct igb_ring *ring = adapter->rx_ring[i];
1571                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1572         }
1573 }
1574
1575 /**
1576  *  igb_power_up_link - Power up the phy/serdes link
1577  *  @adapter: address of board private structure
1578  **/
1579 void igb_power_up_link(struct igb_adapter *adapter)
1580 {
1581         igb_reset_phy(&adapter->hw);
1582
1583         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1584                 igb_power_up_phy_copper(&adapter->hw);
1585         else
1586                 igb_power_up_serdes_link_82575(&adapter->hw);
1587 }
1588
1589 /**
1590  *  igb_power_down_link - Power down the phy/serdes link
1591  *  @adapter: address of board private structure
1592  */
1593 static void igb_power_down_link(struct igb_adapter *adapter)
1594 {
1595         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1596                 igb_power_down_phy_copper_82575(&adapter->hw);
1597         else
1598                 igb_shutdown_serdes_link_82575(&adapter->hw);
1599 }
1600
1601 /**
1602  *  igb_up - Open the interface and prepare it to handle traffic
1603  *  @adapter: board private structure
1604  **/
1605 int igb_up(struct igb_adapter *adapter)
1606 {
1607         struct e1000_hw *hw = &adapter->hw;
1608         int i;
1609
1610         /* hardware has been reset, we need to reload some things */
1611         igb_configure(adapter);
1612
1613         clear_bit(__IGB_DOWN, &adapter->state);
1614
1615         for (i = 0; i < adapter->num_q_vectors; i++)
1616                 napi_enable(&(adapter->q_vector[i]->napi));
1617
1618         if (adapter->msix_entries)
1619                 igb_configure_msix(adapter);
1620         else
1621                 igb_assign_vector(adapter->q_vector[0], 0);
1622
1623         /* Clear any pending interrupts. */
1624         rd32(E1000_ICR);
1625         igb_irq_enable(adapter);
1626
1627         /* notify VFs that reset has been completed */
1628         if (adapter->vfs_allocated_count) {
1629                 u32 reg_data = rd32(E1000_CTRL_EXT);
1630                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1631                 wr32(E1000_CTRL_EXT, reg_data);
1632         }
1633
1634         netif_tx_start_all_queues(adapter->netdev);
1635
1636         /* start the watchdog. */
1637         hw->mac.get_link_status = 1;
1638         schedule_work(&adapter->watchdog_task);
1639
1640         return 0;
1641 }
1642
1643 void igb_down(struct igb_adapter *adapter)
1644 {
1645         struct net_device *netdev = adapter->netdev;
1646         struct e1000_hw *hw = &adapter->hw;
1647         u32 tctl, rctl;
1648         int i;
1649
1650         /* signal that we're down so the interrupt handler does not
1651          * reschedule our watchdog timer
1652          */
1653         set_bit(__IGB_DOWN, &adapter->state);
1654
1655         /* disable receives in the hardware */
1656         rctl = rd32(E1000_RCTL);
1657         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1658         /* flush and sleep below */
1659
1660         netif_tx_stop_all_queues(netdev);
1661
1662         /* disable transmits in the hardware */
1663         tctl = rd32(E1000_TCTL);
1664         tctl &= ~E1000_TCTL_EN;
1665         wr32(E1000_TCTL, tctl);
1666         /* flush both disables and wait for them to finish */
1667         wrfl();
1668         msleep(10);
1669
1670         for (i = 0; i < adapter->num_q_vectors; i++)
1671                 napi_disable(&(adapter->q_vector[i]->napi));
1672
1673         igb_irq_disable(adapter);
1674
1675         del_timer_sync(&adapter->watchdog_timer);
1676         del_timer_sync(&adapter->phy_info_timer);
1677
1678         netif_carrier_off(netdev);
1679
1680         /* record the stats before reset*/
1681         spin_lock(&adapter->stats64_lock);
1682         igb_update_stats(adapter, &adapter->stats64);
1683         spin_unlock(&adapter->stats64_lock);
1684
1685         adapter->link_speed = 0;
1686         adapter->link_duplex = 0;
1687
1688         if (!pci_channel_offline(adapter->pdev))
1689                 igb_reset(adapter);
1690         igb_clean_all_tx_rings(adapter);
1691         igb_clean_all_rx_rings(adapter);
1692 #ifdef CONFIG_IGB_DCA
1693
1694         /* since we reset the hardware DCA settings were cleared */
1695         igb_setup_dca(adapter);
1696 #endif
1697 }
1698
1699 void igb_reinit_locked(struct igb_adapter *adapter)
1700 {
1701         WARN_ON(in_interrupt());
1702         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1703                 msleep(1);
1704         igb_down(adapter);
1705         igb_up(adapter);
1706         clear_bit(__IGB_RESETTING, &adapter->state);
1707 }
1708
1709 void igb_reset(struct igb_adapter *adapter)
1710 {
1711         struct pci_dev *pdev = adapter->pdev;
1712         struct e1000_hw *hw = &adapter->hw;
1713         struct e1000_mac_info *mac = &hw->mac;
1714         struct e1000_fc_info *fc = &hw->fc;
1715         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1716
1717         /* Repartition Pba for greater than 9k mtu
1718          * To take effect CTRL.RST is required.
1719          */
1720         switch (mac->type) {
1721         case e1000_i350:
1722         case e1000_i354:
1723         case e1000_82580:
1724                 pba = rd32(E1000_RXPBS);
1725                 pba = igb_rxpbs_adjust_82580(pba);
1726                 break;
1727         case e1000_82576:
1728                 pba = rd32(E1000_RXPBS);
1729                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1730                 break;
1731         case e1000_82575:
1732         case e1000_i210:
1733         case e1000_i211:
1734         default:
1735                 pba = E1000_PBA_34K;
1736                 break;
1737         }
1738
1739         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1740             (mac->type < e1000_82576)) {
1741                 /* adjust PBA for jumbo frames */
1742                 wr32(E1000_PBA, pba);
1743
1744                 /* To maintain wire speed transmits, the Tx FIFO should be
1745                  * large enough to accommodate two full transmit packets,
1746                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1747                  * the Rx FIFO should be large enough to accommodate at least
1748                  * one full receive packet and is similarly rounded up and
1749                  * expressed in KB.
1750                  */
1751                 pba = rd32(E1000_PBA);
1752                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1753                 tx_space = pba >> 16;
1754                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1755                 pba &= 0xffff;
1756                 /* the Tx fifo also stores 16 bytes of information about the Tx
1757                  * but don't include ethernet FCS because hardware appends it
1758                  */
1759                 min_tx_space = (adapter->max_frame_size +
1760                                 sizeof(union e1000_adv_tx_desc) -
1761                                 ETH_FCS_LEN) * 2;
1762                 min_tx_space = ALIGN(min_tx_space, 1024);
1763                 min_tx_space >>= 10;
1764                 /* software strips receive CRC, so leave room for it */
1765                 min_rx_space = adapter->max_frame_size;
1766                 min_rx_space = ALIGN(min_rx_space, 1024);
1767                 min_rx_space >>= 10;
1768
1769                 /* If current Tx allocation is less than the min Tx FIFO size,
1770                  * and the min Tx FIFO size is less than the current Rx FIFO
1771                  * allocation, take space away from current Rx allocation
1772                  */
1773                 if (tx_space < min_tx_space &&
1774                     ((min_tx_space - tx_space) < pba)) {
1775                         pba = pba - (min_tx_space - tx_space);
1776
1777                         /* if short on Rx space, Rx wins and must trump Tx
1778                          * adjustment
1779                          */
1780                         if (pba < min_rx_space)
1781                                 pba = min_rx_space;
1782                 }
1783                 wr32(E1000_PBA, pba);
1784         }
1785
1786         /* flow control settings */
1787         /* The high water mark must be low enough to fit one full frame
1788          * (or the size used for early receive) above it in the Rx FIFO.
1789          * Set it to the lower of:
1790          * - 90% of the Rx FIFO size, or
1791          * - the full Rx FIFO size minus one full frame
1792          */
1793         hwm = min(((pba << 10) * 9 / 10),
1794                         ((pba << 10) - 2 * adapter->max_frame_size));
1795
1796         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1797         fc->low_water = fc->high_water - 16;
1798         fc->pause_time = 0xFFFF;
1799         fc->send_xon = 1;
1800         fc->current_mode = fc->requested_mode;
1801
1802         /* disable receive for all VFs and wait one second */
1803         if (adapter->vfs_allocated_count) {
1804                 int i;
1805                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1806                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1807
1808                 /* ping all the active vfs to let them know we are going down */
1809                 igb_ping_all_vfs(adapter);
1810
1811                 /* disable transmits and receives */
1812                 wr32(E1000_VFRE, 0);
1813                 wr32(E1000_VFTE, 0);
1814         }
1815
1816         /* Allow time for pending master requests to run */
1817         hw->mac.ops.reset_hw(hw);
1818         wr32(E1000_WUC, 0);
1819
1820         if (hw->mac.ops.init_hw(hw))
1821                 dev_err(&pdev->dev, "Hardware Error\n");
1822
1823         /* Flow control settings reset on hardware reset, so guarantee flow
1824          * control is off when forcing speed.
1825          */
1826         if (!hw->mac.autoneg)
1827                 igb_force_mac_fc(hw);
1828
1829         igb_init_dmac(adapter, pba);
1830 #ifdef CONFIG_IGB_HWMON
1831         /* Re-initialize the thermal sensor on i350 devices. */
1832         if (!test_bit(__IGB_DOWN, &adapter->state)) {
1833                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
1834                         /* If present, re-initialize the external thermal sensor
1835                          * interface.
1836                          */
1837                         if (adapter->ets)
1838                                 mac->ops.init_thermal_sensor_thresh(hw);
1839                 }
1840         }
1841 #endif
1842         if (!netif_running(adapter->netdev))
1843                 igb_power_down_link(adapter);
1844
1845         igb_update_mng_vlan(adapter);
1846
1847         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1848         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
1849
1850         /* Re-enable PTP, where applicable. */
1851         igb_ptp_reset(adapter);
1852
1853         igb_get_phy_info(hw);
1854 }
1855
1856 static netdev_features_t igb_fix_features(struct net_device *netdev,
1857         netdev_features_t features)
1858 {
1859         /* Since there is no support for separate Rx/Tx vlan accel
1860          * enable/disable make sure Tx flag is always in same state as Rx.
1861          */
1862         if (features & NETIF_F_HW_VLAN_CTAG_RX)
1863                 features |= NETIF_F_HW_VLAN_CTAG_TX;
1864         else
1865                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
1866
1867         return features;
1868 }
1869
1870 static int igb_set_features(struct net_device *netdev,
1871         netdev_features_t features)
1872 {
1873         netdev_features_t changed = netdev->features ^ features;
1874         struct igb_adapter *adapter = netdev_priv(netdev);
1875
1876         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
1877                 igb_vlan_mode(netdev, features);
1878
1879         if (!(changed & NETIF_F_RXALL))
1880                 return 0;
1881
1882         netdev->features = features;
1883
1884         if (netif_running(netdev))
1885                 igb_reinit_locked(adapter);
1886         else
1887                 igb_reset(adapter);
1888
1889         return 0;
1890 }
1891
1892 static const struct net_device_ops igb_netdev_ops = {
1893         .ndo_open               = igb_open,
1894         .ndo_stop               = igb_close,
1895         .ndo_start_xmit         = igb_xmit_frame,
1896         .ndo_get_stats64        = igb_get_stats64,
1897         .ndo_set_rx_mode        = igb_set_rx_mode,
1898         .ndo_set_mac_address    = igb_set_mac,
1899         .ndo_change_mtu         = igb_change_mtu,
1900         .ndo_do_ioctl           = igb_ioctl,
1901         .ndo_tx_timeout         = igb_tx_timeout,
1902         .ndo_validate_addr      = eth_validate_addr,
1903         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
1904         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
1905         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
1906         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
1907         .ndo_set_vf_tx_rate     = igb_ndo_set_vf_bw,
1908         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
1909         .ndo_get_vf_config      = igb_ndo_get_vf_config,
1910 #ifdef CONFIG_NET_POLL_CONTROLLER
1911         .ndo_poll_controller    = igb_netpoll,
1912 #endif
1913         .ndo_fix_features       = igb_fix_features,
1914         .ndo_set_features       = igb_set_features,
1915 };
1916
1917 /**
1918  * igb_set_fw_version - Configure version string for ethtool
1919  * @adapter: adapter struct
1920  **/
1921 void igb_set_fw_version(struct igb_adapter *adapter)
1922 {
1923         struct e1000_hw *hw = &adapter->hw;
1924         struct e1000_fw_version fw;
1925
1926         igb_get_fw_version(hw, &fw);
1927
1928         switch (hw->mac.type) {
1929         case e1000_i211:
1930                 snprintf(adapter->fw_version, sizeof(adapter->fw_version),
1931                          "%2d.%2d-%d",
1932                          fw.invm_major, fw.invm_minor, fw.invm_img_type);
1933                 break;
1934
1935         default:
1936                 /* if option is rom valid, display its version too */
1937                 if (fw.or_valid) {
1938                         snprintf(adapter->fw_version,
1939                                  sizeof(adapter->fw_version),
1940                                  "%d.%d, 0x%08x, %d.%d.%d",
1941                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
1942                                  fw.or_major, fw.or_build, fw.or_patch);
1943                 /* no option rom */
1944                 } else {
1945                         snprintf(adapter->fw_version,
1946                                  sizeof(adapter->fw_version),
1947                                  "%d.%d, 0x%08x",
1948                                  fw.eep_major, fw.eep_minor, fw.etrack_id);
1949                 }
1950                 break;
1951         }
1952         return;
1953 }
1954
1955 /**
1956  *  igb_init_i2c - Init I2C interface
1957  *  @adapter: pointer to adapter structure
1958  **/
1959 static s32 igb_init_i2c(struct igb_adapter *adapter)
1960 {
1961         s32 status = E1000_SUCCESS;
1962
1963         /* I2C interface supported on i350 devices */
1964         if (adapter->hw.mac.type != e1000_i350)
1965                 return E1000_SUCCESS;
1966
1967         /* Initialize the i2c bus which is controlled by the registers.
1968          * This bus will use the i2c_algo_bit structue that implements
1969          * the protocol through toggling of the 4 bits in the register.
1970          */
1971         adapter->i2c_adap.owner = THIS_MODULE;
1972         adapter->i2c_algo = igb_i2c_algo;
1973         adapter->i2c_algo.data = adapter;
1974         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1975         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1976         strlcpy(adapter->i2c_adap.name, "igb BB",
1977                 sizeof(adapter->i2c_adap.name));
1978         status = i2c_bit_add_bus(&adapter->i2c_adap);
1979         return status;
1980 }
1981
1982 /**
1983  *  igb_probe - Device Initialization Routine
1984  *  @pdev: PCI device information struct
1985  *  @ent: entry in igb_pci_tbl
1986  *
1987  *  Returns 0 on success, negative on failure
1988  *
1989  *  igb_probe initializes an adapter identified by a pci_dev structure.
1990  *  The OS initialization, configuring of the adapter private structure,
1991  *  and a hardware reset occur.
1992  **/
1993 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1994 {
1995         struct net_device *netdev;
1996         struct igb_adapter *adapter;
1997         struct e1000_hw *hw;
1998         u16 eeprom_data = 0;
1999         s32 ret_val;
2000         static int global_quad_port_a; /* global quad port a indication */
2001         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2002         unsigned long mmio_start, mmio_len;
2003         int err, pci_using_dac;
2004         u8 part_str[E1000_PBANUM_LENGTH];
2005
2006         /* Catch broken hardware that put the wrong VF device ID in
2007          * the PCIe SR-IOV capability.
2008          */
2009         if (pdev->is_virtfn) {
2010                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2011                         pci_name(pdev), pdev->vendor, pdev->device);
2012                 return -EINVAL;
2013         }
2014
2015         err = pci_enable_device_mem(pdev);
2016         if (err)
2017                 return err;
2018
2019         pci_using_dac = 0;
2020         err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
2021         if (!err) {
2022                 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
2023                 if (!err)
2024                         pci_using_dac = 1;
2025         } else {
2026                 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
2027                 if (err) {
2028                         err = dma_set_coherent_mask(&pdev->dev,
2029                                                     DMA_BIT_MASK(32));
2030                         if (err) {
2031                                 dev_err(&pdev->dev,
2032                                         "No usable DMA configuration, aborting\n");
2033                                 goto err_dma;
2034                         }
2035                 }
2036         }
2037
2038         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
2039                                            IORESOURCE_MEM),
2040                                            igb_driver_name);
2041         if (err)
2042                 goto err_pci_reg;
2043
2044         pci_enable_pcie_error_reporting(pdev);
2045
2046         pci_set_master(pdev);
2047         pci_save_state(pdev);
2048
2049         err = -ENOMEM;
2050         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2051                                    IGB_MAX_TX_QUEUES);
2052         if (!netdev)
2053                 goto err_alloc_etherdev;
2054
2055         SET_NETDEV_DEV(netdev, &pdev->dev);
2056
2057         pci_set_drvdata(pdev, netdev);
2058         adapter = netdev_priv(netdev);
2059         adapter->netdev = netdev;
2060         adapter->pdev = pdev;
2061         hw = &adapter->hw;
2062         hw->back = adapter;
2063         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2064
2065         mmio_start = pci_resource_start(pdev, 0);
2066         mmio_len = pci_resource_len(pdev, 0);
2067
2068         err = -EIO;
2069         hw->hw_addr = ioremap(mmio_start, mmio_len);
2070         if (!hw->hw_addr)
2071                 goto err_ioremap;
2072
2073         netdev->netdev_ops = &igb_netdev_ops;
2074         igb_set_ethtool_ops(netdev);
2075         netdev->watchdog_timeo = 5 * HZ;
2076
2077         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2078
2079         netdev->mem_start = mmio_start;
2080         netdev->mem_end = mmio_start + mmio_len;
2081
2082         /* PCI config space info */
2083         hw->vendor_id = pdev->vendor;
2084         hw->device_id = pdev->device;
2085         hw->revision_id = pdev->revision;
2086         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2087         hw->subsystem_device_id = pdev->subsystem_device;
2088
2089         /* Copy the default MAC, PHY and NVM function pointers */
2090         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2091         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2092         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2093         /* Initialize skew-specific constants */
2094         err = ei->get_invariants(hw);
2095         if (err)
2096                 goto err_sw_init;
2097
2098         /* setup the private structure */
2099         err = igb_sw_init(adapter);
2100         if (err)
2101                 goto err_sw_init;
2102
2103         igb_get_bus_info_pcie(hw);
2104
2105         hw->phy.autoneg_wait_to_complete = false;
2106
2107         /* Copper options */
2108         if (hw->phy.media_type == e1000_media_type_copper) {
2109                 hw->phy.mdix = AUTO_ALL_MODES;
2110                 hw->phy.disable_polarity_correction = false;
2111                 hw->phy.ms_type = e1000_ms_hw_default;
2112         }
2113
2114         if (igb_check_reset_block(hw))
2115                 dev_info(&pdev->dev,
2116                         "PHY reset is blocked due to SOL/IDER session.\n");
2117
2118         /* features is initialized to 0 in allocation, it might have bits
2119          * set by igb_sw_init so we should use an or instead of an
2120          * assignment.
2121          */
2122         netdev->features |= NETIF_F_SG |
2123                             NETIF_F_IP_CSUM |
2124                             NETIF_F_IPV6_CSUM |
2125                             NETIF_F_TSO |
2126                             NETIF_F_TSO6 |
2127                             NETIF_F_RXHASH |
2128                             NETIF_F_RXCSUM |
2129                             NETIF_F_HW_VLAN_CTAG_RX |
2130                             NETIF_F_HW_VLAN_CTAG_TX;
2131
2132         /* copy netdev features into list of user selectable features */
2133         netdev->hw_features |= netdev->features;
2134         netdev->hw_features |= NETIF_F_RXALL;
2135
2136         /* set this bit last since it cannot be part of hw_features */
2137         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2138
2139         netdev->vlan_features |= NETIF_F_TSO |
2140                                  NETIF_F_TSO6 |
2141                                  NETIF_F_IP_CSUM |
2142                                  NETIF_F_IPV6_CSUM |
2143                                  NETIF_F_SG;
2144
2145         netdev->priv_flags |= IFF_SUPP_NOFCS;
2146
2147         if (pci_using_dac) {
2148                 netdev->features |= NETIF_F_HIGHDMA;
2149                 netdev->vlan_features |= NETIF_F_HIGHDMA;
2150         }
2151
2152         if (hw->mac.type >= e1000_82576) {
2153                 netdev->hw_features |= NETIF_F_SCTP_CSUM;
2154                 netdev->features |= NETIF_F_SCTP_CSUM;
2155         }
2156
2157         netdev->priv_flags |= IFF_UNICAST_FLT;
2158
2159         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2160
2161         /* before reading the NVM, reset the controller to put the device in a
2162          * known good starting state
2163          */
2164         hw->mac.ops.reset_hw(hw);
2165
2166         /* make sure the NVM is good , i211 parts have special NVM that
2167          * doesn't contain a checksum
2168          */
2169         if (hw->mac.type != e1000_i211) {
2170                 if (hw->nvm.ops.validate(hw) < 0) {
2171                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2172                         err = -EIO;
2173                         goto err_eeprom;
2174                 }
2175         }
2176
2177         /* copy the MAC address out of the NVM */
2178         if (hw->mac.ops.read_mac_addr(hw))
2179                 dev_err(&pdev->dev, "NVM Read Error\n");
2180
2181         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2182
2183         if (!is_valid_ether_addr(netdev->dev_addr)) {
2184                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2185                 err = -EIO;
2186                 goto err_eeprom;
2187         }
2188
2189         /* get firmware version for ethtool -i */
2190         igb_set_fw_version(adapter);
2191
2192         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2193                     (unsigned long) adapter);
2194         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2195                     (unsigned long) adapter);
2196
2197         INIT_WORK(&adapter->reset_task, igb_reset_task);
2198         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2199
2200         /* Initialize link properties that are user-changeable */
2201         adapter->fc_autoneg = true;
2202         hw->mac.autoneg = true;
2203         hw->phy.autoneg_advertised = 0x2f;
2204
2205         hw->fc.requested_mode = e1000_fc_default;
2206         hw->fc.current_mode = e1000_fc_default;
2207
2208         igb_validate_mdi_setting(hw);
2209
2210         /* By default, support wake on port A */
2211         if (hw->bus.func == 0)
2212                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2213
2214         /* Check the NVM for wake support on non-port A ports */
2215         if (hw->mac.type >= e1000_82580)
2216                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2217                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2218                                  &eeprom_data);
2219         else if (hw->bus.func == 1)
2220                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2221
2222         if (eeprom_data & IGB_EEPROM_APME)
2223                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2224
2225         /* now that we have the eeprom settings, apply the special cases where
2226          * the eeprom may be wrong or the board simply won't support wake on
2227          * lan on a particular port
2228          */
2229         switch (pdev->device) {
2230         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2231                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2232                 break;
2233         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2234         case E1000_DEV_ID_82576_FIBER:
2235         case E1000_DEV_ID_82576_SERDES:
2236                 /* Wake events only supported on port A for dual fiber
2237                  * regardless of eeprom setting
2238                  */
2239                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2240                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2241                 break;
2242         case E1000_DEV_ID_82576_QUAD_COPPER:
2243         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2244                 /* if quad port adapter, disable WoL on all but port A */
2245                 if (global_quad_port_a != 0)
2246                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2247                 else
2248                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2249                 /* Reset for multiple quad port adapters */
2250                 if (++global_quad_port_a == 4)
2251                         global_quad_port_a = 0;
2252                 break;
2253         default:
2254                 /* If the device can't wake, don't set software support */
2255                 if (!device_can_wakeup(&adapter->pdev->dev))
2256                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2257         }
2258
2259         /* initialize the wol settings based on the eeprom settings */
2260         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2261                 adapter->wol |= E1000_WUFC_MAG;
2262
2263         /* Some vendors want WoL disabled by default, but still supported */
2264         if ((hw->mac.type == e1000_i350) &&
2265             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2266                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2267                 adapter->wol = 0;
2268         }
2269
2270         device_set_wakeup_enable(&adapter->pdev->dev,
2271                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2272
2273         /* reset the hardware with the new settings */
2274         igb_reset(adapter);
2275
2276         /* Init the I2C interface */
2277         err = igb_init_i2c(adapter);
2278         if (err) {
2279                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2280                 goto err_eeprom;
2281         }
2282
2283         /* let the f/w know that the h/w is now under the control of the
2284          * driver. */
2285         igb_get_hw_control(adapter);
2286
2287         strcpy(netdev->name, "eth%d");
2288         err = register_netdev(netdev);
2289         if (err)
2290                 goto err_register;
2291
2292         /* carrier off reporting is important to ethtool even BEFORE open */
2293         netif_carrier_off(netdev);
2294
2295 #ifdef CONFIG_IGB_DCA
2296         if (dca_add_requester(&pdev->dev) == 0) {
2297                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2298                 dev_info(&pdev->dev, "DCA enabled\n");
2299                 igb_setup_dca(adapter);
2300         }
2301
2302 #endif
2303 #ifdef CONFIG_IGB_HWMON
2304         /* Initialize the thermal sensor on i350 devices. */
2305         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2306                 u16 ets_word;
2307
2308                 /* Read the NVM to determine if this i350 device supports an
2309                  * external thermal sensor.
2310                  */
2311                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2312                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2313                         adapter->ets = true;
2314                 else
2315                         adapter->ets = false;
2316                 if (igb_sysfs_init(adapter))
2317                         dev_err(&pdev->dev,
2318                                 "failed to allocate sysfs resources\n");
2319         } else {
2320                 adapter->ets = false;
2321         }
2322 #endif
2323         /* do hw tstamp init after resetting */
2324         igb_ptp_init(adapter);
2325
2326         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2327         /* print bus type/speed/width info, not applicable to i354 */
2328         if (hw->mac.type != e1000_i354) {
2329                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2330                          netdev->name,
2331                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2332                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2333                            "unknown"),
2334                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2335                           "Width x4" :
2336                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
2337                           "Width x2" :
2338                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
2339                           "Width x1" : "unknown"), netdev->dev_addr);
2340         }
2341
2342         ret_val = igb_read_part_string(hw, part_str, E1000_PBANUM_LENGTH);
2343         if (ret_val)
2344                 strcpy(part_str, "Unknown");
2345         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2346         dev_info(&pdev->dev,
2347                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2348                 adapter->msix_entries ? "MSI-X" :
2349                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2350                 adapter->num_rx_queues, adapter->num_tx_queues);
2351         switch (hw->mac.type) {
2352         case e1000_i350:
2353         case e1000_i210:
2354         case e1000_i211:
2355                 igb_set_eee_i350(hw);
2356                 break;
2357         case e1000_i354:
2358                 if (hw->phy.media_type == e1000_media_type_copper) {
2359                         if ((rd32(E1000_CTRL_EXT) &
2360                             E1000_CTRL_EXT_LINK_MODE_SGMII))
2361                                 igb_set_eee_i354(hw);
2362                 }
2363                 break;
2364         default:
2365                 break;
2366         }
2367
2368         pm_runtime_put_noidle(&pdev->dev);
2369         return 0;
2370
2371 err_register:
2372         igb_release_hw_control(adapter);
2373         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2374 err_eeprom:
2375         if (!igb_check_reset_block(hw))
2376                 igb_reset_phy(hw);
2377
2378         if (hw->flash_address)
2379                 iounmap(hw->flash_address);
2380 err_sw_init:
2381         igb_clear_interrupt_scheme(adapter);
2382         iounmap(hw->hw_addr);
2383 err_ioremap:
2384         free_netdev(netdev);
2385 err_alloc_etherdev:
2386         pci_release_selected_regions(pdev,
2387                                      pci_select_bars(pdev, IORESOURCE_MEM));
2388 err_pci_reg:
2389 err_dma:
2390         pci_disable_device(pdev);
2391         return err;
2392 }
2393
2394 #ifdef CONFIG_PCI_IOV
2395 static int  igb_disable_sriov(struct pci_dev *pdev)
2396 {
2397         struct net_device *netdev = pci_get_drvdata(pdev);
2398         struct igb_adapter *adapter = netdev_priv(netdev);
2399         struct e1000_hw *hw = &adapter->hw;
2400
2401         /* reclaim resources allocated to VFs */
2402         if (adapter->vf_data) {
2403                 /* disable iov and allow time for transactions to clear */
2404                 if (pci_vfs_assigned(pdev)) {
2405                         dev_warn(&pdev->dev,
2406                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2407                         return -EPERM;
2408                 } else {
2409                         pci_disable_sriov(pdev);
2410                         msleep(500);
2411                 }
2412
2413                 kfree(adapter->vf_data);
2414                 adapter->vf_data = NULL;
2415                 adapter->vfs_allocated_count = 0;
2416                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2417                 wrfl();
2418                 msleep(100);
2419                 dev_info(&pdev->dev, "IOV Disabled\n");
2420
2421                 /* Re-enable DMA Coalescing flag since IOV is turned off */
2422                 adapter->flags |= IGB_FLAG_DMAC;
2423         }
2424
2425         return 0;
2426 }
2427
2428 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2429 {
2430         struct net_device *netdev = pci_get_drvdata(pdev);
2431         struct igb_adapter *adapter = netdev_priv(netdev);
2432         int old_vfs = pci_num_vf(pdev);
2433         int err = 0;
2434         int i;
2435
2436         if (!num_vfs)
2437                 goto out;
2438         else if (old_vfs && old_vfs == num_vfs)
2439                 goto out;
2440         else if (old_vfs && old_vfs != num_vfs)
2441                 err = igb_disable_sriov(pdev);
2442
2443         if (err)
2444                 goto out;
2445
2446         if (num_vfs > 7) {
2447                 err = -EPERM;
2448                 goto out;
2449         }
2450
2451         adapter->vfs_allocated_count = num_vfs;
2452
2453         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2454                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2455
2456         /* if allocation failed then we do not support SR-IOV */
2457         if (!adapter->vf_data) {
2458                 adapter->vfs_allocated_count = 0;
2459                 dev_err(&pdev->dev,
2460                         "Unable to allocate memory for VF Data Storage\n");
2461                 err = -ENOMEM;
2462                 goto out;
2463         }
2464
2465         err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2466         if (err)
2467                 goto err_out;
2468
2469         dev_info(&pdev->dev, "%d VFs allocated\n",
2470                  adapter->vfs_allocated_count);
2471         for (i = 0; i < adapter->vfs_allocated_count; i++)
2472                 igb_vf_configure(adapter, i);
2473
2474         /* DMA Coalescing is not supported in IOV mode. */
2475         adapter->flags &= ~IGB_FLAG_DMAC;
2476         goto out;
2477
2478 err_out:
2479         kfree(adapter->vf_data);
2480         adapter->vf_data = NULL;
2481         adapter->vfs_allocated_count = 0;
2482 out:
2483         return err;
2484 }
2485
2486 #endif
2487 /**
2488  *  igb_remove_i2c - Cleanup  I2C interface
2489  *  @adapter: pointer to adapter structure
2490  **/
2491 static void igb_remove_i2c(struct igb_adapter *adapter)
2492 {
2493         /* free the adapter bus structure */
2494         i2c_del_adapter(&adapter->i2c_adap);
2495 }
2496
2497 /**
2498  *  igb_remove - Device Removal Routine
2499  *  @pdev: PCI device information struct
2500  *
2501  *  igb_remove is called by the PCI subsystem to alert the driver
2502  *  that it should release a PCI device.  The could be caused by a
2503  *  Hot-Plug event, or because the driver is going to be removed from
2504  *  memory.
2505  **/
2506 static void igb_remove(struct pci_dev *pdev)
2507 {
2508         struct net_device *netdev = pci_get_drvdata(pdev);
2509         struct igb_adapter *adapter = netdev_priv(netdev);
2510         struct e1000_hw *hw = &adapter->hw;
2511
2512         pm_runtime_get_noresume(&pdev->dev);
2513 #ifdef CONFIG_IGB_HWMON
2514         igb_sysfs_exit(adapter);
2515 #endif
2516         igb_remove_i2c(adapter);
2517         igb_ptp_stop(adapter);
2518         /* The watchdog timer may be rescheduled, so explicitly
2519          * disable watchdog from being rescheduled.
2520          */
2521         set_bit(__IGB_DOWN, &adapter->state);
2522         del_timer_sync(&adapter->watchdog_timer);
2523         del_timer_sync(&adapter->phy_info_timer);
2524
2525         cancel_work_sync(&adapter->reset_task);
2526         cancel_work_sync(&adapter->watchdog_task);
2527
2528 #ifdef CONFIG_IGB_DCA
2529         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2530                 dev_info(&pdev->dev, "DCA disabled\n");
2531                 dca_remove_requester(&pdev->dev);
2532                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2533                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2534         }
2535 #endif
2536
2537         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2538          * would have already happened in close and is redundant.
2539          */
2540         igb_release_hw_control(adapter);
2541
2542         unregister_netdev(netdev);
2543
2544         igb_clear_interrupt_scheme(adapter);
2545
2546 #ifdef CONFIG_PCI_IOV
2547         igb_disable_sriov(pdev);
2548 #endif
2549
2550         iounmap(hw->hw_addr);
2551         if (hw->flash_address)
2552                 iounmap(hw->flash_address);
2553         pci_release_selected_regions(pdev,
2554                                      pci_select_bars(pdev, IORESOURCE_MEM));
2555
2556         kfree(adapter->shadow_vfta);
2557         free_netdev(netdev);
2558
2559         pci_disable_pcie_error_reporting(pdev);
2560
2561         pci_disable_device(pdev);
2562 }
2563
2564 /**
2565  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2566  *  @adapter: board private structure to initialize
2567  *
2568  *  This function initializes the vf specific data storage and then attempts to
2569  *  allocate the VFs.  The reason for ordering it this way is because it is much
2570  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
2571  *  the memory for the VFs.
2572  **/
2573 static void igb_probe_vfs(struct igb_adapter *adapter)
2574 {
2575 #ifdef CONFIG_PCI_IOV
2576         struct pci_dev *pdev = adapter->pdev;
2577         struct e1000_hw *hw = &adapter->hw;
2578
2579         /* Virtualization features not supported on i210 family. */
2580         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2581                 return;
2582
2583         pci_sriov_set_totalvfs(pdev, 7);
2584         igb_enable_sriov(pdev, max_vfs);
2585
2586 #endif /* CONFIG_PCI_IOV */
2587 }
2588
2589 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2590 {
2591         struct e1000_hw *hw = &adapter->hw;
2592         u32 max_rss_queues;
2593
2594         /* Determine the maximum number of RSS queues supported. */
2595         switch (hw->mac.type) {
2596         case e1000_i211:
2597                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2598                 break;
2599         case e1000_82575:
2600         case e1000_i210:
2601                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2602                 break;
2603         case e1000_i350:
2604                 /* I350 cannot do RSS and SR-IOV at the same time */
2605                 if (!!adapter->vfs_allocated_count) {
2606                         max_rss_queues = 1;
2607                         break;
2608                 }
2609                 /* fall through */
2610         case e1000_82576:
2611                 if (!!adapter->vfs_allocated_count) {
2612                         max_rss_queues = 2;
2613                         break;
2614                 }
2615                 /* fall through */
2616         case e1000_82580:
2617         case e1000_i354:
2618         default:
2619                 max_rss_queues = IGB_MAX_RX_QUEUES;
2620                 break;
2621         }
2622
2623         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2624
2625         /* Determine if we need to pair queues. */
2626         switch (hw->mac.type) {
2627         case e1000_82575:
2628         case e1000_i211:
2629                 /* Device supports enough interrupts without queue pairing. */
2630                 break;
2631         case e1000_82576:
2632                 /* If VFs are going to be allocated with RSS queues then we
2633                  * should pair the queues in order to conserve interrupts due
2634                  * to limited supply.
2635                  */
2636                 if ((adapter->rss_queues > 1) &&
2637                     (adapter->vfs_allocated_count > 6))
2638                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2639                 /* fall through */
2640         case e1000_82580:
2641         case e1000_i350:
2642         case e1000_i354:
2643         case e1000_i210:
2644         default:
2645                 /* If rss_queues > half of max_rss_queues, pair the queues in
2646                  * order to conserve interrupts due to limited supply.
2647                  */
2648                 if (adapter->rss_queues > (max_rss_queues / 2))
2649                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2650                 break;
2651         }
2652 }
2653
2654 /**
2655  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
2656  *  @adapter: board private structure to initialize
2657  *
2658  *  igb_sw_init initializes the Adapter private data structure.
2659  *  Fields are initialized based on PCI device information and
2660  *  OS network device settings (MTU size).
2661  **/
2662 static int igb_sw_init(struct igb_adapter *adapter)
2663 {
2664         struct e1000_hw *hw = &adapter->hw;
2665         struct net_device *netdev = adapter->netdev;
2666         struct pci_dev *pdev = adapter->pdev;
2667
2668         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2669
2670         /* set default ring sizes */
2671         adapter->tx_ring_count = IGB_DEFAULT_TXD;
2672         adapter->rx_ring_count = IGB_DEFAULT_RXD;
2673
2674         /* set default ITR values */
2675         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2676         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2677
2678         /* set default work limits */
2679         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2680
2681         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2682                                   VLAN_HLEN;
2683         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2684
2685         spin_lock_init(&adapter->stats64_lock);
2686 #ifdef CONFIG_PCI_IOV
2687         switch (hw->mac.type) {
2688         case e1000_82576:
2689         case e1000_i350:
2690                 if (max_vfs > 7) {
2691                         dev_warn(&pdev->dev,
2692                                  "Maximum of 7 VFs per PF, using max\n");
2693                         max_vfs = adapter->vfs_allocated_count = 7;
2694                 } else
2695                         adapter->vfs_allocated_count = max_vfs;
2696                 if (adapter->vfs_allocated_count)
2697                         dev_warn(&pdev->dev,
2698                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2699                 break;
2700         default:
2701                 break;
2702         }
2703 #endif /* CONFIG_PCI_IOV */
2704
2705         igb_init_queue_configuration(adapter);
2706
2707         /* Setup and initialize a copy of the hw vlan table array */
2708         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
2709                                        GFP_ATOMIC);
2710
2711         /* This call may decrease the number of queues */
2712         if (igb_init_interrupt_scheme(adapter, true)) {
2713                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
2714                 return -ENOMEM;
2715         }
2716
2717         igb_probe_vfs(adapter);
2718
2719         /* Explicitly disable IRQ since the NIC can be in any state. */
2720         igb_irq_disable(adapter);
2721
2722         if (hw->mac.type >= e1000_i350)
2723                 adapter->flags &= ~IGB_FLAG_DMAC;
2724
2725         set_bit(__IGB_DOWN, &adapter->state);
2726         return 0;
2727 }
2728
2729 /**
2730  *  igb_open - Called when a network interface is made active
2731  *  @netdev: network interface device structure
2732  *
2733  *  Returns 0 on success, negative value on failure
2734  *
2735  *  The open entry point is called when a network interface is made
2736  *  active by the system (IFF_UP).  At this point all resources needed
2737  *  for transmit and receive operations are allocated, the interrupt
2738  *  handler is registered with the OS, the watchdog timer is started,
2739  *  and the stack is notified that the interface is ready.
2740  **/
2741 static int __igb_open(struct net_device *netdev, bool resuming)
2742 {
2743         struct igb_adapter *adapter = netdev_priv(netdev);
2744         struct e1000_hw *hw = &adapter->hw;
2745         struct pci_dev *pdev = adapter->pdev;
2746         int err;
2747         int i;
2748
2749         /* disallow open during test */
2750         if (test_bit(__IGB_TESTING, &adapter->state)) {
2751                 WARN_ON(resuming);
2752                 return -EBUSY;
2753         }
2754
2755         if (!resuming)
2756                 pm_runtime_get_sync(&pdev->dev);
2757
2758         netif_carrier_off(netdev);
2759
2760         /* allocate transmit descriptors */
2761         err = igb_setup_all_tx_resources(adapter);
2762         if (err)
2763                 goto err_setup_tx;
2764
2765         /* allocate receive descriptors */
2766         err = igb_setup_all_rx_resources(adapter);
2767         if (err)
2768                 goto err_setup_rx;
2769
2770         igb_power_up_link(adapter);
2771
2772         /* before we allocate an interrupt, we must be ready to handle it.
2773          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2774          * as soon as we call pci_request_irq, so we have to setup our
2775          * clean_rx handler before we do so.
2776          */
2777         igb_configure(adapter);
2778
2779         err = igb_request_irq(adapter);
2780         if (err)
2781                 goto err_req_irq;
2782
2783         /* Notify the stack of the actual queue counts. */
2784         err = netif_set_real_num_tx_queues(adapter->netdev,
2785                                            adapter->num_tx_queues);
2786         if (err)
2787                 goto err_set_queues;
2788
2789         err = netif_set_real_num_rx_queues(adapter->netdev,
2790                                            adapter->num_rx_queues);
2791         if (err)
2792                 goto err_set_queues;
2793
2794         /* From here on the code is the same as igb_up() */
2795         clear_bit(__IGB_DOWN, &adapter->state);
2796
2797         for (i = 0; i < adapter->num_q_vectors; i++)
2798                 napi_enable(&(adapter->q_vector[i]->napi));
2799
2800         /* Clear any pending interrupts. */
2801         rd32(E1000_ICR);
2802
2803         igb_irq_enable(adapter);
2804
2805         /* notify VFs that reset has been completed */
2806         if (adapter->vfs_allocated_count) {
2807                 u32 reg_data = rd32(E1000_CTRL_EXT);
2808                 reg_data |= E1000_CTRL_EXT_PFRSTD;
2809                 wr32(E1000_CTRL_EXT, reg_data);
2810         }
2811
2812         netif_tx_start_all_queues(netdev);
2813
2814         if (!resuming)
2815                 pm_runtime_put(&pdev->dev);
2816
2817         /* start the watchdog. */
2818         hw->mac.get_link_status = 1;
2819         schedule_work(&adapter->watchdog_task);
2820
2821         return 0;
2822
2823 err_set_queues:
2824         igb_free_irq(adapter);
2825 err_req_irq:
2826         igb_release_hw_control(adapter);
2827         igb_power_down_link(adapter);
2828         igb_free_all_rx_resources(adapter);
2829 err_setup_rx:
2830         igb_free_all_tx_resources(adapter);
2831 err_setup_tx:
2832         igb_reset(adapter);
2833         if (!resuming)
2834                 pm_runtime_put(&pdev->dev);
2835
2836         return err;
2837 }
2838
2839 static int igb_open(struct net_device *netdev)
2840 {
2841         return __igb_open(netdev, false);
2842 }
2843
2844 /**
2845  *  igb_close - Disables a network interface
2846  *  @netdev: network interface device structure
2847  *
2848  *  Returns 0, this is not allowed to fail
2849  *
2850  *  The close entry point is called when an interface is de-activated
2851  *  by the OS.  The hardware is still under the driver's control, but
2852  *  needs to be disabled.  A global MAC reset is issued to stop the
2853  *  hardware, and all transmit and receive resources are freed.
2854  **/
2855 static int __igb_close(struct net_device *netdev, bool suspending)
2856 {
2857         struct igb_adapter *adapter = netdev_priv(netdev);
2858         struct pci_dev *pdev = adapter->pdev;
2859
2860         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
2861
2862         if (!suspending)
2863                 pm_runtime_get_sync(&pdev->dev);
2864
2865         igb_down(adapter);
2866         igb_free_irq(adapter);
2867
2868         igb_free_all_tx_resources(adapter);
2869         igb_free_all_rx_resources(adapter);
2870
2871         if (!suspending)
2872                 pm_runtime_put_sync(&pdev->dev);
2873         return 0;
2874 }
2875
2876 static int igb_close(struct net_device *netdev)
2877 {
2878         return __igb_close(netdev, false);
2879 }
2880
2881 /**
2882  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
2883  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
2884  *
2885  *  Return 0 on success, negative on failure
2886  **/
2887 int igb_setup_tx_resources(struct igb_ring *tx_ring)
2888 {
2889         struct device *dev = tx_ring->dev;
2890         int size;
2891
2892         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
2893
2894         tx_ring->tx_buffer_info = vzalloc(size);
2895         if (!tx_ring->tx_buffer_info)
2896                 goto err;
2897
2898         /* round up to nearest 4K */
2899         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
2900         tx_ring->size = ALIGN(tx_ring->size, 4096);
2901
2902         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
2903                                            &tx_ring->dma, GFP_KERNEL);
2904         if (!tx_ring->desc)
2905                 goto err;
2906
2907         tx_ring->next_to_use = 0;
2908         tx_ring->next_to_clean = 0;
2909
2910         return 0;
2911
2912 err:
2913         vfree(tx_ring->tx_buffer_info);
2914         tx_ring->tx_buffer_info = NULL;
2915         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
2916         return -ENOMEM;
2917 }
2918
2919 /**
2920  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
2921  *                               (Descriptors) for all queues
2922  *  @adapter: board private structure
2923  *
2924  *  Return 0 on success, negative on failure
2925  **/
2926 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
2927 {
2928         struct pci_dev *pdev = adapter->pdev;
2929         int i, err = 0;
2930
2931         for (i = 0; i < adapter->num_tx_queues; i++) {
2932                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
2933                 if (err) {
2934                         dev_err(&pdev->dev,
2935                                 "Allocation for Tx Queue %u failed\n", i);
2936                         for (i--; i >= 0; i--)
2937                                 igb_free_tx_resources(adapter->tx_ring[i]);
2938                         break;
2939                 }
2940         }
2941
2942         return err;
2943 }
2944
2945 /**
2946  *  igb_setup_tctl - configure the transmit control registers
2947  *  @adapter: Board private structure
2948  **/
2949 void igb_setup_tctl(struct igb_adapter *adapter)
2950 {
2951         struct e1000_hw *hw = &adapter->hw;
2952         u32 tctl;
2953
2954         /* disable queue 0 which is enabled by default on 82575 and 82576 */
2955         wr32(E1000_TXDCTL(0), 0);
2956
2957         /* Program the Transmit Control Register */
2958         tctl = rd32(E1000_TCTL);
2959         tctl &= ~E1000_TCTL_CT;
2960         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2961                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2962
2963         igb_config_collision_dist(hw);
2964
2965         /* Enable transmits */
2966         tctl |= E1000_TCTL_EN;
2967
2968         wr32(E1000_TCTL, tctl);
2969 }
2970
2971 /**
2972  *  igb_configure_tx_ring - Configure transmit ring after Reset
2973  *  @adapter: board private structure
2974  *  @ring: tx ring to configure
2975  *
2976  *  Configure a transmit ring after a reset.
2977  **/
2978 void igb_configure_tx_ring(struct igb_adapter *adapter,
2979                            struct igb_ring *ring)
2980 {
2981         struct e1000_hw *hw = &adapter->hw;
2982         u32 txdctl = 0;
2983         u64 tdba = ring->dma;
2984         int reg_idx = ring->reg_idx;
2985
2986         /* disable the queue */
2987         wr32(E1000_TXDCTL(reg_idx), 0);
2988         wrfl();
2989         mdelay(10);
2990
2991         wr32(E1000_TDLEN(reg_idx),
2992              ring->count * sizeof(union e1000_adv_tx_desc));
2993         wr32(E1000_TDBAL(reg_idx),
2994              tdba & 0x00000000ffffffffULL);
2995         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
2996
2997         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
2998         wr32(E1000_TDH(reg_idx), 0);
2999         writel(0, ring->tail);
3000
3001         txdctl |= IGB_TX_PTHRESH;
3002         txdctl |= IGB_TX_HTHRESH << 8;
3003         txdctl |= IGB_TX_WTHRESH << 16;
3004
3005         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3006         wr32(E1000_TXDCTL(reg_idx), txdctl);
3007 }
3008
3009 /**
3010  *  igb_configure_tx - Configure transmit Unit after Reset
3011  *  @adapter: board private structure
3012  *
3013  *  Configure the Tx unit of the MAC after a reset.
3014  **/
3015 static void igb_configure_tx(struct igb_adapter *adapter)
3016 {
3017         int i;
3018
3019         for (i = 0; i < adapter->num_tx_queues; i++)
3020                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3021 }
3022
3023 /**
3024  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
3025  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
3026  *
3027  *  Returns 0 on success, negative on failure
3028  **/
3029 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3030 {
3031         struct device *dev = rx_ring->dev;
3032         int size;
3033
3034         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3035
3036         rx_ring->rx_buffer_info = vzalloc(size);
3037         if (!rx_ring->rx_buffer_info)
3038                 goto err;
3039
3040         /* Round up to nearest 4K */
3041         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3042         rx_ring->size = ALIGN(rx_ring->size, 4096);
3043
3044         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3045                                            &rx_ring->dma, GFP_KERNEL);
3046         if (!rx_ring->desc)
3047                 goto err;
3048
3049         rx_ring->next_to_alloc = 0;
3050         rx_ring->next_to_clean = 0;
3051         rx_ring->next_to_use = 0;
3052
3053         return 0;
3054
3055 err:
3056         vfree(rx_ring->rx_buffer_info);
3057         rx_ring->rx_buffer_info = NULL;
3058         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3059         return -ENOMEM;
3060 }
3061
3062 /**
3063  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
3064  *                               (Descriptors) for all queues
3065  *  @adapter: board private structure
3066  *
3067  *  Return 0 on success, negative on failure
3068  **/
3069 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3070 {
3071         struct pci_dev *pdev = adapter->pdev;
3072         int i, err = 0;
3073
3074         for (i = 0; i < adapter->num_rx_queues; i++) {
3075                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3076                 if (err) {
3077                         dev_err(&pdev->dev,
3078                                 "Allocation for Rx Queue %u failed\n", i);
3079                         for (i--; i >= 0; i--)
3080                                 igb_free_rx_resources(adapter->rx_ring[i]);
3081                         break;
3082                 }
3083         }
3084
3085         return err;
3086 }
3087
3088 /**
3089  *  igb_setup_mrqc - configure the multiple receive queue control registers
3090  *  @adapter: Board private structure
3091  **/
3092 static void igb_setup_mrqc(struct igb_adapter *adapter)
3093 {
3094         struct e1000_hw *hw = &adapter->hw;
3095         u32 mrqc, rxcsum;
3096         u32 j, num_rx_queues, shift = 0;
3097         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3098                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3099                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3100                                         0xFA01ACBE };
3101
3102         /* Fill out hash function seeds */
3103         for (j = 0; j < 10; j++)
3104                 wr32(E1000_RSSRK(j), rsskey[j]);
3105
3106         num_rx_queues = adapter->rss_queues;
3107
3108         switch (hw->mac.type) {
3109         case e1000_82575:
3110                 shift = 6;
3111                 break;
3112         case e1000_82576:
3113                 /* 82576 supports 2 RSS queues for SR-IOV */
3114                 if (adapter->vfs_allocated_count) {
3115                         shift = 3;
3116                         num_rx_queues = 2;
3117                 }
3118                 break;
3119         default:
3120                 break;
3121         }
3122
3123         /* Populate the indirection table 4 entries at a time.  To do this
3124          * we are generating the results for n and n+2 and then interleaving
3125          * those with the results with n+1 and n+3.
3126          */
3127         for (j = 0; j < 32; j++) {
3128                 /* first pass generates n and n+2 */
3129                 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3130                 u32 reta = (base & 0x07800780) >> (7 - shift);
3131
3132                 /* second pass generates n+1 and n+3 */
3133                 base += 0x00010001 * num_rx_queues;
3134                 reta |= (base & 0x07800780) << (1 + shift);
3135
3136                 wr32(E1000_RETA(j), reta);
3137         }
3138
3139         /* Disable raw packet checksumming so that RSS hash is placed in
3140          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3141          * offloads as they are enabled by default
3142          */
3143         rxcsum = rd32(E1000_RXCSUM);
3144         rxcsum |= E1000_RXCSUM_PCSD;
3145
3146         if (adapter->hw.mac.type >= e1000_82576)
3147                 /* Enable Receive Checksum Offload for SCTP */
3148                 rxcsum |= E1000_RXCSUM_CRCOFL;
3149
3150         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3151         wr32(E1000_RXCSUM, rxcsum);
3152
3153         /* Generate RSS hash based on packet types, TCP/UDP
3154          * port numbers and/or IPv4/v6 src and dst addresses
3155          */
3156         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3157                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3158                E1000_MRQC_RSS_FIELD_IPV6 |
3159                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3160                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3161
3162         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3163                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3164         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3165                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3166
3167         /* If VMDq is enabled then we set the appropriate mode for that, else
3168          * we default to RSS so that an RSS hash is calculated per packet even
3169          * if we are only using one queue
3170          */
3171         if (adapter->vfs_allocated_count) {
3172                 if (hw->mac.type > e1000_82575) {
3173                         /* Set the default pool for the PF's first queue */
3174                         u32 vtctl = rd32(E1000_VT_CTL);
3175                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3176                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3177                         vtctl |= adapter->vfs_allocated_count <<
3178                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3179                         wr32(E1000_VT_CTL, vtctl);
3180                 }
3181                 if (adapter->rss_queues > 1)
3182                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3183                 else
3184                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3185         } else {
3186                 if (hw->mac.type != e1000_i211)
3187                         mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3188         }
3189         igb_vmm_control(adapter);
3190
3191         wr32(E1000_MRQC, mrqc);
3192 }
3193
3194 /**
3195  *  igb_setup_rctl - configure the receive control registers
3196  *  @adapter: Board private structure
3197  **/
3198 void igb_setup_rctl(struct igb_adapter *adapter)
3199 {
3200         struct e1000_hw *hw = &adapter->hw;
3201         u32 rctl;
3202
3203         rctl = rd32(E1000_RCTL);
3204
3205         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3206         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3207
3208         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3209                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3210
3211         /* enable stripping of CRC. It's unlikely this will break BMC
3212          * redirection as it did with e1000. Newer features require
3213          * that the HW strips the CRC.
3214          */
3215         rctl |= E1000_RCTL_SECRC;
3216
3217         /* disable store bad packets and clear size bits. */
3218         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3219
3220         /* enable LPE to prevent packets larger than max_frame_size */
3221         rctl |= E1000_RCTL_LPE;
3222
3223         /* disable queue 0 to prevent tail write w/o re-config */
3224         wr32(E1000_RXDCTL(0), 0);
3225
3226         /* Attention!!!  For SR-IOV PF driver operations you must enable
3227          * queue drop for all VF and PF queues to prevent head of line blocking
3228          * if an un-trusted VF does not provide descriptors to hardware.
3229          */
3230         if (adapter->vfs_allocated_count) {
3231                 /* set all queue drop enable bits */
3232                 wr32(E1000_QDE, ALL_QUEUES);
3233         }
3234
3235         /* This is useful for sniffing bad packets. */
3236         if (adapter->netdev->features & NETIF_F_RXALL) {
3237                 /* UPE and MPE will be handled by normal PROMISC logic
3238                  * in e1000e_set_rx_mode
3239                  */
3240                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3241                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
3242                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3243
3244                 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3245                           E1000_RCTL_DPF | /* Allow filtered pause */
3246                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3247                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3248                  * and that breaks VLANs.
3249                  */
3250         }
3251
3252         wr32(E1000_RCTL, rctl);
3253 }
3254
3255 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3256                                    int vfn)
3257 {
3258         struct e1000_hw *hw = &adapter->hw;
3259         u32 vmolr;
3260
3261         /* if it isn't the PF check to see if VFs are enabled and
3262          * increase the size to support vlan tags
3263          */
3264         if (vfn < adapter->vfs_allocated_count &&
3265             adapter->vf_data[vfn].vlans_enabled)
3266                 size += VLAN_TAG_SIZE;
3267
3268         vmolr = rd32(E1000_VMOLR(vfn));
3269         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3270         vmolr |= size | E1000_VMOLR_LPE;
3271         wr32(E1000_VMOLR(vfn), vmolr);
3272
3273         return 0;
3274 }
3275
3276 /**
3277  *  igb_rlpml_set - set maximum receive packet size
3278  *  @adapter: board private structure
3279  *
3280  *  Configure maximum receivable packet size.
3281  **/
3282 static void igb_rlpml_set(struct igb_adapter *adapter)
3283 {
3284         u32 max_frame_size = adapter->max_frame_size;
3285         struct e1000_hw *hw = &adapter->hw;
3286         u16 pf_id = adapter->vfs_allocated_count;
3287
3288         if (pf_id) {
3289                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3290                 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3291                  * to our max jumbo frame size, in case we need to enable
3292                  * jumbo frames on one of the rings later.
3293                  * This will not pass over-length frames into the default
3294                  * queue because it's gated by the VMOLR.RLPML.
3295                  */
3296                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3297         }
3298
3299         wr32(E1000_RLPML, max_frame_size);
3300 }
3301
3302 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3303                                  int vfn, bool aupe)
3304 {
3305         struct e1000_hw *hw = &adapter->hw;
3306         u32 vmolr;
3307
3308         /* This register exists only on 82576 and newer so if we are older then
3309          * we should exit and do nothing
3310          */
3311         if (hw->mac.type < e1000_82576)
3312                 return;
3313
3314         vmolr = rd32(E1000_VMOLR(vfn));
3315         vmolr |= E1000_VMOLR_STRVLAN; /* Strip vlan tags */
3316         if (aupe)
3317                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3318         else
3319                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3320
3321         /* clear all bits that might not be set */
3322         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3323
3324         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3325                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3326         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3327          * multicast packets
3328          */
3329         if (vfn <= adapter->vfs_allocated_count)
3330                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3331
3332         wr32(E1000_VMOLR(vfn), vmolr);
3333 }
3334
3335 /**
3336  *  igb_configure_rx_ring - Configure a receive ring after Reset
3337  *  @adapter: board private structure
3338  *  @ring: receive ring to be configured
3339  *
3340  *  Configure the Rx unit of the MAC after a reset.
3341  **/
3342 void igb_configure_rx_ring(struct igb_adapter *adapter,
3343                            struct igb_ring *ring)
3344 {
3345         struct e1000_hw *hw = &adapter->hw;
3346         u64 rdba = ring->dma;
3347         int reg_idx = ring->reg_idx;
3348         u32 srrctl = 0, rxdctl = 0;
3349
3350         /* disable the queue */
3351         wr32(E1000_RXDCTL(reg_idx), 0);
3352
3353         /* Set DMA base address registers */
3354         wr32(E1000_RDBAL(reg_idx),
3355              rdba & 0x00000000ffffffffULL);
3356         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3357         wr32(E1000_RDLEN(reg_idx),
3358              ring->count * sizeof(union e1000_adv_rx_desc));
3359
3360         /* initialize head and tail */
3361         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3362         wr32(E1000_RDH(reg_idx), 0);
3363         writel(0, ring->tail);
3364
3365         /* set descriptor configuration */
3366         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3367         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3368         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3369         if (hw->mac.type >= e1000_82580)
3370                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3371         /* Only set Drop Enable if we are supporting multiple queues */
3372         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3373                 srrctl |= E1000_SRRCTL_DROP_EN;
3374
3375         wr32(E1000_SRRCTL(reg_idx), srrctl);
3376
3377         /* set filtering for VMDQ pools */
3378         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3379
3380         rxdctl |= IGB_RX_PTHRESH;
3381         rxdctl |= IGB_RX_HTHRESH << 8;
3382         rxdctl |= IGB_RX_WTHRESH << 16;
3383
3384         /* enable receive descriptor fetching */
3385         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3386         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3387 }
3388
3389 /**
3390  *  igb_configure_rx - Configure receive Unit after Reset
3391  *  @adapter: board private structure
3392  *
3393  *  Configure the Rx unit of the MAC after a reset.
3394  **/
3395 static void igb_configure_rx(struct igb_adapter *adapter)
3396 {
3397         int i;
3398
3399         /* set UTA to appropriate mode */
3400         igb_set_uta(adapter);
3401
3402         /* set the correct pool for the PF default MAC address in entry 0 */
3403         igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3404                          adapter->vfs_allocated_count);
3405
3406         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3407          * the Base and Length of the Rx Descriptor Ring
3408          */
3409         for (i = 0; i < adapter->num_rx_queues; i++)
3410                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3411 }
3412
3413 /**
3414  *  igb_free_tx_resources - Free Tx Resources per Queue
3415  *  @tx_ring: Tx descriptor ring for a specific queue
3416  *
3417  *  Free all transmit software resources
3418  **/
3419 void igb_free_tx_resources(struct igb_ring *tx_ring)
3420 {
3421         igb_clean_tx_ring(tx_ring);
3422
3423         vfree(tx_ring->tx_buffer_info);
3424         tx_ring->tx_buffer_info = NULL;
3425
3426         /* if not set, then don't free */
3427         if (!tx_ring->desc)
3428                 return;
3429
3430         dma_free_coherent(tx_ring->dev, tx_ring->size,
3431                           tx_ring->desc, tx_ring->dma);
3432
3433         tx_ring->desc = NULL;
3434 }
3435
3436 /**
3437  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
3438  *  @adapter: board private structure
3439  *
3440  *  Free all transmit software resources
3441  **/
3442 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3443 {
3444         int i;
3445
3446         for (i = 0; i < adapter->num_tx_queues; i++)
3447                 igb_free_tx_resources(adapter->tx_ring[i]);
3448 }
3449
3450 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3451                                     struct igb_tx_buffer *tx_buffer)
3452 {
3453         if (tx_buffer->skb) {
3454                 dev_kfree_skb_any(tx_buffer->skb);
3455                 if (dma_unmap_len(tx_buffer, len))
3456                         dma_unmap_single(ring->dev,
3457                                          dma_unmap_addr(tx_buffer, dma),
3458                                          dma_unmap_len(tx_buffer, len),
3459                                          DMA_TO_DEVICE);
3460         } else if (dma_unmap_len(tx_buffer, len)) {
3461                 dma_unmap_page(ring->dev,
3462                                dma_unmap_addr(tx_buffer, dma),
3463                                dma_unmap_len(tx_buffer, len),
3464                                DMA_TO_DEVICE);
3465         }
3466         tx_buffer->next_to_watch = NULL;
3467         tx_buffer->skb = NULL;
3468         dma_unmap_len_set(tx_buffer, len, 0);
3469         /* buffer_info must be completely set up in the transmit path */
3470 }
3471
3472 /**
3473  *  igb_clean_tx_ring - Free Tx Buffers
3474  *  @tx_ring: ring to be cleaned
3475  **/
3476 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3477 {
3478         struct igb_tx_buffer *buffer_info;
3479         unsigned long size;
3480         u16 i;
3481
3482         if (!tx_ring->tx_buffer_info)
3483                 return;
3484         /* Free all the Tx ring sk_buffs */
3485
3486         for (i = 0; i < tx_ring->count; i++) {
3487                 buffer_info = &tx_ring->tx_buffer_info[i];
3488                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3489         }
3490
3491         netdev_tx_reset_queue(txring_txq(tx_ring));
3492
3493         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3494         memset(tx_ring->tx_buffer_info, 0, size);
3495
3496         /* Zero out the descriptor ring */
3497         memset(tx_ring->desc, 0, tx_ring->size);
3498
3499         tx_ring->next_to_use = 0;
3500         tx_ring->next_to_clean = 0;
3501 }
3502
3503 /**
3504  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
3505  *  @adapter: board private structure
3506  **/
3507 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3508 {
3509         int i;
3510
3511         for (i = 0; i < adapter->num_tx_queues; i++)
3512                 igb_clean_tx_ring(adapter->tx_ring[i]);
3513 }
3514
3515 /**
3516  *  igb_free_rx_resources - Free Rx Resources
3517  *  @rx_ring: ring to clean the resources from
3518  *
3519  *  Free all receive software resources
3520  **/
3521 void igb_free_rx_resources(struct igb_ring *rx_ring)
3522 {
3523         igb_clean_rx_ring(rx_ring);
3524
3525         vfree(rx_ring->rx_buffer_info);
3526         rx_ring->rx_buffer_info = NULL;
3527
3528         /* if not set, then don't free */
3529         if (!rx_ring->desc)
3530                 return;
3531
3532         dma_free_coherent(rx_ring->dev, rx_ring->size,
3533                           rx_ring->desc, rx_ring->dma);
3534
3535         rx_ring->desc = NULL;
3536 }
3537
3538 /**
3539  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
3540  *  @adapter: board private structure
3541  *
3542  *  Free all receive software resources
3543  **/
3544 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3545 {
3546         int i;
3547
3548         for (i = 0; i < adapter->num_rx_queues; i++)
3549                 igb_free_rx_resources(adapter->rx_ring[i]);
3550 }
3551
3552 /**
3553  *  igb_clean_rx_ring - Free Rx Buffers per Queue
3554  *  @rx_ring: ring to free buffers from
3555  **/
3556 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3557 {
3558         unsigned long size;
3559         u16 i;
3560
3561         if (rx_ring->skb)
3562                 dev_kfree_skb(rx_ring->skb);
3563         rx_ring->skb = NULL;
3564
3565         if (!rx_ring->rx_buffer_info)
3566                 return;
3567
3568         /* Free all the Rx ring sk_buffs */
3569         for (i = 0; i < rx_ring->count; i++) {
3570                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3571
3572                 if (!buffer_info->page)
3573                         continue;
3574
3575                 dma_unmap_page(rx_ring->dev,
3576                                buffer_info->dma,
3577                                PAGE_SIZE,
3578                                DMA_FROM_DEVICE);
3579                 __free_page(buffer_info->page);
3580
3581                 buffer_info->page = NULL;
3582         }
3583
3584         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3585         memset(rx_ring->rx_buffer_info, 0, size);
3586
3587         /* Zero out the descriptor ring */
3588         memset(rx_ring->desc, 0, rx_ring->size);
3589
3590         rx_ring->next_to_alloc = 0;
3591         rx_ring->next_to_clean = 0;
3592         rx_ring->next_to_use = 0;
3593 }
3594
3595 /**
3596  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
3597  *  @adapter: board private structure
3598  **/
3599 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3600 {
3601         int i;
3602
3603         for (i = 0; i < adapter->num_rx_queues; i++)
3604                 igb_clean_rx_ring(adapter->rx_ring[i]);
3605 }
3606
3607 /**
3608  *  igb_set_mac - Change the Ethernet Address of the NIC
3609  *  @netdev: network interface device structure
3610  *  @p: pointer to an address structure
3611  *
3612  *  Returns 0 on success, negative on failure
3613  **/
3614 static int igb_set_mac(struct net_device *netdev, void *p)
3615 {
3616         struct igb_adapter *adapter = netdev_priv(netdev);
3617         struct e1000_hw *hw = &adapter->hw;
3618         struct sockaddr *addr = p;
3619
3620         if (!is_valid_ether_addr(addr->sa_data))
3621                 return -EADDRNOTAVAIL;
3622
3623         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3624         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3625
3626         /* set the correct pool for the new PF MAC address in entry 0 */
3627         igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3628                          adapter->vfs_allocated_count);
3629
3630         return 0;
3631 }
3632
3633 /**
3634  *  igb_write_mc_addr_list - write multicast addresses to MTA
3635  *  @netdev: network interface device structure
3636  *
3637  *  Writes multicast address list to the MTA hash table.
3638  *  Returns: -ENOMEM on failure
3639  *           0 on no addresses written
3640  *           X on writing X addresses to MTA
3641  **/
3642 static int igb_write_mc_addr_list(struct net_device *netdev)
3643 {
3644         struct igb_adapter *adapter = netdev_priv(netdev);
3645         struct e1000_hw *hw = &adapter->hw;
3646         struct netdev_hw_addr *ha;
3647         u8  *mta_list;
3648         int i;
3649
3650         if (netdev_mc_empty(netdev)) {
3651                 /* nothing to program, so clear mc list */
3652                 igb_update_mc_addr_list(hw, NULL, 0);
3653                 igb_restore_vf_multicasts(adapter);
3654                 return 0;
3655         }
3656
3657         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3658         if (!mta_list)
3659                 return -ENOMEM;
3660
3661         /* The shared function expects a packed array of only addresses. */
3662         i = 0;
3663         netdev_for_each_mc_addr(ha, netdev)
3664                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3665
3666         igb_update_mc_addr_list(hw, mta_list, i);
3667         kfree(mta_list);
3668
3669         return netdev_mc_count(netdev);
3670 }
3671
3672 /**
3673  *  igb_write_uc_addr_list - write unicast addresses to RAR table
3674  *  @netdev: network interface device structure
3675  *
3676  *  Writes unicast address list to the RAR table.
3677  *  Returns: -ENOMEM on failure/insufficient address space
3678  *           0 on no addresses written
3679  *           X on writing X addresses to the RAR table
3680  **/
3681 static int igb_write_uc_addr_list(struct net_device *netdev)
3682 {
3683         struct igb_adapter *adapter = netdev_priv(netdev);
3684         struct e1000_hw *hw = &adapter->hw;
3685         unsigned int vfn = adapter->vfs_allocated_count;
3686         unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
3687         int count = 0;
3688
3689         /* return ENOMEM indicating insufficient memory for addresses */
3690         if (netdev_uc_count(netdev) > rar_entries)
3691                 return -ENOMEM;
3692
3693         if (!netdev_uc_empty(netdev) && rar_entries) {
3694                 struct netdev_hw_addr *ha;
3695
3696                 netdev_for_each_uc_addr(ha, netdev) {
3697                         if (!rar_entries)
3698                                 break;
3699                         igb_rar_set_qsel(adapter, ha->addr,
3700                                          rar_entries--,
3701                                          vfn);
3702                         count++;
3703                 }
3704         }
3705         /* write the addresses in reverse order to avoid write combining */
3706         for (; rar_entries > 0 ; rar_entries--) {
3707                 wr32(E1000_RAH(rar_entries), 0);
3708                 wr32(E1000_RAL(rar_entries), 0);
3709         }
3710         wrfl();
3711
3712         return count;
3713 }
3714
3715 /**
3716  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3717  *  @netdev: network interface device structure
3718  *
3719  *  The set_rx_mode entry point is called whenever the unicast or multicast
3720  *  address lists or the network interface flags are updated.  This routine is
3721  *  responsible for configuring the hardware for proper unicast, multicast,
3722  *  promiscuous mode, and all-multi behavior.
3723  **/
3724 static void igb_set_rx_mode(struct net_device *netdev)
3725 {
3726         struct igb_adapter *adapter = netdev_priv(netdev);
3727         struct e1000_hw *hw = &adapter->hw;
3728         unsigned int vfn = adapter->vfs_allocated_count;
3729         u32 rctl, vmolr = 0;
3730         int count;
3731
3732         /* Check for Promiscuous and All Multicast modes */
3733         rctl = rd32(E1000_RCTL);
3734
3735         /* clear the effected bits */
3736         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
3737
3738         if (netdev->flags & IFF_PROMISC) {
3739                 u32 mrqc = rd32(E1000_MRQC);
3740                 /* retain VLAN HW filtering if in VT mode */
3741                 if (mrqc & E1000_MRQC_ENABLE_VMDQ)
3742                         rctl |= E1000_RCTL_VFE;
3743                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3744                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
3745         } else {
3746                 if (netdev->flags & IFF_ALLMULTI) {
3747                         rctl |= E1000_RCTL_MPE;
3748                         vmolr |= E1000_VMOLR_MPME;
3749                 } else {
3750                         /* Write addresses to the MTA, if the attempt fails
3751                          * then we should just turn on promiscuous mode so
3752                          * that we can at least receive multicast traffic
3753                          */
3754                         count = igb_write_mc_addr_list(netdev);
3755                         if (count < 0) {
3756                                 rctl |= E1000_RCTL_MPE;
3757                                 vmolr |= E1000_VMOLR_MPME;
3758                         } else if (count) {
3759                                 vmolr |= E1000_VMOLR_ROMPE;
3760                         }
3761                 }
3762                 /* Write addresses to available RAR registers, if there is not
3763                  * sufficient space to store all the addresses then enable
3764                  * unicast promiscuous mode
3765                  */
3766                 count = igb_write_uc_addr_list(netdev);
3767                 if (count < 0) {
3768                         rctl |= E1000_RCTL_UPE;
3769                         vmolr |= E1000_VMOLR_ROPE;
3770                 }
3771                 rctl |= E1000_RCTL_VFE;
3772         }
3773         wr32(E1000_RCTL, rctl);
3774
3775         /* In order to support SR-IOV and eventually VMDq it is necessary to set
3776          * the VMOLR to enable the appropriate modes.  Without this workaround
3777          * we will have issues with VLAN tag stripping not being done for frames
3778          * that are only arriving because we are the default pool
3779          */
3780         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
3781                 return;
3782
3783         vmolr |= rd32(E1000_VMOLR(vfn)) &
3784                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
3785         wr32(E1000_VMOLR(vfn), vmolr);
3786         igb_restore_vf_multicasts(adapter);
3787 }
3788
3789 static void igb_check_wvbr(struct igb_adapter *adapter)
3790 {
3791         struct e1000_hw *hw = &adapter->hw;
3792         u32 wvbr = 0;
3793
3794         switch (hw->mac.type) {
3795         case e1000_82576:
3796         case e1000_i350:
3797                 if (!(wvbr = rd32(E1000_WVBR)))
3798                         return;
3799                 break;
3800         default:
3801                 break;
3802         }
3803
3804         adapter->wvbr |= wvbr;
3805 }
3806
3807 #define IGB_STAGGERED_QUEUE_OFFSET 8
3808
3809 static void igb_spoof_check(struct igb_adapter *adapter)
3810 {
3811         int j;
3812
3813         if (!adapter->wvbr)
3814                 return;
3815
3816         for(j = 0; j < adapter->vfs_allocated_count; j++) {
3817                 if (adapter->wvbr & (1 << j) ||
3818                     adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
3819                         dev_warn(&adapter->pdev->dev,
3820                                 "Spoof event(s) detected on VF %d\n", j);
3821                         adapter->wvbr &=
3822                                 ~((1 << j) |
3823                                   (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
3824                 }
3825         }
3826 }
3827
3828 /* Need to wait a few seconds after link up to get diagnostic information from
3829  * the phy
3830  */
3831 static void igb_update_phy_info(unsigned long data)
3832 {
3833         struct igb_adapter *adapter = (struct igb_adapter *) data;
3834         igb_get_phy_info(&adapter->hw);
3835 }
3836
3837 /**
3838  *  igb_has_link - check shared code for link and determine up/down
3839  *  @adapter: pointer to driver private info
3840  **/
3841 bool igb_has_link(struct igb_adapter *adapter)
3842 {
3843         struct e1000_hw *hw = &adapter->hw;
3844         bool link_active = false;
3845         s32 ret_val = 0;
3846
3847         /* get_link_status is set on LSC (link status) interrupt or
3848          * rx sequence error interrupt.  get_link_status will stay
3849          * false until the e1000_check_for_link establishes link
3850          * for copper adapters ONLY
3851          */
3852         switch (hw->phy.media_type) {
3853         case e1000_media_type_copper:
3854                 if (hw->mac.get_link_status) {
3855                         ret_val = hw->mac.ops.check_for_link(hw);
3856                         link_active = !hw->mac.get_link_status;
3857                 } else {
3858                         link_active = true;
3859                 }
3860                 break;
3861         case e1000_media_type_internal_serdes:
3862                 ret_val = hw->mac.ops.check_for_link(hw);
3863                 link_active = hw->mac.serdes_has_link;
3864                 break;
3865         default:
3866         case e1000_media_type_unknown:
3867                 break;
3868         }
3869
3870         return link_active;
3871 }
3872
3873 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
3874 {
3875         bool ret = false;
3876         u32 ctrl_ext, thstat;
3877
3878         /* check for thermal sensor event on i350 copper only */
3879         if (hw->mac.type == e1000_i350) {
3880                 thstat = rd32(E1000_THSTAT);
3881                 ctrl_ext = rd32(E1000_CTRL_EXT);
3882
3883                 if ((hw->phy.media_type == e1000_media_type_copper) &&
3884                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
3885                         ret = !!(thstat & event);
3886         }
3887
3888         return ret;
3889 }
3890
3891 /**
3892  *  igb_watchdog - Timer Call-back
3893  *  @data: pointer to adapter cast into an unsigned long
3894  **/
3895 static void igb_watchdog(unsigned long data)
3896 {
3897         struct igb_adapter *adapter = (struct igb_adapter *)data;
3898         /* Do the rest outside of interrupt context */
3899         schedule_work(&adapter->watchdog_task);
3900 }
3901
3902 static void igb_watchdog_task(struct work_struct *work)
3903 {
3904         struct igb_adapter *adapter = container_of(work,
3905                                                    struct igb_adapter,
3906                                                    watchdog_task);
3907         struct e1000_hw *hw = &adapter->hw;
3908         struct e1000_phy_info *phy = &hw->phy;
3909         struct net_device *netdev = adapter->netdev;
3910         u32 link;
3911         int i;
3912
3913         link = igb_has_link(adapter);
3914         if (link) {
3915                 /* Cancel scheduled suspend requests. */
3916                 pm_runtime_resume(netdev->dev.parent);
3917
3918                 if (!netif_carrier_ok(netdev)) {
3919                         u32 ctrl;
3920                         hw->mac.ops.get_speed_and_duplex(hw,
3921                                                          &adapter->link_speed,
3922                                                          &adapter->link_duplex);
3923
3924                         ctrl = rd32(E1000_CTRL);
3925                         /* Links status message must follow this format */
3926                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s "
3927                                "Duplex, Flow Control: %s\n",
3928                                netdev->name,
3929                                adapter->link_speed,
3930                                adapter->link_duplex == FULL_DUPLEX ?
3931                                "Full" : "Half",
3932                                (ctrl & E1000_CTRL_TFCE) &&
3933                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
3934                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
3935                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
3936
3937                         /* check if SmartSpeed worked */
3938                         igb_check_downshift(hw);
3939                         if (phy->speed_downgraded)
3940                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
3941
3942                         /* check for thermal sensor event */
3943                         if (igb_thermal_sensor_event(hw,
3944                             E1000_THSTAT_LINK_THROTTLE)) {
3945                                 netdev_info(netdev, "The network adapter link "
3946                                             "speed was downshifted because it "
3947                                             "overheated\n");
3948                         }
3949
3950                         /* adjust timeout factor according to speed/duplex */
3951                         adapter->tx_timeout_factor = 1;
3952                         switch (adapter->link_speed) {
3953                         case SPEED_10:
3954                                 adapter->tx_timeout_factor = 14;
3955                                 break;
3956                         case SPEED_100:
3957                                 /* maybe add some timeout factor ? */
3958                                 break;
3959                         }
3960
3961                         netif_carrier_on(netdev);
3962
3963                         igb_ping_all_vfs(adapter);
3964                         igb_check_vf_rate_limit(adapter);
3965
3966                         /* link state has changed, schedule phy info update */
3967                         if (!test_bit(__IGB_DOWN, &adapter->state))
3968                                 mod_timer(&adapter->phy_info_timer,
3969                                           round_jiffies(jiffies + 2 * HZ));
3970                 }
3971         } else {
3972                 if (netif_carrier_ok(netdev)) {
3973                         adapter->link_speed = 0;
3974                         adapter->link_duplex = 0;
3975
3976                         /* check for thermal sensor event */
3977                         if (igb_thermal_sensor_event(hw,
3978                             E1000_THSTAT_PWR_DOWN)) {
3979                                 netdev_err(netdev, "The network adapter was "
3980                                            "stopped because it overheated\n");
3981                         }
3982
3983                         /* Links status message must follow this format */
3984                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
3985                                netdev->name);
3986                         netif_carrier_off(netdev);
3987
3988                         igb_ping_all_vfs(adapter);
3989
3990                         /* link state has changed, schedule phy info update */
3991                         if (!test_bit(__IGB_DOWN, &adapter->state))
3992                                 mod_timer(&adapter->phy_info_timer,
3993                                           round_jiffies(jiffies + 2 * HZ));
3994
3995                         pm_schedule_suspend(netdev->dev.parent,
3996                                             MSEC_PER_SEC * 5);
3997                 }
3998         }
3999
4000         spin_lock(&adapter->stats64_lock);
4001         igb_update_stats(adapter, &adapter->stats64);
4002         spin_unlock(&adapter->stats64_lock);
4003
4004         for (i = 0; i < adapter->num_tx_queues; i++) {
4005                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4006                 if (!netif_carrier_ok(netdev)) {
4007                         /* We've lost link, so the controller stops DMA,
4008                          * but we've got queued Tx work that's never going
4009                          * to get done, so reset controller to flush Tx.
4010                          * (Do the reset outside of interrupt context).
4011                          */
4012                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4013                                 adapter->tx_timeout_count++;
4014                                 schedule_work(&adapter->reset_task);
4015                                 /* return immediately since reset is imminent */
4016                                 return;
4017                         }
4018                 }
4019
4020                 /* Force detection of hung controller every watchdog period */
4021                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4022         }
4023
4024         /* Cause software interrupt to ensure Rx ring is cleaned */
4025         if (adapter->msix_entries) {
4026                 u32 eics = 0;
4027                 for (i = 0; i < adapter->num_q_vectors; i++)
4028                         eics |= adapter->q_vector[i]->eims_value;
4029                 wr32(E1000_EICS, eics);
4030         } else {
4031                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4032         }
4033
4034         igb_spoof_check(adapter);
4035         igb_ptp_rx_hang(adapter);
4036
4037         /* Reset the timer */
4038         if (!test_bit(__IGB_DOWN, &adapter->state))
4039                 mod_timer(&adapter->watchdog_timer,
4040                           round_jiffies(jiffies + 2 * HZ));
4041 }
4042
4043 enum latency_range {
4044         lowest_latency = 0,
4045         low_latency = 1,
4046         bulk_latency = 2,
4047         latency_invalid = 255
4048 };
4049
4050 /**
4051  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
4052  *  @q_vector: pointer to q_vector
4053  *
4054  *  Stores a new ITR value based on strictly on packet size.  This
4055  *  algorithm is less sophisticated than that used in igb_update_itr,
4056  *  due to the difficulty of synchronizing statistics across multiple
4057  *  receive rings.  The divisors and thresholds used by this function
4058  *  were determined based on theoretical maximum wire speed and testing
4059  *  data, in order to minimize response time while increasing bulk
4060  *  throughput.
4061  *  This functionality is controlled by the InterruptThrottleRate module
4062  *  parameter (see igb_param.c)
4063  *  NOTE:  This function is called only when operating in a multiqueue
4064  *         receive environment.
4065  **/
4066 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4067 {
4068         int new_val = q_vector->itr_val;
4069         int avg_wire_size = 0;
4070         struct igb_adapter *adapter = q_vector->adapter;
4071         unsigned int packets;
4072
4073         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4074          * ints/sec - ITR timer value of 120 ticks.
4075          */
4076         if (adapter->link_speed != SPEED_1000) {
4077                 new_val = IGB_4K_ITR;
4078                 goto set_itr_val;
4079         }
4080
4081         packets = q_vector->rx.total_packets;
4082         if (packets)
4083                 avg_wire_size = q_vector->rx.total_bytes / packets;
4084
4085         packets = q_vector->tx.total_packets;
4086         if (packets)
4087                 avg_wire_size = max_t(u32, avg_wire_size,
4088                                       q_vector->tx.total_bytes / packets);
4089
4090         /* if avg_wire_size isn't set no work was done */
4091         if (!avg_wire_size)
4092                 goto clear_counts;
4093
4094         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4095         avg_wire_size += 24;
4096
4097         /* Don't starve jumbo frames */
4098         avg_wire_size = min(avg_wire_size, 3000);
4099
4100         /* Give a little boost to mid-size frames */
4101         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4102                 new_val = avg_wire_size / 3;
4103         else
4104                 new_val = avg_wire_size / 2;
4105
4106         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4107         if (new_val < IGB_20K_ITR &&
4108             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4109              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4110                 new_val = IGB_20K_ITR;
4111
4112 set_itr_val:
4113         if (new_val != q_vector->itr_val) {
4114                 q_vector->itr_val = new_val;
4115                 q_vector->set_itr = 1;
4116         }
4117 clear_counts:
4118         q_vector->rx.total_bytes = 0;
4119         q_vector->rx.total_packets = 0;
4120         q_vector->tx.total_bytes = 0;
4121         q_vector->tx.total_packets = 0;
4122 }
4123
4124 /**
4125  *  igb_update_itr - update the dynamic ITR value based on statistics
4126  *  @q_vector: pointer to q_vector
4127  *  @ring_container: ring info to update the itr for
4128  *
4129  *  Stores a new ITR value based on packets and byte
4130  *  counts during the last interrupt.  The advantage of per interrupt
4131  *  computation is faster updates and more accurate ITR for the current
4132  *  traffic pattern.  Constants in this function were computed
4133  *  based on theoretical maximum wire speed and thresholds were set based
4134  *  on testing data as well as attempting to minimize response time
4135  *  while increasing bulk throughput.
4136  *  this functionality is controlled by the InterruptThrottleRate module
4137  *  parameter (see igb_param.c)
4138  *  NOTE:  These calculations are only valid when operating in a single-
4139  *         queue environment.
4140  **/
4141 static void igb_update_itr(struct igb_q_vector *q_vector,
4142                            struct igb_ring_container *ring_container)
4143 {
4144         unsigned int packets = ring_container->total_packets;
4145         unsigned int bytes = ring_container->total_bytes;
4146         u8 itrval = ring_container->itr;
4147
4148         /* no packets, exit with status unchanged */
4149         if (packets == 0)
4150                 return;
4151
4152         switch (itrval) {
4153         case lowest_latency:
4154                 /* handle TSO and jumbo frames */
4155                 if (bytes/packets > 8000)
4156                         itrval = bulk_latency;
4157                 else if ((packets < 5) && (bytes > 512))
4158                         itrval = low_latency;
4159                 break;
4160         case low_latency:  /* 50 usec aka 20000 ints/s */
4161                 if (bytes > 10000) {
4162                         /* this if handles the TSO accounting */
4163                         if (bytes/packets > 8000) {
4164                                 itrval = bulk_latency;
4165                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4166                                 itrval = bulk_latency;
4167                         } else if ((packets > 35)) {
4168                                 itrval = lowest_latency;
4169                         }
4170                 } else if (bytes/packets > 2000) {
4171                         itrval = bulk_latency;
4172                 } else if (packets <= 2 && bytes < 512) {
4173                         itrval = lowest_latency;
4174                 }
4175                 break;
4176         case bulk_latency: /* 250 usec aka 4000 ints/s */
4177                 if (bytes > 25000) {
4178                         if (packets > 35)
4179                                 itrval = low_latency;
4180                 } else if (bytes < 1500) {
4181                         itrval = low_latency;
4182                 }
4183                 break;
4184         }
4185
4186         /* clear work counters since we have the values we need */
4187         ring_container->total_bytes = 0;
4188         ring_container->total_packets = 0;
4189
4190         /* write updated itr to ring container */
4191         ring_container->itr = itrval;
4192 }
4193
4194 static void igb_set_itr(struct igb_q_vector *q_vector)
4195 {
4196         struct igb_adapter *adapter = q_vector->adapter;
4197         u32 new_itr = q_vector->itr_val;
4198         u8 current_itr = 0;
4199
4200         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4201         if (adapter->link_speed != SPEED_1000) {
4202                 current_itr = 0;
4203                 new_itr = IGB_4K_ITR;
4204                 goto set_itr_now;
4205         }
4206
4207         igb_update_itr(q_vector, &q_vector->tx);
4208         igb_update_itr(q_vector, &q_vector->rx);
4209
4210         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4211
4212         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4213         if (current_itr == lowest_latency &&
4214             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4215              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4216                 current_itr = low_latency;
4217
4218         switch (current_itr) {
4219         /* counts and packets in update_itr are dependent on these numbers */
4220         case lowest_latency:
4221                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4222                 break;
4223         case low_latency:
4224                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4225                 break;
4226         case bulk_latency:
4227                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
4228                 break;
4229         default:
4230                 break;
4231         }
4232
4233 set_itr_now:
4234         if (new_itr != q_vector->itr_val) {
4235                 /* this attempts to bias the interrupt rate towards Bulk
4236                  * by adding intermediate steps when interrupt rate is
4237                  * increasing
4238                  */
4239                 new_itr = new_itr > q_vector->itr_val ?
4240                           max((new_itr * q_vector->itr_val) /
4241                           (new_itr + (q_vector->itr_val >> 2)),
4242                           new_itr) : new_itr;
4243                 /* Don't write the value here; it resets the adapter's
4244                  * internal timer, and causes us to delay far longer than
4245                  * we should between interrupts.  Instead, we write the ITR
4246                  * value at the beginning of the next interrupt so the timing
4247                  * ends up being correct.
4248                  */
4249                 q_vector->itr_val = new_itr;
4250                 q_vector->set_itr = 1;
4251         }
4252 }
4253
4254 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4255                             u32 type_tucmd, u32 mss_l4len_idx)
4256 {
4257         struct e1000_adv_tx_context_desc *context_desc;
4258         u16 i = tx_ring->next_to_use;
4259
4260         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4261
4262         i++;
4263         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4264
4265         /* set bits to identify this as an advanced context descriptor */
4266         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4267
4268         /* For 82575, context index must be unique per ring. */
4269         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4270                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4271
4272         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4273         context_desc->seqnum_seed       = 0;
4274         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4275         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4276 }
4277
4278 static int igb_tso(struct igb_ring *tx_ring,
4279                    struct igb_tx_buffer *first,
4280                    u8 *hdr_len)
4281 {
4282         struct sk_buff *skb = first->skb;
4283         u32 vlan_macip_lens, type_tucmd;
4284         u32 mss_l4len_idx, l4len;
4285
4286         if (skb->ip_summed != CHECKSUM_PARTIAL)
4287                 return 0;
4288
4289         if (!skb_is_gso(skb))
4290                 return 0;
4291
4292         if (skb_header_cloned(skb)) {
4293                 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4294                 if (err)
4295                         return err;
4296         }
4297
4298         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4299         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4300
4301         if (first->protocol == __constant_htons(ETH_P_IP)) {
4302                 struct iphdr *iph = ip_hdr(skb);
4303                 iph->tot_len = 0;
4304                 iph->check = 0;
4305                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4306                                                          iph->daddr, 0,
4307                                                          IPPROTO_TCP,
4308                                                          0);
4309                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4310                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4311                                    IGB_TX_FLAGS_CSUM |
4312                                    IGB_TX_FLAGS_IPV4;
4313         } else if (skb_is_gso_v6(skb)) {
4314                 ipv6_hdr(skb)->payload_len = 0;
4315                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4316                                                        &ipv6_hdr(skb)->daddr,
4317                                                        0, IPPROTO_TCP, 0);
4318                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4319                                    IGB_TX_FLAGS_CSUM;
4320         }
4321
4322         /* compute header lengths */
4323         l4len = tcp_hdrlen(skb);
4324         *hdr_len = skb_transport_offset(skb) + l4len;
4325
4326         /* update gso size and bytecount with header size */
4327         first->gso_segs = skb_shinfo(skb)->gso_segs;
4328         first->bytecount += (first->gso_segs - 1) * *hdr_len;
4329
4330         /* MSS L4LEN IDX */
4331         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4332         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4333
4334         /* VLAN MACLEN IPLEN */
4335         vlan_macip_lens = skb_network_header_len(skb);
4336         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4337         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4338
4339         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4340
4341         return 1;
4342 }
4343
4344 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4345 {
4346         struct sk_buff *skb = first->skb;
4347         u32 vlan_macip_lens = 0;
4348         u32 mss_l4len_idx = 0;
4349         u32 type_tucmd = 0;
4350
4351         if (skb->ip_summed != CHECKSUM_PARTIAL) {
4352                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4353                         return;
4354         } else {
4355                 u8 l4_hdr = 0;
4356                 switch (first->protocol) {
4357                 case __constant_htons(ETH_P_IP):
4358                         vlan_macip_lens |= skb_network_header_len(skb);
4359                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4360                         l4_hdr = ip_hdr(skb)->protocol;
4361                         break;
4362                 case __constant_htons(ETH_P_IPV6):
4363                         vlan_macip_lens |= skb_network_header_len(skb);
4364                         l4_hdr = ipv6_hdr(skb)->nexthdr;
4365                         break;
4366                 default:
4367                         if (unlikely(net_ratelimit())) {
4368                                 dev_warn(tx_ring->dev,
4369                                          "partial checksum but proto=%x!\n",
4370                                          first->protocol);
4371                         }
4372                         break;
4373                 }
4374
4375                 switch (l4_hdr) {
4376                 case IPPROTO_TCP:
4377                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
4378                         mss_l4len_idx = tcp_hdrlen(skb) <<
4379                                         E1000_ADVTXD_L4LEN_SHIFT;
4380                         break;
4381                 case IPPROTO_SCTP:
4382                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
4383                         mss_l4len_idx = sizeof(struct sctphdr) <<
4384                                         E1000_ADVTXD_L4LEN_SHIFT;
4385                         break;
4386                 case IPPROTO_UDP:
4387                         mss_l4len_idx = sizeof(struct udphdr) <<
4388                                         E1000_ADVTXD_L4LEN_SHIFT;
4389                         break;
4390                 default:
4391                         if (unlikely(net_ratelimit())) {
4392                                 dev_warn(tx_ring->dev,
4393                                          "partial checksum but l4 proto=%x!\n",
4394                                          l4_hdr);
4395                         }
4396                         break;
4397                 }
4398
4399                 /* update TX checksum flag */
4400                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
4401         }
4402
4403         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4404         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4405
4406         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4407 }
4408
4409 #define IGB_SET_FLAG(_input, _flag, _result) \
4410         ((_flag <= _result) ? \
4411          ((u32)(_input & _flag) * (_result / _flag)) : \
4412          ((u32)(_input & _flag) / (_flag / _result)))
4413
4414 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
4415 {
4416         /* set type for advanced descriptor with frame checksum insertion */
4417         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
4418                        E1000_ADVTXD_DCMD_DEXT |
4419                        E1000_ADVTXD_DCMD_IFCS;
4420
4421         /* set HW vlan bit if vlan is present */
4422         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
4423                                  (E1000_ADVTXD_DCMD_VLE));
4424
4425         /* set segmentation bits for TSO */
4426         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
4427                                  (E1000_ADVTXD_DCMD_TSE));
4428
4429         /* set timestamp bit if present */
4430         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
4431                                  (E1000_ADVTXD_MAC_TSTAMP));
4432
4433         /* insert frame checksum */
4434         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
4435
4436         return cmd_type;
4437 }
4438
4439 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4440                                  union e1000_adv_tx_desc *tx_desc,
4441                                  u32 tx_flags, unsigned int paylen)
4442 {
4443         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4444
4445         /* 82575 requires a unique index per ring */
4446         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4447                 olinfo_status |= tx_ring->reg_idx << 4;
4448
4449         /* insert L4 checksum */
4450         olinfo_status |= IGB_SET_FLAG(tx_flags,
4451                                       IGB_TX_FLAGS_CSUM,
4452                                       (E1000_TXD_POPTS_TXSM << 8));
4453
4454         /* insert IPv4 checksum */
4455         olinfo_status |= IGB_SET_FLAG(tx_flags,
4456                                       IGB_TX_FLAGS_IPV4,
4457                                       (E1000_TXD_POPTS_IXSM << 8));
4458
4459         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4460 }
4461
4462 static void igb_tx_map(struct igb_ring *tx_ring,
4463                        struct igb_tx_buffer *first,
4464                        const u8 hdr_len)
4465 {
4466         struct sk_buff *skb = first->skb;
4467         struct igb_tx_buffer *tx_buffer;
4468         union e1000_adv_tx_desc *tx_desc;
4469         struct skb_frag_struct *frag;
4470         dma_addr_t dma;
4471         unsigned int data_len, size;
4472         u32 tx_flags = first->tx_flags;
4473         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
4474         u16 i = tx_ring->next_to_use;
4475
4476         tx_desc = IGB_TX_DESC(tx_ring, i);
4477
4478         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
4479
4480         size = skb_headlen(skb);
4481         data_len = skb->data_len;
4482
4483         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
4484
4485         tx_buffer = first;
4486
4487         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
4488                 if (dma_mapping_error(tx_ring->dev, dma))
4489                         goto dma_error;
4490
4491                 /* record length, and DMA address */
4492                 dma_unmap_len_set(tx_buffer, len, size);
4493                 dma_unmap_addr_set(tx_buffer, dma, dma);
4494
4495                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4496
4497                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
4498                         tx_desc->read.cmd_type_len =
4499                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
4500
4501                         i++;
4502                         tx_desc++;
4503                         if (i == tx_ring->count) {
4504                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4505                                 i = 0;
4506                         }
4507                         tx_desc->read.olinfo_status = 0;
4508
4509                         dma += IGB_MAX_DATA_PER_TXD;
4510                         size -= IGB_MAX_DATA_PER_TXD;
4511
4512                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
4513                 }
4514
4515                 if (likely(!data_len))
4516                         break;
4517
4518                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
4519
4520                 i++;
4521                 tx_desc++;
4522                 if (i == tx_ring->count) {
4523                         tx_desc = IGB_TX_DESC(tx_ring, 0);
4524                         i = 0;
4525                 }
4526                 tx_desc->read.olinfo_status = 0;
4527
4528                 size = skb_frag_size(frag);
4529                 data_len -= size;
4530
4531                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
4532                                        size, DMA_TO_DEVICE);
4533
4534                 tx_buffer = &tx_ring->tx_buffer_info[i];
4535         }
4536
4537         /* write last descriptor with RS and EOP bits */
4538         cmd_type |= size | IGB_TXD_DCMD;
4539         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
4540
4541         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
4542
4543         /* set the timestamp */
4544         first->time_stamp = jiffies;
4545
4546         /* Force memory writes to complete before letting h/w know there
4547          * are new descriptors to fetch.  (Only applicable for weak-ordered
4548          * memory model archs, such as IA-64).
4549          *
4550          * We also need this memory barrier to make certain all of the
4551          * status bits have been updated before next_to_watch is written.
4552          */
4553         wmb();
4554
4555         /* set next_to_watch value indicating a packet is present */
4556         first->next_to_watch = tx_desc;
4557
4558         i++;
4559         if (i == tx_ring->count)
4560                 i = 0;
4561
4562         tx_ring->next_to_use = i;
4563
4564         writel(i, tx_ring->tail);
4565
4566         /* we need this if more than one processor can write to our tail
4567          * at a time, it synchronizes IO on IA64/Altix systems
4568          */
4569         mmiowb();
4570
4571         return;
4572
4573 dma_error:
4574         dev_err(tx_ring->dev, "TX DMA map failed\n");
4575
4576         /* clear dma mappings for failed tx_buffer_info map */
4577         for (;;) {
4578                 tx_buffer = &tx_ring->tx_buffer_info[i];
4579                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
4580                 if (tx_buffer == first)
4581                         break;
4582                 if (i == 0)
4583                         i = tx_ring->count;
4584                 i--;
4585         }
4586
4587         tx_ring->next_to_use = i;
4588 }
4589
4590 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4591 {
4592         struct net_device *netdev = tx_ring->netdev;
4593
4594         netif_stop_subqueue(netdev, tx_ring->queue_index);
4595
4596         /* Herbert's original patch had:
4597          *  smp_mb__after_netif_stop_queue();
4598          * but since that doesn't exist yet, just open code it.
4599          */
4600         smp_mb();
4601
4602         /* We need to check again in a case another CPU has just
4603          * made room available.
4604          */
4605         if (igb_desc_unused(tx_ring) < size)
4606                 return -EBUSY;
4607
4608         /* A reprieve! */
4609         netif_wake_subqueue(netdev, tx_ring->queue_index);
4610
4611         u64_stats_update_begin(&tx_ring->tx_syncp2);
4612         tx_ring->tx_stats.restart_queue2++;
4613         u64_stats_update_end(&tx_ring->tx_syncp2);
4614
4615         return 0;
4616 }
4617
4618 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4619 {
4620         if (igb_desc_unused(tx_ring) >= size)
4621                 return 0;
4622         return __igb_maybe_stop_tx(tx_ring, size);
4623 }
4624
4625 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4626                                 struct igb_ring *tx_ring)
4627 {
4628         struct igb_tx_buffer *first;
4629         int tso;
4630         u32 tx_flags = 0;
4631         u16 count = TXD_USE_COUNT(skb_headlen(skb));
4632         __be16 protocol = vlan_get_protocol(skb);
4633         u8 hdr_len = 0;
4634
4635         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4636          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4637          *       + 2 desc gap to keep tail from touching head,
4638          *       + 1 desc for context descriptor,
4639          * otherwise try next time
4640          */
4641         if (NETDEV_FRAG_PAGE_MAX_SIZE > IGB_MAX_DATA_PER_TXD) {
4642                 unsigned short f;
4643                 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
4644                         count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
4645         } else {
4646                 count += skb_shinfo(skb)->nr_frags;
4647         }
4648
4649         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
4650                 /* this is a hard error */
4651                 return NETDEV_TX_BUSY;
4652         }
4653
4654         /* record the location of the first descriptor for this packet */
4655         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4656         first->skb = skb;
4657         first->bytecount = skb->len;
4658         first->gso_segs = 1;
4659
4660         skb_tx_timestamp(skb);
4661
4662         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
4663                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
4664
4665                 if (!(adapter->ptp_tx_skb)) {
4666                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
4667                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
4668
4669                         adapter->ptp_tx_skb = skb_get(skb);
4670                         adapter->ptp_tx_start = jiffies;
4671                         if (adapter->hw.mac.type == e1000_82576)
4672                                 schedule_work(&adapter->ptp_tx_work);
4673                 }
4674         }
4675
4676         if (vlan_tx_tag_present(skb)) {
4677                 tx_flags |= IGB_TX_FLAGS_VLAN;
4678                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
4679         }
4680
4681         /* record initial flags and protocol */
4682         first->tx_flags = tx_flags;
4683         first->protocol = protocol;
4684
4685         tso = igb_tso(tx_ring, first, &hdr_len);
4686         if (tso < 0)
4687                 goto out_drop;
4688         else if (!tso)
4689                 igb_tx_csum(tx_ring, first);
4690
4691         igb_tx_map(tx_ring, first, hdr_len);
4692
4693         /* Make sure there is space in the ring for the next send. */
4694         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
4695
4696         return NETDEV_TX_OK;
4697
4698 out_drop:
4699         igb_unmap_and_free_tx_resource(tx_ring, first);
4700
4701         return NETDEV_TX_OK;
4702 }
4703
4704 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
4705                                                     struct sk_buff *skb)
4706 {
4707         unsigned int r_idx = skb->queue_mapping;
4708
4709         if (r_idx >= adapter->num_tx_queues)
4710                 r_idx = r_idx % adapter->num_tx_queues;
4711
4712         return adapter->tx_ring[r_idx];
4713 }
4714
4715 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
4716                                   struct net_device *netdev)
4717 {
4718         struct igb_adapter *adapter = netdev_priv(netdev);
4719
4720         if (test_bit(__IGB_DOWN, &adapter->state)) {
4721                 dev_kfree_skb_any(skb);
4722                 return NETDEV_TX_OK;
4723         }
4724
4725         if (skb->len <= 0) {
4726                 dev_kfree_skb_any(skb);
4727                 return NETDEV_TX_OK;
4728         }
4729
4730         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
4731          * in order to meet this minimum size requirement.
4732          */
4733         if (unlikely(skb->len < 17)) {
4734                 if (skb_pad(skb, 17 - skb->len))
4735                         return NETDEV_TX_OK;
4736                 skb->len = 17;
4737                 skb_set_tail_pointer(skb, 17);
4738         }
4739
4740         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
4741 }
4742
4743 /**
4744  *  igb_tx_timeout - Respond to a Tx Hang
4745  *  @netdev: network interface device structure
4746  **/
4747 static void igb_tx_timeout(struct net_device *netdev)
4748 {
4749         struct igb_adapter *adapter = netdev_priv(netdev);
4750         struct e1000_hw *hw = &adapter->hw;
4751
4752         /* Do the reset outside of interrupt context */
4753         adapter->tx_timeout_count++;
4754
4755         if (hw->mac.type >= e1000_82580)
4756                 hw->dev_spec._82575.global_device_reset = true;
4757
4758         schedule_work(&adapter->reset_task);
4759         wr32(E1000_EICS,
4760              (adapter->eims_enable_mask & ~adapter->eims_other));
4761 }
4762
4763 static void igb_reset_task(struct work_struct *work)
4764 {
4765         struct igb_adapter *adapter;
4766         adapter = container_of(work, struct igb_adapter, reset_task);
4767
4768         igb_dump(adapter);
4769         netdev_err(adapter->netdev, "Reset adapter\n");
4770         igb_reinit_locked(adapter);
4771 }
4772
4773 /**
4774  *  igb_get_stats64 - Get System Network Statistics
4775  *  @netdev: network interface device structure
4776  *  @stats: rtnl_link_stats64 pointer
4777  **/
4778 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
4779                                                 struct rtnl_link_stats64 *stats)
4780 {
4781         struct igb_adapter *adapter = netdev_priv(netdev);
4782
4783         spin_lock(&adapter->stats64_lock);
4784         igb_update_stats(adapter, &adapter->stats64);
4785         memcpy(stats, &adapter->stats64, sizeof(*stats));
4786         spin_unlock(&adapter->stats64_lock);
4787
4788         return stats;
4789 }
4790
4791 /**
4792  *  igb_change_mtu - Change the Maximum Transfer Unit
4793  *  @netdev: network interface device structure
4794  *  @new_mtu: new value for maximum frame size
4795  *
4796  *  Returns 0 on success, negative on failure
4797  **/
4798 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
4799 {
4800         struct igb_adapter *adapter = netdev_priv(netdev);
4801         struct pci_dev *pdev = adapter->pdev;
4802         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
4803
4804         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
4805                 dev_err(&pdev->dev, "Invalid MTU setting\n");
4806                 return -EINVAL;
4807         }
4808
4809 #define MAX_STD_JUMBO_FRAME_SIZE 9238
4810         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
4811                 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
4812                 return -EINVAL;
4813         }
4814
4815         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
4816                 msleep(1);
4817
4818         /* igb_down has a dependency on max_frame_size */
4819         adapter->max_frame_size = max_frame;
4820
4821         if (netif_running(netdev))
4822                 igb_down(adapter);
4823
4824         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
4825                  netdev->mtu, new_mtu);
4826         netdev->mtu = new_mtu;
4827
4828         if (netif_running(netdev))
4829                 igb_up(adapter);
4830         else
4831                 igb_reset(adapter);
4832
4833         clear_bit(__IGB_RESETTING, &adapter->state);
4834
4835         return 0;
4836 }
4837
4838 /**
4839  *  igb_update_stats - Update the board statistics counters
4840  *  @adapter: board private structure
4841  **/
4842 void igb_update_stats(struct igb_adapter *adapter,
4843                       struct rtnl_link_stats64 *net_stats)
4844 {
4845         struct e1000_hw *hw = &adapter->hw;
4846         struct pci_dev *pdev = adapter->pdev;
4847         u32 reg, mpc;
4848         u16 phy_tmp;
4849         int i;
4850         u64 bytes, packets;
4851         unsigned int start;
4852         u64 _bytes, _packets;
4853
4854 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
4855
4856         /* Prevent stats update while adapter is being reset, or if the pci
4857          * connection is down.
4858          */
4859         if (adapter->link_speed == 0)
4860                 return;
4861         if (pci_channel_offline(pdev))
4862                 return;
4863
4864         bytes = 0;
4865         packets = 0;
4866         for (i = 0; i < adapter->num_rx_queues; i++) {
4867                 u32 rqdpc = rd32(E1000_RQDPC(i));
4868                 struct igb_ring *ring = adapter->rx_ring[i];
4869
4870                 if (rqdpc) {
4871                         ring->rx_stats.drops += rqdpc;
4872                         net_stats->rx_fifo_errors += rqdpc;
4873                 }
4874
4875                 do {
4876                         start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
4877                         _bytes = ring->rx_stats.bytes;
4878                         _packets = ring->rx_stats.packets;
4879                 } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start));
4880                 bytes += _bytes;
4881                 packets += _packets;
4882         }
4883
4884         net_stats->rx_bytes = bytes;
4885         net_stats->rx_packets = packets;
4886
4887         bytes = 0;
4888         packets = 0;
4889         for (i = 0; i < adapter->num_tx_queues; i++) {
4890                 struct igb_ring *ring = adapter->tx_ring[i];
4891                 do {
4892                         start = u64_stats_fetch_begin_bh(&ring->tx_syncp);
4893                         _bytes = ring->tx_stats.bytes;
4894                         _packets = ring->tx_stats.packets;
4895                 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start));
4896                 bytes += _bytes;
4897                 packets += _packets;
4898         }
4899         net_stats->tx_bytes = bytes;
4900         net_stats->tx_packets = packets;
4901
4902         /* read stats registers */
4903         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
4904         adapter->stats.gprc += rd32(E1000_GPRC);
4905         adapter->stats.gorc += rd32(E1000_GORCL);
4906         rd32(E1000_GORCH); /* clear GORCL */
4907         adapter->stats.bprc += rd32(E1000_BPRC);
4908         adapter->stats.mprc += rd32(E1000_MPRC);
4909         adapter->stats.roc += rd32(E1000_ROC);
4910
4911         adapter->stats.prc64 += rd32(E1000_PRC64);
4912         adapter->stats.prc127 += rd32(E1000_PRC127);
4913         adapter->stats.prc255 += rd32(E1000_PRC255);
4914         adapter->stats.prc511 += rd32(E1000_PRC511);
4915         adapter->stats.prc1023 += rd32(E1000_PRC1023);
4916         adapter->stats.prc1522 += rd32(E1000_PRC1522);
4917         adapter->stats.symerrs += rd32(E1000_SYMERRS);
4918         adapter->stats.sec += rd32(E1000_SEC);
4919
4920         mpc = rd32(E1000_MPC);
4921         adapter->stats.mpc += mpc;
4922         net_stats->rx_fifo_errors += mpc;
4923         adapter->stats.scc += rd32(E1000_SCC);
4924         adapter->stats.ecol += rd32(E1000_ECOL);
4925         adapter->stats.mcc += rd32(E1000_MCC);
4926         adapter->stats.latecol += rd32(E1000_LATECOL);
4927         adapter->stats.dc += rd32(E1000_DC);
4928         adapter->stats.rlec += rd32(E1000_RLEC);
4929         adapter->stats.xonrxc += rd32(E1000_XONRXC);
4930         adapter->stats.xontxc += rd32(E1000_XONTXC);
4931         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
4932         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
4933         adapter->stats.fcruc += rd32(E1000_FCRUC);
4934         adapter->stats.gptc += rd32(E1000_GPTC);
4935         adapter->stats.gotc += rd32(E1000_GOTCL);
4936         rd32(E1000_GOTCH); /* clear GOTCL */
4937         adapter->stats.rnbc += rd32(E1000_RNBC);
4938         adapter->stats.ruc += rd32(E1000_RUC);
4939         adapter->stats.rfc += rd32(E1000_RFC);
4940         adapter->stats.rjc += rd32(E1000_RJC);
4941         adapter->stats.tor += rd32(E1000_TORH);
4942         adapter->stats.tot += rd32(E1000_TOTH);
4943         adapter->stats.tpr += rd32(E1000_TPR);
4944
4945         adapter->stats.ptc64 += rd32(E1000_PTC64);
4946         adapter->stats.ptc127 += rd32(E1000_PTC127);
4947         adapter->stats.ptc255 += rd32(E1000_PTC255);
4948         adapter->stats.ptc511 += rd32(E1000_PTC511);
4949         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
4950         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
4951
4952         adapter->stats.mptc += rd32(E1000_MPTC);
4953         adapter->stats.bptc += rd32(E1000_BPTC);
4954
4955         adapter->stats.tpt += rd32(E1000_TPT);
4956         adapter->stats.colc += rd32(E1000_COLC);
4957
4958         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
4959         /* read internal phy specific stats */
4960         reg = rd32(E1000_CTRL_EXT);
4961         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
4962                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
4963
4964                 /* this stat has invalid values on i210/i211 */
4965                 if ((hw->mac.type != e1000_i210) &&
4966                     (hw->mac.type != e1000_i211))
4967                         adapter->stats.tncrs += rd32(E1000_TNCRS);
4968         }
4969
4970         adapter->stats.tsctc += rd32(E1000_TSCTC);
4971         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
4972
4973         adapter->stats.iac += rd32(E1000_IAC);
4974         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
4975         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
4976         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
4977         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
4978         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
4979         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
4980         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
4981         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
4982
4983         /* Fill out the OS statistics structure */
4984         net_stats->multicast = adapter->stats.mprc;
4985         net_stats->collisions = adapter->stats.colc;
4986
4987         /* Rx Errors */
4988
4989         /* RLEC on some newer hardware can be incorrect so build
4990          * our own version based on RUC and ROC
4991          */
4992         net_stats->rx_errors = adapter->stats.rxerrc +
4993                 adapter->stats.crcerrs + adapter->stats.algnerrc +
4994                 adapter->stats.ruc + adapter->stats.roc +
4995                 adapter->stats.cexterr;
4996         net_stats->rx_length_errors = adapter->stats.ruc +
4997                                       adapter->stats.roc;
4998         net_stats->rx_crc_errors = adapter->stats.crcerrs;
4999         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5000         net_stats->rx_missed_errors = adapter->stats.mpc;
5001
5002         /* Tx Errors */
5003         net_stats->tx_errors = adapter->stats.ecol +
5004                                adapter->stats.latecol;
5005         net_stats->tx_aborted_errors = adapter->stats.ecol;
5006         net_stats->tx_window_errors = adapter->stats.latecol;
5007         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5008
5009         /* Tx Dropped needs to be maintained elsewhere */
5010
5011         /* Phy Stats */
5012         if (hw->phy.media_type == e1000_media_type_copper) {
5013                 if ((adapter->link_speed == SPEED_1000) &&
5014                    (!igb_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5015                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5016                         adapter->phy_stats.idle_errors += phy_tmp;
5017                 }
5018         }
5019
5020         /* Management Stats */
5021         adapter->stats.mgptc += rd32(E1000_MGTPTC);
5022         adapter->stats.mgprc += rd32(E1000_MGTPRC);
5023         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5024
5025         /* OS2BMC Stats */
5026         reg = rd32(E1000_MANC);
5027         if (reg & E1000_MANC_EN_BMC2OS) {
5028                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5029                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5030                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5031                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5032         }
5033 }
5034
5035 static irqreturn_t igb_msix_other(int irq, void *data)
5036 {
5037         struct igb_adapter *adapter = data;
5038         struct e1000_hw *hw = &adapter->hw;
5039         u32 icr = rd32(E1000_ICR);
5040         /* reading ICR causes bit 31 of EICR to be cleared */
5041
5042         if (icr & E1000_ICR_DRSTA)
5043                 schedule_work(&adapter->reset_task);
5044
5045         if (icr & E1000_ICR_DOUTSYNC) {
5046                 /* HW is reporting DMA is out of sync */
5047                 adapter->stats.doosync++;
5048                 /* The DMA Out of Sync is also indication of a spoof event
5049                  * in IOV mode. Check the Wrong VM Behavior register to
5050                  * see if it is really a spoof event.
5051                  */
5052                 igb_check_wvbr(adapter);
5053         }
5054
5055         /* Check for a mailbox event */
5056         if (icr & E1000_ICR_VMMB)
5057                 igb_msg_task(adapter);
5058
5059         if (icr & E1000_ICR_LSC) {
5060                 hw->mac.get_link_status = 1;
5061                 /* guard against interrupt when we're going down */
5062                 if (!test_bit(__IGB_DOWN, &adapter->state))
5063                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5064         }
5065
5066         if (icr & E1000_ICR_TS) {
5067                 u32 tsicr = rd32(E1000_TSICR);
5068
5069                 if (tsicr & E1000_TSICR_TXTS) {
5070                         /* acknowledge the interrupt */
5071                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
5072                         /* retrieve hardware timestamp */
5073                         schedule_work(&adapter->ptp_tx_work);
5074                 }
5075         }
5076
5077         wr32(E1000_EIMS, adapter->eims_other);
5078
5079         return IRQ_HANDLED;
5080 }
5081
5082 static void igb_write_itr(struct igb_q_vector *q_vector)
5083 {
5084         struct igb_adapter *adapter = q_vector->adapter;
5085         u32 itr_val = q_vector->itr_val & 0x7FFC;
5086
5087         if (!q_vector->set_itr)
5088                 return;
5089
5090         if (!itr_val)
5091                 itr_val = 0x4;
5092
5093         if (adapter->hw.mac.type == e1000_82575)
5094                 itr_val |= itr_val << 16;
5095         else
5096                 itr_val |= E1000_EITR_CNT_IGNR;
5097
5098         writel(itr_val, q_vector->itr_register);
5099         q_vector->set_itr = 0;
5100 }
5101
5102 static irqreturn_t igb_msix_ring(int irq, void *data)
5103 {
5104         struct igb_q_vector *q_vector = data;
5105
5106         /* Write the ITR value calculated from the previous interrupt. */
5107         igb_write_itr(q_vector);
5108
5109         napi_schedule(&q_vector->napi);
5110
5111         return IRQ_HANDLED;
5112 }
5113
5114 #ifdef CONFIG_IGB_DCA
5115 static void igb_update_tx_dca(struct igb_adapter *adapter,
5116                               struct igb_ring *tx_ring,
5117                               int cpu)
5118 {
5119         struct e1000_hw *hw = &adapter->hw;
5120         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5121
5122         if (hw->mac.type != e1000_82575)
5123                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5124
5125         /* We can enable relaxed ordering for reads, but not writes when
5126          * DCA is enabled.  This is due to a known issue in some chipsets
5127          * which will cause the DCA tag to be cleared.
5128          */
5129         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5130                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5131                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5132
5133         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5134 }
5135
5136 static void igb_update_rx_dca(struct igb_adapter *adapter,
5137                               struct igb_ring *rx_ring,
5138                               int cpu)
5139 {
5140         struct e1000_hw *hw = &adapter->hw;
5141         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5142
5143         if (hw->mac.type != e1000_82575)
5144                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5145
5146         /* We can enable relaxed ordering for reads, but not writes when
5147          * DCA is enabled.  This is due to a known issue in some chipsets
5148          * which will cause the DCA tag to be cleared.
5149          */
5150         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5151                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5152
5153         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5154 }
5155
5156 static void igb_update_dca(struct igb_q_vector *q_vector)
5157 {
5158         struct igb_adapter *adapter = q_vector->adapter;
5159         int cpu = get_cpu();
5160
5161         if (q_vector->cpu == cpu)
5162                 goto out_no_update;
5163
5164         if (q_vector->tx.ring)
5165                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5166
5167         if (q_vector->rx.ring)
5168                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5169
5170         q_vector->cpu = cpu;
5171 out_no_update:
5172         put_cpu();
5173 }
5174
5175 static void igb_setup_dca(struct igb_adapter *adapter)
5176 {
5177         struct e1000_hw *hw = &adapter->hw;
5178         int i;
5179
5180         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5181                 return;
5182
5183         /* Always use CB2 mode, difference is masked in the CB driver. */
5184         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5185
5186         for (i = 0; i < adapter->num_q_vectors; i++) {
5187                 adapter->q_vector[i]->cpu = -1;
5188                 igb_update_dca(adapter->q_vector[i]);
5189         }
5190 }
5191
5192 static int __igb_notify_dca(struct device *dev, void *data)
5193 {
5194         struct net_device *netdev = dev_get_drvdata(dev);
5195         struct igb_adapter *adapter = netdev_priv(netdev);
5196         struct pci_dev *pdev = adapter->pdev;
5197         struct e1000_hw *hw = &adapter->hw;
5198         unsigned long event = *(unsigned long *)data;
5199
5200         switch (event) {
5201         case DCA_PROVIDER_ADD:
5202                 /* if already enabled, don't do it again */
5203                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5204                         break;
5205                 if (dca_add_requester(dev) == 0) {
5206                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
5207                         dev_info(&pdev->dev, "DCA enabled\n");
5208                         igb_setup_dca(adapter);
5209                         break;
5210                 }
5211                 /* Fall Through since DCA is disabled. */
5212         case DCA_PROVIDER_REMOVE:
5213                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5214                         /* without this a class_device is left
5215                          * hanging around in the sysfs model
5216                          */
5217                         dca_remove_requester(dev);
5218                         dev_info(&pdev->dev, "DCA disabled\n");
5219                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5220                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5221                 }
5222                 break;
5223         }
5224
5225         return 0;
5226 }
5227
5228 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5229                           void *p)
5230 {
5231         int ret_val;
5232
5233         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5234                                          __igb_notify_dca);
5235
5236         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5237 }
5238 #endif /* CONFIG_IGB_DCA */
5239
5240 #ifdef CONFIG_PCI_IOV
5241 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5242 {
5243         unsigned char mac_addr[ETH_ALEN];
5244
5245         eth_zero_addr(mac_addr);
5246         igb_set_vf_mac(adapter, vf, mac_addr);
5247
5248         /* By default spoof check is enabled for all VFs */
5249         adapter->vf_data[vf].spoofchk_enabled = true;
5250
5251         return 0;
5252 }
5253
5254 #endif
5255 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5256 {
5257         struct e1000_hw *hw = &adapter->hw;
5258         u32 ping;
5259         int i;
5260
5261         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5262                 ping = E1000_PF_CONTROL_MSG;
5263                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5264                         ping |= E1000_VT_MSGTYPE_CTS;
5265                 igb_write_mbx(hw, &ping, 1, i);
5266         }
5267 }
5268
5269 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5270 {
5271         struct e1000_hw *hw = &adapter->hw;
5272         u32 vmolr = rd32(E1000_VMOLR(vf));
5273         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5274
5275         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5276                             IGB_VF_FLAG_MULTI_PROMISC);
5277         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5278
5279         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5280                 vmolr |= E1000_VMOLR_MPME;
5281                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5282                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5283         } else {
5284                 /* if we have hashes and we are clearing a multicast promisc
5285                  * flag we need to write the hashes to the MTA as this step
5286                  * was previously skipped
5287                  */
5288                 if (vf_data->num_vf_mc_hashes > 30) {
5289                         vmolr |= E1000_VMOLR_MPME;
5290                 } else if (vf_data->num_vf_mc_hashes) {
5291                         int j;
5292                         vmolr |= E1000_VMOLR_ROMPE;
5293                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5294                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5295                 }
5296         }
5297
5298         wr32(E1000_VMOLR(vf), vmolr);
5299
5300         /* there are flags left unprocessed, likely not supported */
5301         if (*msgbuf & E1000_VT_MSGINFO_MASK)
5302                 return -EINVAL;
5303
5304         return 0;
5305 }
5306
5307 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5308                                   u32 *msgbuf, u32 vf)
5309 {
5310         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5311         u16 *hash_list = (u16 *)&msgbuf[1];
5312         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5313         int i;
5314
5315         /* salt away the number of multicast addresses assigned
5316          * to this VF for later use to restore when the PF multi cast
5317          * list changes
5318          */
5319         vf_data->num_vf_mc_hashes = n;
5320
5321         /* only up to 30 hash values supported */
5322         if (n > 30)
5323                 n = 30;
5324
5325         /* store the hashes for later use */
5326         for (i = 0; i < n; i++)
5327                 vf_data->vf_mc_hashes[i] = hash_list[i];
5328
5329         /* Flush and reset the mta with the new values */
5330         igb_set_rx_mode(adapter->netdev);
5331
5332         return 0;
5333 }
5334
5335 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5336 {
5337         struct e1000_hw *hw = &adapter->hw;
5338         struct vf_data_storage *vf_data;
5339         int i, j;
5340
5341         for (i = 0; i < adapter->vfs_allocated_count; i++) {
5342                 u32 vmolr = rd32(E1000_VMOLR(i));
5343                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5344
5345                 vf_data = &adapter->vf_data[i];
5346
5347                 if ((vf_data->num_vf_mc_hashes > 30) ||
5348                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5349                         vmolr |= E1000_VMOLR_MPME;
5350                 } else if (vf_data->num_vf_mc_hashes) {
5351                         vmolr |= E1000_VMOLR_ROMPE;
5352                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5353                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5354                 }
5355                 wr32(E1000_VMOLR(i), vmolr);
5356         }
5357 }
5358
5359 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5360 {
5361         struct e1000_hw *hw = &adapter->hw;
5362         u32 pool_mask, reg, vid;
5363         int i;
5364
5365         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5366
5367         /* Find the vlan filter for this id */
5368         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5369                 reg = rd32(E1000_VLVF(i));
5370
5371                 /* remove the vf from the pool */
5372                 reg &= ~pool_mask;
5373
5374                 /* if pool is empty then remove entry from vfta */
5375                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
5376                     (reg & E1000_VLVF_VLANID_ENABLE)) {
5377                         reg = 0;
5378                         vid = reg & E1000_VLVF_VLANID_MASK;
5379                         igb_vfta_set(hw, vid, false);
5380                 }
5381
5382                 wr32(E1000_VLVF(i), reg);
5383         }
5384
5385         adapter->vf_data[vf].vlans_enabled = 0;
5386 }
5387
5388 static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
5389 {
5390         struct e1000_hw *hw = &adapter->hw;
5391         u32 reg, i;
5392
5393         /* The vlvf table only exists on 82576 hardware and newer */
5394         if (hw->mac.type < e1000_82576)
5395                 return -1;
5396
5397         /* we only need to do this if VMDq is enabled */
5398         if (!adapter->vfs_allocated_count)
5399                 return -1;
5400
5401         /* Find the vlan filter for this id */
5402         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5403                 reg = rd32(E1000_VLVF(i));
5404                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5405                     vid == (reg & E1000_VLVF_VLANID_MASK))
5406                         break;
5407         }
5408
5409         if (add) {
5410                 if (i == E1000_VLVF_ARRAY_SIZE) {
5411                         /* Did not find a matching VLAN ID entry that was
5412                          * enabled.  Search for a free filter entry, i.e.
5413                          * one without the enable bit set
5414                          */
5415                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5416                                 reg = rd32(E1000_VLVF(i));
5417                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
5418                                         break;
5419                         }
5420                 }
5421                 if (i < E1000_VLVF_ARRAY_SIZE) {
5422                         /* Found an enabled/available entry */
5423                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5424
5425                         /* if !enabled we need to set this up in vfta */
5426                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
5427                                 /* add VID to filter table */
5428                                 igb_vfta_set(hw, vid, true);
5429                                 reg |= E1000_VLVF_VLANID_ENABLE;
5430                         }
5431                         reg &= ~E1000_VLVF_VLANID_MASK;
5432                         reg |= vid;
5433                         wr32(E1000_VLVF(i), reg);
5434
5435                         /* do not modify RLPML for PF devices */
5436                         if (vf >= adapter->vfs_allocated_count)
5437                                 return 0;
5438
5439                         if (!adapter->vf_data[vf].vlans_enabled) {
5440                                 u32 size;
5441                                 reg = rd32(E1000_VMOLR(vf));
5442                                 size = reg & E1000_VMOLR_RLPML_MASK;
5443                                 size += 4;
5444                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5445                                 reg |= size;
5446                                 wr32(E1000_VMOLR(vf), reg);
5447                         }
5448
5449                         adapter->vf_data[vf].vlans_enabled++;
5450                 }
5451         } else {
5452                 if (i < E1000_VLVF_ARRAY_SIZE) {
5453                         /* remove vf from the pool */
5454                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
5455                         /* if pool is empty then remove entry from vfta */
5456                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
5457                                 reg = 0;
5458                                 igb_vfta_set(hw, vid, false);
5459                         }
5460                         wr32(E1000_VLVF(i), reg);
5461
5462                         /* do not modify RLPML for PF devices */
5463                         if (vf >= adapter->vfs_allocated_count)
5464                                 return 0;
5465
5466                         adapter->vf_data[vf].vlans_enabled--;
5467                         if (!adapter->vf_data[vf].vlans_enabled) {
5468                                 u32 size;
5469                                 reg = rd32(E1000_VMOLR(vf));
5470                                 size = reg & E1000_VMOLR_RLPML_MASK;
5471                                 size -= 4;
5472                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5473                                 reg |= size;
5474                                 wr32(E1000_VMOLR(vf), reg);
5475                         }
5476                 }
5477         }
5478         return 0;
5479 }
5480
5481 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
5482 {
5483         struct e1000_hw *hw = &adapter->hw;
5484
5485         if (vid)
5486                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
5487         else
5488                 wr32(E1000_VMVIR(vf), 0);
5489 }
5490
5491 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
5492                                int vf, u16 vlan, u8 qos)
5493 {
5494         int err = 0;
5495         struct igb_adapter *adapter = netdev_priv(netdev);
5496
5497         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
5498                 return -EINVAL;
5499         if (vlan || qos) {
5500                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
5501                 if (err)
5502                         goto out;
5503                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
5504                 igb_set_vmolr(adapter, vf, !vlan);
5505                 adapter->vf_data[vf].pf_vlan = vlan;
5506                 adapter->vf_data[vf].pf_qos = qos;
5507                 dev_info(&adapter->pdev->dev,
5508                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
5509                 if (test_bit(__IGB_DOWN, &adapter->state)) {
5510                         dev_warn(&adapter->pdev->dev,
5511                                  "The VF VLAN has been set, but the PF device is not up.\n");
5512                         dev_warn(&adapter->pdev->dev,
5513                                  "Bring the PF device up before attempting to use the VF device.\n");
5514                 }
5515         } else {
5516                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
5517                              false, vf);
5518                 igb_set_vmvir(adapter, vlan, vf);
5519                 igb_set_vmolr(adapter, vf, true);
5520                 adapter->vf_data[vf].pf_vlan = 0;
5521                 adapter->vf_data[vf].pf_qos = 0;
5522         }
5523 out:
5524         return err;
5525 }
5526
5527 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
5528 {
5529         struct e1000_hw *hw = &adapter->hw;
5530         int i;
5531         u32 reg;
5532
5533         /* Find the vlan filter for this id */
5534         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5535                 reg = rd32(E1000_VLVF(i));
5536                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5537                     vid == (reg & E1000_VLVF_VLANID_MASK))
5538                         break;
5539         }
5540
5541         if (i >= E1000_VLVF_ARRAY_SIZE)
5542                 i = -1;
5543
5544         return i;
5545 }
5546
5547 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5548 {
5549         struct e1000_hw *hw = &adapter->hw;
5550         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5551         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
5552         int err = 0;
5553
5554         /* If in promiscuous mode we need to make sure the PF also has
5555          * the VLAN filter set.
5556          */
5557         if (add && (adapter->netdev->flags & IFF_PROMISC))
5558                 err = igb_vlvf_set(adapter, vid, add,
5559                                    adapter->vfs_allocated_count);
5560         if (err)
5561                 goto out;
5562
5563         err = igb_vlvf_set(adapter, vid, add, vf);
5564
5565         if (err)
5566                 goto out;
5567
5568         /* Go through all the checks to see if the VLAN filter should
5569          * be wiped completely.
5570          */
5571         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
5572                 u32 vlvf, bits;
5573
5574                 int regndx = igb_find_vlvf_entry(adapter, vid);
5575                 if (regndx < 0)
5576                         goto out;
5577                 /* See if any other pools are set for this VLAN filter
5578                  * entry other than the PF.
5579                  */
5580                 vlvf = bits = rd32(E1000_VLVF(regndx));
5581                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
5582                               adapter->vfs_allocated_count);
5583                 /* If the filter was removed then ensure PF pool bit
5584                  * is cleared if the PF only added itself to the pool
5585                  * because the PF is in promiscuous mode.
5586                  */
5587                 if ((vlvf & VLAN_VID_MASK) == vid &&
5588                     !test_bit(vid, adapter->active_vlans) &&
5589                     !bits)
5590                         igb_vlvf_set(adapter, vid, add,
5591                                      adapter->vfs_allocated_count);
5592         }
5593
5594 out:
5595         return err;
5596 }
5597
5598 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
5599 {
5600         /* clear flags - except flag that indicates PF has set the MAC */
5601         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
5602         adapter->vf_data[vf].last_nack = jiffies;
5603
5604         /* reset offloads to defaults */
5605         igb_set_vmolr(adapter, vf, true);
5606
5607         /* reset vlans for device */
5608         igb_clear_vf_vfta(adapter, vf);
5609         if (adapter->vf_data[vf].pf_vlan)
5610                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
5611                                     adapter->vf_data[vf].pf_vlan,
5612                                     adapter->vf_data[vf].pf_qos);
5613         else
5614                 igb_clear_vf_vfta(adapter, vf);
5615
5616         /* reset multicast table array for vf */
5617         adapter->vf_data[vf].num_vf_mc_hashes = 0;
5618
5619         /* Flush and reset the mta with the new values */
5620         igb_set_rx_mode(adapter->netdev);
5621 }
5622
5623 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
5624 {
5625         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5626
5627         /* clear mac address as we were hotplug removed/added */
5628         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
5629                 eth_zero_addr(vf_mac);
5630
5631         /* process remaining reset events */
5632         igb_vf_reset(adapter, vf);
5633 }
5634
5635 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
5636 {
5637         struct e1000_hw *hw = &adapter->hw;
5638         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5639         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
5640         u32 reg, msgbuf[3];
5641         u8 *addr = (u8 *)(&msgbuf[1]);
5642
5643         /* process all the same items cleared in a function level reset */
5644         igb_vf_reset(adapter, vf);
5645
5646         /* set vf mac address */
5647         igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
5648
5649         /* enable transmit and receive for vf */
5650         reg = rd32(E1000_VFTE);
5651         wr32(E1000_VFTE, reg | (1 << vf));
5652         reg = rd32(E1000_VFRE);
5653         wr32(E1000_VFRE, reg | (1 << vf));
5654
5655         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
5656
5657         /* reply to reset with ack and vf mac address */
5658         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
5659         memcpy(addr, vf_mac, 6);
5660         igb_write_mbx(hw, msgbuf, 3, vf);
5661 }
5662
5663 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
5664 {
5665         /* The VF MAC Address is stored in a packed array of bytes
5666          * starting at the second 32 bit word of the msg array
5667          */
5668         unsigned char *addr = (char *)&msg[1];
5669         int err = -1;
5670
5671         if (is_valid_ether_addr(addr))
5672                 err = igb_set_vf_mac(adapter, vf, addr);
5673
5674         return err;
5675 }
5676
5677 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
5678 {
5679         struct e1000_hw *hw = &adapter->hw;
5680         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5681         u32 msg = E1000_VT_MSGTYPE_NACK;
5682
5683         /* if device isn't clear to send it shouldn't be reading either */
5684         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
5685             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
5686                 igb_write_mbx(hw, &msg, 1, vf);
5687                 vf_data->last_nack = jiffies;
5688         }
5689 }
5690
5691 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
5692 {
5693         struct pci_dev *pdev = adapter->pdev;
5694         u32 msgbuf[E1000_VFMAILBOX_SIZE];
5695         struct e1000_hw *hw = &adapter->hw;
5696         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5697         s32 retval;
5698
5699         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
5700
5701         if (retval) {
5702                 /* if receive failed revoke VF CTS stats and restart init */
5703                 dev_err(&pdev->dev, "Error receiving message from VF\n");
5704                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
5705                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5706                         return;
5707                 goto out;
5708         }
5709
5710         /* this is a message we already processed, do nothing */
5711         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
5712                 return;
5713
5714         /* until the vf completes a reset it should not be
5715          * allowed to start any configuration.
5716          */
5717         if (msgbuf[0] == E1000_VF_RESET) {
5718                 igb_vf_reset_msg(adapter, vf);
5719                 return;
5720         }
5721
5722         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
5723                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5724                         return;
5725                 retval = -1;
5726                 goto out;
5727         }
5728
5729         switch ((msgbuf[0] & 0xFFFF)) {
5730         case E1000_VF_SET_MAC_ADDR:
5731                 retval = -EINVAL;
5732                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
5733                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
5734                 else
5735                         dev_warn(&pdev->dev,
5736                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
5737                                  vf);
5738                 break;
5739         case E1000_VF_SET_PROMISC:
5740                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
5741                 break;
5742         case E1000_VF_SET_MULTICAST:
5743                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
5744                 break;
5745         case E1000_VF_SET_LPE:
5746                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
5747                 break;
5748         case E1000_VF_SET_VLAN:
5749                 retval = -1;
5750                 if (vf_data->pf_vlan)
5751                         dev_warn(&pdev->dev,
5752                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
5753                                  vf);
5754                 else
5755                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
5756                 break;
5757         default:
5758                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
5759                 retval = -1;
5760                 break;
5761         }
5762
5763         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
5764 out:
5765         /* notify the VF of the results of what it sent us */
5766         if (retval)
5767                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
5768         else
5769                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
5770
5771         igb_write_mbx(hw, msgbuf, 1, vf);
5772 }
5773
5774 static void igb_msg_task(struct igb_adapter *adapter)
5775 {
5776         struct e1000_hw *hw = &adapter->hw;
5777         u32 vf;
5778
5779         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
5780                 /* process any reset requests */
5781                 if (!igb_check_for_rst(hw, vf))
5782                         igb_vf_reset_event(adapter, vf);
5783
5784                 /* process any messages pending */
5785                 if (!igb_check_for_msg(hw, vf))
5786                         igb_rcv_msg_from_vf(adapter, vf);
5787
5788                 /* process any acks */
5789                 if (!igb_check_for_ack(hw, vf))
5790                         igb_rcv_ack_from_vf(adapter, vf);
5791         }
5792 }
5793
5794 /**
5795  *  igb_set_uta - Set unicast filter table address
5796  *  @adapter: board private structure
5797  *
5798  *  The unicast table address is a register array of 32-bit registers.
5799  *  The table is meant to be used in a way similar to how the MTA is used
5800  *  however due to certain limitations in the hardware it is necessary to
5801  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
5802  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
5803  **/
5804 static void igb_set_uta(struct igb_adapter *adapter)
5805 {
5806         struct e1000_hw *hw = &adapter->hw;
5807         int i;
5808
5809         /* The UTA table only exists on 82576 hardware and newer */
5810         if (hw->mac.type < e1000_82576)
5811                 return;
5812
5813         /* we only need to do this if VMDq is enabled */
5814         if (!adapter->vfs_allocated_count)
5815                 return;
5816
5817         for (i = 0; i < hw->mac.uta_reg_count; i++)
5818                 array_wr32(E1000_UTA, i, ~0);
5819 }
5820
5821 /**
5822  *  igb_intr_msi - Interrupt Handler
5823  *  @irq: interrupt number
5824  *  @data: pointer to a network interface device structure
5825  **/
5826 static irqreturn_t igb_intr_msi(int irq, void *data)
5827 {
5828         struct igb_adapter *adapter = data;
5829         struct igb_q_vector *q_vector = adapter->q_vector[0];
5830         struct e1000_hw *hw = &adapter->hw;
5831         /* read ICR disables interrupts using IAM */
5832         u32 icr = rd32(E1000_ICR);
5833
5834         igb_write_itr(q_vector);
5835
5836         if (icr & E1000_ICR_DRSTA)
5837                 schedule_work(&adapter->reset_task);
5838
5839         if (icr & E1000_ICR_DOUTSYNC) {
5840                 /* HW is reporting DMA is out of sync */
5841                 adapter->stats.doosync++;
5842         }
5843
5844         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5845                 hw->mac.get_link_status = 1;
5846                 if (!test_bit(__IGB_DOWN, &adapter->state))
5847                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5848         }
5849
5850         if (icr & E1000_ICR_TS) {
5851                 u32 tsicr = rd32(E1000_TSICR);
5852
5853                 if (tsicr & E1000_TSICR_TXTS) {
5854                         /* acknowledge the interrupt */
5855                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
5856                         /* retrieve hardware timestamp */
5857                         schedule_work(&adapter->ptp_tx_work);
5858                 }
5859         }
5860
5861         napi_schedule(&q_vector->napi);
5862
5863         return IRQ_HANDLED;
5864 }
5865
5866 /**
5867  *  igb_intr - Legacy Interrupt Handler
5868  *  @irq: interrupt number
5869  *  @data: pointer to a network interface device structure
5870  **/
5871 static irqreturn_t igb_intr(int irq, void *data)
5872 {
5873         struct igb_adapter *adapter = data;
5874         struct igb_q_vector *q_vector = adapter->q_vector[0];
5875         struct e1000_hw *hw = &adapter->hw;
5876         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
5877          * need for the IMC write
5878          */
5879         u32 icr = rd32(E1000_ICR);
5880
5881         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
5882          * not set, then the adapter didn't send an interrupt
5883          */
5884         if (!(icr & E1000_ICR_INT_ASSERTED))
5885                 return IRQ_NONE;
5886
5887         igb_write_itr(q_vector);
5888
5889         if (icr & E1000_ICR_DRSTA)
5890                 schedule_work(&adapter->reset_task);
5891
5892         if (icr & E1000_ICR_DOUTSYNC) {
5893                 /* HW is reporting DMA is out of sync */
5894                 adapter->stats.doosync++;
5895         }
5896
5897         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
5898                 hw->mac.get_link_status = 1;
5899                 /* guard against interrupt when we're going down */
5900                 if (!test_bit(__IGB_DOWN, &adapter->state))
5901                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5902         }
5903
5904         if (icr & E1000_ICR_TS) {
5905                 u32 tsicr = rd32(E1000_TSICR);
5906
5907                 if (tsicr & E1000_TSICR_TXTS) {
5908                         /* acknowledge the interrupt */
5909                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
5910                         /* retrieve hardware timestamp */
5911                         schedule_work(&adapter->ptp_tx_work);
5912                 }
5913         }
5914
5915         napi_schedule(&q_vector->napi);
5916
5917         return IRQ_HANDLED;
5918 }
5919
5920 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
5921 {
5922         struct igb_adapter *adapter = q_vector->adapter;
5923         struct e1000_hw *hw = &adapter->hw;
5924
5925         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
5926             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
5927                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
5928                         igb_set_itr(q_vector);
5929                 else
5930                         igb_update_ring_itr(q_vector);
5931         }
5932
5933         if (!test_bit(__IGB_DOWN, &adapter->state)) {
5934                 if (adapter->msix_entries)
5935                         wr32(E1000_EIMS, q_vector->eims_value);
5936                 else
5937                         igb_irq_enable(adapter);
5938         }
5939 }
5940
5941 /**
5942  *  igb_poll - NAPI Rx polling callback
5943  *  @napi: napi polling structure
5944  *  @budget: count of how many packets we should handle
5945  **/
5946 static int igb_poll(struct napi_struct *napi, int budget)
5947 {
5948         struct igb_q_vector *q_vector = container_of(napi,
5949                                                      struct igb_q_vector,
5950                                                      napi);
5951         bool clean_complete = true;
5952
5953 #ifdef CONFIG_IGB_DCA
5954         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
5955                 igb_update_dca(q_vector);
5956 #endif
5957         if (q_vector->tx.ring)
5958                 clean_complete = igb_clean_tx_irq(q_vector);
5959
5960         if (q_vector->rx.ring)
5961                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
5962
5963         /* If all work not completed, return budget and keep polling */
5964         if (!clean_complete)
5965                 return budget;
5966
5967         /* If not enough Rx work done, exit the polling mode */
5968         napi_complete(napi);
5969         igb_ring_irq_enable(q_vector);
5970
5971         return 0;
5972 }
5973
5974 /**
5975  *  igb_clean_tx_irq - Reclaim resources after transmit completes
5976  *  @q_vector: pointer to q_vector containing needed info
5977  *
5978  *  returns true if ring is completely cleaned
5979  **/
5980 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
5981 {
5982         struct igb_adapter *adapter = q_vector->adapter;
5983         struct igb_ring *tx_ring = q_vector->tx.ring;
5984         struct igb_tx_buffer *tx_buffer;
5985         union e1000_adv_tx_desc *tx_desc;
5986         unsigned int total_bytes = 0, total_packets = 0;
5987         unsigned int budget = q_vector->tx.work_limit;
5988         unsigned int i = tx_ring->next_to_clean;
5989
5990         if (test_bit(__IGB_DOWN, &adapter->state))
5991                 return true;
5992
5993         tx_buffer = &tx_ring->tx_buffer_info[i];
5994         tx_desc = IGB_TX_DESC(tx_ring, i);
5995         i -= tx_ring->count;
5996
5997         do {
5998                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
5999
6000                 /* if next_to_watch is not set then there is no work pending */
6001                 if (!eop_desc)
6002                         break;
6003
6004                 /* prevent any other reads prior to eop_desc */
6005                 read_barrier_depends();
6006
6007                 /* if DD is not set pending work has not been completed */
6008                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6009                         break;
6010
6011                 /* clear next_to_watch to prevent false hangs */
6012                 tx_buffer->next_to_watch = NULL;
6013
6014                 /* update the statistics for this packet */
6015                 total_bytes += tx_buffer->bytecount;
6016                 total_packets += tx_buffer->gso_segs;
6017
6018                 /* free the skb */
6019                 dev_kfree_skb_any(tx_buffer->skb);
6020
6021                 /* unmap skb header data */
6022                 dma_unmap_single(tx_ring->dev,
6023                                  dma_unmap_addr(tx_buffer, dma),
6024                                  dma_unmap_len(tx_buffer, len),
6025                                  DMA_TO_DEVICE);
6026
6027                 /* clear tx_buffer data */
6028                 tx_buffer->skb = NULL;
6029                 dma_unmap_len_set(tx_buffer, len, 0);
6030
6031                 /* clear last DMA location and unmap remaining buffers */
6032                 while (tx_desc != eop_desc) {
6033                         tx_buffer++;
6034                         tx_desc++;
6035                         i++;
6036                         if (unlikely(!i)) {
6037                                 i -= tx_ring->count;
6038                                 tx_buffer = tx_ring->tx_buffer_info;
6039                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6040                         }
6041
6042                         /* unmap any remaining paged data */
6043                         if (dma_unmap_len(tx_buffer, len)) {
6044                                 dma_unmap_page(tx_ring->dev,
6045                                                dma_unmap_addr(tx_buffer, dma),
6046                                                dma_unmap_len(tx_buffer, len),
6047                                                DMA_TO_DEVICE);
6048                                 dma_unmap_len_set(tx_buffer, len, 0);
6049                         }
6050                 }
6051
6052                 /* move us one more past the eop_desc for start of next pkt */
6053                 tx_buffer++;
6054                 tx_desc++;
6055                 i++;
6056                 if (unlikely(!i)) {
6057                         i -= tx_ring->count;
6058                         tx_buffer = tx_ring->tx_buffer_info;
6059                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6060                 }
6061
6062                 /* issue prefetch for next Tx descriptor */
6063                 prefetch(tx_desc);
6064
6065                 /* update budget accounting */
6066                 budget--;
6067         } while (likely(budget));
6068
6069         netdev_tx_completed_queue(txring_txq(tx_ring),
6070                                   total_packets, total_bytes);
6071         i += tx_ring->count;
6072         tx_ring->next_to_clean = i;
6073         u64_stats_update_begin(&tx_ring->tx_syncp);
6074         tx_ring->tx_stats.bytes += total_bytes;
6075         tx_ring->tx_stats.packets += total_packets;
6076         u64_stats_update_end(&tx_ring->tx_syncp);
6077         q_vector->tx.total_bytes += total_bytes;
6078         q_vector->tx.total_packets += total_packets;
6079
6080         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6081                 struct e1000_hw *hw = &adapter->hw;
6082
6083                 /* Detect a transmit hang in hardware, this serializes the
6084                  * check with the clearing of time_stamp and movement of i
6085                  */
6086                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6087                 if (tx_buffer->next_to_watch &&
6088                     time_after(jiffies, tx_buffer->time_stamp +
6089                                (adapter->tx_timeout_factor * HZ)) &&
6090                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6091
6092                         /* detected Tx unit hang */
6093                         dev_err(tx_ring->dev,
6094                                 "Detected Tx Unit Hang\n"
6095                                 "  Tx Queue             <%d>\n"
6096                                 "  TDH                  <%x>\n"
6097                                 "  TDT                  <%x>\n"
6098                                 "  next_to_use          <%x>\n"
6099                                 "  next_to_clean        <%x>\n"
6100                                 "buffer_info[next_to_clean]\n"
6101                                 "  time_stamp           <%lx>\n"
6102                                 "  next_to_watch        <%p>\n"
6103                                 "  jiffies              <%lx>\n"
6104                                 "  desc.status          <%x>\n",
6105                                 tx_ring->queue_index,
6106                                 rd32(E1000_TDH(tx_ring->reg_idx)),
6107                                 readl(tx_ring->tail),
6108                                 tx_ring->next_to_use,
6109                                 tx_ring->next_to_clean,
6110                                 tx_buffer->time_stamp,
6111                                 tx_buffer->next_to_watch,
6112                                 jiffies,
6113                                 tx_buffer->next_to_watch->wb.status);
6114                         netif_stop_subqueue(tx_ring->netdev,
6115                                             tx_ring->queue_index);
6116
6117                         /* we are about to reset, no point in enabling stuff */
6118                         return true;
6119                 }
6120         }
6121
6122 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6123         if (unlikely(total_packets &&
6124             netif_carrier_ok(tx_ring->netdev) &&
6125             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6126                 /* Make sure that anybody stopping the queue after this
6127                  * sees the new next_to_clean.
6128                  */
6129                 smp_mb();
6130                 if (__netif_subqueue_stopped(tx_ring->netdev,
6131                                              tx_ring->queue_index) &&
6132                     !(test_bit(__IGB_DOWN, &adapter->state))) {
6133                         netif_wake_subqueue(tx_ring->netdev,
6134                                             tx_ring->queue_index);
6135
6136                         u64_stats_update_begin(&tx_ring->tx_syncp);
6137                         tx_ring->tx_stats.restart_queue++;
6138                         u64_stats_update_end(&tx_ring->tx_syncp);
6139                 }
6140         }
6141
6142         return !!budget;
6143 }
6144
6145 /**
6146  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
6147  *  @rx_ring: rx descriptor ring to store buffers on
6148  *  @old_buff: donor buffer to have page reused
6149  *
6150  *  Synchronizes page for reuse by the adapter
6151  **/
6152 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6153                               struct igb_rx_buffer *old_buff)
6154 {
6155         struct igb_rx_buffer *new_buff;
6156         u16 nta = rx_ring->next_to_alloc;
6157
6158         new_buff = &rx_ring->rx_buffer_info[nta];
6159
6160         /* update, and store next to alloc */
6161         nta++;
6162         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6163
6164         /* transfer page from old buffer to new buffer */
6165         memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
6166
6167         /* sync the buffer for use by the device */
6168         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6169                                          old_buff->page_offset,
6170                                          IGB_RX_BUFSZ,
6171                                          DMA_FROM_DEVICE);
6172 }
6173
6174 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6175                                   struct page *page,
6176                                   unsigned int truesize)
6177 {
6178         /* avoid re-using remote pages */
6179         if (unlikely(page_to_nid(page) != numa_node_id()))
6180                 return false;
6181
6182 #if (PAGE_SIZE < 8192)
6183         /* if we are only owner of page we can reuse it */
6184         if (unlikely(page_count(page) != 1))
6185                 return false;
6186
6187         /* flip page offset to other buffer */
6188         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6189
6190         /* since we are the only owner of the page and we need to
6191          * increment it, just set the value to 2 in order to avoid
6192          * an unnecessary locked operation
6193          */
6194         atomic_set(&page->_count, 2);
6195 #else
6196         /* move offset up to the next cache line */
6197         rx_buffer->page_offset += truesize;
6198
6199         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6200                 return false;
6201
6202         /* bump ref count on page before it is given to the stack */
6203         get_page(page);
6204 #endif
6205
6206         return true;
6207 }
6208
6209 /**
6210  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6211  *  @rx_ring: rx descriptor ring to transact packets on
6212  *  @rx_buffer: buffer containing page to add
6213  *  @rx_desc: descriptor containing length of buffer written by hardware
6214  *  @skb: sk_buff to place the data into
6215  *
6216  *  This function will add the data contained in rx_buffer->page to the skb.
6217  *  This is done either through a direct copy if the data in the buffer is
6218  *  less than the skb header size, otherwise it will just attach the page as
6219  *  a frag to the skb.
6220  *
6221  *  The function will then update the page offset if necessary and return
6222  *  true if the buffer can be reused by the adapter.
6223  **/
6224 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6225                             struct igb_rx_buffer *rx_buffer,
6226                             union e1000_adv_rx_desc *rx_desc,
6227                             struct sk_buff *skb)
6228 {
6229         struct page *page = rx_buffer->page;
6230         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6231 #if (PAGE_SIZE < 8192)
6232         unsigned int truesize = IGB_RX_BUFSZ;
6233 #else
6234         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
6235 #endif
6236
6237         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
6238                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
6239
6240                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6241                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6242                         va += IGB_TS_HDR_LEN;
6243                         size -= IGB_TS_HDR_LEN;
6244                 }
6245
6246                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6247
6248                 /* we can reuse buffer as-is, just make sure it is local */
6249                 if (likely(page_to_nid(page) == numa_node_id()))
6250                         return true;
6251
6252                 /* this page cannot be reused so discard it */
6253                 put_page(page);
6254                 return false;
6255         }
6256
6257         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6258                         rx_buffer->page_offset, size, truesize);
6259
6260         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6261 }
6262
6263 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6264                                            union e1000_adv_rx_desc *rx_desc,
6265                                            struct sk_buff *skb)
6266 {
6267         struct igb_rx_buffer *rx_buffer;
6268         struct page *page;
6269
6270         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6271
6272         page = rx_buffer->page;
6273         prefetchw(page);
6274
6275         if (likely(!skb)) {
6276                 void *page_addr = page_address(page) +
6277                                   rx_buffer->page_offset;
6278
6279                 /* prefetch first cache line of first page */
6280                 prefetch(page_addr);
6281 #if L1_CACHE_BYTES < 128
6282                 prefetch(page_addr + L1_CACHE_BYTES);
6283 #endif
6284
6285                 /* allocate a skb to store the frags */
6286                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
6287                                                 IGB_RX_HDR_LEN);
6288                 if (unlikely(!skb)) {
6289                         rx_ring->rx_stats.alloc_failed++;
6290                         return NULL;
6291                 }
6292
6293                 /* we will be copying header into skb->data in
6294                  * pskb_may_pull so it is in our interest to prefetch
6295                  * it now to avoid a possible cache miss
6296                  */
6297                 prefetchw(skb->data);
6298         }
6299
6300         /* we are reusing so sync this buffer for CPU use */
6301         dma_sync_single_range_for_cpu(rx_ring->dev,
6302                                       rx_buffer->dma,
6303                                       rx_buffer->page_offset,
6304                                       IGB_RX_BUFSZ,
6305                                       DMA_FROM_DEVICE);
6306
6307         /* pull page into skb */
6308         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
6309                 /* hand second half of page back to the ring */
6310                 igb_reuse_rx_page(rx_ring, rx_buffer);
6311         } else {
6312                 /* we are not reusing the buffer so unmap it */
6313                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6314                                PAGE_SIZE, DMA_FROM_DEVICE);
6315         }
6316
6317         /* clear contents of rx_buffer */
6318         rx_buffer->page = NULL;
6319
6320         return skb;
6321 }
6322
6323 static inline void igb_rx_checksum(struct igb_ring *ring,
6324                                    union e1000_adv_rx_desc *rx_desc,
6325                                    struct sk_buff *skb)
6326 {
6327         skb_checksum_none_assert(skb);
6328
6329         /* Ignore Checksum bit is set */
6330         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6331                 return;
6332
6333         /* Rx checksum disabled via ethtool */
6334         if (!(ring->netdev->features & NETIF_F_RXCSUM))
6335                 return;
6336
6337         /* TCP/UDP checksum error bit is set */
6338         if (igb_test_staterr(rx_desc,
6339                              E1000_RXDEXT_STATERR_TCPE |
6340                              E1000_RXDEXT_STATERR_IPE)) {
6341                 /* work around errata with sctp packets where the TCPE aka
6342                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6343                  * packets, (aka let the stack check the crc32c)
6344                  */
6345                 if (!((skb->len == 60) &&
6346                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6347                         u64_stats_update_begin(&ring->rx_syncp);
6348                         ring->rx_stats.csum_err++;
6349                         u64_stats_update_end(&ring->rx_syncp);
6350                 }
6351                 /* let the stack verify checksum errors */
6352                 return;
6353         }
6354         /* It must be a TCP or UDP packet with a valid checksum */
6355         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
6356                                       E1000_RXD_STAT_UDPCS))
6357                 skb->ip_summed = CHECKSUM_UNNECESSARY;
6358
6359         dev_dbg(ring->dev, "cksum success: bits %08X\n",
6360                 le32_to_cpu(rx_desc->wb.upper.status_error));
6361 }
6362
6363 static inline void igb_rx_hash(struct igb_ring *ring,
6364                                union e1000_adv_rx_desc *rx_desc,
6365                                struct sk_buff *skb)
6366 {
6367         if (ring->netdev->features & NETIF_F_RXHASH)
6368                 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
6369 }
6370
6371 /**
6372  *  igb_is_non_eop - process handling of non-EOP buffers
6373  *  @rx_ring: Rx ring being processed
6374  *  @rx_desc: Rx descriptor for current buffer
6375  *  @skb: current socket buffer containing buffer in progress
6376  *
6377  *  This function updates next to clean.  If the buffer is an EOP buffer
6378  *  this function exits returning false, otherwise it will place the
6379  *  sk_buff in the next buffer to be chained and return true indicating
6380  *  that this is in fact a non-EOP buffer.
6381  **/
6382 static bool igb_is_non_eop(struct igb_ring *rx_ring,
6383                            union e1000_adv_rx_desc *rx_desc)
6384 {
6385         u32 ntc = rx_ring->next_to_clean + 1;
6386
6387         /* fetch, update, and store next to clean */
6388         ntc = (ntc < rx_ring->count) ? ntc : 0;
6389         rx_ring->next_to_clean = ntc;
6390
6391         prefetch(IGB_RX_DESC(rx_ring, ntc));
6392
6393         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
6394                 return false;
6395
6396         return true;
6397 }
6398
6399 /**
6400  *  igb_get_headlen - determine size of header for LRO/GRO
6401  *  @data: pointer to the start of the headers
6402  *  @max_len: total length of section to find headers in
6403  *
6404  *  This function is meant to determine the length of headers that will
6405  *  be recognized by hardware for LRO, and GRO offloads.  The main
6406  *  motivation of doing this is to only perform one pull for IPv4 TCP
6407  *  packets so that we can do basic things like calculating the gso_size
6408  *  based on the average data per packet.
6409  **/
6410 static unsigned int igb_get_headlen(unsigned char *data,
6411                                     unsigned int max_len)
6412 {
6413         union {
6414                 unsigned char *network;
6415                 /* l2 headers */
6416                 struct ethhdr *eth;
6417                 struct vlan_hdr *vlan;
6418                 /* l3 headers */
6419                 struct iphdr *ipv4;
6420                 struct ipv6hdr *ipv6;
6421         } hdr;
6422         __be16 protocol;
6423         u8 nexthdr = 0; /* default to not TCP */
6424         u8 hlen;
6425
6426         /* this should never happen, but better safe than sorry */
6427         if (max_len < ETH_HLEN)
6428                 return max_len;
6429
6430         /* initialize network frame pointer */
6431         hdr.network = data;
6432
6433         /* set first protocol and move network header forward */
6434         protocol = hdr.eth->h_proto;
6435         hdr.network += ETH_HLEN;
6436
6437         /* handle any vlan tag if present */
6438         if (protocol == __constant_htons(ETH_P_8021Q)) {
6439                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
6440                         return max_len;
6441
6442                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
6443                 hdr.network += VLAN_HLEN;
6444         }
6445
6446         /* handle L3 protocols */
6447         if (protocol == __constant_htons(ETH_P_IP)) {
6448                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
6449                         return max_len;
6450
6451                 /* access ihl as a u8 to avoid unaligned access on ia64 */
6452                 hlen = (hdr.network[0] & 0x0F) << 2;
6453
6454                 /* verify hlen meets minimum size requirements */
6455                 if (hlen < sizeof(struct iphdr))
6456                         return hdr.network - data;
6457
6458                 /* record next protocol if header is present */
6459                 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
6460                         nexthdr = hdr.ipv4->protocol;
6461         } else if (protocol == __constant_htons(ETH_P_IPV6)) {
6462                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
6463                         return max_len;
6464
6465                 /* record next protocol */
6466                 nexthdr = hdr.ipv6->nexthdr;
6467                 hlen = sizeof(struct ipv6hdr);
6468         } else {
6469                 return hdr.network - data;
6470         }
6471
6472         /* relocate pointer to start of L4 header */
6473         hdr.network += hlen;
6474
6475         /* finally sort out TCP */
6476         if (nexthdr == IPPROTO_TCP) {
6477                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
6478                         return max_len;
6479
6480                 /* access doff as a u8 to avoid unaligned access on ia64 */
6481                 hlen = (hdr.network[12] & 0xF0) >> 2;
6482
6483                 /* verify hlen meets minimum size requirements */
6484                 if (hlen < sizeof(struct tcphdr))
6485                         return hdr.network - data;
6486
6487                 hdr.network += hlen;
6488         } else if (nexthdr == IPPROTO_UDP) {
6489                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
6490                         return max_len;
6491
6492                 hdr.network += sizeof(struct udphdr);
6493         }
6494
6495         /* If everything has gone correctly hdr.network should be the
6496          * data section of the packet and will be the end of the header.
6497          * If not then it probably represents the end of the last recognized
6498          * header.
6499          */
6500         if ((hdr.network - data) < max_len)
6501                 return hdr.network - data;
6502         else
6503                 return max_len;
6504 }
6505
6506 /**
6507  *  igb_pull_tail - igb specific version of skb_pull_tail
6508  *  @rx_ring: rx descriptor ring packet is being transacted on
6509  *  @rx_desc: pointer to the EOP Rx descriptor
6510  *  @skb: pointer to current skb being adjusted
6511  *
6512  *  This function is an igb specific version of __pskb_pull_tail.  The
6513  *  main difference between this version and the original function is that
6514  *  this function can make several assumptions about the state of things
6515  *  that allow for significant optimizations versus the standard function.
6516  *  As a result we can do things like drop a frag and maintain an accurate
6517  *  truesize for the skb.
6518  */
6519 static void igb_pull_tail(struct igb_ring *rx_ring,
6520                           union e1000_adv_rx_desc *rx_desc,
6521                           struct sk_buff *skb)
6522 {
6523         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6524         unsigned char *va;
6525         unsigned int pull_len;
6526
6527         /* it is valid to use page_address instead of kmap since we are
6528          * working with pages allocated out of the lomem pool per
6529          * alloc_page(GFP_ATOMIC)
6530          */
6531         va = skb_frag_address(frag);
6532
6533         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6534                 /* retrieve timestamp from buffer */
6535                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6536
6537                 /* update pointers to remove timestamp header */
6538                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
6539                 frag->page_offset += IGB_TS_HDR_LEN;
6540                 skb->data_len -= IGB_TS_HDR_LEN;
6541                 skb->len -= IGB_TS_HDR_LEN;
6542
6543                 /* move va to start of packet data */
6544                 va += IGB_TS_HDR_LEN;
6545         }
6546
6547         /* we need the header to contain the greater of either ETH_HLEN or
6548          * 60 bytes if the skb->len is less than 60 for skb_pad.
6549          */
6550         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
6551
6552         /* align pull length to size of long to optimize memcpy performance */
6553         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
6554
6555         /* update all of the pointers */
6556         skb_frag_size_sub(frag, pull_len);
6557         frag->page_offset += pull_len;
6558         skb->data_len -= pull_len;
6559         skb->tail += pull_len;
6560 }
6561
6562 /**
6563  *  igb_cleanup_headers - Correct corrupted or empty headers
6564  *  @rx_ring: rx descriptor ring packet is being transacted on
6565  *  @rx_desc: pointer to the EOP Rx descriptor
6566  *  @skb: pointer to current skb being fixed
6567  *
6568  *  Address the case where we are pulling data in on pages only
6569  *  and as such no data is present in the skb header.
6570  *
6571  *  In addition if skb is not at least 60 bytes we need to pad it so that
6572  *  it is large enough to qualify as a valid Ethernet frame.
6573  *
6574  *  Returns true if an error was encountered and skb was freed.
6575  **/
6576 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
6577                                 union e1000_adv_rx_desc *rx_desc,
6578                                 struct sk_buff *skb)
6579 {
6580         if (unlikely((igb_test_staterr(rx_desc,
6581                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
6582                 struct net_device *netdev = rx_ring->netdev;
6583                 if (!(netdev->features & NETIF_F_RXALL)) {
6584                         dev_kfree_skb_any(skb);
6585                         return true;
6586                 }
6587         }
6588
6589         /* place header in linear portion of buffer */
6590         if (skb_is_nonlinear(skb))
6591                 igb_pull_tail(rx_ring, rx_desc, skb);
6592
6593         /* if skb_pad returns an error the skb was freed */
6594         if (unlikely(skb->len < 60)) {
6595                 int pad_len = 60 - skb->len;
6596
6597                 if (skb_pad(skb, pad_len))
6598                         return true;
6599                 __skb_put(skb, pad_len);
6600         }
6601
6602         return false;
6603 }
6604
6605 /**
6606  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
6607  *  @rx_ring: rx descriptor ring packet is being transacted on
6608  *  @rx_desc: pointer to the EOP Rx descriptor
6609  *  @skb: pointer to current skb being populated
6610  *
6611  *  This function checks the ring, descriptor, and packet information in
6612  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
6613  *  other fields within the skb.
6614  **/
6615 static void igb_process_skb_fields(struct igb_ring *rx_ring,
6616                                    union e1000_adv_rx_desc *rx_desc,
6617                                    struct sk_buff *skb)
6618 {
6619         struct net_device *dev = rx_ring->netdev;
6620
6621         igb_rx_hash(rx_ring, rx_desc, skb);
6622
6623         igb_rx_checksum(rx_ring, rx_desc, skb);
6624
6625         igb_ptp_rx_hwtstamp(rx_ring->q_vector, rx_desc, skb);
6626
6627         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
6628             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
6629                 u16 vid;
6630                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
6631                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
6632                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
6633                 else
6634                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
6635
6636                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
6637         }
6638
6639         skb_record_rx_queue(skb, rx_ring->queue_index);
6640
6641         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
6642 }
6643
6644 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
6645 {
6646         struct igb_ring *rx_ring = q_vector->rx.ring;
6647         struct sk_buff *skb = rx_ring->skb;
6648         unsigned int total_bytes = 0, total_packets = 0;
6649         u16 cleaned_count = igb_desc_unused(rx_ring);
6650
6651         do {
6652                 union e1000_adv_rx_desc *rx_desc;
6653
6654                 /* return some buffers to hardware, one at a time is too slow */
6655                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
6656                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
6657                         cleaned_count = 0;
6658                 }
6659
6660                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
6661
6662                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
6663                         break;
6664
6665                 /* This memory barrier is needed to keep us from reading
6666                  * any other fields out of the rx_desc until we know the
6667                  * RXD_STAT_DD bit is set
6668                  */
6669                 rmb();
6670
6671                 /* retrieve a buffer from the ring */
6672                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
6673
6674                 /* exit if we failed to retrieve a buffer */
6675                 if (!skb)
6676                         break;
6677
6678                 cleaned_count++;
6679
6680                 /* fetch next buffer in frame if non-eop */
6681                 if (igb_is_non_eop(rx_ring, rx_desc))
6682                         continue;
6683
6684                 /* verify the packet layout is correct */
6685                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
6686                         skb = NULL;
6687                         continue;
6688                 }
6689
6690                 /* probably a little skewed due to removing CRC */
6691                 total_bytes += skb->len;
6692
6693                 /* populate checksum, timestamp, VLAN, and protocol */
6694                 igb_process_skb_fields(rx_ring, rx_desc, skb);
6695
6696                 napi_gro_receive(&q_vector->napi, skb);
6697
6698                 /* reset skb pointer */
6699                 skb = NULL;
6700
6701                 /* update budget accounting */
6702                 total_packets++;
6703         } while (likely(total_packets < budget));
6704
6705         /* place incomplete frames back on ring for completion */
6706         rx_ring->skb = skb;
6707
6708         u64_stats_update_begin(&rx_ring->rx_syncp);
6709         rx_ring->rx_stats.packets += total_packets;
6710         rx_ring->rx_stats.bytes += total_bytes;
6711         u64_stats_update_end(&rx_ring->rx_syncp);
6712         q_vector->rx.total_packets += total_packets;
6713         q_vector->rx.total_bytes += total_bytes;
6714
6715         if (cleaned_count)
6716                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
6717
6718         return (total_packets < budget);
6719 }
6720
6721 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
6722                                   struct igb_rx_buffer *bi)
6723 {
6724         struct page *page = bi->page;
6725         dma_addr_t dma;
6726
6727         /* since we are recycling buffers we should seldom need to alloc */
6728         if (likely(page))
6729                 return true;
6730
6731         /* alloc new page for storage */
6732         page = __skb_alloc_page(GFP_ATOMIC | __GFP_COLD, NULL);
6733         if (unlikely(!page)) {
6734                 rx_ring->rx_stats.alloc_failed++;
6735                 return false;
6736         }
6737
6738         /* map page for use */
6739         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
6740
6741         /* if mapping failed free memory back to system since
6742          * there isn't much point in holding memory we can't use
6743          */
6744         if (dma_mapping_error(rx_ring->dev, dma)) {
6745                 __free_page(page);
6746
6747                 rx_ring->rx_stats.alloc_failed++;
6748                 return false;
6749         }
6750
6751         bi->dma = dma;
6752         bi->page = page;
6753         bi->page_offset = 0;
6754
6755         return true;
6756 }
6757
6758 /**
6759  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
6760  *  @adapter: address of board private structure
6761  **/
6762 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
6763 {
6764         union e1000_adv_rx_desc *rx_desc;
6765         struct igb_rx_buffer *bi;
6766         u16 i = rx_ring->next_to_use;
6767
6768         /* nothing to do */
6769         if (!cleaned_count)
6770                 return;
6771
6772         rx_desc = IGB_RX_DESC(rx_ring, i);
6773         bi = &rx_ring->rx_buffer_info[i];
6774         i -= rx_ring->count;
6775
6776         do {
6777                 if (!igb_alloc_mapped_page(rx_ring, bi))
6778                         break;
6779
6780                 /* Refresh the desc even if buffer_addrs didn't change
6781                  * because each write-back erases this info.
6782                  */
6783                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
6784
6785                 rx_desc++;
6786                 bi++;
6787                 i++;
6788                 if (unlikely(!i)) {
6789                         rx_desc = IGB_RX_DESC(rx_ring, 0);
6790                         bi = rx_ring->rx_buffer_info;
6791                         i -= rx_ring->count;
6792                 }
6793
6794                 /* clear the hdr_addr for the next_to_use descriptor */
6795                 rx_desc->read.hdr_addr = 0;
6796
6797                 cleaned_count--;
6798         } while (cleaned_count);
6799
6800         i += rx_ring->count;
6801
6802         if (rx_ring->next_to_use != i) {
6803                 /* record the next descriptor to use */
6804                 rx_ring->next_to_use = i;
6805
6806                 /* update next to alloc since we have filled the ring */
6807                 rx_ring->next_to_alloc = i;
6808
6809                 /* Force memory writes to complete before letting h/w
6810                  * know there are new descriptors to fetch.  (Only
6811                  * applicable for weak-ordered memory model archs,
6812                  * such as IA-64).
6813                  */
6814                 wmb();
6815                 writel(i, rx_ring->tail);
6816         }
6817 }
6818
6819 /**
6820  * igb_mii_ioctl -
6821  * @netdev:
6822  * @ifreq:
6823  * @cmd:
6824  **/
6825 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6826 {
6827         struct igb_adapter *adapter = netdev_priv(netdev);
6828         struct mii_ioctl_data *data = if_mii(ifr);
6829
6830         if (adapter->hw.phy.media_type != e1000_media_type_copper)
6831                 return -EOPNOTSUPP;
6832
6833         switch (cmd) {
6834         case SIOCGMIIPHY:
6835                 data->phy_id = adapter->hw.phy.addr;
6836                 break;
6837         case SIOCGMIIREG:
6838                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
6839                                      &data->val_out))
6840                         return -EIO;
6841                 break;
6842         case SIOCSMIIREG:
6843         default:
6844                 return -EOPNOTSUPP;
6845         }
6846         return 0;
6847 }
6848
6849 /**
6850  * igb_ioctl -
6851  * @netdev:
6852  * @ifreq:
6853  * @cmd:
6854  **/
6855 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6856 {
6857         switch (cmd) {
6858         case SIOCGMIIPHY:
6859         case SIOCGMIIREG:
6860         case SIOCSMIIREG:
6861                 return igb_mii_ioctl(netdev, ifr, cmd);
6862         case SIOCSHWTSTAMP:
6863                 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
6864         default:
6865                 return -EOPNOTSUPP;
6866         }
6867 }
6868
6869 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6870 {
6871         struct igb_adapter *adapter = hw->back;
6872
6873         if (pcie_capability_read_word(adapter->pdev, reg, value))
6874                 return -E1000_ERR_CONFIG;
6875
6876         return 0;
6877 }
6878
6879 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
6880 {
6881         struct igb_adapter *adapter = hw->back;
6882
6883         if (pcie_capability_write_word(adapter->pdev, reg, *value))
6884                 return -E1000_ERR_CONFIG;
6885
6886         return 0;
6887 }
6888
6889 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
6890 {
6891         struct igb_adapter *adapter = netdev_priv(netdev);
6892         struct e1000_hw *hw = &adapter->hw;
6893         u32 ctrl, rctl;
6894         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
6895
6896         if (enable) {
6897                 /* enable VLAN tag insert/strip */
6898                 ctrl = rd32(E1000_CTRL);
6899                 ctrl |= E1000_CTRL_VME;
6900                 wr32(E1000_CTRL, ctrl);
6901
6902                 /* Disable CFI check */
6903                 rctl = rd32(E1000_RCTL);
6904                 rctl &= ~E1000_RCTL_CFIEN;
6905                 wr32(E1000_RCTL, rctl);
6906         } else {
6907                 /* disable VLAN tag insert/strip */
6908                 ctrl = rd32(E1000_CTRL);
6909                 ctrl &= ~E1000_CTRL_VME;
6910                 wr32(E1000_CTRL, ctrl);
6911         }
6912
6913         igb_rlpml_set(adapter);
6914 }
6915
6916 static int igb_vlan_rx_add_vid(struct net_device *netdev,
6917                                __be16 proto, u16 vid)
6918 {
6919         struct igb_adapter *adapter = netdev_priv(netdev);
6920         struct e1000_hw *hw = &adapter->hw;
6921         int pf_id = adapter->vfs_allocated_count;
6922
6923         /* attempt to add filter to vlvf array */
6924         igb_vlvf_set(adapter, vid, true, pf_id);
6925
6926         /* add the filter since PF can receive vlans w/o entry in vlvf */
6927         igb_vfta_set(hw, vid, true);
6928
6929         set_bit(vid, adapter->active_vlans);
6930
6931         return 0;
6932 }
6933
6934 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
6935                                 __be16 proto, u16 vid)
6936 {
6937         struct igb_adapter *adapter = netdev_priv(netdev);
6938         struct e1000_hw *hw = &adapter->hw;
6939         int pf_id = adapter->vfs_allocated_count;
6940         s32 err;
6941
6942         /* remove vlan from VLVF table array */
6943         err = igb_vlvf_set(adapter, vid, false, pf_id);
6944
6945         /* if vid was not present in VLVF just remove it from table */
6946         if (err)
6947                 igb_vfta_set(hw, vid, false);
6948
6949         clear_bit(vid, adapter->active_vlans);
6950
6951         return 0;
6952 }
6953
6954 static void igb_restore_vlan(struct igb_adapter *adapter)
6955 {
6956         u16 vid;
6957
6958         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
6959
6960         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
6961                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
6962 }
6963
6964 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
6965 {
6966         struct pci_dev *pdev = adapter->pdev;
6967         struct e1000_mac_info *mac = &adapter->hw.mac;
6968
6969         mac->autoneg = 0;
6970
6971         /* Make sure dplx is at most 1 bit and lsb of speed is not set
6972          * for the switch() below to work
6973          */
6974         if ((spd & 1) || (dplx & ~1))
6975                 goto err_inval;
6976
6977         /* Fiber NIC's only allow 1000 gbps Full duplex
6978          * and 100Mbps Full duplex for 100baseFx sfp
6979          */
6980         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
6981                 switch (spd + dplx) {
6982                 case SPEED_10 + DUPLEX_HALF:
6983                 case SPEED_10 + DUPLEX_FULL:
6984                 case SPEED_100 + DUPLEX_HALF:
6985                         goto err_inval;
6986                 default:
6987                         break;
6988                 }
6989         }
6990
6991         switch (spd + dplx) {
6992         case SPEED_10 + DUPLEX_HALF:
6993                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
6994                 break;
6995         case SPEED_10 + DUPLEX_FULL:
6996                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
6997                 break;
6998         case SPEED_100 + DUPLEX_HALF:
6999                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7000                 break;
7001         case SPEED_100 + DUPLEX_FULL:
7002                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7003                 break;
7004         case SPEED_1000 + DUPLEX_FULL:
7005                 mac->autoneg = 1;
7006                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7007                 break;
7008         case SPEED_1000 + DUPLEX_HALF: /* not supported */
7009         default:
7010                 goto err_inval;
7011         }
7012
7013         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7014         adapter->hw.phy.mdix = AUTO_ALL_MODES;
7015
7016         return 0;
7017
7018 err_inval:
7019         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7020         return -EINVAL;
7021 }
7022
7023 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7024                           bool runtime)
7025 {
7026         struct net_device *netdev = pci_get_drvdata(pdev);
7027         struct igb_adapter *adapter = netdev_priv(netdev);
7028         struct e1000_hw *hw = &adapter->hw;
7029         u32 ctrl, rctl, status;
7030         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7031 #ifdef CONFIG_PM
7032         int retval = 0;
7033 #endif
7034
7035         netif_device_detach(netdev);
7036
7037         if (netif_running(netdev))
7038                 __igb_close(netdev, true);
7039
7040         igb_clear_interrupt_scheme(adapter);
7041
7042 #ifdef CONFIG_PM
7043         retval = pci_save_state(pdev);
7044         if (retval)
7045                 return retval;
7046 #endif
7047
7048         status = rd32(E1000_STATUS);
7049         if (status & E1000_STATUS_LU)
7050                 wufc &= ~E1000_WUFC_LNKC;
7051
7052         if (wufc) {
7053                 igb_setup_rctl(adapter);
7054                 igb_set_rx_mode(netdev);
7055
7056                 /* turn on all-multi mode if wake on multicast is enabled */
7057                 if (wufc & E1000_WUFC_MC) {
7058                         rctl = rd32(E1000_RCTL);
7059                         rctl |= E1000_RCTL_MPE;
7060                         wr32(E1000_RCTL, rctl);
7061                 }
7062
7063                 ctrl = rd32(E1000_CTRL);
7064                 /* advertise wake from D3Cold */
7065                 #define E1000_CTRL_ADVD3WUC 0x00100000
7066                 /* phy power management enable */
7067                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7068                 ctrl |= E1000_CTRL_ADVD3WUC;
7069                 wr32(E1000_CTRL, ctrl);
7070
7071                 /* Allow time for pending master requests to run */
7072                 igb_disable_pcie_master(hw);
7073
7074                 wr32(E1000_WUC, E1000_WUC_PME_EN);
7075                 wr32(E1000_WUFC, wufc);
7076         } else {
7077                 wr32(E1000_WUC, 0);
7078                 wr32(E1000_WUFC, 0);
7079         }
7080
7081         *enable_wake = wufc || adapter->en_mng_pt;
7082         if (!*enable_wake)
7083                 igb_power_down_link(adapter);
7084         else
7085                 igb_power_up_link(adapter);
7086
7087         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7088          * would have already happened in close and is redundant.
7089          */
7090         igb_release_hw_control(adapter);
7091
7092         pci_disable_device(pdev);
7093
7094         return 0;
7095 }
7096
7097 #ifdef CONFIG_PM
7098 #ifdef CONFIG_PM_SLEEP
7099 static int igb_suspend(struct device *dev)
7100 {
7101         int retval;
7102         bool wake;
7103         struct pci_dev *pdev = to_pci_dev(dev);
7104
7105         retval = __igb_shutdown(pdev, &wake, 0);
7106         if (retval)
7107                 return retval;
7108
7109         if (wake) {
7110                 pci_prepare_to_sleep(pdev);
7111         } else {
7112                 pci_wake_from_d3(pdev, false);
7113                 pci_set_power_state(pdev, PCI_D3hot);
7114         }
7115
7116         return 0;
7117 }
7118 #endif /* CONFIG_PM_SLEEP */
7119
7120 static int igb_resume(struct device *dev)
7121 {
7122         struct pci_dev *pdev = to_pci_dev(dev);
7123         struct net_device *netdev = pci_get_drvdata(pdev);
7124         struct igb_adapter *adapter = netdev_priv(netdev);
7125         struct e1000_hw *hw = &adapter->hw;
7126         u32 err;
7127
7128         pci_set_power_state(pdev, PCI_D0);
7129         pci_restore_state(pdev);
7130         pci_save_state(pdev);
7131
7132         err = pci_enable_device_mem(pdev);
7133         if (err) {
7134                 dev_err(&pdev->dev,
7135                         "igb: Cannot enable PCI device from suspend\n");
7136                 return err;
7137         }
7138         pci_set_master(pdev);
7139
7140         pci_enable_wake(pdev, PCI_D3hot, 0);
7141         pci_enable_wake(pdev, PCI_D3cold, 0);
7142
7143         if (igb_init_interrupt_scheme(adapter, true)) {
7144                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7145                 return -ENOMEM;
7146         }
7147
7148         igb_reset(adapter);
7149
7150         /* let the f/w know that the h/w is now under the control of the
7151          * driver.
7152          */
7153         igb_get_hw_control(adapter);
7154
7155         wr32(E1000_WUS, ~0);
7156
7157         if (netdev->flags & IFF_UP) {
7158                 rtnl_lock();
7159                 err = __igb_open(netdev, true);
7160                 rtnl_unlock();
7161                 if (err)
7162                         return err;
7163         }
7164
7165         netif_device_attach(netdev);
7166         return 0;
7167 }
7168
7169 #ifdef CONFIG_PM_RUNTIME
7170 static int igb_runtime_idle(struct device *dev)
7171 {
7172         struct pci_dev *pdev = to_pci_dev(dev);
7173         struct net_device *netdev = pci_get_drvdata(pdev);
7174         struct igb_adapter *adapter = netdev_priv(netdev);
7175
7176         if (!igb_has_link(adapter))
7177                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7178
7179         return -EBUSY;
7180 }
7181
7182 static int igb_runtime_suspend(struct device *dev)
7183 {
7184         struct pci_dev *pdev = to_pci_dev(dev);
7185         int retval;
7186         bool wake;
7187
7188         retval = __igb_shutdown(pdev, &wake, 1);
7189         if (retval)
7190                 return retval;
7191
7192         if (wake) {
7193                 pci_prepare_to_sleep(pdev);
7194         } else {
7195                 pci_wake_from_d3(pdev, false);
7196                 pci_set_power_state(pdev, PCI_D3hot);
7197         }
7198
7199         return 0;
7200 }
7201
7202 static int igb_runtime_resume(struct device *dev)
7203 {
7204         return igb_resume(dev);
7205 }
7206 #endif /* CONFIG_PM_RUNTIME */
7207 #endif
7208
7209 static void igb_shutdown(struct pci_dev *pdev)
7210 {
7211         bool wake;
7212
7213         __igb_shutdown(pdev, &wake, 0);
7214
7215         if (system_state == SYSTEM_POWER_OFF) {
7216                 pci_wake_from_d3(pdev, wake);
7217                 pci_set_power_state(pdev, PCI_D3hot);
7218         }
7219 }
7220
7221 #ifdef CONFIG_PCI_IOV
7222 static int igb_sriov_reinit(struct pci_dev *dev)
7223 {
7224         struct net_device *netdev = pci_get_drvdata(dev);
7225         struct igb_adapter *adapter = netdev_priv(netdev);
7226         struct pci_dev *pdev = adapter->pdev;
7227
7228         rtnl_lock();
7229
7230         if (netif_running(netdev))
7231                 igb_close(netdev);
7232
7233         igb_clear_interrupt_scheme(adapter);
7234
7235         igb_init_queue_configuration(adapter);
7236
7237         if (igb_init_interrupt_scheme(adapter, true)) {
7238                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7239                 return -ENOMEM;
7240         }
7241
7242         if (netif_running(netdev))
7243                 igb_open(netdev);
7244
7245         rtnl_unlock();
7246
7247         return 0;
7248 }
7249
7250 static int igb_pci_disable_sriov(struct pci_dev *dev)
7251 {
7252         int err = igb_disable_sriov(dev);
7253
7254         if (!err)
7255                 err = igb_sriov_reinit(dev);
7256
7257         return err;
7258 }
7259
7260 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7261 {
7262         int err = igb_enable_sriov(dev, num_vfs);
7263
7264         if (err)
7265                 goto out;
7266
7267         err = igb_sriov_reinit(dev);
7268         if (!err)
7269                 return num_vfs;
7270
7271 out:
7272         return err;
7273 }
7274
7275 #endif
7276 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7277 {
7278 #ifdef CONFIG_PCI_IOV
7279         if (num_vfs == 0)
7280                 return igb_pci_disable_sriov(dev);
7281         else
7282                 return igb_pci_enable_sriov(dev, num_vfs);
7283 #endif
7284         return 0;
7285 }
7286
7287 #ifdef CONFIG_NET_POLL_CONTROLLER
7288 /* Polling 'interrupt' - used by things like netconsole to send skbs
7289  * without having to re-enable interrupts. It's not called while
7290  * the interrupt routine is executing.
7291  */
7292 static void igb_netpoll(struct net_device *netdev)
7293 {
7294         struct igb_adapter *adapter = netdev_priv(netdev);
7295         struct e1000_hw *hw = &adapter->hw;
7296         struct igb_q_vector *q_vector;
7297         int i;
7298
7299         for (i = 0; i < adapter->num_q_vectors; i++) {
7300                 q_vector = adapter->q_vector[i];
7301                 if (adapter->msix_entries)
7302                         wr32(E1000_EIMC, q_vector->eims_value);
7303                 else
7304                         igb_irq_disable(adapter);
7305                 napi_schedule(&q_vector->napi);
7306         }
7307 }
7308 #endif /* CONFIG_NET_POLL_CONTROLLER */
7309
7310 /**
7311  *  igb_io_error_detected - called when PCI error is detected
7312  *  @pdev: Pointer to PCI device
7313  *  @state: The current pci connection state
7314  *
7315  *  This function is called after a PCI bus error affecting
7316  *  this device has been detected.
7317  **/
7318 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7319                                               pci_channel_state_t state)
7320 {
7321         struct net_device *netdev = pci_get_drvdata(pdev);
7322         struct igb_adapter *adapter = netdev_priv(netdev);
7323
7324         netif_device_detach(netdev);
7325
7326         if (state == pci_channel_io_perm_failure)
7327                 return PCI_ERS_RESULT_DISCONNECT;
7328
7329         if (netif_running(netdev))
7330                 igb_down(adapter);
7331         pci_disable_device(pdev);
7332
7333         /* Request a slot slot reset. */
7334         return PCI_ERS_RESULT_NEED_RESET;
7335 }
7336
7337 /**
7338  *  igb_io_slot_reset - called after the pci bus has been reset.
7339  *  @pdev: Pointer to PCI device
7340  *
7341  *  Restart the card from scratch, as if from a cold-boot. Implementation
7342  *  resembles the first-half of the igb_resume routine.
7343  **/
7344 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7345 {
7346         struct net_device *netdev = pci_get_drvdata(pdev);
7347         struct igb_adapter *adapter = netdev_priv(netdev);
7348         struct e1000_hw *hw = &adapter->hw;
7349         pci_ers_result_t result;
7350         int err;
7351
7352         if (pci_enable_device_mem(pdev)) {
7353                 dev_err(&pdev->dev,
7354                         "Cannot re-enable PCI device after reset.\n");
7355                 result = PCI_ERS_RESULT_DISCONNECT;
7356         } else {
7357                 pci_set_master(pdev);
7358                 pci_restore_state(pdev);
7359                 pci_save_state(pdev);
7360
7361                 pci_enable_wake(pdev, PCI_D3hot, 0);
7362                 pci_enable_wake(pdev, PCI_D3cold, 0);
7363
7364                 igb_reset(adapter);
7365                 wr32(E1000_WUS, ~0);
7366                 result = PCI_ERS_RESULT_RECOVERED;
7367         }
7368
7369         err = pci_cleanup_aer_uncorrect_error_status(pdev);
7370         if (err) {
7371                 dev_err(&pdev->dev,
7372                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7373                         err);
7374                 /* non-fatal, continue */
7375         }
7376
7377         return result;
7378 }
7379
7380 /**
7381  *  igb_io_resume - called when traffic can start flowing again.
7382  *  @pdev: Pointer to PCI device
7383  *
7384  *  This callback is called when the error recovery driver tells us that
7385  *  its OK to resume normal operation. Implementation resembles the
7386  *  second-half of the igb_resume routine.
7387  */
7388 static void igb_io_resume(struct pci_dev *pdev)
7389 {
7390         struct net_device *netdev = pci_get_drvdata(pdev);
7391         struct igb_adapter *adapter = netdev_priv(netdev);
7392
7393         if (netif_running(netdev)) {
7394                 if (igb_up(adapter)) {
7395                         dev_err(&pdev->dev, "igb_up failed after reset\n");
7396                         return;
7397                 }
7398         }
7399
7400         netif_device_attach(netdev);
7401
7402         /* let the f/w know that the h/w is now under the control of the
7403          * driver.
7404          */
7405         igb_get_hw_control(adapter);
7406 }
7407
7408 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7409                              u8 qsel)
7410 {
7411         u32 rar_low, rar_high;
7412         struct e1000_hw *hw = &adapter->hw;
7413
7414         /* HW expects these in little endian so we reverse the byte order
7415          * from network order (big endian) to little endian
7416          */
7417         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
7418                    ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
7419         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
7420
7421         /* Indicate to hardware the Address is Valid. */
7422         rar_high |= E1000_RAH_AV;
7423
7424         if (hw->mac.type == e1000_82575)
7425                 rar_high |= E1000_RAH_POOL_1 * qsel;
7426         else
7427                 rar_high |= E1000_RAH_POOL_1 << qsel;
7428
7429         wr32(E1000_RAL(index), rar_low);
7430         wrfl();
7431         wr32(E1000_RAH(index), rar_high);
7432         wrfl();
7433 }
7434
7435 static int igb_set_vf_mac(struct igb_adapter *adapter,
7436                           int vf, unsigned char *mac_addr)
7437 {
7438         struct e1000_hw *hw = &adapter->hw;
7439         /* VF MAC addresses start at end of receive addresses and moves
7440          * towards the first, as a result a collision should not be possible
7441          */
7442         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7443
7444         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7445
7446         igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7447
7448         return 0;
7449 }
7450
7451 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7452 {
7453         struct igb_adapter *adapter = netdev_priv(netdev);
7454         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7455                 return -EINVAL;
7456         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7457         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7458         dev_info(&adapter->pdev->dev,
7459                  "Reload the VF driver to make this change effective.");
7460         if (test_bit(__IGB_DOWN, &adapter->state)) {
7461                 dev_warn(&adapter->pdev->dev,
7462                          "The VF MAC address has been set, but the PF device is not up.\n");
7463                 dev_warn(&adapter->pdev->dev,
7464                          "Bring the PF device up before attempting to use the VF device.\n");
7465         }
7466         return igb_set_vf_mac(adapter, vf, mac);
7467 }
7468
7469 static int igb_link_mbps(int internal_link_speed)
7470 {
7471         switch (internal_link_speed) {
7472         case SPEED_100:
7473                 return 100;
7474         case SPEED_1000:
7475                 return 1000;
7476         default:
7477                 return 0;
7478         }
7479 }
7480
7481 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7482                                   int link_speed)
7483 {
7484         int rf_dec, rf_int;
7485         u32 bcnrc_val;
7486
7487         if (tx_rate != 0) {
7488                 /* Calculate the rate factor values to set */
7489                 rf_int = link_speed / tx_rate;
7490                 rf_dec = (link_speed - (rf_int * tx_rate));
7491                 rf_dec = (rf_dec * (1 << E1000_RTTBCNRC_RF_INT_SHIFT)) /
7492                          tx_rate;
7493
7494                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7495                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
7496                               E1000_RTTBCNRC_RF_INT_MASK);
7497                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7498         } else {
7499                 bcnrc_val = 0;
7500         }
7501
7502         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7503         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7504          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7505          */
7506         wr32(E1000_RTTBCNRM, 0x14);
7507         wr32(E1000_RTTBCNRC, bcnrc_val);
7508 }
7509
7510 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
7511 {
7512         int actual_link_speed, i;
7513         bool reset_rate = false;
7514
7515         /* VF TX rate limit was not set or not supported */
7516         if ((adapter->vf_rate_link_speed == 0) ||
7517             (adapter->hw.mac.type != e1000_82576))
7518                 return;
7519
7520         actual_link_speed = igb_link_mbps(adapter->link_speed);
7521         if (actual_link_speed != adapter->vf_rate_link_speed) {
7522                 reset_rate = true;
7523                 adapter->vf_rate_link_speed = 0;
7524                 dev_info(&adapter->pdev->dev,
7525                          "Link speed has been changed. VF Transmit rate is disabled\n");
7526         }
7527
7528         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7529                 if (reset_rate)
7530                         adapter->vf_data[i].tx_rate = 0;
7531
7532                 igb_set_vf_rate_limit(&adapter->hw, i,
7533                                       adapter->vf_data[i].tx_rate,
7534                                       actual_link_speed);
7535         }
7536 }
7537
7538 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
7539 {
7540         struct igb_adapter *adapter = netdev_priv(netdev);
7541         struct e1000_hw *hw = &adapter->hw;
7542         int actual_link_speed;
7543
7544         if (hw->mac.type != e1000_82576)
7545                 return -EOPNOTSUPP;
7546
7547         actual_link_speed = igb_link_mbps(adapter->link_speed);
7548         if ((vf >= adapter->vfs_allocated_count) ||
7549             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
7550             (tx_rate < 0) || (tx_rate > actual_link_speed))
7551                 return -EINVAL;
7552
7553         adapter->vf_rate_link_speed = actual_link_speed;
7554         adapter->vf_data[vf].tx_rate = (u16)tx_rate;
7555         igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
7556
7557         return 0;
7558 }
7559
7560 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
7561                                    bool setting)
7562 {
7563         struct igb_adapter *adapter = netdev_priv(netdev);
7564         struct e1000_hw *hw = &adapter->hw;
7565         u32 reg_val, reg_offset;
7566
7567         if (!adapter->vfs_allocated_count)
7568                 return -EOPNOTSUPP;
7569
7570         if (vf >= adapter->vfs_allocated_count)
7571                 return -EINVAL;
7572
7573         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
7574         reg_val = rd32(reg_offset);
7575         if (setting)
7576                 reg_val |= ((1 << vf) |
7577                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7578         else
7579                 reg_val &= ~((1 << vf) |
7580                              (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7581         wr32(reg_offset, reg_val);
7582
7583         adapter->vf_data[vf].spoofchk_enabled = setting;
7584         return E1000_SUCCESS;
7585 }
7586
7587 static int igb_ndo_get_vf_config(struct net_device *netdev,
7588                                  int vf, struct ifla_vf_info *ivi)
7589 {
7590         struct igb_adapter *adapter = netdev_priv(netdev);
7591         if (vf >= adapter->vfs_allocated_count)
7592                 return -EINVAL;
7593         ivi->vf = vf;
7594         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
7595         ivi->tx_rate = adapter->vf_data[vf].tx_rate;
7596         ivi->vlan = adapter->vf_data[vf].pf_vlan;
7597         ivi->qos = adapter->vf_data[vf].pf_qos;
7598         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
7599         return 0;
7600 }
7601
7602 static void igb_vmm_control(struct igb_adapter *adapter)
7603 {
7604         struct e1000_hw *hw = &adapter->hw;
7605         u32 reg;
7606
7607         switch (hw->mac.type) {
7608         case e1000_82575:
7609         case e1000_i210:
7610         case e1000_i211:
7611         case e1000_i354:
7612         default:
7613                 /* replication is not supported for 82575 */
7614                 return;
7615         case e1000_82576:
7616                 /* notify HW that the MAC is adding vlan tags */
7617                 reg = rd32(E1000_DTXCTL);
7618                 reg |= E1000_DTXCTL_VLAN_ADDED;
7619                 wr32(E1000_DTXCTL, reg);
7620         case e1000_82580:
7621                 /* enable replication vlan tag stripping */
7622                 reg = rd32(E1000_RPLOLR);
7623                 reg |= E1000_RPLOLR_STRVLAN;
7624                 wr32(E1000_RPLOLR, reg);
7625         case e1000_i350:
7626                 /* none of the above registers are supported by i350 */
7627                 break;
7628         }
7629
7630         if (adapter->vfs_allocated_count) {
7631                 igb_vmdq_set_loopback_pf(hw, true);
7632                 igb_vmdq_set_replication_pf(hw, true);
7633                 igb_vmdq_set_anti_spoofing_pf(hw, true,
7634                                               adapter->vfs_allocated_count);
7635         } else {
7636                 igb_vmdq_set_loopback_pf(hw, false);
7637                 igb_vmdq_set_replication_pf(hw, false);
7638         }
7639 }
7640
7641 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
7642 {
7643         struct e1000_hw *hw = &adapter->hw;
7644         u32 dmac_thr;
7645         u16 hwm;
7646
7647         if (hw->mac.type > e1000_82580) {
7648                 if (adapter->flags & IGB_FLAG_DMAC) {
7649                         u32 reg;
7650
7651                         /* force threshold to 0. */
7652                         wr32(E1000_DMCTXTH, 0);
7653
7654                         /* DMA Coalescing high water mark needs to be greater
7655                          * than the Rx threshold. Set hwm to PBA - max frame
7656                          * size in 16B units, capping it at PBA - 6KB.
7657                          */
7658                         hwm = 64 * pba - adapter->max_frame_size / 16;
7659                         if (hwm < 64 * (pba - 6))
7660                                 hwm = 64 * (pba - 6);
7661                         reg = rd32(E1000_FCRTC);
7662                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
7663                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
7664                                 & E1000_FCRTC_RTH_COAL_MASK);
7665                         wr32(E1000_FCRTC, reg);
7666
7667                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
7668                          * frame size, capping it at PBA - 10KB.
7669                          */
7670                         dmac_thr = pba - adapter->max_frame_size / 512;
7671                         if (dmac_thr < pba - 10)
7672                                 dmac_thr = pba - 10;
7673                         reg = rd32(E1000_DMACR);
7674                         reg &= ~E1000_DMACR_DMACTHR_MASK;
7675                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
7676                                 & E1000_DMACR_DMACTHR_MASK);
7677
7678                         /* transition to L0x or L1 if available..*/
7679                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
7680
7681                         /* watchdog timer= +-1000 usec in 32usec intervals */
7682                         reg |= (1000 >> 5);
7683
7684                         /* Disable BMC-to-OS Watchdog Enable */
7685                         if (hw->mac.type != e1000_i354)
7686                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
7687
7688                         wr32(E1000_DMACR, reg);
7689
7690                         /* no lower threshold to disable
7691                          * coalescing(smart fifb)-UTRESH=0
7692                          */
7693                         wr32(E1000_DMCRTRH, 0);
7694
7695                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
7696
7697                         wr32(E1000_DMCTLX, reg);
7698
7699                         /* free space in tx packet buffer to wake from
7700                          * DMA coal
7701                          */
7702                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
7703                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
7704
7705                         /* make low power state decision controlled
7706                          * by DMA coal
7707                          */
7708                         reg = rd32(E1000_PCIEMISC);
7709                         reg &= ~E1000_PCIEMISC_LX_DECISION;
7710                         wr32(E1000_PCIEMISC, reg);
7711                 } /* endif adapter->dmac is not disabled */
7712         } else if (hw->mac.type == e1000_82580) {
7713                 u32 reg = rd32(E1000_PCIEMISC);
7714                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
7715                 wr32(E1000_DMACR, 0);
7716         }
7717 }
7718
7719 /**
7720  *  igb_read_i2c_byte - Reads 8 bit word over I2C
7721  *  @hw: pointer to hardware structure
7722  *  @byte_offset: byte offset to read
7723  *  @dev_addr: device address
7724  *  @data: value read
7725  *
7726  *  Performs byte read operation over I2C interface at
7727  *  a specified device address.
7728  **/
7729 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
7730                       u8 dev_addr, u8 *data)
7731 {
7732         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
7733         struct i2c_client *this_client = adapter->i2c_client;
7734         s32 status;
7735         u16 swfw_mask = 0;
7736
7737         if (!this_client)
7738                 return E1000_ERR_I2C;
7739
7740         swfw_mask = E1000_SWFW_PHY0_SM;
7741
7742         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
7743             != E1000_SUCCESS)
7744                 return E1000_ERR_SWFW_SYNC;
7745
7746         status = i2c_smbus_read_byte_data(this_client, byte_offset);
7747         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
7748
7749         if (status < 0)
7750                 return E1000_ERR_I2C;
7751         else {
7752                 *data = status;
7753                 return E1000_SUCCESS;
7754         }
7755 }
7756
7757 /**
7758  *  igb_write_i2c_byte - Writes 8 bit word over I2C
7759  *  @hw: pointer to hardware structure
7760  *  @byte_offset: byte offset to write
7761  *  @dev_addr: device address
7762  *  @data: value to write
7763  *
7764  *  Performs byte write operation over I2C interface at
7765  *  a specified device address.
7766  **/
7767 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
7768                        u8 dev_addr, u8 data)
7769 {
7770         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
7771         struct i2c_client *this_client = adapter->i2c_client;
7772         s32 status;
7773         u16 swfw_mask = E1000_SWFW_PHY0_SM;
7774
7775         if (!this_client)
7776                 return E1000_ERR_I2C;
7777
7778         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
7779                 return E1000_ERR_SWFW_SYNC;
7780         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
7781         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
7782
7783         if (status)
7784                 return E1000_ERR_I2C;
7785         else
7786                 return E1000_SUCCESS;
7787
7788 }
7789 /* igb_main.c */