drivers/net/ethernet/mellanox/mlx4/main.c

   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
   4  * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
   5  * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
   6  *
   7  * This software is available to you under a choice of one of two
   8  * licenses.  You may choose to be licensed under the terms of the GNU
   9  * General Public License (GPL) Version 2, available from the file
  10  * COPYING in the main directory of this source tree, or the
  11  * OpenIB.org BSD license below:
  12  *
  13  *     Redistribution and use in source and binary forms, with or
  14  *     without modification, are permitted provided that the following
  15  *     conditions are met:
  16  *
  17  *      - Redistributions of source code must retain the above
  18  *        copyright notice, this list of conditions and the following
  19  *        disclaimer.
  20  *
  21  *      - Redistributions in binary form must reproduce the above
  22  *        copyright notice, this list of conditions and the following
  23  *        disclaimer in the documentation and/or other materials
  24  *        provided with the distribution.
  25  *
  26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33  * SOFTWARE.
  34  */
  35
  36 #include <linux/module.h>
  37 #include <linux/init.h>
  38 #include <linux/errno.h>
  39 #include <linux/pci.h>
  40 #include <linux/dma-mapping.h>
  41 #include <linux/slab.h>
  42 #include <linux/io-mapping.h>
  43 #include <linux/delay.h>
  44
  45 #include <linux/mlx4/device.h>
  46 #include <linux/mlx4/doorbell.h>
  47
  48 #include "mlx4.h"
  49 #include "fw.h"
  50 #include "icm.h"
  51
  52 MODULE_AUTHOR("Roland Dreier");
  53 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
  54 MODULE_LICENSE("Dual BSD/GPL");
  55 MODULE_VERSION(DRV_VERSION);
  56
  57 struct workqueue_struct *mlx4_wq;
  58
  59 #ifdef CONFIG_MLX4_DEBUG
  60
  61 int mlx4_debug_level = 0;
  62 module_param_named(debug_level, mlx4_debug_level, int, 0644);
  63 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
  64
  65 #endif /* CONFIG_MLX4_DEBUG */
  66
  67 #ifdef CONFIG_PCI_MSI
  68
  69 static int msi_x = 1;
  70 module_param(msi_x, int, 0444);
  71 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
  72
  73 #else /* CONFIG_PCI_MSI */
  74
  75 #define msi_x (0)
  76
  77 #endif /* CONFIG_PCI_MSI */
  78
  79 static int num_vfs;
  80 module_param(num_vfs, int, 0444);
  81 MODULE_PARM_DESC(num_vfs, "enable #num_vfs functions if num_vfs > 0");
  82
  83 static int probe_vf;
  84 module_param(probe_vf, int, 0644);
  85 MODULE_PARM_DESC(probe_vf, "number of vfs to probe by pf driver (num_vfs > 0)");
  86
  87 int mlx4_log_num_mgm_entry_size = 10;
  88 module_param_named(log_num_mgm_entry_size,
  89                         mlx4_log_num_mgm_entry_size, int, 0444);
  90 MODULE_PARM_DESC(log_num_mgm_entry_size, "log mgm size, that defines the num"
  91                                          " of qp per mcg, for example:"
  92                                          " 10 gives 248.range: 9<="
  93                                          " log_num_mgm_entry_size <= 12");
  94
  95 #define MLX4_VF                                        (1 << 0)
  96
  97 #define HCA_GLOBAL_CAP_MASK            0
  98 #define PF_CONTEXT_BEHAVIOUR_MASK      0
  99
 100 static char mlx4_version[] __devinitdata =
 101         DRV_NAME ": Mellanox ConnectX core driver v"
 102         DRV_VERSION " (" DRV_RELDATE ")\n";
 103
 104 static struct mlx4_profile default_profile = {
 105         .num_qp         = 1 << 18,
 106         .num_srq        = 1 << 16,
 107         .rdmarc_per_qp  = 1 << 4,
 108         .num_cq         = 1 << 16,
 109         .num_mcg        = 1 << 13,
 110         .num_mpt        = 1 << 19,
 111         .num_mtt        = 1 << 20, /* It is really num mtt segements */
 112 };
 113
 114 static int log_num_mac = 7;
 115 module_param_named(log_num_mac, log_num_mac, int, 0444);
 116 MODULE_PARM_DESC(log_num_mac, "Log2 max number of MACs per ETH port (1-7)");
 117
 118 static int log_num_vlan;
 119 module_param_named(log_num_vlan, log_num_vlan, int, 0444);
 120 MODULE_PARM_DESC(log_num_vlan, "Log2 max number of VLANs per ETH port (0-7)");
 121 /* Log2 max number of VLANs per ETH port (0-7) */
 122 #define MLX4_LOG_NUM_VLANS 7
 123
 124 static bool use_prio;
 125 module_param_named(use_prio, use_prio, bool, 0444);
 126 MODULE_PARM_DESC(use_prio, "Enable steering by VLAN priority on ETH ports "
 127                   "(0/1, default 0)");
 128
 129 int log_mtts_per_seg = ilog2(MLX4_MTT_ENTRY_PER_SEG);
 130 module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444);
 131 MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-7)");
 132
 133 static int port_type_array[2] = {MLX4_PORT_TYPE_NONE, MLX4_PORT_TYPE_NONE};
 134 static int arr_argc = 2;
 135 module_param_array(port_type_array, int, &arr_argc, 0444);
 136 MODULE_PARM_DESC(port_type_array, "Array of port types: HW_DEFAULT (0) is default "
 137                                 "1 for IB, 2 for Ethernet");
 138
 139 struct mlx4_port_config {
 140         struct list_head list;
 141         enum mlx4_port_type port_type[MLX4_MAX_PORTS + 1];
 142         struct pci_dev *pdev;
 143 };
 144
 145 static inline int mlx4_master_get_num_eqs(struct mlx4_dev *dev)
 146 {
 147         return dev->caps.reserved_eqs +
 148                 MLX4_MFUNC_EQ_NUM * (dev->num_slaves + 1);
 149 }
 150
 151 int mlx4_check_port_params(struct mlx4_dev *dev,
 152                            enum mlx4_port_type *port_type)
 153 {
 154         int i;
 155
 156         for (i = 0; i < dev->caps.num_ports - 1; i++) {
 157                 if (port_type[i] != port_type[i + 1]) {
 158                         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) {
 159                                 mlx4_err(dev, "Only same port types supported "
 160                                          "on this HCA, aborting.\n");
 161                                 return -EINVAL;
 162                         }
 163                         if (port_type[i] == MLX4_PORT_TYPE_ETH &&
 164                             port_type[i + 1] == MLX4_PORT_TYPE_IB)
 165                                 return -EINVAL;
 166                 }
 167         }
 168
 169         for (i = 0; i < dev->caps.num_ports; i++) {
 170                 if (!(port_type[i] & dev->caps.supported_type[i+1])) {
 171                         mlx4_err(dev, "Requested port type for port %d is not "
 172                                       "supported on this HCA\n", i + 1);
 173                         return -EINVAL;
 174                 }
 175         }
 176         return 0;
 177 }
 178
 179 static void mlx4_set_port_mask(struct mlx4_dev *dev)
 180 {
 181         int i;
 182
 183         for (i = 1; i <= dev->caps.num_ports; ++i)
 184                 dev->caps.port_mask[i] = dev->caps.port_type[i];
 185 }
 186
 187 static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
 188 {
 189         int err;
 190         int i;
 191
 192         err = mlx4_QUERY_DEV_CAP(dev, dev_cap);
 193         if (err) {
 194                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 195                 return err;
 196         }
 197
 198         if (dev_cap->min_page_sz > PAGE_SIZE) {
 199                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 200                          "kernel PAGE_SIZE of %ld, aborting.\n",
 201                          dev_cap->min_page_sz, PAGE_SIZE);
 202                 return -ENODEV;
 203         }
 204         if (dev_cap->num_ports > MLX4_MAX_PORTS) {
 205                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 206                          "aborting.\n",
 207                          dev_cap->num_ports, MLX4_MAX_PORTS);
 208                 return -ENODEV;
 209         }
 210
 211         if (dev_cap->uar_size > pci_resource_len(dev->pdev, 2)) {
 212                 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than "
 213                          "PCI resource 2 size of 0x%llx, aborting.\n",
 214                          dev_cap->uar_size,
 215                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 216                 return -ENODEV;
 217         }
 218
 219         dev->caps.num_ports          = dev_cap->num_ports;
 220         for (i = 1; i <= dev->caps.num_ports; ++i) {
 221                 dev->caps.vl_cap[i]         = dev_cap->max_vl[i];
 222                 dev->caps.ib_mtu_cap[i]     = dev_cap->ib_mtu[i];
 223                 dev->caps.gid_table_len[i]  = dev_cap->max_gids[i];
 224                 dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
 225                 dev->caps.port_width_cap[i] = dev_cap->max_port_width[i];
 226                 dev->caps.eth_mtu_cap[i]    = dev_cap->eth_mtu[i];
 227                 dev->caps.def_mac[i]        = dev_cap->def_mac[i];
 228                 dev->caps.supported_type[i] = dev_cap->supported_port_types[i];
 229                 dev->caps.suggested_type[i] = dev_cap->suggested_type[i];
 230                 dev->caps.default_sense[i] = dev_cap->default_sense[i];
 231                 dev->caps.trans_type[i]     = dev_cap->trans_type[i];
 232                 dev->caps.vendor_oui[i]     = dev_cap->vendor_oui[i];
 233                 dev->caps.wavelength[i]     = dev_cap->wavelength[i];
 234                 dev->caps.trans_code[i]     = dev_cap->trans_code[i];
 235         }
 236
 237         dev->caps.uar_page_size      = PAGE_SIZE;
 238         dev->caps.num_uars           = dev_cap->uar_size / PAGE_SIZE;
 239         dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay;
 240         dev->caps.bf_reg_size        = dev_cap->bf_reg_size;
 241         dev->caps.bf_regs_per_page   = dev_cap->bf_regs_per_page;
 242         dev->caps.max_sq_sg          = dev_cap->max_sq_sg;
 243         dev->caps.max_rq_sg          = dev_cap->max_rq_sg;
 244         dev->caps.max_wqes           = dev_cap->max_qp_sz;
 245         dev->caps.max_qp_init_rdma   = dev_cap->max_requester_per_qp;
 246         dev->caps.max_srq_wqes       = dev_cap->max_srq_sz;
 247         dev->caps.max_srq_sge        = dev_cap->max_rq_sg - 1;
 248         dev->caps.reserved_srqs      = dev_cap->reserved_srqs;
 249         dev->caps.max_sq_desc_sz     = dev_cap->max_sq_desc_sz;
 250         dev->caps.max_rq_desc_sz     = dev_cap->max_rq_desc_sz;
 251         dev->caps.num_qp_per_mgm     = mlx4_get_qp_per_mgm(dev);
 252         /*
 253          * Subtract 1 from the limit because we need to allocate a
 254          * spare CQE so the HCA HW can tell the difference between an
 255          * empty CQ and a full CQ.
 256          */
 257         dev->caps.max_cqes           = dev_cap->max_cq_sz - 1;
 258         dev->caps.reserved_cqs       = dev_cap->reserved_cqs;
 259         dev->caps.reserved_eqs       = dev_cap->reserved_eqs;
 260         dev->caps.reserved_mtts      = dev_cap->reserved_mtts;
 261         dev->caps.reserved_mrws      = dev_cap->reserved_mrws;
 262
 263         /* The first 128 UARs are used for EQ doorbells */
 264         dev->caps.reserved_uars      = max_t(int, 128, dev_cap->reserved_uars);
 265         dev->caps.reserved_pds       = dev_cap->reserved_pds;
 266         dev->caps.reserved_xrcds     = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ?
 267                                         dev_cap->reserved_xrcds : 0;
 268         dev->caps.max_xrcds          = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ?
 269                                         dev_cap->max_xrcds : 0;
 270         dev->caps.mtt_entry_sz       = dev_cap->mtt_entry_sz;
 271
 272         dev->caps.max_msg_sz         = dev_cap->max_msg_sz;
 273         dev->caps.page_size_cap      = ~(u32) (dev_cap->min_page_sz - 1);
 274         dev->caps.flags              = dev_cap->flags;
 275         dev->caps.bmme_flags         = dev_cap->bmme_flags;
 276         dev->caps.reserved_lkey      = dev_cap->reserved_lkey;
 277         dev->caps.stat_rate_support  = dev_cap->stat_rate_support;
 278         dev->caps.max_gso_sz         = dev_cap->max_gso_sz;
 279
 280         /* Sense port always allowed on supported devices for ConnectX1 and 2 */
 281         if (dev->pdev->device != 0x1003)
 282                 dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT;
 283
 284         dev->caps.log_num_macs  = log_num_mac;
 285         dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS;
 286         dev->caps.log_num_prios = use_prio ? 3 : 0;
 287
 288         for (i = 1; i <= dev->caps.num_ports; ++i) {
 289                 dev->caps.port_type[i] = MLX4_PORT_TYPE_NONE;
 290                 if (dev->caps.supported_type[i]) {
 291                         /* if only ETH is supported - assign ETH */
 292                         if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH)
 293                                 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH;
 294                         /* if only IB is supported,
 295                          * assign IB only if SRIOV is off*/
 296                         else if (dev->caps.supported_type[i] ==
 297                                  MLX4_PORT_TYPE_IB) {
 298                                 if (dev->flags & MLX4_FLAG_SRIOV)
 299                                         dev->caps.port_type[i] =
 300                                                 MLX4_PORT_TYPE_NONE;
 301                                 else
 302                                         dev->caps.port_type[i] =
 303                                                 MLX4_PORT_TYPE_IB;
 304                         /* if IB and ETH are supported,
 305                          * first of all check if SRIOV is on */
 306                         } else if (dev->flags & MLX4_FLAG_SRIOV)
 307                                 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH;
 308                         else {
 309                                 /* In non-SRIOV mode, we set the port type
 310                                  * according to user selection of port type,
 311                                  * if usere selected none, take the FW hint */
 312                                 if (port_type_array[i-1] == MLX4_PORT_TYPE_NONE)
 313                                         dev->caps.port_type[i] = dev->caps.suggested_type[i] ?
 314                                                 MLX4_PORT_TYPE_ETH : MLX4_PORT_TYPE_IB;
 315                                 else
 316                                         dev->caps.port_type[i] = port_type_array[i-1];
 317                         }
 318                 }
 319                 /*
 320                  * Link sensing is allowed on the port if 3 conditions are true:
 321                  * 1. Both protocols are supported on the port.
 322                  * 2. Different types are supported on the port
 323                  * 3. FW declared that it supports link sensing
 324                  */
 325                 mlx4_priv(dev)->sense.sense_allowed[i] =
 326                         ((dev->caps.supported_type[i] == MLX4_PORT_TYPE_AUTO) &&
 327                          (dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) &&
 328                          (dev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT));
 329
 330                 /*
 331                  * If "default_sense" bit is set, we move the port to "AUTO" mode
 332                  * and perform sense_port FW command to try and set the correct
 333                  * port type from beginning
 334                  */
 335                 if (mlx4_priv(dev)->sense.sense_allowed[i] && dev->caps.default_sense[i]) {
 336                         enum mlx4_port_type sensed_port = MLX4_PORT_TYPE_NONE;
 337                         dev->caps.possible_type[i] = MLX4_PORT_TYPE_AUTO;
 338                         mlx4_SENSE_PORT(dev, i, &sensed_port);
 339                         if (sensed_port != MLX4_PORT_TYPE_NONE)
 340                                 dev->caps.port_type[i] = sensed_port;
 341                 } else {
 342                         dev->caps.possible_type[i] = dev->caps.port_type[i];
 343                 }
 344
 345                 if (dev->caps.log_num_macs > dev_cap->log_max_macs[i]) {
 346                         dev->caps.log_num_macs = dev_cap->log_max_macs[i];
 347                         mlx4_warn(dev, "Requested number of MACs is too much "
 348                                   "for port %d, reducing to %d.\n",
 349                                   i, 1 << dev->caps.log_num_macs);
 350                 }
 351                 if (dev->caps.log_num_vlans > dev_cap->log_max_vlans[i]) {
 352                         dev->caps.log_num_vlans = dev_cap->log_max_vlans[i];
 353                         mlx4_warn(dev, "Requested number of VLANs is too much "
 354                                   "for port %d, reducing to %d.\n",
 355                                   i, 1 << dev->caps.log_num_vlans);
 356                 }
 357         }
 358
 359         dev->caps.max_counters = 1 << ilog2(dev_cap->max_counters);
 360
 361         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps;
 362         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] =
 363                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] =
 364                 (1 << dev->caps.log_num_macs) *
 365                 (1 << dev->caps.log_num_vlans) *
 366                 (1 << dev->caps.log_num_prios) *
 367                 dev->caps.num_ports;
 368         dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH;
 369
 370         dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] +
 371                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] +
 372                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] +
 373                 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH];
 374
 375         return 0;
 376 }
 377 /*The function checks if there are live vf, return the num of them*/
 378 static int mlx4_how_many_lives_vf(struct mlx4_dev *dev)
 379 {
 380         struct mlx4_priv *priv = mlx4_priv(dev);
 381         struct mlx4_slave_state *s_state;
 382         int i;
 383         int ret = 0;
 384
 385         for (i = 1/*the ppf is 0*/; i < dev->num_slaves; ++i) {
 386                 s_state = &priv->mfunc.master.slave_state[i];
 387                 if (s_state->active && s_state->last_cmd !=
 388                     MLX4_COMM_CMD_RESET) {
 389                         mlx4_warn(dev, "%s: slave: %d is still active\n",
 390                                   __func__, i);
 391                         ret++;
 392                 }
 393         }
 394         return ret;
 395 }
 396
 397 int mlx4_is_slave_active(struct mlx4_dev *dev, int slave)
 398 {
 399         struct mlx4_priv *priv = mlx4_priv(dev);
 400         struct mlx4_slave_state *s_slave;
 401
 402         if (!mlx4_is_master(dev))
 403                 return 0;
 404
 405         s_slave = &priv->mfunc.master.slave_state[slave];
 406         return !!s_slave->active;
 407 }
 408 EXPORT_SYMBOL(mlx4_is_slave_active);
 409
 410 static int mlx4_slave_cap(struct mlx4_dev *dev)
 411 {
 412         int                        err;
 413         u32                        page_size;
 414         struct mlx4_dev_cap        dev_cap;
 415         struct mlx4_func_cap       func_cap;
 416         struct mlx4_init_hca_param hca_param;
 417         int                        i;
 418
 419         memset(&hca_param, 0, sizeof(hca_param));
 420         err = mlx4_QUERY_HCA(dev, &hca_param);
 421         if (err) {
 422                 mlx4_err(dev, "QUERY_HCA command failed, aborting.\n");
 423                 return err;
 424         }
 425
 426         /*fail if the hca has an unknown capability */
 427         if ((hca_param.global_caps | HCA_GLOBAL_CAP_MASK) !=
 428             HCA_GLOBAL_CAP_MASK) {
 429                 mlx4_err(dev, "Unknown hca global capabilities\n");
 430                 return -ENOSYS;
 431         }
 432
 433         mlx4_log_num_mgm_entry_size = hca_param.log_mc_entry_sz;
 434
 435         memset(&dev_cap, 0, sizeof(dev_cap));
 436         err = mlx4_dev_cap(dev, &dev_cap);
 437         if (err) {
 438                 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
 439                 return err;
 440         }
 441
 442         page_size = ~dev->caps.page_size_cap + 1;
 443         mlx4_warn(dev, "HCA minimum page size:%d\n", page_size);
 444         if (page_size > PAGE_SIZE) {
 445                 mlx4_err(dev, "HCA minimum page size of %d bigger than "
 446                          "kernel PAGE_SIZE of %ld, aborting.\n",
 447                          page_size, PAGE_SIZE);
 448                 return -ENODEV;
 449         }
 450
 451         /* slave gets uar page size from QUERY_HCA fw command */
 452         dev->caps.uar_page_size = 1 << (hca_param.uar_page_sz + 12);
 453
 454         /* TODO: relax this assumption */
 455         if (dev->caps.uar_page_size != PAGE_SIZE) {
 456                 mlx4_err(dev, "UAR size:%d != kernel PAGE_SIZE of %ld\n",
 457                          dev->caps.uar_page_size, PAGE_SIZE);
 458                 return -ENODEV;
 459         }
 460
 461         memset(&func_cap, 0, sizeof(func_cap));
 462         err = mlx4_QUERY_FUNC_CAP(dev, &func_cap);
 463         if (err) {
 464                 mlx4_err(dev, "QUERY_FUNC_CAP command failed, aborting.\n");
 465                 return err;
 466         }
 467
 468         if ((func_cap.pf_context_behaviour | PF_CONTEXT_BEHAVIOUR_MASK) !=
 469             PF_CONTEXT_BEHAVIOUR_MASK) {
 470                 mlx4_err(dev, "Unknown pf context behaviour\n");
 471                 return -ENOSYS;
 472         }
 473
 474         dev->caps.num_ports             = func_cap.num_ports;
 475         dev->caps.num_qps               = func_cap.qp_quota;
 476         dev->caps.num_srqs              = func_cap.srq_quota;
 477         dev->caps.num_cqs               = func_cap.cq_quota;
 478         dev->caps.num_eqs               = func_cap.max_eq;
 479         dev->caps.reserved_eqs          = func_cap.reserved_eq;
 480         dev->caps.num_mpts              = func_cap.mpt_quota;
 481         dev->caps.num_mtts              = func_cap.mtt_quota;
 482         dev->caps.num_pds               = MLX4_NUM_PDS;
 483         dev->caps.num_mgms              = 0;
 484         dev->caps.num_amgms             = 0;
 485
 486         for (i = 1; i <= dev->caps.num_ports; ++i)
 487                 dev->caps.port_mask[i] = dev->caps.port_type[i];
 488
 489         if (dev->caps.num_ports > MLX4_MAX_PORTS) {
 490                 mlx4_err(dev, "HCA has %d ports, but we only support %d, "
 491                          "aborting.\n", dev->caps.num_ports, MLX4_MAX_PORTS);
 492                 return -ENODEV;
 493         }
 494
 495         if (dev->caps.uar_page_size * (dev->caps.num_uars -
 496                                        dev->caps.reserved_uars) >
 497                                        pci_resource_len(dev->pdev, 2)) {
 498                 mlx4_err(dev, "HCA reported UAR region size of 0x%x bigger than "
 499                          "PCI resource 2 size of 0x%llx, aborting.\n",
 500                          dev->caps.uar_page_size * dev->caps.num_uars,
 501                          (unsigned long long) pci_resource_len(dev->pdev, 2));
 502                 return -ENODEV;
 503         }
 504
 505 #if 0
 506         mlx4_warn(dev, "sqp_demux:%d\n", dev->caps.sqp_demux);
 507         mlx4_warn(dev, "num_uars:%d reserved_uars:%d uar region:0x%x bar2:0x%llx\n",
 508                   dev->caps.num_uars, dev->caps.reserved_uars,
 509                   dev->caps.uar_page_size * dev->caps.num_uars,
 510                   pci_resource_len(dev->pdev, 2));
 511         mlx4_warn(dev, "num_eqs:%d reserved_eqs:%d\n", dev->caps.num_eqs,
 512                   dev->caps.reserved_eqs);
 513         mlx4_warn(dev, "num_pds:%d reserved_pds:%d slave_pd_shift:%d pd_base:%d\n",
 514                   dev->caps.num_pds, dev->caps.reserved_pds,
 515                   dev->caps.slave_pd_shift, dev->caps.pd_base);
 516 #endif
 517         return 0;
 518 }
 519
 520 /*
 521  * Change the port configuration of the device.
 522  * Every user of this function must hold the port mutex.
 523  */
 524 int mlx4_change_port_types(struct mlx4_dev *dev,
 525                            enum mlx4_port_type *port_types)
 526 {
 527         int err = 0;
 528         int change = 0;
 529         int port;
 530
 531         for (port = 0; port <  dev->caps.num_ports; port++) {
 532                 /* Change the port type only if the new type is different
 533                  * from the current, and not set to Auto */
 534                 if (port_types[port] != dev->caps.port_type[port + 1]) {
 535                         change = 1;
 536                         dev->caps.port_type[port + 1] = port_types[port];
 537                 }
 538         }
 539         if (change) {
 540                 mlx4_unregister_device(dev);
 541                 for (port = 1; port <= dev->caps.num_ports; port++) {
 542                         mlx4_CLOSE_PORT(dev, port);
 543                         err = mlx4_SET_PORT(dev, port);
 544                         if (err) {
 545                                 mlx4_err(dev, "Failed to set port %d, "
 546                                               "aborting\n", port);
 547                                 goto out;
 548                         }
 549                 }
 550                 mlx4_set_port_mask(dev);
 551                 err = mlx4_register_device(dev);
 552         }
 553
 554 out:
 555         return err;
 556 }
 557
 558 static ssize_t show_port_type(struct device *dev,
 559                               struct device_attribute *attr,
 560                               char *buf)
 561 {
 562         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 563                                                    port_attr);
 564         struct mlx4_dev *mdev = info->dev;
 565         char type[8];
 566
 567         sprintf(type, "%s",
 568                 (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_IB) ?
 569                 "ib" : "eth");
 570         if (mdev->caps.possible_type[info->port] == MLX4_PORT_TYPE_AUTO)
 571                 sprintf(buf, "auto (%s)\n", type);
 572         else
 573                 sprintf(buf, "%s\n", type);
 574
 575         return strlen(buf);
 576 }
 577
 578 static ssize_t set_port_type(struct device *dev,
 579                              struct device_attribute *attr,
 580                              const char *buf, size_t count)
 581 {
 582         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 583                                                    port_attr);
 584         struct mlx4_dev *mdev = info->dev;
 585         struct mlx4_priv *priv = mlx4_priv(mdev);
 586         enum mlx4_port_type types[MLX4_MAX_PORTS];
 587         enum mlx4_port_type new_types[MLX4_MAX_PORTS];
 588         int i;
 589         int err = 0;
 590
 591         if (!strcmp(buf, "ib\n"))
 592                 info->tmp_type = MLX4_PORT_TYPE_IB;
 593         else if (!strcmp(buf, "eth\n"))
 594                 info->tmp_type = MLX4_PORT_TYPE_ETH;
 595         else if (!strcmp(buf, "auto\n"))
 596                 info->tmp_type = MLX4_PORT_TYPE_AUTO;
 597         else {
 598                 mlx4_err(mdev, "%s is not supported port type\n", buf);
 599                 return -EINVAL;
 600         }
 601
 602         mlx4_stop_sense(mdev);
 603         mutex_lock(&priv->port_mutex);
 604         /* Possible type is always the one that was delivered */
 605         mdev->caps.possible_type[info->port] = info->tmp_type;
 606
 607         for (i = 0; i < mdev->caps.num_ports; i++) {
 608                 types[i] = priv->port[i+1].tmp_type ? priv->port[i+1].tmp_type :
 609                                         mdev->caps.possible_type[i+1];
 610                 if (types[i] == MLX4_PORT_TYPE_AUTO)
 611                         types[i] = mdev->caps.port_type[i+1];
 612         }
 613
 614         if (!(mdev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) &&
 615             !(mdev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)) {
 616                 for (i = 1; i <= mdev->caps.num_ports; i++) {
 617                         if (mdev->caps.possible_type[i] == MLX4_PORT_TYPE_AUTO) {
 618                                 mdev->caps.possible_type[i] = mdev->caps.port_type[i];
 619                                 err = -EINVAL;
 620                         }
 621                 }
 622         }
 623         if (err) {
 624                 mlx4_err(mdev, "Auto sensing is not supported on this HCA. "
 625                                "Set only 'eth' or 'ib' for both ports "
 626                                "(should be the same)\n");
 627                 goto out;
 628         }
 629
 630         mlx4_do_sense_ports(mdev, new_types, types);
 631
 632         err = mlx4_check_port_params(mdev, new_types);
 633         if (err)
 634                 goto out;
 635
 636         /* We are about to apply the changes after the configuration
 637          * was verified, no need to remember the temporary types
 638          * any more */
 639         for (i = 0; i < mdev->caps.num_ports; i++)
 640                 priv->port[i + 1].tmp_type = 0;
 641
 642         err = mlx4_change_port_types(mdev, new_types);
 643
 644 out:
 645         mlx4_start_sense(mdev);
 646         mutex_unlock(&priv->port_mutex);
 647         return err ? err : count;
 648 }
 649
 650 enum ibta_mtu {
 651         IB_MTU_256  = 1,
 652         IB_MTU_512  = 2,
 653         IB_MTU_1024 = 3,
 654         IB_MTU_2048 = 4,
 655         IB_MTU_4096 = 5
 656 };
 657
 658 static inline int int_to_ibta_mtu(int mtu)
 659 {
 660         switch (mtu) {
 661         case 256:  return IB_MTU_256;
 662         case 512:  return IB_MTU_512;
 663         case 1024: return IB_MTU_1024;
 664         case 2048: return IB_MTU_2048;
 665         case 4096: return IB_MTU_4096;
 666         default: return -1;
 667         }
 668 }
 669
 670 static inline int ibta_mtu_to_int(enum ibta_mtu mtu)
 671 {
 672         switch (mtu) {
 673         case IB_MTU_256:  return  256;
 674         case IB_MTU_512:  return  512;
 675         case IB_MTU_1024: return 1024;
 676         case IB_MTU_2048: return 2048;
 677         case IB_MTU_4096: return 4096;
 678         default: return -1;
 679         }
 680 }
 681
 682 static ssize_t show_port_ib_mtu(struct device *dev,
 683                              struct device_attribute *attr,
 684                              char *buf)
 685 {
 686         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 687                                                    port_mtu_attr);
 688         struct mlx4_dev *mdev = info->dev;
 689
 690         if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH)
 691                 mlx4_warn(mdev, "port level mtu is only used for IB ports\n");
 692
 693         sprintf(buf, "%d\n",
 694                         ibta_mtu_to_int(mdev->caps.port_ib_mtu[info->port]));
 695         return strlen(buf);
 696 }
 697
 698 static ssize_t set_port_ib_mtu(struct device *dev,
 699                              struct device_attribute *attr,
 700                              const char *buf, size_t count)
 701 {
 702         struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info,
 703                                                    port_mtu_attr);
 704         struct mlx4_dev *mdev = info->dev;
 705         struct mlx4_priv *priv = mlx4_priv(mdev);
 706         int err, port, mtu, ibta_mtu = -1;
 707
 708         if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) {
 709                 mlx4_warn(mdev, "port level mtu is only used for IB ports\n");
 710                 return -EINVAL;
 711         }
 712
 713         err = sscanf(buf, "%d", &mtu);
 714         if (err > 0)
 715                 ibta_mtu = int_to_ibta_mtu(mtu);
 716
 717         if (err <= 0 || ibta_mtu < 0) {
 718                 mlx4_err(mdev, "%s is invalid IBTA mtu\n", buf);
 719                 return -EINVAL;
 720         }
 721
 722         mdev->caps.port_ib_mtu[info->port] = ibta_mtu;
 723
 724         mlx4_stop_sense(mdev);
 725         mutex_lock(&priv->port_mutex);
 726         mlx4_unregister_device(mdev);
 727         for (port = 1; port <= mdev->caps.num_ports; port++) {
 728                 mlx4_CLOSE_PORT(mdev, port);
 729                 err = mlx4_SET_PORT(mdev, port);
 730                 if (err) {
 731                         mlx4_err(mdev, "Failed to set port %d, "
 732                                       "aborting\n", port);
 733                         goto err_set_port;
 734                 }
 735         }
 736         err = mlx4_register_device(mdev);
 737 err_set_port:
 738         mutex_unlock(&priv->port_mutex);
 739         mlx4_start_sense(mdev);
 740         return err ? err : count;
 741 }
 742
 743 static int mlx4_load_fw(struct mlx4_dev *dev)
 744 {
 745         struct mlx4_priv *priv = mlx4_priv(dev);
 746         int err;
 747
 748         priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages,
 749                                          GFP_HIGHUSER | __GFP_NOWARN, 0);
 750         if (!priv->fw.fw_icm) {
 751                 mlx4_err(dev, "Couldn't allocate FW area, aborting.\n");
 752                 return -ENOMEM;
 753         }
 754
 755         err = mlx4_MAP_FA(dev, priv->fw.fw_icm);
 756         if (err) {
 757                 mlx4_err(dev, "MAP_FA command failed, aborting.\n");
 758                 goto err_free;
 759         }
 760
 761         err = mlx4_RUN_FW(dev);
 762         if (err) {
 763                 mlx4_err(dev, "RUN_FW command failed, aborting.\n");
 764                 goto err_unmap_fa;
 765         }
 766
 767         return 0;
 768
 769 err_unmap_fa:
 770         mlx4_UNMAP_FA(dev);
 771
 772 err_free:
 773         mlx4_free_icm(dev, priv->fw.fw_icm, 0);
 774         return err;
 775 }
 776
 777 static int mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base,
 778                                 int cmpt_entry_sz)
 779 {
 780         struct mlx4_priv *priv = mlx4_priv(dev);
 781         int err;
 782         int num_eqs;
 783
 784         err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table,
 785                                   cmpt_base +
 786                                   ((u64) (MLX4_CMPT_TYPE_QP *
 787                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 788                                   cmpt_entry_sz, dev->caps.num_qps,
 789                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 790                                   0, 0);
 791         if (err)
 792                 goto err;
 793
 794         err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table,
 795                                   cmpt_base +
 796                                   ((u64) (MLX4_CMPT_TYPE_SRQ *
 797                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 798                                   cmpt_entry_sz, dev->caps.num_srqs,
 799                                   dev->caps.reserved_srqs, 0, 0);
 800         if (err)
 801                 goto err_qp;
 802
 803         err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table,
 804                                   cmpt_base +
 805                                   ((u64) (MLX4_CMPT_TYPE_CQ *
 806                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 807                                   cmpt_entry_sz, dev->caps.num_cqs,
 808                                   dev->caps.reserved_cqs, 0, 0);
 809         if (err)
 810                 goto err_srq;
 811
 812         num_eqs = (mlx4_is_master(dev)) ?
 813                 roundup_pow_of_two(mlx4_master_get_num_eqs(dev)) :
 814                 dev->caps.num_eqs;
 815         err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table,
 816                                   cmpt_base +
 817                                   ((u64) (MLX4_CMPT_TYPE_EQ *
 818                                           cmpt_entry_sz) << MLX4_CMPT_SHIFT),
 819                                   cmpt_entry_sz, num_eqs, num_eqs, 0, 0);
 820         if (err)
 821                 goto err_cq;
 822
 823         return 0;
 824
 825 err_cq:
 826         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
 827
 828 err_srq:
 829         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
 830
 831 err_qp:
 832         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
 833
 834 err:
 835         return err;
 836 }
 837
 838 static int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap,
 839                          struct mlx4_init_hca_param *init_hca, u64 icm_size)
 840 {
 841         struct mlx4_priv *priv = mlx4_priv(dev);
 842         u64 aux_pages;
 843         int num_eqs;
 844         int err;
 845
 846         err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages);
 847         if (err) {
 848                 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n");
 849                 return err;
 850         }
 851
 852         mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n",
 853                  (unsigned long long) icm_size >> 10,
 854                  (unsigned long long) aux_pages << 2);
 855
 856         priv->fw.aux_icm = mlx4_alloc_icm(dev, aux_pages,
 857                                           GFP_HIGHUSER | __GFP_NOWARN, 0);
 858         if (!priv->fw.aux_icm) {
 859                 mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n");
 860                 return -ENOMEM;
 861         }
 862
 863         err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm);
 864         if (err) {
 865                 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n");
 866                 goto err_free_aux;
 867         }
 868
 869         err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz);
 870         if (err) {
 871                 mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n");
 872                 goto err_unmap_aux;
 873         }
 874
 875
 876         num_eqs = (mlx4_is_master(dev)) ?
 877                 roundup_pow_of_two(mlx4_master_get_num_eqs(dev)) :
 878                 dev->caps.num_eqs;
 879         err = mlx4_init_icm_table(dev, &priv->eq_table.table,
 880                                   init_hca->eqc_base, dev_cap->eqc_entry_sz,
 881                                   num_eqs, num_eqs, 0, 0);
 882         if (err) {
 883                 mlx4_err(dev, "Failed to map EQ context memory, aborting.\n");
 884                 goto err_unmap_cmpt;
 885         }
 886
 887         /*
 888          * Reserved MTT entries must be aligned up to a cacheline
 889          * boundary, since the FW will write to them, while the driver
 890          * writes to all other MTT entries. (The variable
 891          * dev->caps.mtt_entry_sz below is really the MTT segment
 892          * size, not the raw entry size)
 893          */
 894         dev->caps.reserved_mtts =
 895                 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz,
 896                       dma_get_cache_alignment()) / dev->caps.mtt_entry_sz;
 897
 898         err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table,
 899                                   init_hca->mtt_base,
 900                                   dev->caps.mtt_entry_sz,
 901                                   dev->caps.num_mtts,
 902                                   dev->caps.reserved_mtts, 1, 0);
 903         if (err) {
 904                 mlx4_err(dev, "Failed to map MTT context memory, aborting.\n");
 905                 goto err_unmap_eq;
 906         }
 907
 908         err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table,
 909                                   init_hca->dmpt_base,
 910                                   dev_cap->dmpt_entry_sz,
 911                                   dev->caps.num_mpts,
 912                                   dev->caps.reserved_mrws, 1, 1);
 913         if (err) {
 914                 mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n");
 915                 goto err_unmap_mtt;
 916         }
 917
 918         err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table,
 919                                   init_hca->qpc_base,
 920                                   dev_cap->qpc_entry_sz,
 921                                   dev->caps.num_qps,
 922                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 923                                   0, 0);
 924         if (err) {
 925                 mlx4_err(dev, "Failed to map QP context memory, aborting.\n");
 926                 goto err_unmap_dmpt;
 927         }
 928
 929         err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table,
 930                                   init_hca->auxc_base,
 931                                   dev_cap->aux_entry_sz,
 932                                   dev->caps.num_qps,
 933                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 934                                   0, 0);
 935         if (err) {
 936                 mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n");
 937                 goto err_unmap_qp;
 938         }
 939
 940         err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table,
 941                                   init_hca->altc_base,
 942                                   dev_cap->altc_entry_sz,
 943                                   dev->caps.num_qps,
 944                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 945                                   0, 0);
 946         if (err) {
 947                 mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n");
 948                 goto err_unmap_auxc;
 949         }
 950
 951         err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table,
 952                                   init_hca->rdmarc_base,
 953                                   dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift,
 954                                   dev->caps.num_qps,
 955                                   dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW],
 956                                   0, 0);
 957         if (err) {
 958                 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n");
 959                 goto err_unmap_altc;
 960         }
 961
 962         err = mlx4_init_icm_table(dev, &priv->cq_table.table,
 963                                   init_hca->cqc_base,
 964                                   dev_cap->cqc_entry_sz,
 965                                   dev->caps.num_cqs,
 966                                   dev->caps.reserved_cqs, 0, 0);
 967         if (err) {
 968                 mlx4_err(dev, "Failed to map CQ context memory, aborting.\n");
 969                 goto err_unmap_rdmarc;
 970         }
 971
 972         err = mlx4_init_icm_table(dev, &priv->srq_table.table,
 973                                   init_hca->srqc_base,
 974                                   dev_cap->srq_entry_sz,
 975                                   dev->caps.num_srqs,
 976                                   dev->caps.reserved_srqs, 0, 0);
 977         if (err) {
 978                 mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n");
 979                 goto err_unmap_cq;
 980         }
 981
 982         /*
 983          * It's not strictly required, but for simplicity just map the
 984          * whole multicast group table now.  The table isn't very big
 985          * and it's a lot easier than trying to track ref counts.
 986          */
 987         err = mlx4_init_icm_table(dev, &priv->mcg_table.table,
 988                                   init_hca->mc_base,
 989                                   mlx4_get_mgm_entry_size(dev),
 990                                   dev->caps.num_mgms + dev->caps.num_amgms,
 991                                   dev->caps.num_mgms + dev->caps.num_amgms,
 992                                   0, 0);
 993         if (err) {
 994                 mlx4_err(dev, "Failed to map MCG context memory, aborting.\n");
 995                 goto err_unmap_srq;
 996         }
 997
 998         return 0;
 999
1000 err_unmap_srq:
1001         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
1002
1003 err_unmap_cq:
1004         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
1005
1006 err_unmap_rdmarc:
1007         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
1008
1009 err_unmap_altc:
1010         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
1011
1012 err_unmap_auxc:
1013         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
1014
1015 err_unmap_qp:
1016         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
1017
1018 err_unmap_dmpt:
1019         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
1020
1021 err_unmap_mtt:
1022         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
1023
1024 err_unmap_eq:
1025         mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
1026
1027 err_unmap_cmpt:
1028         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
1029         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
1030         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
1031         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
1032
1033 err_unmap_aux:
1034         mlx4_UNMAP_ICM_AUX(dev);
1035
1036 err_free_aux:
1037         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
1038
1039         return err;
1040 }
1041
1042 static void mlx4_free_icms(struct mlx4_dev *dev)
1043 {
1044         struct mlx4_priv *priv = mlx4_priv(dev);
1045
1046         mlx4_cleanup_icm_table(dev, &priv->mcg_table.table);
1047         mlx4_cleanup_icm_table(dev, &priv->srq_table.table);
1048         mlx4_cleanup_icm_table(dev, &priv->cq_table.table);
1049         mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table);
1050         mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table);
1051         mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table);
1052         mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table);
1053         mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table);
1054         mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table);
1055         mlx4_cleanup_icm_table(dev, &priv->eq_table.table);
1056         mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table);
1057         mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table);
1058         mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table);
1059         mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table);
1060
1061         mlx4_UNMAP_ICM_AUX(dev);
1062         mlx4_free_icm(dev, priv->fw.aux_icm, 0);
1063 }
1064
1065 static void mlx4_slave_exit(struct mlx4_dev *dev)
1066 {
1067         struct mlx4_priv *priv = mlx4_priv(dev);
1068
1069         down(&priv->cmd.slave_sem);
1070         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, MLX4_COMM_TIME))
1071                 mlx4_warn(dev, "Failed to close slave function.\n");
1072         up(&priv->cmd.slave_sem);
1073 }
1074
1075 static int map_bf_area(struct mlx4_dev *dev)
1076 {
1077         struct mlx4_priv *priv = mlx4_priv(dev);
1078         resource_size_t bf_start;
1079         resource_size_t bf_len;
1080         int err = 0;
1081
1082         bf_start = pci_resource_start(dev->pdev, 2) +
1083                         (dev->caps.num_uars << PAGE_SHIFT);
1084         bf_len = pci_resource_len(dev->pdev, 2) -
1085                         (dev->caps.num_uars << PAGE_SHIFT);
1086         priv->bf_mapping = io_mapping_create_wc(bf_start, bf_len);
1087         if (!priv->bf_mapping)
1088                 err = -ENOMEM;
1089
1090         return err;
1091 }
1092
1093 static void unmap_bf_area(struct mlx4_dev *dev)
1094 {
1095         if (mlx4_priv(dev)->bf_mapping)
1096                 io_mapping_free(mlx4_priv(dev)->bf_mapping);
1097 }
1098
1099 static void mlx4_close_hca(struct mlx4_dev *dev)
1100 {
1101         unmap_bf_area(dev);
1102         if (mlx4_is_slave(dev))
1103                 mlx4_slave_exit(dev);
1104         else {
1105                 mlx4_CLOSE_HCA(dev, 0);
1106                 mlx4_free_icms(dev);
1107                 mlx4_UNMAP_FA(dev);
1108                 mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0);
1109         }
1110 }
1111
1112 static int mlx4_init_slave(struct mlx4_dev *dev)
1113 {
1114         struct mlx4_priv *priv = mlx4_priv(dev);
1115         u64 dma = (u64) priv->mfunc.vhcr_dma;
1116         int num_of_reset_retries = NUM_OF_RESET_RETRIES;
1117         int ret_from_reset = 0;
1118         u32 slave_read;
1119         u32 cmd_channel_ver;
1120
1121         down(&priv->cmd.slave_sem);
1122         priv->cmd.max_cmds = 1;
1123         mlx4_warn(dev, "Sending reset\n");
1124         ret_from_reset = mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0,
1125                                        MLX4_COMM_TIME);
1126         /* if we are in the middle of flr the slave will try
1127          * NUM_OF_RESET_RETRIES times before leaving.*/
1128         if (ret_from_reset) {
1129                 if (MLX4_DELAY_RESET_SLAVE == ret_from_reset) {
1130                         msleep(SLEEP_TIME_IN_RESET);
1131                         while (ret_from_reset && num_of_reset_retries) {
1132                                 mlx4_warn(dev, "slave is currently in the"
1133                                           "middle of FLR. retrying..."
1134                                           "(try num:%d)\n",
1135                                           (NUM_OF_RESET_RETRIES -
1136                                            num_of_reset_retries  + 1));
1137                                 ret_from_reset =
1138                                         mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET,
1139                                                       0, MLX4_COMM_TIME);
1140                                 num_of_reset_retries = num_of_reset_retries - 1;
1141                         }
1142                 } else
1143                         goto err;
1144         }
1145
1146         /* check the driver version - the slave I/F revision
1147          * must match the master's */
1148         slave_read = swab32(readl(&priv->mfunc.comm->slave_read));
1149         cmd_channel_ver = mlx4_comm_get_version();
1150
1151         if (MLX4_COMM_GET_IF_REV(cmd_channel_ver) !=
1152                 MLX4_COMM_GET_IF_REV(slave_read)) {
1153                 mlx4_err(dev, "slave driver version is not supported"
1154                          " by the master\n");
1155                 goto err;
1156         }
1157
1158         mlx4_warn(dev, "Sending vhcr0\n");
1159         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR0, dma >> 48,
1160                                                     MLX4_COMM_TIME))
1161                 goto err;
1162         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR1, dma >> 32,
1163                                                     MLX4_COMM_TIME))
1164                 goto err;
1165         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR2, dma >> 16,
1166                                                     MLX4_COMM_TIME))
1167                 goto err;
1168         if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR_EN, dma, MLX4_COMM_TIME))
1169                 goto err;
1170         up(&priv->cmd.slave_sem);
1171         return 0;
1172
1173 err:
1174         mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, 0);
1175         up(&priv->cmd.slave_sem);
1176         return -EIO;
1177 }
1178
1179 static int mlx4_init_hca(struct mlx4_dev *dev)
1180 {
1181         struct mlx4_priv          *priv = mlx4_priv(dev);
1182         struct mlx4_adapter        adapter;
1183         struct mlx4_dev_cap        dev_cap;
1184         struct mlx4_mod_stat_cfg   mlx4_cfg;
1185         struct mlx4_profile        profile;
1186         struct mlx4_init_hca_param init_hca;
1187         u64 icm_size;
1188         int err;
1189
1190         if (!mlx4_is_slave(dev)) {
1191                 err = mlx4_QUERY_FW(dev);
1192                 if (err) {
1193                         if (err == -EACCES)
1194                                 mlx4_info(dev, "non-primary physical function, skipping.\n");
1195                         else
1196                                 mlx4_err(dev, "QUERY_FW command failed, aborting.\n");
1197                         goto unmap_bf;
1198                 }
1199
1200                 err = mlx4_load_fw(dev);
1201                 if (err) {
1202                         mlx4_err(dev, "Failed to start FW, aborting.\n");
1203                         goto unmap_bf;
1204                 }
1205
1206                 mlx4_cfg.log_pg_sz_m = 1;
1207                 mlx4_cfg.log_pg_sz = 0;
1208                 err = mlx4_MOD_STAT_CFG(dev, &mlx4_cfg);
1209                 if (err)
1210                         mlx4_warn(dev, "Failed to override log_pg_sz parameter\n");
1211
1212                 err = mlx4_dev_cap(dev, &dev_cap);
1213                 if (err) {
1214                         mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n");
1215                         goto err_stop_fw;
1216                 }
1217
1218                 profile = default_profile;
1219
1220                 icm_size = mlx4_make_profile(dev, &profile, &dev_cap,
1221                                              &init_hca);
1222                 if ((long long) icm_size < 0) {
1223                         err = icm_size;
1224                         goto err_stop_fw;
1225                 }
1226
1227                 dev->caps.max_fmr_maps = (1 << (32 - ilog2(dev->caps.num_mpts))) - 1;
1228
1229                 init_hca.log_uar_sz = ilog2(dev->caps.num_uars);
1230                 init_hca.uar_page_sz = PAGE_SHIFT - 12;
1231
1232                 err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
1233                 if (err)
1234                         goto err_stop_fw;
1235
1236                 err = mlx4_INIT_HCA(dev, &init_hca);
1237                 if (err) {
1238                         mlx4_err(dev, "INIT_HCA command failed, aborting.\n");
1239                         goto err_free_icm;
1240                 }
1241         } else {
1242                 err = mlx4_init_slave(dev);
1243                 if (err) {
1244                         mlx4_err(dev, "Failed to initialize slave\n");
1245                         goto unmap_bf;
1246                 }
1247
1248                 err = mlx4_slave_cap(dev);
1249                 if (err) {
1250                         mlx4_err(dev, "Failed to obtain slave caps\n");
1251                         goto err_close;
1252                 }
1253         }
1254
1255         if (map_bf_area(dev))
1256                 mlx4_dbg(dev, "Failed to map blue flame area\n");
1257
1258         /*Only the master set the ports, all the rest got it from it.*/
1259         if (!mlx4_is_slave(dev))
1260                 mlx4_set_port_mask(dev);
1261
1262         err = mlx4_QUERY_ADAPTER(dev, &adapter);
1263         if (err) {
1264                 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n");
1265                 goto err_close;
1266         }
1267
1268         priv->eq_table.inta_pin = adapter.inta_pin;
1269         memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id);
1270
1271         return 0;
1272
1273 err_close:
1274         mlx4_close_hca(dev);
1275
1276 err_free_icm:
1277         if (!mlx4_is_slave(dev))
1278                 mlx4_free_icms(dev);
1279
1280 err_stop_fw:
1281         if (!mlx4_is_slave(dev)) {
1282                 mlx4_UNMAP_FA(dev);
1283                 mlx4_free_icm(dev, priv->fw.fw_icm, 0);
1284         }
1285 unmap_bf:
1286         unmap_bf_area(dev);
1287         return err;
1288 }
1289
1290 static int mlx4_init_counters_table(struct mlx4_dev *dev)
1291 {
1292         struct mlx4_priv *priv = mlx4_priv(dev);
1293         int nent;
1294
1295         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
1296                 return -ENOENT;
1297
1298         nent = dev->caps.max_counters;
1299         return mlx4_bitmap_init(&priv->counters_bitmap, nent, nent - 1, 0, 0);
1300 }
1301
1302 static void mlx4_cleanup_counters_table(struct mlx4_dev *dev)
1303 {
1304         mlx4_bitmap_cleanup(&mlx4_priv(dev)->counters_bitmap);
1305 }
1306
1307 int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx)
1308 {
1309         struct mlx4_priv *priv = mlx4_priv(dev);
1310
1311         if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS))
1312                 return -ENOENT;
1313
1314         *idx = mlx4_bitmap_alloc(&priv->counters_bitmap);
1315         if (*idx == -1)
1316                 return -ENOMEM;
1317
1318         return 0;
1319 }
1320 EXPORT_SYMBOL_GPL(mlx4_counter_alloc);
1321
1322 void mlx4_counter_free(struct mlx4_dev *dev, u32 idx)
1323 {
1324         mlx4_bitmap_free(&mlx4_priv(dev)->counters_bitmap, idx);
1325         return;
1326 }
1327 EXPORT_SYMBOL_GPL(mlx4_counter_free);
1328
1329 static int mlx4_setup_hca(struct mlx4_dev *dev)
1330 {
1331         struct mlx4_priv *priv = mlx4_priv(dev);
1332         int err;
1333         int port;
1334         __be32 ib_port_default_caps;
1335
1336         err = mlx4_init_uar_table(dev);
1337         if (err) {
1338                 mlx4_err(dev, "Failed to initialize "
1339                          "user access region table, aborting.\n");
1340                 return err;
1341         }
1342
1343         err = mlx4_uar_alloc(dev, &priv->driver_uar);
1344         if (err) {
1345                 mlx4_err(dev, "Failed to allocate driver access region, "
1346                          "aborting.\n");
1347                 goto err_uar_table_free;
1348         }
1349
1350         priv->kar = ioremap((phys_addr_t) priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
1351         if (!priv->kar) {
1352                 mlx4_err(dev, "Couldn't map kernel access region, "
1353                          "aborting.\n");
1354                 err = -ENOMEM;
1355                 goto err_uar_free;
1356         }
1357
1358         err = mlx4_init_pd_table(dev);
1359         if (err) {
1360                 mlx4_err(dev, "Failed to initialize "
1361                          "protection domain table, aborting.\n");
1362                 goto err_kar_unmap;
1363         }
1364
1365         err = mlx4_init_xrcd_table(dev);
1366         if (err) {
1367                 mlx4_err(dev, "Failed to initialize "
1368                          "reliable connection domain table, aborting.\n");
1369                 goto err_pd_table_free;
1370         }
1371
1372         err = mlx4_init_mr_table(dev);
1373         if (err) {
1374                 mlx4_err(dev, "Failed to initialize "
1375                          "memory region table, aborting.\n");
1376                 goto err_xrcd_table_free;
1377         }
1378
1379         err = mlx4_init_eq_table(dev);
1380         if (err) {
1381                 mlx4_err(dev, "Failed to initialize "
1382                          "event queue table, aborting.\n");
1383                 goto err_mr_table_free;
1384         }
1385
1386         err = mlx4_cmd_use_events(dev);
1387         if (err) {
1388                 mlx4_err(dev, "Failed to switch to event-driven "
1389                          "firmware commands, aborting.\n");
1390                 goto err_eq_table_free;
1391         }
1392
1393         err = mlx4_NOP(dev);
1394         if (err) {
1395                 if (dev->flags & MLX4_FLAG_MSI_X) {
1396                         mlx4_warn(dev, "NOP command failed to generate MSI-X "
1397                                   "interrupt IRQ %d).\n",
1398                                   priv->eq_table.eq[dev->caps.num_comp_vectors].irq);
1399                         mlx4_warn(dev, "Trying again without MSI-X.\n");
1400                 } else {
1401                         mlx4_err(dev, "NOP command failed to generate interrupt "
1402                                  "(IRQ %d), aborting.\n",
1403                                  priv->eq_table.eq[dev->caps.num_comp_vectors].irq);
1404                         mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n");
1405                 }
1406
1407                 goto err_cmd_poll;
1408         }
1409
1410         mlx4_dbg(dev, "NOP command IRQ test passed\n");
1411
1412         err = mlx4_init_cq_table(dev);
1413         if (err) {
1414                 mlx4_err(dev, "Failed to initialize "
1415                          "completion queue table, aborting.\n");
1416                 goto err_cmd_poll;
1417         }
1418
1419         err = mlx4_init_srq_table(dev);
1420         if (err) {
1421                 mlx4_err(dev, "Failed to initialize "
1422                          "shared receive queue table, aborting.\n");
1423                 goto err_cq_table_free;
1424         }
1425
1426         err = mlx4_init_qp_table(dev);
1427         if (err) {
1428                 mlx4_err(dev, "Failed to initialize "
1429                          "queue pair table, aborting.\n");
1430                 goto err_srq_table_free;
1431         }
1432
1433         if (!mlx4_is_slave(dev)) {
1434                 err = mlx4_init_mcg_table(dev);
1435                 if (err) {
1436                         mlx4_err(dev, "Failed to initialize "
1437                                  "multicast group table, aborting.\n");
1438                         goto err_qp_table_free;
1439                 }
1440         }
1441
1442         err = mlx4_init_counters_table(dev);
1443         if (err && err != -ENOENT) {
1444                 mlx4_err(dev, "Failed to initialize counters table, aborting.\n");
1445                 goto err_mcg_table_free;
1446         }
1447
1448         if (!mlx4_is_slave(dev)) {
1449                 for (port = 1; port <= dev->caps.num_ports; port++) {
1450                         ib_port_default_caps = 0;
1451                         err = mlx4_get_port_ib_caps(dev, port,
1452                                                     &ib_port_default_caps);
1453                         if (err)
1454                                 mlx4_warn(dev, "failed to get port %d default "
1455                                           "ib capabilities (%d). Continuing "
1456                                           "with caps = 0\n", port, err);
1457                         dev->caps.ib_port_def_cap[port] = ib_port_default_caps;
1458                         if (mlx4_is_mfunc(dev))
1459                                 dev->caps.port_ib_mtu[port] = IB_MTU_2048;
1460                         else
1461                                 dev->caps.port_ib_mtu[port] = IB_MTU_4096;
1462                         err = mlx4_check_ext_port_caps(dev, port);
1463                         if (err)
1464                                 mlx4_warn(dev, "failed to get port %d extended "
1465                                           "port capabilities support info (%d)."
1466                                           " Assuming not supported\n",
1467                                           port, err);
1468
1469                         err = mlx4_SET_PORT(dev, port);
1470                         if (err) {
1471                                 mlx4_err(dev, "Failed to set port %d, aborting\n",
1472                                         port);
1473                                 goto err_counters_table_free;
1474                         }
1475                 }
1476         }
1477
1478         return 0;
1479
1480 err_counters_table_free:
1481         mlx4_cleanup_counters_table(dev);
1482
1483 err_mcg_table_free:
1484         mlx4_cleanup_mcg_table(dev);
1485
1486 err_qp_table_free:
1487         mlx4_cleanup_qp_table(dev);
1488
1489 err_srq_table_free:
1490         mlx4_cleanup_srq_table(dev);
1491
1492 err_cq_table_free:
1493         mlx4_cleanup_cq_table(dev);
1494
1495 err_cmd_poll:
1496         mlx4_cmd_use_polling(dev);
1497
1498 err_eq_table_free:
1499         mlx4_cleanup_eq_table(dev);
1500
1501 err_mr_table_free:
1502         mlx4_cleanup_mr_table(dev);
1503
1504 err_xrcd_table_free:
1505         mlx4_cleanup_xrcd_table(dev);
1506
1507 err_pd_table_free:
1508         mlx4_cleanup_pd_table(dev);
1509
1510 err_kar_unmap:
1511         iounmap(priv->kar);
1512
1513 err_uar_free:
1514         mlx4_uar_free(dev, &priv->driver_uar);
1515
1516 err_uar_table_free:
1517         mlx4_cleanup_uar_table(dev);
1518         return err;
1519 }
1520
1521 static void mlx4_enable_msi_x(struct mlx4_dev *dev)
1522 {
1523         struct mlx4_priv *priv = mlx4_priv(dev);
1524         struct msix_entry *entries;
1525         int nreq = min_t(int, dev->caps.num_ports *
1526                          min_t(int, num_online_cpus() + 1, MAX_MSIX_P_PORT)
1527                                 + MSIX_LEGACY_SZ, MAX_MSIX);
1528         int err;
1529         int i;
1530
1531         if (msi_x) {
1532                 /* In multifunction mode each function gets 2 msi-X vectors
1533                  * one for data path completions anf the other for asynch events
1534                  * or command completions */
1535                 if (mlx4_is_mfunc(dev)) {
1536                         nreq = 2;
1537                 } else {
1538                         nreq = min_t(int, dev->caps.num_eqs -
1539                                      dev->caps.reserved_eqs, nreq);
1540                 }
1541
1542                 entries = kcalloc(nreq, sizeof *entries, GFP_KERNEL);
1543                 if (!entries)
1544                         goto no_msi;
1545
1546                 for (i = 0; i < nreq; ++i)
1547                         entries[i].entry = i;
1548
1549         retry:
1550                 err = pci_enable_msix(dev->pdev, entries, nreq);
1551                 if (err) {
1552                         /* Try again if at least 2 vectors are available */
1553                         if (err > 1) {
1554                                 mlx4_info(dev, "Requested %d vectors, "
1555                                           "but only %d MSI-X vectors available, "
1556                                           "trying again\n", nreq, err);
1557                                 nreq = err;
1558                                 goto retry;
1559                         }
1560                         kfree(entries);
1561                         goto no_msi;
1562                 }
1563
1564                 if (nreq <
1565                     MSIX_LEGACY_SZ + dev->caps.num_ports * MIN_MSIX_P_PORT) {
1566                         /*Working in legacy mode , all EQ's shared*/
1567                         dev->caps.comp_pool           = 0;
1568                         dev->caps.num_comp_vectors = nreq - 1;
1569                 } else {
1570                         dev->caps.comp_pool           = nreq - MSIX_LEGACY_SZ;
1571                         dev->caps.num_comp_vectors = MSIX_LEGACY_SZ - 1;
1572                 }
1573                 for (i = 0; i < nreq; ++i)
1574                         priv->eq_table.eq[i].irq = entries[i].vector;
1575
1576                 dev->flags |= MLX4_FLAG_MSI_X;
1577
1578                 kfree(entries);
1579                 return;
1580         }
1581
1582 no_msi:
1583         dev->caps.num_comp_vectors = 1;
1584         dev->caps.comp_pool        = 0;
1585
1586         for (i = 0; i < 2; ++i)
1587                 priv->eq_table.eq[i].irq = dev->pdev->irq;
1588 }
1589
1590 static int mlx4_init_port_info(struct mlx4_dev *dev, int port)
1591 {
1592         struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
1593         int err = 0;
1594
1595         info->dev = dev;
1596         info->port = port;
1597         if (!mlx4_is_slave(dev)) {
1598                 INIT_RADIX_TREE(&info->mac_tree, GFP_KERNEL);
1599                 mlx4_init_mac_table(dev, &info->mac_table);
1600                 mlx4_init_vlan_table(dev, &info->vlan_table);
1601                 info->base_qpn =
1602                         dev->caps.reserved_qps_base[MLX4_QP_REGION_ETH_ADDR] +
1603                         (port - 1) * (1 << log_num_mac);
1604         }
1605
1606         sprintf(info->dev_name, "mlx4_port%d", port);
1607         info->port_attr.attr.name = info->dev_name;
1608         if (mlx4_is_mfunc(dev))
1609                 info->port_attr.attr.mode = S_IRUGO;
1610         else {
1611                 info->port_attr.attr.mode = S_IRUGO | S_IWUSR;
1612                 info->port_attr.store     = set_port_type;
1613         }
1614         info->port_attr.show      = show_port_type;
1615         sysfs_attr_init(&info->port_attr.attr);
1616
1617         err = device_create_file(&dev->pdev->dev, &info->port_attr);
1618         if (err) {
1619                 mlx4_err(dev, "Failed to create file for port %d\n", port);
1620                 info->port = -1;
1621         }
1622
1623         sprintf(info->dev_mtu_name, "mlx4_port%d_mtu", port);
1624         info->port_mtu_attr.attr.name = info->dev_mtu_name;
1625         if (mlx4_is_mfunc(dev))
1626                 info->port_mtu_attr.attr.mode = S_IRUGO;
1627         else {
1628                 info->port_mtu_attr.attr.mode = S_IRUGO | S_IWUSR;
1629                 info->port_mtu_attr.store     = set_port_ib_mtu;
1630         }
1631         info->port_mtu_attr.show      = show_port_ib_mtu;
1632         sysfs_attr_init(&info->port_mtu_attr.attr);
1633
1634         err = device_create_file(&dev->pdev->dev, &info->port_mtu_attr);
1635         if (err) {
1636                 mlx4_err(dev, "Failed to create mtu file for port %d\n", port);
1637                 device_remove_file(&info->dev->pdev->dev, &info->port_attr);
1638                 info->port = -1;
1639         }
1640
1641         return err;
1642 }
1643
1644 static void mlx4_cleanup_port_info(struct mlx4_port_info *info)
1645 {
1646         if (info->port < 0)
1647                 return;
1648
1649         device_remove_file(&info->dev->pdev->dev, &info->port_attr);
1650         device_remove_file(&info->dev->pdev->dev, &info->port_mtu_attr);
1651 }
1652
1653 static int mlx4_init_steering(struct mlx4_dev *dev)
1654 {
1655         struct mlx4_priv *priv = mlx4_priv(dev);
1656         int num_entries = dev->caps.num_ports;
1657         int i, j;
1658
1659         priv->steer = kzalloc(sizeof(struct mlx4_steer) * num_entries, GFP_KERNEL);
1660         if (!priv->steer)
1661                 return -ENOMEM;
1662
1663         for (i = 0; i < num_entries; i++) {
1664                 for (j = 0; j < MLX4_NUM_STEERS; j++) {
1665                         INIT_LIST_HEAD(&priv->steer[i].promisc_qps[j]);
1666                         INIT_LIST_HEAD(&priv->steer[i].steer_entries[j]);
1667                 }
1668                 INIT_LIST_HEAD(&priv->steer[i].high_prios);
1669         }
1670         return 0;
1671 }
1672
1673 static void mlx4_clear_steering(struct mlx4_dev *dev)
1674 {
1675         struct mlx4_priv *priv = mlx4_priv(dev);
1676         struct mlx4_steer_index *entry, *tmp_entry;
1677         struct mlx4_promisc_qp *pqp, *tmp_pqp;
1678         int num_entries = dev->caps.num_ports;
1679         int i, j;
1680
1681         for (i = 0; i < num_entries; i++) {
1682                 for (j = 0; j < MLX4_NUM_STEERS; j++) {
1683                         list_for_each_entry_safe(pqp, tmp_pqp,
1684                                                  &priv->steer[i].promisc_qps[j],
1685                                                  list) {
1686                                 list_del(&pqp->list);
1687                                 kfree(pqp);
1688                         }
1689                         list_for_each_entry_safe(entry, tmp_entry,
1690                                                  &priv->steer[i].steer_entries[j],
1691                                                  list) {
1692                                 list_del(&entry->list);
1693                                 list_for_each_entry_safe(pqp, tmp_pqp,
1694                                                          &entry->duplicates,
1695                                                          list) {
1696                                         list_del(&pqp->list);
1697                                         kfree(pqp);
1698                                 }
1699                                 kfree(entry);
1700                         }
1701                 }
1702         }
1703         kfree(priv->steer);
1704 }
1705
1706 static int extended_func_num(struct pci_dev *pdev)
1707 {
1708         return PCI_SLOT(pdev->devfn) * 8 + PCI_FUNC(pdev->devfn);
1709 }
1710
1711 #define MLX4_OWNER_BASE 0x8069c
1712 #define MLX4_OWNER_SIZE 4
1713
1714 static int mlx4_get_ownership(struct mlx4_dev *dev)
1715 {
1716         void __iomem *owner;
1717         u32 ret;
1718
1719         owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE,
1720                         MLX4_OWNER_SIZE);
1721         if (!owner) {
1722                 mlx4_err(dev, "Failed to obtain ownership bit\n");
1723                 return -ENOMEM;
1724         }
1725
1726         ret = readl(owner);
1727         iounmap(owner);
1728         return (int) !!ret;
1729 }
1730
1731 static void mlx4_free_ownership(struct mlx4_dev *dev)
1732 {
1733         void __iomem *owner;
1734
1735         owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE,
1736                         MLX4_OWNER_SIZE);
1737         if (!owner) {
1738                 mlx4_err(dev, "Failed to obtain ownership bit\n");
1739                 return;
1740         }
1741         writel(0, owner);
1742         msleep(1000);
1743         iounmap(owner);
1744 }
1745
1746 static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
1747 {
1748         struct mlx4_priv *priv;
1749         struct mlx4_dev *dev;
1750         int err;
1751         int port;
1752
1753         pr_info(DRV_NAME ": Initializing %s\n", pci_name(pdev));
1754
1755         err = pci_enable_device(pdev);
1756         if (err) {
1757                 dev_err(&pdev->dev, "Cannot enable PCI device, "
1758                         "aborting.\n");
1759                 return err;
1760         }
1761         if (num_vfs > MLX4_MAX_NUM_VF) {
1762                 printk(KERN_ERR "There are more VF's (%d) than allowed(%d)\n",
1763                        num_vfs, MLX4_MAX_NUM_VF);
1764                 return -EINVAL;
1765         }
1766         /*
1767          * Check for BARs.
1768          */
1769         if (((id == NULL) || !(id->driver_data & MLX4_VF)) &&
1770             !(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
1771                 dev_err(&pdev->dev, "Missing DCS, aborting."
1772                         "(id == 0X%p, id->driver_data: 0x%lx,"
1773                         " pci_resource_flags(pdev, 0):0x%lx)\n", id,
1774                         id ? id->driver_data : 0, pci_resource_flags(pdev, 0));
1775                 err = -ENODEV;
1776                 goto err_disable_pdev;
1777         }
1778         if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
1779                 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
1780                 err = -ENODEV;
1781                 goto err_disable_pdev;
1782         }
1783
1784         err = pci_request_regions(pdev, DRV_NAME);
1785         if (err) {
1786                 dev_err(&pdev->dev, "Couldn't get PCI resources, aborting\n");
1787                 goto err_disable_pdev;
1788         }
1789
1790         pci_set_master(pdev);
1791
1792         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
1793         if (err) {
1794                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
1795                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1796                 if (err) {
1797                         dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
1798                         goto err_release_regions;
1799                 }
1800         }
1801         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
1802         if (err) {
1803                 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
1804                          "consistent PCI DMA mask.\n");
1805                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
1806                 if (err) {
1807                         dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
1808                                 "aborting.\n");
1809                         goto err_release_regions;
1810                 }
1811         }
1812
1813         /* Allow large DMA segments, up to the firmware limit of 1 GB */
1814         dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024);
1815
1816         priv = kzalloc(sizeof *priv, GFP_KERNEL);
1817         if (!priv) {
1818                 dev_err(&pdev->dev, "Device struct alloc failed, "
1819                         "aborting.\n");
1820                 err = -ENOMEM;
1821                 goto err_release_regions;
1822         }
1823
1824         dev       = &priv->dev;
1825         dev->pdev = pdev;
1826         INIT_LIST_HEAD(&priv->ctx_list);
1827         spin_lock_init(&priv->ctx_lock);
1828
1829         mutex_init(&priv->port_mutex);
1830
1831         INIT_LIST_HEAD(&priv->pgdir_list);
1832         mutex_init(&priv->pgdir_mutex);
1833
1834         INIT_LIST_HEAD(&priv->bf_list);
1835         mutex_init(&priv->bf_mutex);
1836
1837         dev->rev_id = pdev->revision;
1838         /* Detect if this device is a virtual function */
1839         if (id && id->driver_data & MLX4_VF) {
1840                 /* When acting as pf, we normally skip vfs unless explicitly
1841                  * requested to probe them. */
1842                 if (num_vfs && extended_func_num(pdev) > probe_vf) {
1843                         mlx4_warn(dev, "Skipping virtual function:%d\n",
1844                                                 extended_func_num(pdev));
1845                         err = -ENODEV;
1846                         goto err_free_dev;
1847                 }
1848                 mlx4_warn(dev, "Detected virtual function - running in slave mode\n");
1849                 dev->flags |= MLX4_FLAG_SLAVE;
1850         } else {
1851                 /* We reset the device and enable SRIOV only for physical
1852                  * devices.  Try to claim ownership on the device;
1853                  * if already taken, skip -- do not allow multiple PFs */
1854                 err = mlx4_get_ownership(dev);
1855                 if (err) {
1856                         if (err < 0)
1857                                 goto err_free_dev;
1858                         else {
1859                                 mlx4_warn(dev, "Multiple PFs not yet supported."
1860                                           " Skipping PF.\n");
1861                                 err = -EINVAL;
1862                                 goto err_free_dev;
1863                         }
1864                 }
1865
1866                 if (num_vfs) {
1867                         mlx4_warn(dev, "Enabling sriov with:%d vfs\n", num_vfs);
1868                         err = pci_enable_sriov(pdev, num_vfs);
1869                         if (err) {
1870                                 mlx4_err(dev, "Failed to enable sriov,"
1871                                          "continuing without sriov enabled"
1872                                          " (err = %d).\n", err);
1873                                 num_vfs = 0;
1874                                 err = 0;
1875                         } else {
1876                                 mlx4_warn(dev, "Running in master mode\n");
1877                                 dev->flags |= MLX4_FLAG_SRIOV |
1878                                               MLX4_FLAG_MASTER;
1879                                 dev->num_vfs = num_vfs;
1880                         }
1881                 }
1882
1883                 /*
1884                  * Now reset the HCA before we touch the PCI capabilities or
1885                  * attempt a firmware command, since a boot ROM may have left
1886                  * the HCA in an undefined state.
1887                  */
1888                 err = mlx4_reset(dev);
1889                 if (err) {
1890                         mlx4_err(dev, "Failed to reset HCA, aborting.\n");
1891                         goto err_rel_own;
1892                 }
1893         }
1894
1895 slave_start:
1896         if (mlx4_cmd_init(dev)) {
1897                 mlx4_err(dev, "Failed to init command interface, aborting.\n");
1898                 goto err_sriov;
1899         }
1900
1901         /* In slave functions, the communication channel must be initialized
1902          * before posting commands. Also, init num_slaves before calling
1903          * mlx4_init_hca */
1904         if (mlx4_is_mfunc(dev)) {
1905                 if (mlx4_is_master(dev))
1906                         dev->num_slaves = MLX4_MAX_NUM_SLAVES;
1907                 else {
1908                         dev->num_slaves = 0;
1909                         if (mlx4_multi_func_init(dev)) {
1910                                 mlx4_err(dev, "Failed to init slave mfunc"
1911                                          " interface, aborting.\n");
1912                                 goto err_cmd;
1913                         }
1914                 }
1915         }
1916
1917         err = mlx4_init_hca(dev);
1918         if (err) {
1919                 if (err == -EACCES) {
1920                         /* Not primary Physical function
1921                          * Running in slave mode */
1922                         mlx4_cmd_cleanup(dev);
1923                         dev->flags |= MLX4_FLAG_SLAVE;
1924                         dev->flags &= ~MLX4_FLAG_MASTER;
1925                         goto slave_start;
1926                 } else
1927                         goto err_mfunc;
1928         }
1929
1930         /* In master functions, the communication channel must be initialized
1931          * after obtaining its address from fw */
1932         if (mlx4_is_master(dev)) {
1933                 if (mlx4_multi_func_init(dev)) {
1934                         mlx4_err(dev, "Failed to init master mfunc"
1935                                  "interface, aborting.\n");
1936                         goto err_close;
1937                 }
1938         }
1939
1940         err = mlx4_alloc_eq_table(dev);
1941         if (err)
1942                 goto err_master_mfunc;
1943
1944         priv->msix_ctl.pool_bm = 0;
1945         spin_lock_init(&priv->msix_ctl.pool_lock);
1946
1947         mlx4_enable_msi_x(dev);
1948         if ((mlx4_is_mfunc(dev)) &&
1949             !(dev->flags & MLX4_FLAG_MSI_X)) {
1950                 mlx4_err(dev, "INTx is not supported in multi-function mode."
1951                          " aborting.\n");
1952                 goto err_free_eq;
1953         }
1954
1955         if (!mlx4_is_slave(dev)) {
1956                 err = mlx4_init_steering(dev);
1957                 if (err)
1958                         goto err_free_eq;
1959         }
1960
1961         err = mlx4_setup_hca(dev);
1962         if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X) &&
1963             !mlx4_is_mfunc(dev)) {
1964                 dev->flags &= ~MLX4_FLAG_MSI_X;
1965                 pci_disable_msix(pdev);
1966                 err = mlx4_setup_hca(dev);
1967         }
1968
1969         if (err)
1970                 goto err_steer;
1971
1972         for (port = 1; port <= dev->caps.num_ports; port++) {
1973                 err = mlx4_init_port_info(dev, port);
1974                 if (err)
1975                         goto err_port;
1976         }
1977
1978         err = mlx4_register_device(dev);
1979         if (err)
1980                 goto err_port;
1981
1982         mlx4_sense_init(dev);
1983         mlx4_start_sense(dev);
1984
1985         pci_set_drvdata(pdev, dev);
1986
1987         return 0;
1988
1989 err_port:
1990         for (--port; port >= 1; --port)
1991                 mlx4_cleanup_port_info(&priv->port[port]);
1992
1993         mlx4_cleanup_counters_table(dev);
1994         mlx4_cleanup_mcg_table(dev);
1995         mlx4_cleanup_qp_table(dev);
1996         mlx4_cleanup_srq_table(dev);
1997         mlx4_cleanup_cq_table(dev);
1998         mlx4_cmd_use_polling(dev);
1999         mlx4_cleanup_eq_table(dev);
2000         mlx4_cleanup_mr_table(dev);
2001         mlx4_cleanup_xrcd_table(dev);
2002         mlx4_cleanup_pd_table(dev);
2003         mlx4_cleanup_uar_table(dev);
2004
2005 err_steer:
2006         if (!mlx4_is_slave(dev))
2007                 mlx4_clear_steering(dev);
2008
2009 err_free_eq:
2010         mlx4_free_eq_table(dev);
2011
2012 err_master_mfunc:
2013         if (mlx4_is_master(dev))
2014                 mlx4_multi_func_cleanup(dev);
2015
2016 err_close:
2017         if (dev->flags & MLX4_FLAG_MSI_X)
2018                 pci_disable_msix(pdev);
2019
2020         mlx4_close_hca(dev);
2021
2022 err_mfunc:
2023         if (mlx4_is_slave(dev))
2024                 mlx4_multi_func_cleanup(dev);
2025
2026 err_cmd:
2027         mlx4_cmd_cleanup(dev);
2028
2029 err_sriov:
2030         if (num_vfs && (dev->flags & MLX4_FLAG_SRIOV))
2031                 pci_disable_sriov(pdev);
2032
2033 err_rel_own:
2034         if (!mlx4_is_slave(dev))
2035                 mlx4_free_ownership(dev);
2036
2037 err_free_dev:
2038         kfree(priv);
2039
2040 err_release_regions:
2041         pci_release_regions(pdev);
2042
2043 err_disable_pdev:
2044         pci_disable_device(pdev);
2045         pci_set_drvdata(pdev, NULL);
2046         return err;
2047 }
2048
2049 static int __devinit mlx4_init_one(struct pci_dev *pdev,
2050                                    const struct pci_device_id *id)
2051 {
2052         printk_once(KERN_INFO "%s", mlx4_version);
2053
2054         return __mlx4_init_one(pdev, id);
2055 }
2056
2057 static void mlx4_remove_one(struct pci_dev *pdev)
2058 {
2059         struct mlx4_dev  *dev  = pci_get_drvdata(pdev);
2060         struct mlx4_priv *priv = mlx4_priv(dev);
2061         int p;
2062
2063         if (dev) {
2064                 /* in SRIOV it is not allowed to unload the pf's
2065                  * driver while there are alive vf's */
2066                 if (mlx4_is_master(dev)) {
2067                         if (mlx4_how_many_lives_vf(dev))
2068                                 printk(KERN_ERR "Removing PF when there are assigned VF's !!!\n");
2069                 }
2070                 mlx4_stop_sense(dev);
2071                 mlx4_unregister_device(dev);
2072
2073                 for (p = 1; p <= dev->caps.num_ports; p++) {
2074                         mlx4_cleanup_port_info(&priv->port[p]);
2075                         mlx4_CLOSE_PORT(dev, p);
2076                 }
2077
2078                 mlx4_cleanup_counters_table(dev);
2079                 mlx4_cleanup_mcg_table(dev);
2080                 mlx4_cleanup_qp_table(dev);
2081                 mlx4_cleanup_srq_table(dev);
2082                 mlx4_cleanup_cq_table(dev);
2083                 mlx4_cmd_use_polling(dev);
2084                 mlx4_cleanup_eq_table(dev);
2085                 mlx4_cleanup_mr_table(dev);
2086                 mlx4_cleanup_xrcd_table(dev);
2087                 mlx4_cleanup_pd_table(dev);
2088
2089                 if (mlx4_is_master(dev))
2090                         mlx4_free_resource_tracker(dev);
2091
2092                 iounmap(priv->kar);
2093                 mlx4_uar_free(dev, &priv->driver_uar);
2094                 mlx4_cleanup_uar_table(dev);
2095                 if (!mlx4_is_slave(dev))
2096                         mlx4_clear_steering(dev);
2097                 mlx4_free_eq_table(dev);
2098                 if (mlx4_is_master(dev))
2099                         mlx4_multi_func_cleanup(dev);
2100                 mlx4_close_hca(dev);
2101                 if (mlx4_is_slave(dev))
2102                         mlx4_multi_func_cleanup(dev);
2103                 mlx4_cmd_cleanup(dev);
2104
2105                 if (dev->flags & MLX4_FLAG_MSI_X)
2106                         pci_disable_msix(pdev);
2107                 if (num_vfs && (dev->flags & MLX4_FLAG_SRIOV)) {
2108                         mlx4_warn(dev, "Disabling sriov\n");
2109                         pci_disable_sriov(pdev);
2110                 }
2111
2112                 if (!mlx4_is_slave(dev))
2113                         mlx4_free_ownership(dev);
2114                 kfree(priv);
2115                 pci_release_regions(pdev);
2116                 pci_disable_device(pdev);
2117                 pci_set_drvdata(pdev, NULL);
2118         }
2119 }
2120
2121 int mlx4_restart_one(struct pci_dev *pdev)
2122 {
2123         mlx4_remove_one(pdev);
2124         return __mlx4_init_one(pdev, NULL);
2125 }
2126
2127 static DEFINE_PCI_DEVICE_TABLE(mlx4_pci_table) = {
2128         /* MT25408 "Hermon" SDR */
2129         { PCI_VDEVICE(MELLANOX, 0x6340), 0 },
2130         /* MT25408 "Hermon" DDR */
2131         { PCI_VDEVICE(MELLANOX, 0x634a), 0 },
2132         /* MT25408 "Hermon" QDR */
2133         { PCI_VDEVICE(MELLANOX, 0x6354), 0 },
2134         /* MT25408 "Hermon" DDR PCIe gen2 */
2135         { PCI_VDEVICE(MELLANOX, 0x6732), 0 },
2136         /* MT25408 "Hermon" QDR PCIe gen2 */
2137         { PCI_VDEVICE(MELLANOX, 0x673c), 0 },
2138         /* MT25408 "Hermon" EN 10GigE */
2139         { PCI_VDEVICE(MELLANOX, 0x6368), 0 },
2140         /* MT25408 "Hermon" EN 10GigE PCIe gen2 */
2141         { PCI_VDEVICE(MELLANOX, 0x6750), 0 },
2142         /* MT25458 ConnectX EN 10GBASE-T 10GigE */
2143         { PCI_VDEVICE(MELLANOX, 0x6372), 0 },
2144         /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */
2145         { PCI_VDEVICE(MELLANOX, 0x675a), 0 },
2146         /* MT26468 ConnectX EN 10GigE PCIe gen2*/
2147         { PCI_VDEVICE(MELLANOX, 0x6764), 0 },
2148         /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */
2149         { PCI_VDEVICE(MELLANOX, 0x6746), 0 },
2150         /* MT26478 ConnectX2 40GigE PCIe gen2 */
2151         { PCI_VDEVICE(MELLANOX, 0x676e), 0 },
2152         /* MT25400 Family [ConnectX-2 Virtual Function] */
2153         { PCI_VDEVICE(MELLANOX, 0x1002), MLX4_VF },
2154         /* MT27500 Family [ConnectX-3] */
2155         { PCI_VDEVICE(MELLANOX, 0x1003), 0 },
2156         /* MT27500 Family [ConnectX-3 Virtual Function] */
2157         { PCI_VDEVICE(MELLANOX, 0x1004), MLX4_VF },
2158         { PCI_VDEVICE(MELLANOX, 0x1005), 0 }, /* MT27510 Family */
2159         { PCI_VDEVICE(MELLANOX, 0x1006), 0 }, /* MT27511 Family */
2160         { PCI_VDEVICE(MELLANOX, 0x1007), 0 }, /* MT27520 Family */
2161         { PCI_VDEVICE(MELLANOX, 0x1008), 0 }, /* MT27521 Family */
2162         { PCI_VDEVICE(MELLANOX, 0x1009), 0 }, /* MT27530 Family */
2163         { PCI_VDEVICE(MELLANOX, 0x100a), 0 }, /* MT27531 Family */
2164         { PCI_VDEVICE(MELLANOX, 0x100b), 0 }, /* MT27540 Family */
2165         { PCI_VDEVICE(MELLANOX, 0x100c), 0 }, /* MT27541 Family */
2166         { PCI_VDEVICE(MELLANOX, 0x100d), 0 }, /* MT27550 Family */
2167         { PCI_VDEVICE(MELLANOX, 0x100e), 0 }, /* MT27551 Family */
2168         { PCI_VDEVICE(MELLANOX, 0x100f), 0 }, /* MT27560 Family */
2169         { PCI_VDEVICE(MELLANOX, 0x1010), 0 }, /* MT27561 Family */
2170         { 0, }
2171 };
2172
2173 MODULE_DEVICE_TABLE(pci, mlx4_pci_table);
2174
2175 static struct pci_driver mlx4_driver = {
2176         .name           = DRV_NAME,
2177         .id_table       = mlx4_pci_table,
2178         .probe          = mlx4_init_one,
2179         .remove         = __devexit_p(mlx4_remove_one)
2180 };
2181
2182 static int __init mlx4_verify_params(void)
2183 {
2184         if ((log_num_mac < 0) || (log_num_mac > 7)) {
2185                 pr_warning("mlx4_core: bad num_mac: %d\n", log_num_mac);
2186                 return -1;
2187         }
2188
2189         if (log_num_vlan != 0)
2190                 pr_warning("mlx4_core: log_num_vlan - obsolete module param, using %d\n",
2191                            MLX4_LOG_NUM_VLANS);
2192
2193         if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 7)) {
2194                 pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg);
2195                 return -1;
2196         }
2197
2198         /* Check if module param for ports type has legal combination */
2199         if (port_type_array[0] == false && port_type_array[1] == true) {
2200                 printk(KERN_WARNING "Module parameter configuration ETH/IB is not supported. Switching to default configuration IB/IB\n");
2201                 port_type_array[0] = true;
2202         }
2203
2204         return 0;
2205 }
2206
2207 static int __init mlx4_init(void)
2208 {
2209         int ret;
2210
2211         if (mlx4_verify_params())
2212                 return -EINVAL;
2213
2214         mlx4_catas_init();
2215
2216         mlx4_wq = create_singlethread_workqueue("mlx4");
2217         if (!mlx4_wq)
2218                 return -ENOMEM;
2219
2220         ret = pci_register_driver(&mlx4_driver);
2221         return ret < 0 ? ret : 0;
2222 }
2223
2224 static void __exit mlx4_cleanup(void)
2225 {
2226         pci_unregister_driver(&mlx4_driver);
2227         destroy_workqueue(mlx4_wq);
2228 }
2229
2230 module_init(mlx4_init);
2231 module_exit(mlx4_cleanup);