drivers/net/ethernet/mellanox/mlxsw/core.c

   1 /*
   2  * drivers/net/ethernet/mellanox/mlxsw/core.c
   3  * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
   4  * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
   5  * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
   6  * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions are met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  * 3. Neither the names of the copyright holders nor the names of its
  17  *    contributors may be used to endorse or promote products derived from
  18  *    this software without specific prior written permission.
  19  *
  20  * Alternatively, this software may be distributed under the terms of the
  21  * GNU General Public License ("GPL") version 2 as published by the Free
  22  * Software Foundation.
  23  *
  24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  27  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  28  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  32  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  34  * POSSIBILITY OF SUCH DAMAGE.
  35  */
  36
  37 #include <linux/kernel.h>
  38 #include <linux/module.h>
  39 #include <linux/device.h>
  40 #include <linux/export.h>
  41 #include <linux/err.h>
  42 #include <linux/if_link.h>
  43 #include <linux/debugfs.h>
  44 #include <linux/seq_file.h>
  45 #include <linux/u64_stats_sync.h>
  46 #include <linux/netdevice.h>
  47 #include <linux/completion.h>
  48 #include <linux/skbuff.h>
  49 #include <linux/etherdevice.h>
  50 #include <linux/types.h>
  51 #include <linux/string.h>
  52 #include <linux/gfp.h>
  53 #include <linux/random.h>
  54 #include <linux/jiffies.h>
  55 #include <linux/mutex.h>
  56 #include <linux/rcupdate.h>
  57 #include <linux/slab.h>
  58 #include <linux/workqueue.h>
  59 #include <asm/byteorder.h>
  60 #include <net/devlink.h>
  61 #include <trace/events/devlink.h>
  62
  63 #include "core.h"
  64 #include "item.h"
  65 #include "cmd.h"
  66 #include "port.h"
  67 #include "trap.h"
  68 #include "emad.h"
  69 #include "reg.h"
  70
  71 static LIST_HEAD(mlxsw_core_driver_list);
  72 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock);
  73
  74 static const char mlxsw_core_driver_name[] = "mlxsw_core";
  75
  76 static struct dentry *mlxsw_core_dbg_root;
  77
  78 static struct workqueue_struct *mlxsw_wq;
  79
  80 struct mlxsw_core_pcpu_stats {
  81         u64                     trap_rx_packets[MLXSW_TRAP_ID_MAX];
  82         u64                     trap_rx_bytes[MLXSW_TRAP_ID_MAX];
  83         u64                     port_rx_packets[MLXSW_PORT_MAX_PORTS];
  84         u64                     port_rx_bytes[MLXSW_PORT_MAX_PORTS];
  85         struct u64_stats_sync   syncp;
  86         u32                     trap_rx_dropped[MLXSW_TRAP_ID_MAX];
  87         u32                     port_rx_dropped[MLXSW_PORT_MAX_PORTS];
  88         u32                     trap_rx_invalid;
  89         u32                     port_rx_invalid;
  90 };
  91
  92 struct mlxsw_core {
  93         struct mlxsw_driver *driver;
  94         const struct mlxsw_bus *bus;
  95         void *bus_priv;
  96         const struct mlxsw_bus_info *bus_info;
  97         struct list_head rx_listener_list;
  98         struct list_head event_listener_list;
  99         struct {
 100                 atomic64_t tid;
 101                 struct list_head trans_list;
 102                 spinlock_t trans_list_lock; /* protects trans_list writes */
 103                 bool use_emad;
 104         } emad;
 105         struct mlxsw_core_pcpu_stats __percpu *pcpu_stats;
 106         struct dentry *dbg_dir;
 107         struct {
 108                 struct debugfs_blob_wrapper vsd_blob;
 109                 struct debugfs_blob_wrapper psid_blob;
 110         } dbg;
 111         struct {
 112                 u8 *mapping; /* lag_id+port_index to local_port mapping */
 113         } lag;
 114         struct mlxsw_hwmon *hwmon;
 115         unsigned long driver_priv[0];
 116         /* driver_priv has to be always the last item */
 117 };
 118
 119 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core)
 120 {
 121         return mlxsw_core->driver_priv;
 122 }
 123 EXPORT_SYMBOL(mlxsw_core_driver_priv);
 124
 125 struct mlxsw_rx_listener_item {
 126         struct list_head list;
 127         struct mlxsw_rx_listener rxl;
 128         void *priv;
 129 };
 130
 131 struct mlxsw_event_listener_item {
 132         struct list_head list;
 133         struct mlxsw_event_listener el;
 134         void *priv;
 135 };
 136
 137 /******************
 138  * EMAD processing
 139  ******************/
 140
 141 /* emad_eth_hdr_dmac
 142  * Destination MAC in EMAD's Ethernet header.
 143  * Must be set to 01:02:c9:00:00:01
 144  */
 145 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6);
 146
 147 /* emad_eth_hdr_smac
 148  * Source MAC in EMAD's Ethernet header.
 149  * Must be set to 00:02:c9:01:02:03
 150  */
 151 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6);
 152
 153 /* emad_eth_hdr_ethertype
 154  * Ethertype in EMAD's Ethernet header.
 155  * Must be set to 0x8932
 156  */
 157 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16);
 158
 159 /* emad_eth_hdr_mlx_proto
 160  * Mellanox protocol.
 161  * Must be set to 0x0.
 162  */
 163 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8);
 164
 165 /* emad_eth_hdr_ver
 166  * Mellanox protocol version.
 167  * Must be set to 0x0.
 168  */
 169 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4);
 170
 171 /* emad_op_tlv_type
 172  * Type of the TLV.
 173  * Must be set to 0x1 (operation TLV).
 174  */
 175 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5);
 176
 177 /* emad_op_tlv_len
 178  * Length of the operation TLV in u32.
 179  * Must be set to 0x4.
 180  */
 181 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11);
 182
 183 /* emad_op_tlv_dr
 184  * Direct route bit. Setting to 1 indicates the EMAD is a direct route
 185  * EMAD. DR TLV must follow.
 186  *
 187  * Note: Currently not supported and must not be set.
 188  */
 189 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1);
 190
 191 /* emad_op_tlv_status
 192  * Returned status in case of EMAD response. Must be set to 0 in case
 193  * of EMAD request.
 194  * 0x0 - success
 195  * 0x1 - device is busy. Requester should retry
 196  * 0x2 - Mellanox protocol version not supported
 197  * 0x3 - unknown TLV
 198  * 0x4 - register not supported
 199  * 0x5 - operation class not supported
 200  * 0x6 - EMAD method not supported
 201  * 0x7 - bad parameter (e.g. port out of range)
 202  * 0x8 - resource not available
 203  * 0x9 - message receipt acknowledgment. Requester should retry
 204  * 0x70 - internal error
 205  */
 206 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7);
 207
 208 /* emad_op_tlv_register_id
 209  * Register ID of register within register TLV.
 210  */
 211 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16);
 212
 213 /* emad_op_tlv_r
 214  * Response bit. Setting to 1 indicates Response, otherwise request.
 215  */
 216 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1);
 217
 218 /* emad_op_tlv_method
 219  * EMAD method type.
 220  * 0x1 - query
 221  * 0x2 - write
 222  * 0x3 - send (currently not supported)
 223  * 0x4 - event
 224  */
 225 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7);
 226
 227 /* emad_op_tlv_class
 228  * EMAD operation class. Must be set to 0x1 (REG_ACCESS).
 229  */
 230 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8);
 231
 232 /* emad_op_tlv_tid
 233  * EMAD transaction ID. Used for pairing request and response EMADs.
 234  */
 235 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64);
 236
 237 /* emad_reg_tlv_type
 238  * Type of the TLV.
 239  * Must be set to 0x3 (register TLV).
 240  */
 241 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5);
 242
 243 /* emad_reg_tlv_len
 244  * Length of the operation TLV in u32.
 245  */
 246 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11);
 247
 248 /* emad_end_tlv_type
 249  * Type of the TLV.
 250  * Must be set to 0x0 (end TLV).
 251  */
 252 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5);
 253
 254 /* emad_end_tlv_len
 255  * Length of the end TLV in u32.
 256  * Must be set to 1.
 257  */
 258 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11);
 259
 260 enum mlxsw_core_reg_access_type {
 261         MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
 262         MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
 263 };
 264
 265 static inline const char *
 266 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type)
 267 {
 268         switch (type) {
 269         case MLXSW_CORE_REG_ACCESS_TYPE_QUERY:
 270                 return "query";
 271         case MLXSW_CORE_REG_ACCESS_TYPE_WRITE:
 272                 return "write";
 273         }
 274         BUG();
 275 }
 276
 277 static void mlxsw_emad_pack_end_tlv(char *end_tlv)
 278 {
 279         mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END);
 280         mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN);
 281 }
 282
 283 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv,
 284                                     const struct mlxsw_reg_info *reg,
 285                                     char *payload)
 286 {
 287         mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG);
 288         mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1);
 289         memcpy(reg_tlv + sizeof(u32), payload, reg->len);
 290 }
 291
 292 static void mlxsw_emad_pack_op_tlv(char *op_tlv,
 293                                    const struct mlxsw_reg_info *reg,
 294                                    enum mlxsw_core_reg_access_type type,
 295                                    u64 tid)
 296 {
 297         mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP);
 298         mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN);
 299         mlxsw_emad_op_tlv_dr_set(op_tlv, 0);
 300         mlxsw_emad_op_tlv_status_set(op_tlv, 0);
 301         mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id);
 302         mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST);
 303         if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY)
 304                 mlxsw_emad_op_tlv_method_set(op_tlv,
 305                                              MLXSW_EMAD_OP_TLV_METHOD_QUERY);
 306         else
 307                 mlxsw_emad_op_tlv_method_set(op_tlv,
 308                                              MLXSW_EMAD_OP_TLV_METHOD_WRITE);
 309         mlxsw_emad_op_tlv_class_set(op_tlv,
 310                                     MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS);
 311         mlxsw_emad_op_tlv_tid_set(op_tlv, tid);
 312 }
 313
 314 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb)
 315 {
 316         char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN);
 317
 318         mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC);
 319         mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC);
 320         mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE);
 321         mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO);
 322         mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION);
 323
 324         skb_reset_mac_header(skb);
 325
 326         return 0;
 327 }
 328
 329 static void mlxsw_emad_construct(struct sk_buff *skb,
 330                                  const struct mlxsw_reg_info *reg,
 331                                  char *payload,
 332                                  enum mlxsw_core_reg_access_type type,
 333                                  u64 tid)
 334 {
 335         char *buf;
 336
 337         buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32));
 338         mlxsw_emad_pack_end_tlv(buf);
 339
 340         buf = skb_push(skb, reg->len + sizeof(u32));
 341         mlxsw_emad_pack_reg_tlv(buf, reg, payload);
 342
 343         buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32));
 344         mlxsw_emad_pack_op_tlv(buf, reg, type, tid);
 345
 346         mlxsw_emad_construct_eth_hdr(skb);
 347 }
 348
 349 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb)
 350 {
 351         return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN));
 352 }
 353
 354 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb)
 355 {
 356         return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN +
 357                                       MLXSW_EMAD_OP_TLV_LEN * sizeof(u32)));
 358 }
 359
 360 static char *mlxsw_emad_reg_payload(const char *op_tlv)
 361 {
 362         return ((char *) (op_tlv + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32)));
 363 }
 364
 365 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb)
 366 {
 367         char *op_tlv;
 368
 369         op_tlv = mlxsw_emad_op_tlv(skb);
 370         return mlxsw_emad_op_tlv_tid_get(op_tlv);
 371 }
 372
 373 static bool mlxsw_emad_is_resp(const struct sk_buff *skb)
 374 {
 375         char *op_tlv;
 376
 377         op_tlv = mlxsw_emad_op_tlv(skb);
 378         return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE);
 379 }
 380
 381 static int mlxsw_emad_process_status(char *op_tlv,
 382                                      enum mlxsw_emad_op_tlv_status *p_status)
 383 {
 384         *p_status = mlxsw_emad_op_tlv_status_get(op_tlv);
 385
 386         switch (*p_status) {
 387         case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS:
 388                 return 0;
 389         case MLXSW_EMAD_OP_TLV_STATUS_BUSY:
 390         case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK:
 391                 return -EAGAIN;
 392         case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED:
 393         case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV:
 394         case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED:
 395         case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED:
 396         case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED:
 397         case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER:
 398         case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE:
 399         case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR:
 400         default:
 401                 return -EIO;
 402         }
 403 }
 404
 405 static int
 406 mlxsw_emad_process_status_skb(struct sk_buff *skb,
 407                               enum mlxsw_emad_op_tlv_status *p_status)
 408 {
 409         return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status);
 410 }
 411
 412 struct mlxsw_reg_trans {
 413         struct list_head list;
 414         struct list_head bulk_list;
 415         struct mlxsw_core *core;
 416         struct sk_buff *tx_skb;
 417         struct mlxsw_tx_info tx_info;
 418         struct delayed_work timeout_dw;
 419         unsigned int retries;
 420         u64 tid;
 421         struct completion completion;
 422         atomic_t active;
 423         mlxsw_reg_trans_cb_t *cb;
 424         unsigned long cb_priv;
 425         const struct mlxsw_reg_info *reg;
 426         enum mlxsw_core_reg_access_type type;
 427         int err;
 428         enum mlxsw_emad_op_tlv_status emad_status;
 429         struct rcu_head rcu;
 430 };
 431
 432 #define MLXSW_EMAD_TIMEOUT_MS 200
 433
 434 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans)
 435 {
 436         unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS);
 437
 438         mlxsw_core_schedule_dw(&trans->timeout_dw, timeout);
 439 }
 440
 441 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,
 442                                struct mlxsw_reg_trans *trans)
 443 {
 444         struct sk_buff *skb;
 445         int err;
 446
 447         skb = skb_copy(trans->tx_skb, GFP_KERNEL);
 448         if (!skb)
 449                 return -ENOMEM;
 450
 451         trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0,
 452                             skb->data + mlxsw_core->driver->txhdr_len,
 453                             skb->len - mlxsw_core->driver->txhdr_len);
 454
 455         atomic_set(&trans->active, 1);
 456         err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info);
 457         if (err) {
 458                 dev_kfree_skb(skb);
 459                 return err;
 460         }
 461         mlxsw_emad_trans_timeout_schedule(trans);
 462         return 0;
 463 }
 464
 465 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err)
 466 {
 467         struct mlxsw_core *mlxsw_core = trans->core;
 468
 469         dev_kfree_skb(trans->tx_skb);
 470         spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
 471         list_del_rcu(&trans->list);
 472         spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
 473         trans->err = err;
 474         complete(&trans->completion);
 475 }
 476
 477 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core,
 478                                       struct mlxsw_reg_trans *trans)
 479 {
 480         int err;
 481
 482         if (trans->retries < MLXSW_EMAD_MAX_RETRY) {
 483                 trans->retries++;
 484                 err = mlxsw_emad_transmit(trans->core, trans);
 485                 if (err == 0)
 486                         return;
 487         } else {
 488                 err = -EIO;
 489         }
 490         mlxsw_emad_trans_finish(trans, err);
 491 }
 492
 493 static void mlxsw_emad_trans_timeout_work(struct work_struct *work)
 494 {
 495         struct mlxsw_reg_trans *trans = container_of(work,
 496                                                      struct mlxsw_reg_trans,
 497                                                      timeout_dw.work);
 498
 499         if (!atomic_dec_and_test(&trans->active))
 500                 return;
 501
 502         mlxsw_emad_transmit_retry(trans->core, trans);
 503 }
 504
 505 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core,
 506                                         struct mlxsw_reg_trans *trans,
 507                                         struct sk_buff *skb)
 508 {
 509         int err;
 510
 511         if (!atomic_dec_and_test(&trans->active))
 512                 return;
 513
 514         err = mlxsw_emad_process_status_skb(skb, &trans->emad_status);
 515         if (err == -EAGAIN) {
 516                 mlxsw_emad_transmit_retry(mlxsw_core, trans);
 517         } else {
 518                 if (err == 0) {
 519                         char *op_tlv = mlxsw_emad_op_tlv(skb);
 520
 521                         if (trans->cb)
 522                                 trans->cb(mlxsw_core,
 523                                           mlxsw_emad_reg_payload(op_tlv),
 524                                           trans->reg->len, trans->cb_priv);
 525                 }
 526                 mlxsw_emad_trans_finish(trans, err);
 527         }
 528 }
 529
 530 /* called with rcu read lock held */
 531 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port,
 532                                         void *priv)
 533 {
 534         struct mlxsw_core *mlxsw_core = priv;
 535         struct mlxsw_reg_trans *trans;
 536
 537         trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0,
 538                             skb->data, skb->len);
 539
 540         if (!mlxsw_emad_is_resp(skb))
 541                 goto free_skb;
 542
 543         list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) {
 544                 if (mlxsw_emad_get_tid(skb) == trans->tid) {
 545                         mlxsw_emad_process_response(mlxsw_core, trans, skb);
 546                         break;
 547                 }
 548         }
 549
 550 free_skb:
 551         dev_kfree_skb(skb);
 552 }
 553
 554 static const struct mlxsw_rx_listener mlxsw_emad_rx_listener = {
 555         .func = mlxsw_emad_rx_listener_func,
 556         .local_port = MLXSW_PORT_DONT_CARE,
 557         .trap_id = MLXSW_TRAP_ID_ETHEMAD,
 558 };
 559
 560 static int mlxsw_emad_traps_set(struct mlxsw_core *mlxsw_core)
 561 {
 562         char htgt_pl[MLXSW_REG_HTGT_LEN];
 563         char hpkt_pl[MLXSW_REG_HPKT_LEN];
 564         int err;
 565
 566         mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD);
 567         err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
 568         if (err)
 569                 return err;
 570
 571         mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,
 572                             MLXSW_TRAP_ID_ETHEMAD);
 573         return mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
 574 }
 575
 576 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core)
 577 {
 578         u64 tid;
 579         int err;
 580
 581         /* Set the upper 32 bits of the transaction ID field to a random
 582          * number. This allows us to discard EMADs addressed to other
 583          * devices.
 584          */
 585         get_random_bytes(&tid, 4);
 586         tid <<= 32;
 587         atomic64_set(&mlxsw_core->emad.tid, tid);
 588
 589         INIT_LIST_HEAD(&mlxsw_core->emad.trans_list);
 590         spin_lock_init(&mlxsw_core->emad.trans_list_lock);
 591
 592         err = mlxsw_core_rx_listener_register(mlxsw_core,
 593                                               &mlxsw_emad_rx_listener,
 594                                               mlxsw_core);
 595         if (err)
 596                 return err;
 597
 598         err = mlxsw_emad_traps_set(mlxsw_core);
 599         if (err)
 600                 goto err_emad_trap_set;
 601
 602         mlxsw_core->emad.use_emad = true;
 603
 604         return 0;
 605
 606 err_emad_trap_set:
 607         mlxsw_core_rx_listener_unregister(mlxsw_core,
 608                                           &mlxsw_emad_rx_listener,
 609                                           mlxsw_core);
 610         return err;
 611 }
 612
 613 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core)
 614 {
 615         char hpkt_pl[MLXSW_REG_HPKT_LEN];
 616
 617         mlxsw_core->emad.use_emad = false;
 618         mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
 619                             MLXSW_TRAP_ID_ETHEMAD);
 620         mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
 621
 622         mlxsw_core_rx_listener_unregister(mlxsw_core,
 623                                           &mlxsw_emad_rx_listener,
 624                                           mlxsw_core);
 625 }
 626
 627 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core,
 628                                         u16 reg_len)
 629 {
 630         struct sk_buff *skb;
 631         u16 emad_len;
 632
 633         emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN +
 634                     (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) *
 635                     sizeof(u32) + mlxsw_core->driver->txhdr_len);
 636         if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN)
 637                 return NULL;
 638
 639         skb = netdev_alloc_skb(NULL, emad_len);
 640         if (!skb)
 641                 return NULL;
 642         memset(skb->data, 0, emad_len);
 643         skb_reserve(skb, emad_len);
 644
 645         return skb;
 646 }
 647
 648 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core,
 649                                  const struct mlxsw_reg_info *reg,
 650                                  char *payload,
 651                                  enum mlxsw_core_reg_access_type type,
 652                                  struct mlxsw_reg_trans *trans,
 653                                  struct list_head *bulk_list,
 654                                  mlxsw_reg_trans_cb_t *cb,
 655                                  unsigned long cb_priv, u64 tid)
 656 {
 657         struct sk_buff *skb;
 658         int err;
 659
 660         dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n",
 661                 trans->tid, reg->id, mlxsw_reg_id_str(reg->id),
 662                 mlxsw_core_reg_access_type_str(type));
 663
 664         skb = mlxsw_emad_alloc(mlxsw_core, reg->len);
 665         if (!skb)
 666                 return -ENOMEM;
 667
 668         list_add_tail(&trans->bulk_list, bulk_list);
 669         trans->core = mlxsw_core;
 670         trans->tx_skb = skb;
 671         trans->tx_info.local_port = MLXSW_PORT_CPU_PORT;
 672         trans->tx_info.is_emad = true;
 673         INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work);
 674         trans->tid = tid;
 675         init_completion(&trans->completion);
 676         trans->cb = cb;
 677         trans->cb_priv = cb_priv;
 678         trans->reg = reg;
 679         trans->type = type;
 680
 681         mlxsw_emad_construct(skb, reg, payload, type, trans->tid);
 682         mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info);
 683
 684         spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
 685         list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list);
 686         spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
 687         err = mlxsw_emad_transmit(mlxsw_core, trans);
 688         if (err)
 689                 goto err_out;
 690         return 0;
 691
 692 err_out:
 693         spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
 694         list_del_rcu(&trans->list);
 695         spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
 696         list_del(&trans->bulk_list);
 697         dev_kfree_skb(trans->tx_skb);
 698         return err;
 699 }
 700
 701 /*****************
 702  * Core functions
 703  *****************/
 704
 705 static int mlxsw_core_rx_stats_dbg_read(struct seq_file *file, void *data)
 706 {
 707         struct mlxsw_core *mlxsw_core = file->private;
 708         struct mlxsw_core_pcpu_stats *p;
 709         u64 rx_packets, rx_bytes;
 710         u64 tmp_rx_packets, tmp_rx_bytes;
 711         u32 rx_dropped, rx_invalid;
 712         unsigned int start;
 713         int i;
 714         int j;
 715         static const char hdr[] =
 716                 "     NUM   RX_PACKETS     RX_BYTES RX_DROPPED\n";
 717
 718         seq_printf(file, hdr);
 719         for (i = 0; i < MLXSW_TRAP_ID_MAX; i++) {
 720                 rx_packets = 0;
 721                 rx_bytes = 0;
 722                 rx_dropped = 0;
 723                 for_each_possible_cpu(j) {
 724                         p = per_cpu_ptr(mlxsw_core->pcpu_stats, j);
 725                         do {
 726                                 start = u64_stats_fetch_begin(&p->syncp);
 727                                 tmp_rx_packets = p->trap_rx_packets[i];
 728                                 tmp_rx_bytes = p->trap_rx_bytes[i];
 729                         } while (u64_stats_fetch_retry(&p->syncp, start));
 730
 731                         rx_packets += tmp_rx_packets;
 732                         rx_bytes += tmp_rx_bytes;
 733                         rx_dropped += p->trap_rx_dropped[i];
 734                 }
 735                 seq_printf(file, "trap %3d %12llu %12llu %10u\n",
 736                            i, rx_packets, rx_bytes, rx_dropped);
 737         }
 738         rx_invalid = 0;
 739         for_each_possible_cpu(j) {
 740                 p = per_cpu_ptr(mlxsw_core->pcpu_stats, j);
 741                 rx_invalid += p->trap_rx_invalid;
 742         }
 743         seq_printf(file, "trap INV                           %10u\n",
 744                    rx_invalid);
 745
 746         for (i = 0; i < MLXSW_PORT_MAX_PORTS; i++) {
 747                 rx_packets = 0;
 748                 rx_bytes = 0;
 749                 rx_dropped = 0;
 750                 for_each_possible_cpu(j) {
 751                         p = per_cpu_ptr(mlxsw_core->pcpu_stats, j);
 752                         do {
 753                                 start = u64_stats_fetch_begin(&p->syncp);
 754                                 tmp_rx_packets = p->port_rx_packets[i];
 755                                 tmp_rx_bytes = p->port_rx_bytes[i];
 756                         } while (u64_stats_fetch_retry(&p->syncp, start));
 757
 758                         rx_packets += tmp_rx_packets;
 759                         rx_bytes += tmp_rx_bytes;
 760                         rx_dropped += p->port_rx_dropped[i];
 761                 }
 762                 seq_printf(file, "port %3d %12llu %12llu %10u\n",
 763                            i, rx_packets, rx_bytes, rx_dropped);
 764         }
 765         rx_invalid = 0;
 766         for_each_possible_cpu(j) {
 767                 p = per_cpu_ptr(mlxsw_core->pcpu_stats, j);
 768                 rx_invalid += p->port_rx_invalid;
 769         }
 770         seq_printf(file, "port INV                           %10u\n",
 771                    rx_invalid);
 772         return 0;
 773 }
 774
 775 static int mlxsw_core_rx_stats_dbg_open(struct inode *inode, struct file *f)
 776 {
 777         struct mlxsw_core *mlxsw_core = inode->i_private;
 778
 779         return single_open(f, mlxsw_core_rx_stats_dbg_read, mlxsw_core);
 780 }
 781
 782 static const struct file_operations mlxsw_core_rx_stats_dbg_ops = {
 783         .owner = THIS_MODULE,
 784         .open = mlxsw_core_rx_stats_dbg_open,
 785         .release = single_release,
 786         .read = seq_read,
 787         .llseek = seq_lseek
 788 };
 789
 790 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver)
 791 {
 792         spin_lock(&mlxsw_core_driver_list_lock);
 793         list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list);
 794         spin_unlock(&mlxsw_core_driver_list_lock);
 795         return 0;
 796 }
 797 EXPORT_SYMBOL(mlxsw_core_driver_register);
 798
 799 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver)
 800 {
 801         spin_lock(&mlxsw_core_driver_list_lock);
 802         list_del(&mlxsw_driver->list);
 803         spin_unlock(&mlxsw_core_driver_list_lock);
 804 }
 805 EXPORT_SYMBOL(mlxsw_core_driver_unregister);
 806
 807 static struct mlxsw_driver *__driver_find(const char *kind)
 808 {
 809         struct mlxsw_driver *mlxsw_driver;
 810
 811         list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) {
 812                 if (strcmp(mlxsw_driver->kind, kind) == 0)
 813                         return mlxsw_driver;
 814         }
 815         return NULL;
 816 }
 817
 818 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind)
 819 {
 820         struct mlxsw_driver *mlxsw_driver;
 821
 822         spin_lock(&mlxsw_core_driver_list_lock);
 823         mlxsw_driver = __driver_find(kind);
 824         if (!mlxsw_driver) {
 825                 spin_unlock(&mlxsw_core_driver_list_lock);
 826                 request_module(MLXSW_MODULE_ALIAS_PREFIX "%s", kind);
 827                 spin_lock(&mlxsw_core_driver_list_lock);
 828                 mlxsw_driver = __driver_find(kind);
 829         }
 830         if (mlxsw_driver) {
 831                 if (!try_module_get(mlxsw_driver->owner))
 832                         mlxsw_driver = NULL;
 833         }
 834
 835         spin_unlock(&mlxsw_core_driver_list_lock);
 836         return mlxsw_driver;
 837 }
 838
 839 static void mlxsw_core_driver_put(const char *kind)
 840 {
 841         struct mlxsw_driver *mlxsw_driver;
 842
 843         spin_lock(&mlxsw_core_driver_list_lock);
 844         mlxsw_driver = __driver_find(kind);
 845         spin_unlock(&mlxsw_core_driver_list_lock);
 846         if (!mlxsw_driver)
 847                 return;
 848         module_put(mlxsw_driver->owner);
 849 }
 850
 851 static int mlxsw_core_debugfs_init(struct mlxsw_core *mlxsw_core)
 852 {
 853         const struct mlxsw_bus_info *bus_info = mlxsw_core->bus_info;
 854
 855         mlxsw_core->dbg_dir = debugfs_create_dir(bus_info->device_name,
 856                                                  mlxsw_core_dbg_root);
 857         if (!mlxsw_core->dbg_dir)
 858                 return -ENOMEM;
 859         debugfs_create_file("rx_stats", S_IRUGO, mlxsw_core->dbg_dir,
 860                             mlxsw_core, &mlxsw_core_rx_stats_dbg_ops);
 861         mlxsw_core->dbg.vsd_blob.data = (void *) &bus_info->vsd;
 862         mlxsw_core->dbg.vsd_blob.size = sizeof(bus_info->vsd);
 863         debugfs_create_blob("vsd", S_IRUGO, mlxsw_core->dbg_dir,
 864                             &mlxsw_core->dbg.vsd_blob);
 865         mlxsw_core->dbg.psid_blob.data = (void *) &bus_info->psid;
 866         mlxsw_core->dbg.psid_blob.size = sizeof(bus_info->psid);
 867         debugfs_create_blob("psid", S_IRUGO, mlxsw_core->dbg_dir,
 868                             &mlxsw_core->dbg.psid_blob);
 869         return 0;
 870 }
 871
 872 static void mlxsw_core_debugfs_fini(struct mlxsw_core *mlxsw_core)
 873 {
 874         debugfs_remove_recursive(mlxsw_core->dbg_dir);
 875 }
 876
 877 static int mlxsw_devlink_port_split(struct devlink *devlink,
 878                                     unsigned int port_index,
 879                                     unsigned int count)
 880 {
 881         struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
 882
 883         if (port_index >= MLXSW_PORT_MAX_PORTS)
 884                 return -EINVAL;
 885         if (!mlxsw_core->driver->port_split)
 886                 return -EOPNOTSUPP;
 887         return mlxsw_core->driver->port_split(mlxsw_core, port_index, count);
 888 }
 889
 890 static int mlxsw_devlink_port_unsplit(struct devlink *devlink,
 891                                       unsigned int port_index)
 892 {
 893         struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
 894
 895         if (port_index >= MLXSW_PORT_MAX_PORTS)
 896                 return -EINVAL;
 897         if (!mlxsw_core->driver->port_unsplit)
 898                 return -EOPNOTSUPP;
 899         return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index);
 900 }
 901
 902 static int
 903 mlxsw_devlink_sb_pool_get(struct devlink *devlink,
 904                           unsigned int sb_index, u16 pool_index,
 905                           struct devlink_sb_pool_info *pool_info)
 906 {
 907         struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
 908         struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
 909
 910         if (!mlxsw_driver->sb_pool_get)
 911                 return -EOPNOTSUPP;
 912         return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index,
 913                                          pool_index, pool_info);
 914 }
 915
 916 static int
 917 mlxsw_devlink_sb_pool_set(struct devlink *devlink,
 918                           unsigned int sb_index, u16 pool_index, u32 size,
 919                           enum devlink_sb_threshold_type threshold_type)
 920 {
 921         struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
 922         struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
 923
 924         if (!mlxsw_driver->sb_pool_set)
 925                 return -EOPNOTSUPP;
 926         return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index,
 927                                          pool_index, size, threshold_type);
 928 }
 929
 930 static void *__dl_port(struct devlink_port *devlink_port)
 931 {
 932         return container_of(devlink_port, struct mlxsw_core_port, devlink_port);
 933 }
 934
 935 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port,
 936                                           unsigned int sb_index, u16 pool_index,
 937                                           u32 *p_threshold)
 938 {
 939         struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
 940         struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
 941         struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
 942
 943         if (!mlxsw_driver->sb_port_pool_get)
 944                 return -EOPNOTSUPP;
 945         return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index,
 946                                               pool_index, p_threshold);
 947 }
 948
 949 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port,
 950                                           unsigned int sb_index, u16 pool_index,
 951                                           u32 threshold)
 952 {
 953         struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
 954         struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
 955         struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
 956
 957         if (!mlxsw_driver->sb_port_pool_set)
 958                 return -EOPNOTSUPP;
 959         return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index,
 960                                               pool_index, threshold);
 961 }
 962
 963 static int
 964 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port,
 965                                   unsigned int sb_index, u16 tc_index,
 966                                   enum devlink_sb_pool_type pool_type,
 967                                   u16 *p_pool_index, u32 *p_threshold)
 968 {
 969         struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
 970         struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
 971         struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
 972
 973         if (!mlxsw_driver->sb_tc_pool_bind_get)
 974                 return -EOPNOTSUPP;
 975         return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index,
 976                                                  tc_index, pool_type,
 977                                                  p_pool_index, p_threshold);
 978 }
 979
 980 static int
 981 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port,
 982                                   unsigned int sb_index, u16 tc_index,
 983                                   enum devlink_sb_pool_type pool_type,
 984                                   u16 pool_index, u32 threshold)
 985 {
 986         struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
 987         struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
 988         struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
 989
 990         if (!mlxsw_driver->sb_tc_pool_bind_set)
 991                 return -EOPNOTSUPP;
 992         return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index,
 993                                                  tc_index, pool_type,
 994                                                  pool_index, threshold);
 995 }
 996
 997 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink,
 998                                          unsigned int sb_index)
 999 {
1000         struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1001         struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1002
1003         if (!mlxsw_driver->sb_occ_snapshot)
1004                 return -EOPNOTSUPP;
1005         return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index);
1006 }
1007
1008 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink,
1009                                           unsigned int sb_index)
1010 {
1011         struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1012         struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1013
1014         if (!mlxsw_driver->sb_occ_max_clear)
1015                 return -EOPNOTSUPP;
1016         return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index);
1017 }
1018
1019 static int
1020 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port,
1021                                    unsigned int sb_index, u16 pool_index,
1022                                    u32 *p_cur, u32 *p_max)
1023 {
1024         struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1025         struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1026         struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1027
1028         if (!mlxsw_driver->sb_occ_port_pool_get)
1029                 return -EOPNOTSUPP;
1030         return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index,
1031                                                   pool_index, p_cur, p_max);
1032 }
1033
1034 static int
1035 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port,
1036                                       unsigned int sb_index, u16 tc_index,
1037                                       enum devlink_sb_pool_type pool_type,
1038                                       u32 *p_cur, u32 *p_max)
1039 {
1040         struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1041         struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1042         struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1043
1044         if (!mlxsw_driver->sb_occ_tc_port_bind_get)
1045                 return -EOPNOTSUPP;
1046         return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port,
1047                                                      sb_index, tc_index,
1048                                                      pool_type, p_cur, p_max);
1049 }
1050
1051 static const struct devlink_ops mlxsw_devlink_ops = {
1052         .port_split                     = mlxsw_devlink_port_split,
1053         .port_unsplit                   = mlxsw_devlink_port_unsplit,
1054         .sb_pool_get                    = mlxsw_devlink_sb_pool_get,
1055         .sb_pool_set                    = mlxsw_devlink_sb_pool_set,
1056         .sb_port_pool_get               = mlxsw_devlink_sb_port_pool_get,
1057         .sb_port_pool_set               = mlxsw_devlink_sb_port_pool_set,
1058         .sb_tc_pool_bind_get            = mlxsw_devlink_sb_tc_pool_bind_get,
1059         .sb_tc_pool_bind_set            = mlxsw_devlink_sb_tc_pool_bind_set,
1060         .sb_occ_snapshot                = mlxsw_devlink_sb_occ_snapshot,
1061         .sb_occ_max_clear               = mlxsw_devlink_sb_occ_max_clear,
1062         .sb_occ_port_pool_get           = mlxsw_devlink_sb_occ_port_pool_get,
1063         .sb_occ_tc_port_bind_get        = mlxsw_devlink_sb_occ_tc_port_bind_get,
1064 };
1065
1066 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
1067                                    const struct mlxsw_bus *mlxsw_bus,
1068                                    void *bus_priv)
1069 {
1070         const char *device_kind = mlxsw_bus_info->device_kind;
1071         struct mlxsw_core *mlxsw_core;
1072         struct mlxsw_driver *mlxsw_driver;
1073         struct devlink *devlink;
1074         size_t alloc_size;
1075         int err;
1076
1077         mlxsw_driver = mlxsw_core_driver_get(device_kind);
1078         if (!mlxsw_driver)
1079                 return -EINVAL;
1080         alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size;
1081         devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size);
1082         if (!devlink) {
1083                 err = -ENOMEM;
1084                 goto err_devlink_alloc;
1085         }
1086
1087         mlxsw_core = devlink_priv(devlink);
1088         INIT_LIST_HEAD(&mlxsw_core->rx_listener_list);
1089         INIT_LIST_HEAD(&mlxsw_core->event_listener_list);
1090         mlxsw_core->driver = mlxsw_driver;
1091         mlxsw_core->bus = mlxsw_bus;
1092         mlxsw_core->bus_priv = bus_priv;
1093         mlxsw_core->bus_info = mlxsw_bus_info;
1094
1095         mlxsw_core->pcpu_stats =
1096                 netdev_alloc_pcpu_stats(struct mlxsw_core_pcpu_stats);
1097         if (!mlxsw_core->pcpu_stats) {
1098                 err = -ENOMEM;
1099                 goto err_alloc_stats;
1100         }
1101
1102         if (mlxsw_driver->profile->used_max_lag &&
1103             mlxsw_driver->profile->used_max_port_per_lag) {
1104                 alloc_size = sizeof(u8) * mlxsw_driver->profile->max_lag *
1105                              mlxsw_driver->profile->max_port_per_lag;
1106                 mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL);
1107                 if (!mlxsw_core->lag.mapping) {
1108                         err = -ENOMEM;
1109                         goto err_alloc_lag_mapping;
1110                 }
1111         }
1112
1113         err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile);
1114         if (err)
1115                 goto err_bus_init;
1116
1117         err = mlxsw_emad_init(mlxsw_core);
1118         if (err)
1119                 goto err_emad_init;
1120
1121         err = devlink_register(devlink, mlxsw_bus_info->dev);
1122         if (err)
1123                 goto err_devlink_register;
1124
1125         err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon);
1126         if (err)
1127                 goto err_hwmon_init;
1128
1129         err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info);
1130         if (err)
1131                 goto err_driver_init;
1132
1133         err = mlxsw_core_debugfs_init(mlxsw_core);
1134         if (err)
1135                 goto err_debugfs_init;
1136
1137         return 0;
1138
1139 err_debugfs_init:
1140         mlxsw_core->driver->fini(mlxsw_core);
1141 err_driver_init:
1142 err_hwmon_init:
1143         devlink_unregister(devlink);
1144 err_devlink_register:
1145         mlxsw_emad_fini(mlxsw_core);
1146 err_emad_init:
1147         mlxsw_bus->fini(bus_priv);
1148 err_bus_init:
1149         kfree(mlxsw_core->lag.mapping);
1150 err_alloc_lag_mapping:
1151         free_percpu(mlxsw_core->pcpu_stats);
1152 err_alloc_stats:
1153         devlink_free(devlink);
1154 err_devlink_alloc:
1155         mlxsw_core_driver_put(device_kind);
1156         return err;
1157 }
1158 EXPORT_SYMBOL(mlxsw_core_bus_device_register);
1159
1160 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core)
1161 {
1162         const char *device_kind = mlxsw_core->bus_info->device_kind;
1163         struct devlink *devlink = priv_to_devlink(mlxsw_core);
1164
1165         mlxsw_core_debugfs_fini(mlxsw_core);
1166         mlxsw_core->driver->fini(mlxsw_core);
1167         devlink_unregister(devlink);
1168         mlxsw_emad_fini(mlxsw_core);
1169         mlxsw_core->bus->fini(mlxsw_core->bus_priv);
1170         kfree(mlxsw_core->lag.mapping);
1171         free_percpu(mlxsw_core->pcpu_stats);
1172         devlink_free(devlink);
1173         mlxsw_core_driver_put(device_kind);
1174 }
1175 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister);
1176
1177 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
1178                                   const struct mlxsw_tx_info *tx_info)
1179 {
1180         return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv,
1181                                                   tx_info);
1182 }
1183 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy);
1184
1185 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1186                             const struct mlxsw_tx_info *tx_info)
1187 {
1188         return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb,
1189                                              tx_info);
1190 }
1191 EXPORT_SYMBOL(mlxsw_core_skb_transmit);
1192
1193 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a,
1194                                    const struct mlxsw_rx_listener *rxl_b)
1195 {
1196         return (rxl_a->func == rxl_b->func &&
1197                 rxl_a->local_port == rxl_b->local_port &&
1198                 rxl_a->trap_id == rxl_b->trap_id);
1199 }
1200
1201 static struct mlxsw_rx_listener_item *
1202 __find_rx_listener_item(struct mlxsw_core *mlxsw_core,
1203                         const struct mlxsw_rx_listener *rxl,
1204                         void *priv)
1205 {
1206         struct mlxsw_rx_listener_item *rxl_item;
1207
1208         list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) {
1209                 if (__is_rx_listener_equal(&rxl_item->rxl, rxl) &&
1210                     rxl_item->priv == priv)
1211                         return rxl_item;
1212         }
1213         return NULL;
1214 }
1215
1216 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
1217                                     const struct mlxsw_rx_listener *rxl,
1218                                     void *priv)
1219 {
1220         struct mlxsw_rx_listener_item *rxl_item;
1221
1222         rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
1223         if (rxl_item)
1224                 return -EEXIST;
1225         rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL);
1226         if (!rxl_item)
1227                 return -ENOMEM;
1228         rxl_item->rxl = *rxl;
1229         rxl_item->priv = priv;
1230
1231         list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list);
1232         return 0;
1233 }
1234 EXPORT_SYMBOL(mlxsw_core_rx_listener_register);
1235
1236 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
1237                                        const struct mlxsw_rx_listener *rxl,
1238                                        void *priv)
1239 {
1240         struct mlxsw_rx_listener_item *rxl_item;
1241
1242         rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
1243         if (!rxl_item)
1244                 return;
1245         list_del_rcu(&rxl_item->list);
1246         synchronize_rcu();
1247         kfree(rxl_item);
1248 }
1249 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister);
1250
1251 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port,
1252                                            void *priv)
1253 {
1254         struct mlxsw_event_listener_item *event_listener_item = priv;
1255         struct mlxsw_reg_info reg;
1256         char *payload;
1257         char *op_tlv = mlxsw_emad_op_tlv(skb);
1258         char *reg_tlv = mlxsw_emad_reg_tlv(skb);
1259
1260         reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv);
1261         reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32);
1262         payload = mlxsw_emad_reg_payload(op_tlv);
1263         event_listener_item->el.func(&reg, payload, event_listener_item->priv);
1264         dev_kfree_skb(skb);
1265 }
1266
1267 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a,
1268                                       const struct mlxsw_event_listener *el_b)
1269 {
1270         return (el_a->func == el_b->func &&
1271                 el_a->trap_id == el_b->trap_id);
1272 }
1273
1274 static struct mlxsw_event_listener_item *
1275 __find_event_listener_item(struct mlxsw_core *mlxsw_core,
1276                            const struct mlxsw_event_listener *el,
1277                            void *priv)
1278 {
1279         struct mlxsw_event_listener_item *el_item;
1280
1281         list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) {
1282                 if (__is_event_listener_equal(&el_item->el, el) &&
1283                     el_item->priv == priv)
1284                         return el_item;
1285         }
1286         return NULL;
1287 }
1288
1289 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
1290                                        const struct mlxsw_event_listener *el,
1291                                        void *priv)
1292 {
1293         int err;
1294         struct mlxsw_event_listener_item *el_item;
1295         const struct mlxsw_rx_listener rxl = {
1296                 .func = mlxsw_core_event_listener_func,
1297                 .local_port = MLXSW_PORT_DONT_CARE,
1298                 .trap_id = el->trap_id,
1299         };
1300
1301         el_item = __find_event_listener_item(mlxsw_core, el, priv);
1302         if (el_item)
1303                 return -EEXIST;
1304         el_item = kmalloc(sizeof(*el_item), GFP_KERNEL);
1305         if (!el_item)
1306                 return -ENOMEM;
1307         el_item->el = *el;
1308         el_item->priv = priv;
1309
1310         err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item);
1311         if (err)
1312                 goto err_rx_listener_register;
1313
1314         /* No reason to save item if we did not manage to register an RX
1315          * listener for it.
1316          */
1317         list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list);
1318
1319         return 0;
1320
1321 err_rx_listener_register:
1322         kfree(el_item);
1323         return err;
1324 }
1325 EXPORT_SYMBOL(mlxsw_core_event_listener_register);
1326
1327 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
1328                                           const struct mlxsw_event_listener *el,
1329                                           void *priv)
1330 {
1331         struct mlxsw_event_listener_item *el_item;
1332         const struct mlxsw_rx_listener rxl = {
1333                 .func = mlxsw_core_event_listener_func,
1334                 .local_port = MLXSW_PORT_DONT_CARE,
1335                 .trap_id = el->trap_id,
1336         };
1337
1338         el_item = __find_event_listener_item(mlxsw_core, el, priv);
1339         if (!el_item)
1340                 return;
1341         mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl, el_item);
1342         list_del(&el_item->list);
1343         kfree(el_item);
1344 }
1345 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister);
1346
1347 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core)
1348 {
1349         return atomic64_inc_return(&mlxsw_core->emad.tid);
1350 }
1351
1352 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core,
1353                                       const struct mlxsw_reg_info *reg,
1354                                       char *payload,
1355                                       enum mlxsw_core_reg_access_type type,
1356                                       struct list_head *bulk_list,
1357                                       mlxsw_reg_trans_cb_t *cb,
1358                                       unsigned long cb_priv)
1359 {
1360         u64 tid = mlxsw_core_tid_get(mlxsw_core);
1361         struct mlxsw_reg_trans *trans;
1362         int err;
1363
1364         trans = kzalloc(sizeof(*trans), GFP_KERNEL);
1365         if (!trans)
1366                 return -ENOMEM;
1367
1368         err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans,
1369                                     bulk_list, cb, cb_priv, tid);
1370         if (err) {
1371                 kfree(trans);
1372                 return err;
1373         }
1374         return 0;
1375 }
1376
1377 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
1378                           const struct mlxsw_reg_info *reg, char *payload,
1379                           struct list_head *bulk_list,
1380                           mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
1381 {
1382         return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
1383                                           MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
1384                                           bulk_list, cb, cb_priv);
1385 }
1386 EXPORT_SYMBOL(mlxsw_reg_trans_query);
1387
1388 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
1389                           const struct mlxsw_reg_info *reg, char *payload,
1390                           struct list_head *bulk_list,
1391                           mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
1392 {
1393         return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
1394                                           MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
1395                                           bulk_list, cb, cb_priv);
1396 }
1397 EXPORT_SYMBOL(mlxsw_reg_trans_write);
1398
1399 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans)
1400 {
1401         struct mlxsw_core *mlxsw_core = trans->core;
1402         int err;
1403
1404         wait_for_completion(&trans->completion);
1405         cancel_delayed_work_sync(&trans->timeout_dw);
1406         err = trans->err;
1407
1408         if (trans->retries)
1409                 dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n",
1410                          trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid);
1411         if (err)
1412                 dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n",
1413                         trans->tid, trans->reg->id,
1414                         mlxsw_reg_id_str(trans->reg->id),
1415                         mlxsw_core_reg_access_type_str(trans->type),
1416                         trans->emad_status,
1417                         mlxsw_emad_op_tlv_status_str(trans->emad_status));
1418
1419         list_del(&trans->bulk_list);
1420         kfree_rcu(trans, rcu);
1421         return err;
1422 }
1423
1424 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list)
1425 {
1426         struct mlxsw_reg_trans *trans;
1427         struct mlxsw_reg_trans *tmp;
1428         int sum_err = 0;
1429         int err;
1430
1431         list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) {
1432                 err = mlxsw_reg_trans_wait(trans);
1433                 if (err && sum_err == 0)
1434                         sum_err = err; /* first error to be returned */
1435         }
1436         return sum_err;
1437 }
1438 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait);
1439
1440 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core,
1441                                      const struct mlxsw_reg_info *reg,
1442                                      char *payload,
1443                                      enum mlxsw_core_reg_access_type type)
1444 {
1445         enum mlxsw_emad_op_tlv_status status;
1446         int err, n_retry;
1447         char *in_mbox, *out_mbox, *tmp;
1448
1449         dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n",
1450                 reg->id, mlxsw_reg_id_str(reg->id),
1451                 mlxsw_core_reg_access_type_str(type));
1452
1453         in_mbox = mlxsw_cmd_mbox_alloc();
1454         if (!in_mbox)
1455                 return -ENOMEM;
1456
1457         out_mbox = mlxsw_cmd_mbox_alloc();
1458         if (!out_mbox) {
1459                 err = -ENOMEM;
1460                 goto free_in_mbox;
1461         }
1462
1463         mlxsw_emad_pack_op_tlv(in_mbox, reg, type,
1464                                mlxsw_core_tid_get(mlxsw_core));
1465         tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
1466         mlxsw_emad_pack_reg_tlv(tmp, reg, payload);
1467
1468         n_retry = 0;
1469 retry:
1470         err = mlxsw_cmd_access_reg(mlxsw_core, in_mbox, out_mbox);
1471         if (!err) {
1472                 err = mlxsw_emad_process_status(out_mbox, &status);
1473                 if (err) {
1474                         if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY)
1475                                 goto retry;
1476                         dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n",
1477                                 status, mlxsw_emad_op_tlv_status_str(status));
1478                 }
1479         }
1480
1481         if (!err)
1482                 memcpy(payload, mlxsw_emad_reg_payload(out_mbox),
1483                        reg->len);
1484
1485         mlxsw_cmd_mbox_free(out_mbox);
1486 free_in_mbox:
1487         mlxsw_cmd_mbox_free(in_mbox);
1488         if (err)
1489                 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n",
1490                         reg->id, mlxsw_reg_id_str(reg->id),
1491                         mlxsw_core_reg_access_type_str(type));
1492         return err;
1493 }
1494
1495 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core,
1496                                      char *payload, size_t payload_len,
1497                                      unsigned long cb_priv)
1498 {
1499         char *orig_payload = (char *) cb_priv;
1500
1501         memcpy(orig_payload, payload, payload_len);
1502 }
1503
1504 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core,
1505                                  const struct mlxsw_reg_info *reg,
1506                                  char *payload,
1507                                  enum mlxsw_core_reg_access_type type)
1508 {
1509         LIST_HEAD(bulk_list);
1510         int err;
1511
1512         /* During initialization EMAD interface is not available to us,
1513          * so we default to command interface. We switch to EMAD interface
1514          * after setting the appropriate traps.
1515          */
1516         if (!mlxsw_core->emad.use_emad)
1517                 return mlxsw_core_reg_access_cmd(mlxsw_core, reg,
1518                                                  payload, type);
1519
1520         err = mlxsw_core_reg_access_emad(mlxsw_core, reg,
1521                                          payload, type, &bulk_list,
1522                                          mlxsw_core_reg_access_cb,
1523                                          (unsigned long) payload);
1524         if (err)
1525                 return err;
1526         return mlxsw_reg_trans_bulk_wait(&bulk_list);
1527 }
1528
1529 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
1530                     const struct mlxsw_reg_info *reg, char *payload)
1531 {
1532         return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1533                                      MLXSW_CORE_REG_ACCESS_TYPE_QUERY);
1534 }
1535 EXPORT_SYMBOL(mlxsw_reg_query);
1536
1537 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
1538                     const struct mlxsw_reg_info *reg, char *payload)
1539 {
1540         return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1541                                      MLXSW_CORE_REG_ACCESS_TYPE_WRITE);
1542 }
1543 EXPORT_SYMBOL(mlxsw_reg_write);
1544
1545 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1546                             struct mlxsw_rx_info *rx_info)
1547 {
1548         struct mlxsw_rx_listener_item *rxl_item;
1549         const struct mlxsw_rx_listener *rxl;
1550         struct mlxsw_core_pcpu_stats *pcpu_stats;
1551         u8 local_port;
1552         bool found = false;
1553
1554         if (rx_info->is_lag) {
1555                 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n",
1556                                     __func__, rx_info->u.lag_id,
1557                                     rx_info->trap_id);
1558                 /* Upper layer does not care if the skb came from LAG or not,
1559                  * so just get the local_port for the lag port and push it up.
1560                  */
1561                 local_port = mlxsw_core_lag_mapping_get(mlxsw_core,
1562                                                         rx_info->u.lag_id,
1563                                                         rx_info->lag_port_index);
1564         } else {
1565                 local_port = rx_info->u.sys_port;
1566         }
1567
1568         dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n",
1569                             __func__, local_port, rx_info->trap_id);
1570
1571         if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) ||
1572             (local_port >= MLXSW_PORT_MAX_PORTS))
1573                 goto drop;
1574
1575         rcu_read_lock();
1576         list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) {
1577                 rxl = &rxl_item->rxl;
1578                 if ((rxl->local_port == MLXSW_PORT_DONT_CARE ||
1579                      rxl->local_port == local_port) &&
1580                     rxl->trap_id == rx_info->trap_id) {
1581                         found = true;
1582                         break;
1583                 }
1584         }
1585         rcu_read_unlock();
1586         if (!found)
1587                 goto drop;
1588
1589         pcpu_stats = this_cpu_ptr(mlxsw_core->pcpu_stats);
1590         u64_stats_update_begin(&pcpu_stats->syncp);
1591         pcpu_stats->port_rx_packets[local_port]++;
1592         pcpu_stats->port_rx_bytes[local_port] += skb->len;
1593         pcpu_stats->trap_rx_packets[rx_info->trap_id]++;
1594         pcpu_stats->trap_rx_bytes[rx_info->trap_id] += skb->len;
1595         u64_stats_update_end(&pcpu_stats->syncp);
1596
1597         rxl->func(skb, local_port, rxl_item->priv);
1598         return;
1599
1600 drop:
1601         if (rx_info->trap_id >= MLXSW_TRAP_ID_MAX)
1602                 this_cpu_inc(mlxsw_core->pcpu_stats->trap_rx_invalid);
1603         else
1604                 this_cpu_inc(mlxsw_core->pcpu_stats->trap_rx_dropped[rx_info->trap_id]);
1605         if (local_port >= MLXSW_PORT_MAX_PORTS)
1606                 this_cpu_inc(mlxsw_core->pcpu_stats->port_rx_invalid);
1607         else
1608                 this_cpu_inc(mlxsw_core->pcpu_stats->port_rx_dropped[local_port]);
1609         dev_kfree_skb(skb);
1610 }
1611 EXPORT_SYMBOL(mlxsw_core_skb_receive);
1612
1613 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core,
1614                                         u16 lag_id, u8 port_index)
1615 {
1616         return mlxsw_core->driver->profile->max_port_per_lag * lag_id +
1617                port_index;
1618 }
1619
1620 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
1621                                 u16 lag_id, u8 port_index, u8 local_port)
1622 {
1623         int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1624                                                  lag_id, port_index);
1625
1626         mlxsw_core->lag.mapping[index] = local_port;
1627 }
1628 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set);
1629
1630 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
1631                               u16 lag_id, u8 port_index)
1632 {
1633         int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1634                                                  lag_id, port_index);
1635
1636         return mlxsw_core->lag.mapping[index];
1637 }
1638 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get);
1639
1640 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
1641                                   u16 lag_id, u8 local_port)
1642 {
1643         int i;
1644
1645         for (i = 0; i < mlxsw_core->driver->profile->max_port_per_lag; i++) {
1646                 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1647                                                          lag_id, i);
1648
1649                 if (mlxsw_core->lag.mapping[index] == local_port)
1650                         mlxsw_core->lag.mapping[index] = 0;
1651         }
1652 }
1653 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear);
1654
1655 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core,
1656                          struct mlxsw_core_port *mlxsw_core_port, u8 local_port,
1657                          struct net_device *dev, bool split, u32 split_group)
1658 {
1659         struct devlink *devlink = priv_to_devlink(mlxsw_core);
1660         struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1661
1662         if (split)
1663                 devlink_port_split_set(devlink_port, split_group);
1664         devlink_port_type_eth_set(devlink_port, dev);
1665         return devlink_port_register(devlink, devlink_port, local_port);
1666 }
1667 EXPORT_SYMBOL(mlxsw_core_port_init);
1668
1669 void mlxsw_core_port_fini(struct mlxsw_core_port *mlxsw_core_port)
1670 {
1671         struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1672
1673         devlink_port_unregister(devlink_port);
1674 }
1675 EXPORT_SYMBOL(mlxsw_core_port_fini);
1676
1677 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core,
1678                                     const char *buf, size_t size)
1679 {
1680         __be32 *m = (__be32 *) buf;
1681         int i;
1682         int count = size / sizeof(__be32);
1683
1684         for (i = count - 1; i >= 0; i--)
1685                 if (m[i])
1686                         break;
1687         i++;
1688         count = i ? i : 1;
1689         for (i = 0; i < count; i += 4)
1690                 dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n",
1691                         i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]),
1692                         be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3]));
1693 }
1694
1695 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod,
1696                    u32 in_mod, bool out_mbox_direct,
1697                    char *in_mbox, size_t in_mbox_size,
1698                    char *out_mbox, size_t out_mbox_size)
1699 {
1700         u8 status;
1701         int err;
1702
1703         BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32));
1704         if (!mlxsw_core->bus->cmd_exec)
1705                 return -EOPNOTSUPP;
1706
1707         dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1708                 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod);
1709         if (in_mbox) {
1710                 dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n");
1711                 mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size);
1712         }
1713
1714         err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode,
1715                                         opcode_mod, in_mod, out_mbox_direct,
1716                                         in_mbox, in_mbox_size,
1717                                         out_mbox, out_mbox_size, &status);
1718
1719         if (err == -EIO && status != MLXSW_CMD_STATUS_OK) {
1720                 dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n",
1721                         opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1722                         in_mod, status, mlxsw_cmd_status_str(status));
1723         } else if (err == -ETIMEDOUT) {
1724                 dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1725                         opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1726                         in_mod);
1727         }
1728
1729         if (!err && out_mbox) {
1730                 dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n");
1731                 mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size);
1732         }
1733         return err;
1734 }
1735 EXPORT_SYMBOL(mlxsw_cmd_exec);
1736
1737 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay)
1738 {
1739         return queue_delayed_work(mlxsw_wq, dwork, delay);
1740 }
1741 EXPORT_SYMBOL(mlxsw_core_schedule_dw);
1742
1743 static int __init mlxsw_core_module_init(void)
1744 {
1745         int err;
1746
1747         mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, WQ_MEM_RECLAIM, 0);
1748         if (!mlxsw_wq)
1749                 return -ENOMEM;
1750         mlxsw_core_dbg_root = debugfs_create_dir(mlxsw_core_driver_name, NULL);
1751         if (!mlxsw_core_dbg_root) {
1752                 err = -ENOMEM;
1753                 goto err_debugfs_create_dir;
1754         }
1755         return 0;
1756
1757 err_debugfs_create_dir:
1758         destroy_workqueue(mlxsw_wq);
1759         return err;
1760 }
1761
1762 static void __exit mlxsw_core_module_exit(void)
1763 {
1764         debugfs_remove_recursive(mlxsw_core_dbg_root);
1765         destroy_workqueue(mlxsw_wq);
1766 }
1767
1768 module_init(mlxsw_core_module_init);
1769 module_exit(mlxsw_core_module_exit);
1770
1771 MODULE_LICENSE("Dual BSD/GPL");
1772 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
1773 MODULE_DESCRIPTION("Mellanox switch device core driver");